SPECS: verilog.spec - up to 0.8.6, rel 1, builds here

[agaran]

Author: agaran                       Date: Fri Aug  1 15:05:58 2008 GMT
Module: SPECS                         Tag: HEAD
---- Log message:
- up to 0.8.6, rel 1, builds here

---- Files affected:
SPECS:
   verilog.spec (1.5 -> 1.6) 

---- Diffs:

================================================================
Index: SPECS/verilog.spec
diff -u SPECS/verilog.spec:1.5 SPECS/verilog.spec:1.6
--- SPECS/verilog.spec:1.5	Mon Feb 12 23:09:19 2007
+++ SPECS/verilog.spec	Fri Aug  1 17:05:52 2008
@@ -2,12 +2,12 @@
 Summary:	Icarus Verilog - Verilog compiler and simulator
 Summary(pl.UTF-8):	Icarus Verilog - kompilator i symulator Veriloga
 Name:		verilog
-Version:	0.8.2
+Version:	0.8.6
 Release:	1
 License:	GPL (except tgt-edif with more relaxed license)
 Group:		Applications/Engineering
 Source0:	ftp://ftp.icarus.com/pub/eda/verilog/v0.8/%{name}-%{version}.tar.gz
-# Source0-md5:	41650504e4460508a0800008a2628e07
+# Source0-md5:	281c161ac42ea1342ef8d8d6b3a1907a
 Patch0:		%{name}-DESTDIR.patch
 URL:		http://www.icarus.com/eda/verilog/
 BuildRequires:	bison
@@ -33,6 +33,7 @@
 mv tgt-edif/LICENSE.txt LICENSE_edif.txt
 
 %build
+#find . -type f -name 'config.sub' -exec cp -f /usr/share/automake/config.sub "{}" \;
 %configure
 
 %{__make}
@@ -70,6 +71,7 @@
 %{_libdir}/ivl/cadpli.vpl
 %{_libdir}/ivl/s*
 %{_libdir}/ivl/v*.conf
+# some *.confs are missing
 %{_mandir}/man1/*
 %{_examplesdir}/%{name}-%{version}
 
@@ -79,6 +81,9 @@
 All persons listed below can be reached at <cvs_login>@pld-linux.org
 
 $Log$
+Revision 1.6  2008/08/01 15:05:52  agaran
+- up to 0.8.6, rel 1, builds here
+
 Revision 1.5  2007/02/12 22:09:19  glen
 - tabs in preamble
 
================================================================

---- CVS-web:
    http://cvs.pld-linux.org/cgi-bin/cvsweb.cgi/SPECS/verilog.spec?r1=1.5&r2=1.6&f=u