packages: kernel/kernel.spec, kernel/kernel-intel-pre-9xx.patch (NEW) - int...

arekm arekm at pld-linux.org
Fri Sep 11 14:47:40 CEST 2009


Author: arekm                        Date: Fri Sep 11 12:47:40 2009 GMT
Module: packages                      Tag: HEAD
---- Log message:
- intel 8xx stability fixes

---- Files affected:
packages/kernel:
   kernel.spec (1.702 -> 1.703) , kernel-intel-pre-9xx.patch (NONE -> 1.1)  (NEW)

---- Diffs:

================================================================
Index: packages/kernel/kernel.spec
diff -u packages/kernel/kernel.spec:1.702 packages/kernel/kernel.spec:1.703
--- packages/kernel/kernel.spec:1.702	Fri Sep 11 08:41:52 2009
+++ packages/kernel/kernel.spec	Fri Sep 11 14:47:34 2009
@@ -312,6 +312,8 @@
 Patch2001:	kernel-pwc-uncompress.patch
 Patch2003:	kernel-regressions.patch
 
+Patch2100:	kernel-intel-pre-9xx.patch
+
 # kill some thousands of warnings
 # (only warnings, so just remove parts of this patch if conflics)
 Patch2500:	kernel-warnings.patch
@@ -901,6 +903,8 @@
 %patch2001 -p1
 #%patch2003 -p1
 
+%patch2100 -p1
+
 # Fix EXTRAVERSION in main Makefile
 sed -i 's#EXTRAVERSION =.*#EXTRAVERSION = %{postver}%{?alt_kernel:_%{alt_kernel}}#g' Makefile
 
@@ -1579,6 +1583,9 @@
 All persons listed below can be reached at <cvs_login>@pld-linux.org
 
 $Log$
+Revision 1.703  2009/09/11 12:47:34  arekm
+- intel 8xx stability fixes
+
 Revision 1.702  2009/09/11 06:41:52  arekm
 - apparmor updated to latest version seen in ubuntu kernel
 

================================================================
Index: packages/kernel/kernel-intel-pre-9xx.patch
diff -u /dev/null packages/kernel/kernel-intel-pre-9xx.patch:1.1
--- /dev/null	Fri Sep 11 14:47:40 2009
+++ packages/kernel/kernel-intel-pre-9xx.patch	Fri Sep 11 14:47:34 2009
@@ -0,0 +1,280 @@
+From eric at anholt.net Fri Sep 11 05:45:53 2009
+Return-path: <intel-gfx-bounces at lists.freedesktop.org>
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+From: Eric Anholt <eric at anholt.net>
+To: intel-gfx at lists.freedesktop.org
+Date: Thu, 10 Sep 2009 20:45:53 -0700
+Message-Id: <1252640753-6306-1-git-send-email-eric at anholt.net>
+X-Mailer: git-send-email 1.6.3.3
+Cc: stable at kernel.org
+Subject: [Intel-gfx] [PATCH] agp/intel: Fix the pre-9xx chipset flush.
+X-BeenThere: intel-gfx at lists.freedesktop.org
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+
+Ever since we enabled GEM, the pre-9xx chipsets (particularly 865) have had
+serious stability issues.  Back in May a wbinvd was added to the DRM to
+work around much of the problem.  Some failure remained -- easily visible
+by dragging a window around on an X -retro desktop, or by looking at bugzilla.
+
+The chipset flush was on the right track -- hitting the right amount of
+memory, and it appears to be the only way to flush on these chipsets, but the
+flush page was mapped uncached.  As a result, the writes trying to clear the
+writeback cache ended up bypassing the cache, and not flushing anything!  The
+wbinvd would flush out other writeback data and often cause the data we wanted
+to get flushed, but not always.  By removing the setting of the page to UC
+and instead just clflushing the data we write to try to flush it, we get the
+desired behavior with no wbinvd.
+
+Signed-off-by: Eric Anholt <eric at anholt.net>
+Cc: stable at kernel.org
+---
+ drivers/char/agp/intel-agp.c    |   30 +++++++++++++++++++++++-------
+ drivers/gpu/drm/i915/i915_gem.c |   10 ----------
+ 2 files changed, 23 insertions(+), 17 deletions(-)
+
+diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c
+index c172917..e8dc75f 100644
+--- a/drivers/char/agp/intel-agp.c
++++ b/drivers/char/agp/intel-agp.c
+@@ -682,23 +682,39 @@ static void intel_i830_setup_flush(void)
+ 	if (!intel_private.i8xx_page)
+ 		return;
+ 
+-	/* make page uncached */
+-	map_page_into_agp(intel_private.i8xx_page);
+-
+ 	intel_private.i8xx_flush_page = kmap(intel_private.i8xx_page);
+ 	if (!intel_private.i8xx_flush_page)
+ 		intel_i830_fini_flush();
+ }
+ 
++static void
++do_wbinvd(void *null)
++{
++	wbinvd();
++}
++
++/* The chipset_flush interface needs to get data that has already been
++ * flushed out of the CPU all the way out to main memory, because the GPU
++ * doesn't snoop those buffers.
++ *
++ * The 8xx series doesn't have the same lovely interface for flushing the
++ * chipset write buffers that the later chips do. According to the 865
++ * specs, it's 64 octwords, or 1KB.  So, to get those previous things in
++ * that buffer out, we just fill 1KB and clflush it out, on the assumption
++ * that it'll push whatever was in there out.  It appears to work.
++ */
+ static void intel_i830_chipset_flush(struct agp_bridge_data *bridge)
+ {
+ 	unsigned int *pg = intel_private.i8xx_flush_page;
+-	int i;
+ 
+-	for (i = 0; i < 256; i += 2)
+-		*(pg + i) = i;
++	memset(pg, 0, 1024);
+ 
+-	wmb();
++	if (cpu_has_clflush) {
++		clflush_cache_range(pg, 1024);
++	} else {
++		if (on_each_cpu(do_wbinvd, NULL, 1) != 0)
++			printk(KERN_ERR "Timed out waiting for cache flush.\n");
++	}
+ }
+ 
+ /* The intel i830 automatically initializes the agp aperture during POST.
+diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
+index f3758f9..30ea4b6 100644
+--- a/drivers/gpu/drm/i915/i915_gem.c
++++ b/drivers/gpu/drm/i915/i915_gem.c
+@@ -2511,16 +2511,6 @@ i915_gem_clflush_object(struct drm_gem_object *obj)
+ 	if (obj_priv->pages == NULL)
+ 		return;
+ 
+-	/* XXX: The 865 in particular appears to be weird in how it handles
+-	 * cache flushing.  We haven't figured it out, but the
+-	 * clflush+agp_chipset_flush doesn't appear to successfully get the
+-	 * data visible to the PGU, while wbinvd + agp_chipset_flush does.
+-	 */
+-	if (IS_I865G(obj->dev)) {
+-		wbinvd();
+-		return;
+-	}
+-
+ 	drm_clflush_pages(obj_priv->pages, obj->size / PAGE_SIZE);
+ }
+ 
+-- 
+1.6.3.3
+
+_______________________________________________
+Intel-gfx mailing list
+Intel-gfx at lists.freedesktop.org
+http://lists.freedesktop.org/mailman/listinfo/intel-gfx
+
+From Brice.Goglin at ens-lyon.org Fri Sep 11 08:34:14 2009
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+	11 Sep 2009 08:51:40 +0200
+Resent-From: Brice Goglin <brice.goglin at gmail.com>
+Resent-To: intel-gfx at lists.freedesktop.org
+Resent-Date: Fri, 11 Sep 2009 08:51:17 +0200
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+Message-ID: <4AA9EF66.4030501 at ens-lyon.org>
+Date: Fri, 11 Sep 2009 08:34:14 +0200
+From: Brice Goglin <Brice.Goglin at ens-lyon.org>
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+To: Eric Anholt <eric at anholt.net>
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+Cc: intel-gfx at lists.freedesktop.org,
+ stable at kernel.org
+Subject: Re: [Intel-gfx] [PATCH] agp/intel: Fix the pre-9xx chipset flush.
+X-BeenThere: intel-gfx at lists.freedesktop.org
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+
+Eric Anholt wrote:
+> The chipset flush was on the right track -- hitting the right amount of
+> memory, and it appears to be the only way to flush on these chipsets, but the
+> flush page was mapped uncached.  As a result, the writes trying to clear the
+> writeback cache ended up bypassing the cache, and not flushing anything!  The
+> wbinvd would flush out other writeback data and often cause the data we wanted
+> to get flushed, but not always.  By removing the setting of the page to UC
+> and instead just clflushing the data we write to try to flush it, we get the
+> desired behavior with no wbinvd. 
+>   
+
+This helps a lot, thanks Eric. I've been running various things under
+metacity and compiz during the last 10mn without problems while X would
+usually hang after 10s. But I needed the below patch to build the
+intel-agp driver as a module.
+
+Signed-off-by: Brice Goglin <Brice.Goglin at ens-lyon.org>
+
+Index: linux-2.6.31/arch/x86/mm/pageattr.c
+===================================================================
+--- linux-2.6.31.orig/arch/x86/mm/pageattr.c	2009-09-11 08:02:14.000000000 +0200
++++ linux-2.6.31/arch/x86/mm/pageattr.c	2009-09-11 08:02:48.000000000 +0200
+@@ -143,6 +143,7 @@
+ 
+ 	mb();
+ }
++EXPORT_SYMBOL_GPL(clflush_cache_range);
+ 
+ static void __cpa_flush_all(void *arg)
+ {
+
+
+
+_______________________________________________
+Intel-gfx mailing list
+Intel-gfx at lists.freedesktop.org
+http://lists.freedesktop.org/mailman/listinfo/intel-gfx
+
================================================================

---- CVS-web:
    http://cvs.pld-linux.org/cgi-bin/cvsweb.cgi/packages/kernel/kernel.spec?r1=1.702&r2=1.703&f=u



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