[packages/xorg-app-intel-gpu-tools] - updated to 1.11 - removed obsolete types patch - added missing patch (missing man page source)
qboosh
qboosh at pld-linux.org
Sat Jun 13 18:42:22 CEST 2015
commit 746ff741803ef34d3bb9fe2037c1572ce031530f
Author: Jakub Bogusz <qboosh at pld-linux.org>
Date: Sat Jun 13 18:43:40 2015 +0200
- updated to 1.11
- removed obsolete types patch
- added missing patch (missing man page source)
intel-gpu-tools-missing.patch | 232 ++++++++++++++++++++++++++++++++++++++++++
intel-gpu-tools-types.patch | 20 ----
xorg-app-intel-gpu-tools.spec | 14 ++-
3 files changed, 242 insertions(+), 24 deletions(-)
---
diff --git a/xorg-app-intel-gpu-tools.spec b/xorg-app-intel-gpu-tools.spec
index 63d37d0..040622f 100644
--- a/xorg-app-intel-gpu-tools.spec
+++ b/xorg-app-intel-gpu-tools.spec
@@ -1,18 +1,20 @@
Summary: Tools for Intel DRM driver
Summary(pl.UTF-8): Narzędzia do sterownika Intel DRM
Name: xorg-app-intel-gpu-tools
-Version: 1.10
+Version: 1.11
Release: 1
License: MIT
Group: X11/Applications
Source0: http://xorg.freedesktop.org/archive/individual/app/intel-gpu-tools-%{version}.tar.bz2
-# Source0-md5: 4d208c9294adcc7ea34b960e9950dd1e
-Patch0: intel-gpu-tools-types.patch
+# Source0-md5: 836e9fd084f63da2a29fe81a47eb3db8
+Patch0: intel-gpu-tools-missing.patch
URL: http://intellinuxgraphics.org/
BuildRequires: autoconf >= 2.63
BuildRequires: automake >= 1:1.12
BuildRequires: bison
BuildRequires: cairo-devel >= 1.12.0
+# rst2man
+BuildRequires: docutils
BuildRequires: glib2-devel >= 2.0
%if %(locale -a | grep -q '^en_US\.UTF-8$'; echo $?)
BuildRequires: glibc-localedb-all
@@ -21,7 +23,7 @@ BuildRequires: gtk-doc >= 1.14
BuildRequires: libdrm-devel >= 2.4.52
BuildRequires: libtool >= 2:2.2
BuildRequires: pkgconfig
-BuildRequires: python3-devel >= 3.0
+BuildRequires: python3-devel >= 1:3.0
BuildRequires: sed >= 4.0
BuildRequires: swig-python >= 2.0.0
BuildRequires: udev-devel
@@ -74,6 +76,10 @@ rm -rf $RPM_BUILD_ROOT
%{__rm} $RPM_BUILD_ROOT%{_libdir}/I*.la
+# tests
+%{__rm} -r $RPM_BUILD_ROOT%{_libexecdir}/intel-gpu-tools \
+ $RPM_BUILD_ROOT%{_datadir}/intel-gpu-tools
+
%clean
rm -rf $RPM_BUILD_ROOT
diff --git a/intel-gpu-tools-missing.patch b/intel-gpu-tools-missing.patch
new file mode 100644
index 0000000..78b95b0
--- /dev/null
+++ b/intel-gpu-tools-missing.patch
@@ -0,0 +1,232 @@
+--- intel-gpu-tools-1.11/man/intel_reg.rst.orig 1970-01-01 01:00:00.000000000 +0100
++++ intel-gpu-tools-1.11/man/intel_reg.rst 2015-06-13 09:23:09.299087685 +0200
+@@ -0,0 +1,229 @@
++=========
++intel_reg
++=========
++
++---------------------------------
++Intel graphics register multitool
++---------------------------------
++
++:Author: Jani Nikula <jani.nikula at intel.com>
++:Date: 2015-04-14
++:Version: intel-gpu-tools
++:Copyright: 2015 Intel Corporation
++:Manual section: 1
++:Manual group: General Commands Manual
++
++SYNOPSIS
++========
++
++**intel_reg** [*option* ...] *command*
++
++DESCRIPTION
++===========
++
++Intel graphics register multitool. Read, write, dump, and decode Intel graphics
++MMIO and sideband registers, and more.
++
++OPTIONS
++=======
++
++Some options are global, and some specific to commands.
++
++--verbose
++---------
++
++Increase verbosity.
++
++--quiet
++-------
++
++Decrease verbosity.
++
++--count=N
++---------
++
++Read N registers.
++
++--binary
++--------
++
++Output binary values.
++
++--all
++-----
++
++Decode registers for all known platforms.
++
++--mmio=FILE
++-----------
++
++Use MMIO bar from FILE.
++
++--devid=DEVID
++-------------
++
++Pretend to be PCI ID DEVID. Useful with MMIO bar snapshots from other machines.
++
++--spec=PATH
++-----------
++
++Read register spec from directory or file specified by PATH; see REGISTER SPEC
++DEFINITIONS below for details.
++
++--help
++------
++
++Show brief help.
++
++COMMANDS
++========
++
++See REGISTER REFERENCES below on how to describe registers for the commands.
++
++read [--count=N] REGISTER [...]
++-------------------------------
++
++Dump each specified REGISTER, or N registers starting from each REGISTER.
++
++write REGISTER VALUE [REGISTER VALUE ...]
++-----------------------------------------
++
++Write each VALUE to corresponding REGISTER.
++
++dump [--mmio=FILE --devid=DEVID]
++--------------------------------
++
++Dump all registers specified in the register spec.
++
++decode REGISTER VALUE
++---------------------
++
++Decode REGISTER VALUE.
++
++snapshot
++--------
++
++Output the MMIO bar to stdout. The output can be used for a later invocation of
++dump or read with the --mmio=FILE and --devid=DEVID parameters.
++
++list
++----
++
++List the known registers.
++
++help
++----
++
++Display brief help.
++
++
++REGISTER REFERENCES
++===================
++
++Registers are defined as [(PORTNAME|PORTNUM|MMIO-OFFSET):](REGNAME|REGADDR).
++
++PORTNAME
++--------
++
++The register access method, most often MMIO, which is the default. The methods
++supported on all platforms are "mmio", "portio-vga", and "mmio-vga".
++
++On BYT and CHV, the sideband ports "bunit", "punit", "nc", "dpio", "gpio-nc",
++"cck", "ccu", "dpio2", and "flisdsi" are also supported.
++
++PORTNUM
++-------
++
++Port number for the sideband ports supported on BYT and CHV. Only numbers mapped
++to the supported ports are allowed, arbitrary numbers are not accepted.
++
++Numbers above 0xff are automatically interpreted as MMIO offsets, not port
++numbers.
++
++MMIO-OFFSET
++-----------
++
++Use MMIO, and add this offset to the register address.
++
++Numbers equal to or below 0xff are automatically interpreted as port numbers,
++not MMIO offsets.
++
++REGNAME
++-------
++
++Name of the register as defined in the register spec.
++
++If MMIO offset is not specified, it is picked up from the register
++spec. However, ports are not; the port is a namespace for the register names.
++
++REGADDR
++-------
++
++Register address. The corresponding register name need not be specified in the
++register spec.
++
++ENVIRONMENT
++===========
++
++INTEL_REG_SPEC
++--------------
++
++Path to a directory or a file containing register spec definitions.
++
++REGISTER SPEC DEFINITIONS
++=========================
++
++A register spec associates register names with addresses. The spec is searched
++for in this order:
++
++#. Directory or file specified by the --spec option.
++
++#. Directory or file specified by the INTEL_REG_SPEC environment variable.
++
++#. Builtin register spec. Also used as fallback with a warning if the above are
++ used but fail.
++
++If a directory is specified using --spec option or INTEL_REG_SPEC environment
++variable, the directory is scanned for a spec file in this order:
++
++#. File named after the PCI device id. For example, "0412".
++
++#. File named after the code name in lowercase, without punctuation. For
++ example, "valleyview".
++
++#. File named after generation. For example, "gen7" (note that this matches
++ valleyview, ivybridge and haswell!).
++
++Register Spec File Format
++-------------------------
++
++The register spec format is compatible with the quick_dump.py format, briefly
++described below:
++
++* Empty lines and lines beginning with "#", ";", or "//" are ignored.
++
++* Lines *not* beginning with "(" are interpreted as file names, absolute or
++ relative, to be included.
++
++* Lines beginning with "(" are interpreted as register definitions.
++
++Registers are defined as tuples ('REGNAME', 'REGADDR',
++'PORTNAME|PORTNUM|MMIO-OFFSET'), as in REGISTER REFERENCES above. The port
++description may also be an empty string to denote MMIO.
++
++Examples:
++
++* # this is a comment, below is an include
++
++* vlv_pipe_a.txt
++
++* ('GEN6_PMINTRMSK', '0x0000a168', '')
++
++* ('MIPIA_PORT_CTRL', '0x61190', '0x180000')
++
++* ('PLL1_DW0', '0x8000', 'DPIO')
++
++BUGS
++====
++
++Reading some registers may hang the GPU or the machine.
diff --git a/intel-gpu-tools-types.patch b/intel-gpu-tools-types.patch
deleted file mode 100644
index 1c719fe..0000000
--- a/intel-gpu-tools-types.patch
+++ /dev/null
@@ -1,20 +0,0 @@
---- intel-gpu-tools-1.10/lib/intel_batchbuffer.c.orig 2015-03-12 18:05:07.000000000 +0100
-+++ intel-gpu-tools-1.10/lib/intel_batchbuffer.c 2015-03-15 13:45:27.311055799 +0100
-@@ -548,7 +548,7 @@
- memset(obj, 0, sizeof(*obj));
- obj->handle = gem_handle;
- obj->relocation_count = count;
-- obj->relocs_ptr = (uint64_t)relocs;
-+ obj->relocs_ptr = (uintptr_t)relocs;
- }
-
- static void exec_blit(int fd,
-@@ -557,7 +557,7 @@
- {
- struct drm_i915_gem_execbuffer2 exec;
-
-- exec.buffers_ptr = (uint64_t)objs;
-+ exec.buffers_ptr = (uintptr_t)objs;
- exec.buffer_count = count;
- exec.batch_start_offset = 0;
- exec.batch_len = batch_len * 4;
================================================================
---- gitweb:
http://git.pld-linux.org/gitweb.cgi/packages/xorg-app-intel-gpu-tools.git/commitdiff/746ff741803ef34d3bb9fe2037c1572ce031530f
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