[packages/Mesa] upstream revert of commit causing segfault on mali bifrost

[atler]

commit d48e99319cad3ed90b58ed64e7b1166d5bce054f
Author: Jan Palus <atler at pld-linux.org>
Date:   Wed Aug 10 19:40:07 2022 +0200

    upstream revert of commit causing segfault on mali bifrost
    
    see: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7025

 Mesa.spec           |  2 ++
 bifrost_crash.patch | 52 ++++++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 54 insertions(+)
---
diff --git a/Mesa.spec b/Mesa.spec
index d7a18f9..eb40b76 100644
--- a/Mesa.spec
+++ b/Mesa.spec
@@ -81,6 +81,7 @@ Source0:	https://gitlab.freedesktop.org/mesa/mesa/-/archive/mesa-%{version}/mesa
 # Source0-md5:	403e7858bebe7ccdd774baf34ae65017
 Patch0:		zink_x32.patch
 Patch1:		powervr_uint64.patch
+Patch2:		bifrost_crash.patch
 URL:		https://www.mesa3d.org/
 %{?with_opencl_spirv:BuildRequires:	SPIRV-LLVM-Translator-devel >= 8.0.1.3}
 %{?with_gallium_zink:BuildRequires:	Vulkan-Loader-devel}
@@ -1427,6 +1428,7 @@ radv - eksperymentalny sterownik Vulkan dla GPU firmy AMD.
 %patch0 -p1
 %ifarch %{arm} aarch64
 %patch1 -p1
+%patch2 -p1
 %endif
 
 %build
diff --git a/bifrost_crash.patch b/bifrost_crash.patch
new file mode 100644
index 0000000..1e300b7
--- /dev/null
+++ b/bifrost_crash.patch
@@ -0,0 +1,52 @@
+From c69f1dba5c2b51614d69580249d52eb62dddaf62 Mon Sep 17 00:00:00 2001
+From: Eric Engestrom <eric at engestrom.ch>
+Date: Wed, 10 Aug 2022 16:43:24 +0100
+Subject: [PATCH] Revert "pan/bi: Require ATEST coverage mask input in R60"
+
+This reverts commit 7ead256891cec7a301d2fd415405a7f9106b1f46.
+
+See https://gitlab.freedesktop.org/mesa/mesa/-/issues/7025 for the
+details, but the short version is that this was causing a segfault.
+---
+ .pick_status.json            |  2 +-
+ src/panfrost/bifrost/bi_ra.c | 11 -----------
+ 2 files changed, 1 insertion(+), 12 deletions(-)
+
+diff --git a/.pick_status.json b/.pick_status.json
+index f33cb9b8538a..2dec29fd3e76 100644
+--- a/.pick_status.json
++++ b/.pick_status.json
+@@ -6349,7 +6349,7 @@
+         "description": "pan/bi: Require ATEST coverage mask input in R60",
+         "nominated": true,
+         "nomination_type": 0,
+-        "resolution": 1,
++        "resolution": 2,
+         "main_sha": null,
+         "because_sha": null
+     },
+diff --git a/src/panfrost/bifrost/bi_ra.c b/src/panfrost/bifrost/bi_ra.c
+index 7472c2e550b5..8b14c0ec79a9 100644
+--- a/src/panfrost/bifrost/bi_ra.c
++++ b/src/panfrost/bifrost/bi_ra.c
+@@ -334,17 +334,6 @@ bi_allocate_registers(bi_context *ctx, bool *success, bool full_regs)
+                         if (node < node_count)
+                                 l->solutions[node] = 4;
+                 }
+-
+-                /* Experimentally, it seems coverage masks inputs to ATEST must
+-                 * be in R60. Otherwise coverage mask writes do not work with
+-                 * early-ZS with pixel-frequency-shading (this combination of
+-                 * settings is legal if depth/stencil writes are disabled).
+-                 */
+-                if (ins->op == BI_OPCODE_ATEST) {
+-                        unsigned node = bi_get_node(ins->src[0]);
+-                        assert(node < node_count);
+-                        l->solutions[node] = 60;
+-                }
+         }
+ 
+         bi_compute_interference(ctx, l, full_regs);
+-- 
+GitLab
+
================================================================

---- gitweb:

http://git.pld-linux.org/gitweb.cgi/packages/Mesa.git/commitdiff/d48e99319cad3ed90b58ed64e7b1166d5bce054f