[packages/vvenc] - updated to 1.13.1 + SIMD-related build fixes from git
qboosh
qboosh at pld-linux.org
Sun Sep 28 08:45:02 CEST 2025
commit f920a0615031d95f899272f14a7c58fcf46a1d6b
Author: Jakub Bogusz <qboosh at pld-linux.org>
Date: Sun Sep 28 08:48:03 2025 +0200
- updated to 1.13.1 + SIMD-related build fixes from git
vvenc-simd.patch | 158 +++++++++++++++++++++++++++++++++++++++++++++++++++++++
vvenc.spec | 10 ++--
2 files changed, 164 insertions(+), 4 deletions(-)
---
diff --git a/vvenc.spec b/vvenc.spec
index 1f7f4a7..d31a799 100644
--- a/vvenc.spec
+++ b/vvenc.spec
@@ -5,14 +5,15 @@
Summary: Fraunhofer Versatile Video Encoder (VVenC)
Summary(pl.UTF-8): VVenC - koder obrazu Fraunhofer Versatile Video
Name: vvenc
-Version: 1.13.0
+Version: 1.13.1
Release: 1
License: BSD
Group: Libraries
#Source0Download: https://github.com/fraunhoferhhi/vvenc/releases
Source0: https://github.com/fraunhoferhhi/vvenc/archive/v%{version}/%{name}-%{version}.tar.gz
-# Source0-md5: f3bf8d7cc75e529c5b4412524f2619a1
+# Source0-md5: 139123f5fac15ef2406a41625aefa375
Patch0: %{name}-pc.patch
+Patch1: %{name}-simd.patch
URL: https://github.com/fraunhoferhhi/vvenc
BuildRequires: cmake >= 3.13.0
# C++14
@@ -65,6 +66,7 @@ Pliki nagłówkowe biblioteki VVenC.
%prep
%setup -q
%patch -P0 -p1
+%patch -P1 -p1
%build
install -d build
@@ -100,11 +102,11 @@ rm -rf $RPM_BUILD_ROOT
%attr(755,root,root) %{_bindir}/vvencFFapp
%attr(755,root,root) %{_bindir}/vvencapp
%attr(755,root,root) %{_libdir}/libvvenc.so.*.*.*
-%attr(755,root,root) %ghost %{_libdir}/libvvenc.so.1.13
+%ghost %{_libdir}/libvvenc.so.1.13
%files devel
%defattr(644,root,root,755)
-%attr(755,root,root) %{_libdir}/libvvenc.so
+%{_libdir}/libvvenc.so
%{_libdir}/cmake/vvenc
%{_includedir}/vvenc
%{_pkgconfigdir}/libvvenc.pc
diff --git a/vvenc-simd.patch b/vvenc-simd.patch
new file mode 100644
index 0000000..5ed6448
--- /dev/null
+++ b/vvenc-simd.patch
@@ -0,0 +1,158 @@
+From 83d5af3bdb440d453e4c7910c5341ca40ebabe9e Mon Sep 17 00:00:00 2001
+From: Gabriel Hege <gabriel.hege at hhi.fraunhofer.de>
+Date: Mon, 31 Mar 2025 11:29:43 +0200
+Subject: [PATCH] fix mismatched #if/#endif
+
+---
+ source/Lib/vvenc/vvencimpl.cpp | 60 ++++++++++++++++------------------
+ 1 file changed, 29 insertions(+), 31 deletions(-)
+
+diff --git a/source/Lib/vvenc/vvencimpl.cpp b/source/Lib/vvenc/vvencimpl.cpp
+index 7f501f0a..cdea57de 100644
+--- a/source/Lib/vvenc/vvencimpl.cpp
++++ b/source/Lib/vvenc/vvencimpl.cpp
+@@ -800,25 +800,24 @@ void VVEncImpl::registerMsgCbf( void * ctx, vvencLoggingCallback msgFnc )
+ const char* VVEncImpl::setSIMDExtension( const char* simdId )
+ {
+ const std::string simdReqStr( simdId ? simdId : "" );
+-#if ENABLE_SIMD_OPT
+-#if defined( TARGET_SIMD_X86 ) || defined( TARGET_SIMD_ARM )
+-#if HANDLE_EXCEPTION
++#if ENABLE_SIMD_OPT && ( defined( TARGET_SIMD_X86 ) || defined( TARGET_SIMD_ARM ) )
++# if HANDLE_EXCEPTION
+ try
+-#endif // HANDLE_EXCEPTION
++# endif // HANDLE_EXCEPTION
+ {
+-#if defined( TARGET_SIMD_ARM )
++# if defined( TARGET_SIMD_ARM )
+ ARM_VEXT arm_ext = string_to_arm_vext( simdReqStr );
+-#if defined( TARGET_SIMD_X86 )
++# if defined( TARGET_SIMD_X86 )
+ // Translate any non-scalar Arm SIMD request to enable SIMDe.
+ X86_VEXT x86_ext = arm_ext == arm_simd::UNDEFINED ? x86_simd::UNDEFINED
+ : arm_ext == arm_simd::SCALAR ? x86_simd::SCALAR
+ : SIMD_EVERYWHERE_EXTENSION_LEVEL;
+-#endif
++# endif // TARGET_SIMD_X86
+ try
+ {
+-#if defined( TARGET_SIMD_X86 )
++# if defined( TARGET_SIMD_X86 )
+ read_x86_extension_flags( x86_ext );
+-#endif
++# endif // TARGET_SIMD_X86
+ read_arm_extension_flags( arm_ext );
+ }
+ catch( Exception& )
+@@ -828,7 +827,7 @@ const char* VVEncImpl::setSIMDExtension( const char* simdId )
+ THROW( "requested SIMD level (" << simdReqStr << ") not supported by current CPU (max "
+ << read_arm_extension_name() << ")." );
+ }
+-#else // defined( TARGET_SIMD_X86 )
++# else // defined( TARGET_SIMD_X86 )
+ X86_VEXT request_ext = string_to_x86_vext( simdReqStr );
+ try
+ {
+@@ -841,42 +840,41 @@ const char* VVEncImpl::setSIMDExtension( const char* simdId )
+ THROW( "requested SIMD level (" << simdReqStr << ") not supported by current CPU (max "
+ << read_x86_extension_name() << ")." );
+ }
+-#endif
+-#endif //ENABLE_SIMD_OPT
++# endif // defined( TARGET_SIMD_X86 )
+
+-#if ENABLE_SIMD_OPT_BUFFER
+-#if defined( TARGET_SIMD_X86 )
++# if ENABLE_SIMD_OPT_BUFFER
++# if defined( TARGET_SIMD_X86 )
+ g_pelBufOP.initPelBufOpsX86();
+-#endif
+-#if defined( TARGET_SIMD_ARM )
++# endif
++# if defined( TARGET_SIMD_ARM )
+ g_pelBufOP.initPelBufOpsARM();
+-#endif
+-#endif // ENABLE_SIMD_OPT_BUFFER
++# endif
++# endif // ENABLE_SIMD_OPT_BUFFER
+
+-#if ENABLE_SIMD_TRAFO
+-#if defined( TARGET_SIMD_X86 )
++# if ENABLE_SIMD_TRAFO
++# if defined( TARGET_SIMD_X86 )
+ g_tCoeffOps.initTCoeffOpsX86();
+-#endif
+-#if defined( TARGET_SIMD_ARM )
++# endif // TARGET_SIMD_X86
++# if defined( TARGET_SIMD_ARM )
+ g_tCoeffOps.initTCoeffOpsARM();
+-#endif
+-#endif // ENABLE_SIMD_TRAFO
++# endif // TARGET_SIMD_ARM
++# endif // ENABLE_SIMD_TRAFO
+
+-#if defined( TARGET_SIMD_ARM )
++# if defined( TARGET_SIMD_ARM )
+ return read_arm_extension_name().c_str();
+-#else
++# else // !TARGET_SIMD_ARM
+ return read_x86_extension_name().c_str();
+-#endif
++# endif // !TARGET_SIMD_ARM
+ }
+-#if HANDLE_EXCEPTION
++# if HANDLE_EXCEPTION
+ catch( Exception& e )
+ {
+ MsgLog msg;
+ msg.log( VVENC_ERROR, "\n%s\n", e.what() );
+ return nullptr;
+ }
+-#endif // HANDLE_EXCEPTION
+-#else // !defined( TARGET_SIMD_X86 ) && !defined( TARGET_SIMD_ARM )
++# endif // HANDLE_EXCEPTION
++#else // !( ENABLE_SIMD_OPT && ( defined( TARGET_SIMD_X86 ) || defined( TARGET_SIMD_ARM ) ) )
+ if( !simdReqStr.empty() && simdReqStr != "SCALAR" )
+ {
+ MsgLog msg;
+@@ -884,7 +882,7 @@ const char* VVEncImpl::setSIMDExtension( const char* simdId )
+ return nullptr;
+ }
+ return "SCALAR";
+-#endif // defined( TARGET_SIMD_X86 ) || defined( TARGET_SIMD_ARM )
++#endif // !( ENABLE_SIMD_OPT && ( defined( TARGET_SIMD_X86 ) || defined( TARGET_SIMD_ARM ) ) )
+ }
+
+ ///< creates compile info string containing OS, Compiler and Bit-depth (e.g. 32 or 64 bit).
+From 2b81c8d6019e588eca9e1d3980bc8abe1d826e74 Mon Sep 17 00:00:00 2001
+From: Gabriel Hege <gabriel.hege at hhi.fraunhofer.de>
+Date: Tue, 1 Apr 2025 18:04:31 +0200
+Subject: [PATCH] fix error: SSE vector return without SSE enabled changes the
+ ABI [-Werror=psabi]
+
+---
+ source/Lib/CommonLib/x86/FixMissingIntrin.h | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/source/Lib/CommonLib/x86/FixMissingIntrin.h b/source/Lib/CommonLib/x86/FixMissingIntrin.h
+index 6ef103748..d5e235847 100644
+--- a/source/Lib/CommonLib/x86/FixMissingIntrin.h
++++ b/source/Lib/CommonLib/x86/FixMissingIntrin.h
+@@ -56,6 +56,7 @@ POSSIBILITY OF SUCH DAMAGE.
+
+ namespace vvenc
+ {
++#if defined( USE_SSE41 ) || defined( USE_SSE42 ) || defined( USE_AVX ) || defined( USE_AVX2 )
+
+ #ifdef MISSING_INTRIN_mm_storeu_si16
+ static inline void _mm_storeu_si16( void* p, __m128i a )
+@@ -133,6 +134,8 @@ static inline int64_t _mm_extract_epi64( __m128i a, int i )
+ }
+ #endif
+
++#endif // defined( USE_SSE41 ) || defined( USE_SSE42 ) || defined( USE_AVX ) || defined( USE_AVX2 )
++
+ #if defined( USE_AVX ) || defined( USE_AVX2 )
+
+ // this should only be true for non-x86 architectures
================================================================
---- gitweb:
http://git.pld-linux.org/gitweb.cgi/packages/vvenc.git/commitdiff/f920a0615031d95f899272f14a7c58fcf46a1d6b
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