[packages/llvm] add upstream fix for miscompilation in rust 1.97.0; rel 2
atler
atler at pld-linux.org
Thu Jul 16 16:32:17 CEST 2026
commit f6f72ea7517f69bacf7ec0d0387306067d0028d1
Author: Jan Palus <atler at pld-linux.org>
Date: Thu Jul 16 16:30:09 2026 +0200
add upstream fix for miscompilation in rust 1.97.0; rel 2
miscompilation report: https://github.com/rust-lang/rust/issues/159035
fix: https://github.com/llvm/llvm-project/pull/208683
llvm.spec | 4 +-
rust-1.97.0-miscompilation.patch | 3980 ++++++++++++++++++++++++++++++++++++++
2 files changed, 3983 insertions(+), 1 deletion(-)
---
diff --git a/llvm.spec b/llvm.spec
index d9f7942..19506fe 100644
--- a/llvm.spec
+++ b/llvm.spec
@@ -103,7 +103,7 @@ Summary: The Low Level Virtual Machine (An Optimizing Compiler Infrastructure)
Summary(pl.UTF-8): Niskopoziomowa maszyna wirtualna (infrastruktura kompilatora optymalizującego)
Name: llvm
Version: 22.1.5
-Release: 1
+Release: 2
License: Apache 2.0 with LLVM exceptions
Group: Development/Languages
#Source0Download: https://github.com/llvm/llvm-project/releases/
@@ -122,6 +122,7 @@ Patch11: cmake-utils-path-override.patch
Patch12: x32-compiler-rt.patch
Patch14: compiler-rt-nsan-redefine-builtins.patch
Patch15: lua-libdir.patch
+Patch16: rust-1.97.0-miscompilation.patch
URL: https://llvm.org/
BuildRequires: bash
BuildRequires: binutils-devel
@@ -948,6 +949,7 @@ Obsługa GDB do LLVM OpenMP.
%patch -P 14 -p1
%endif
%patch -P 15 -p1
+%patch -P 16 -p1
grep -rl /usr/bin/env clang clang-tools-extra compiler-rt flang lld lldb llvm mlir polly | xargs sed -i -e '1{
s,^#!.*bin/env python3\?,#!%{__python3},
diff --git a/rust-1.97.0-miscompilation.patch b/rust-1.97.0-miscompilation.patch
new file mode 100644
index 0000000..0024c1d
--- /dev/null
+++ b/rust-1.97.0-miscompilation.patch
@@ -0,0 +1,3980 @@
+From ad6c670f239632334f583c526f970d525fca9ef0 Mon Sep 17 00:00:00 2001
+From: Nikita Popov <npopov at redhat.com>
+Date: Fri, 10 Jul 2026 11:50:29 +0200
+Subject: [PATCH 1/3] Add test for miscompile
+
+---
+ llvm/test/CodeGen/X86/select-of-load-poison.ll | 18 ++++++++++++++++++
+ 1 file changed, 18 insertions(+)
+ create mode 100644 llvm/test/CodeGen/X86/select-of-load-poison.ll
+
+diff --git a/llvm/test/CodeGen/X86/select-of-load-poison.ll b/llvm/test/CodeGen/X86/select-of-load-poison.ll
+new file mode 100644
+index 0000000000000..76a9c62a813a0
+--- /dev/null
++++ b/llvm/test/CodeGen/X86/select-of-load-poison.ll
+@@ -0,0 +1,18 @@
++; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
++; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
++
++define i32 @test(i32 %x, ptr %p) {
++; CHECK-LABEL: test:
++; CHECK: # %bb.0:
++; CHECK-NEXT: movl %edi, %eax
++; CHECK-NEXT: movl 4(%rsi,%rax,4), %eax
++; CHECK-NEXT: retq
++ %p1 = getelementptr i8, ptr %p, i64 4
++ %v1 = load i32, ptr %p1
++ %p2 = getelementptr i8, ptr %p, i64 8
++ %v2 = load i32, ptr %p2
++ %c = trunc nuw i32 %x to i1
++ %v = select i1 %c, i32 %v2, i32 %v1
++ %res = freeze i32 %v
++ ret i32 %res
++}
+
+From 8a41e868fde631d8cfc017a1b1f03288b5714faa Mon Sep 17 00:00:00 2001
+From: Nikita Popov <npopov at redhat.com>
+Date: Fri, 10 Jul 2026 12:00:48 +0200
+Subject: [PATCH 2/3] Freeze condition
+
+---
+ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 16 +-
+ llvm/test/CodeGen/AArch64/icmp.ll | 26 +-
+ llvm/test/CodeGen/ARM/fp16-promote.ll | 2 +-
+ llvm/test/CodeGen/Mips/cconv/vector.ll | 10 +-
+ llvm/test/CodeGen/Mips/cmov.ll | 2 +-
+ llvm/test/CodeGen/NVPTX/i1-select.ll | 14 +-
+ .../CodeGen/X86/fp-strict-scalar-cmp-fp16.ll | 108 +-
+ llvm/test/CodeGen/X86/fp-strict-scalar-cmp.ll | 936 +++++++++++++-----
+ .../test/CodeGen/X86/fp128-libcalls-strict.ll | 2 +
+ .../CodeGen/X86/fp80-strict-scalar-cmp.ll | 144 ++-
+ llvm/test/CodeGen/X86/isel-select-cmov.ll | 16 +-
+ llvm/test/CodeGen/X86/select-constant-xor.ll | 12 +-
+ llvm/test/CodeGen/X86/select-mmx.ll | 4 +-
+ .../test/CodeGen/X86/select-of-load-poison.ll | 7 +-
+ 14 files changed, 939 insertions(+), 360 deletions(-)
+
+diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+index c81c43c94b0f0..ee30495055f47 100644
+--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
++++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+@@ -30506,10 +30506,12 @@ bool DAGCombiner::SimplifySelectOps(SDNode *TheSelect, SDValue LHS,
+ SDNode::hasPredecessorHelper(RLD, Visited, Worklist)))
+ return false;
+
+- Addr = DAG.getSelect(SDLoc(TheSelect),
+- LLD->getBasePtr().getValueType(),
+- TheSelect->getOperand(0), LLD->getBasePtr(),
+- RLD->getBasePtr());
++ // If the condition is poison, originally this would result in a poison
++ // result. After the transform, this would result in a load of poison,
++ // which is UB. Freeze the condition to prevent this.
++ Addr = DAG.getSelect(SDLoc(TheSelect), LLD->getBasePtr().getValueType(),
++ DAG.getFreeze(TheSelect->getOperand(0)),
++ LLD->getBasePtr(), RLD->getBasePtr());
+ } else { // Otherwise SELECT_CC
+ // We cannot do this optimization if any pair of {RLD, LLD} is a
+ // predecessor to {RLD, LLD, CondLHS, CondRHS}. As we've already compared
+@@ -30528,10 +30530,10 @@ bool DAGCombiner::SimplifySelectOps(SDNode *TheSelect, SDValue LHS,
+ SDNode::hasPredecessorHelper(RLD, Visited, Worklist)))
+ return false;
+
++ SDValue FrozenOp0 = DAG.getFreeze(TheSelect->getOperand(0));
++ SDValue FrozenOp1 = DAG.getFreeze(TheSelect->getOperand(1));
+ Addr = DAG.getNode(ISD::SELECT_CC, SDLoc(TheSelect),
+- LLD->getBasePtr().getValueType(),
+- TheSelect->getOperand(0),
+- TheSelect->getOperand(1),
++ LLD->getBasePtr().getValueType(), FrozenOp0, FrozenOp1,
+ LLD->getBasePtr(), RLD->getBasePtr(),
+ TheSelect->getOperand(4));
+ }
+diff --git a/llvm/test/CodeGen/AArch64/icmp.ll b/llvm/test/CodeGen/AArch64/icmp.ll
+index b0fdf1820d7eb..6830ce834ab11 100644
+--- a/llvm/test/CodeGen/AArch64/icmp.ll
++++ b/llvm/test/CodeGen/AArch64/icmp.ll
+@@ -1376,26 +1376,22 @@ entry:
+ define <2 x i128> @v2i128_i128(<2 x i128> %a, <2 x i128> %b, <2 x i128> %d, <2 x i128> %e) {
+ ; CHECK-SD-LABEL: v2i128_i128:
+ ; CHECK-SD: // %bb.0: // %entry
++; CHECK-SD-NEXT: cmp x2, x6
+ ; CHECK-SD-NEXT: add x10, sp, #32
+ ; CHECK-SD-NEXT: mov x11, sp
++; CHECK-SD-NEXT: sbcs xzr, x3, x7
++; CHECK-SD-NEXT: cset w8, lt
+ ; CHECK-SD-NEXT: cmp x0, x4
+-; CHECK-SD-NEXT: orr x12, x10, #0x8
+-; CHECK-SD-NEXT: orr x13, x11, #0x8
+ ; CHECK-SD-NEXT: sbcs xzr, x1, x5
++; CHECK-SD-NEXT: cset w9, lt
++; CHECK-SD-NEXT: cmp w9, #0
++; CHECK-SD-NEXT: csel x9, x11, x10, ne
++; CHECK-SD-NEXT: cmp w8, #0
+ ; CHECK-SD-NEXT: add x8, sp, #48
+-; CHECK-SD-NEXT: add x9, sp, #16
+-; CHECK-SD-NEXT: csel x12, x13, x12, lt
+-; CHECK-SD-NEXT: csel x10, x11, x10, lt
+-; CHECK-SD-NEXT: cmp x2, x6
+-; CHECK-SD-NEXT: orr x11, x8, #0x8
+-; CHECK-SD-NEXT: orr x13, x9, #0x8
+-; CHECK-SD-NEXT: sbcs xzr, x3, x7
+-; CHECK-SD-NEXT: ldr x0, [x10]
+-; CHECK-SD-NEXT: csel x8, x9, x8, lt
+-; CHECK-SD-NEXT: csel x9, x13, x11, lt
+-; CHECK-SD-NEXT: ldr x1, [x12]
+-; CHECK-SD-NEXT: ldr x2, [x8]
+-; CHECK-SD-NEXT: ldr x3, [x9]
++; CHECK-SD-NEXT: add x10, sp, #16
++; CHECK-SD-NEXT: ldp x0, x1, [x9]
++; CHECK-SD-NEXT: csel x8, x10, x8, ne
++; CHECK-SD-NEXT: ldp x2, x3, [x8]
+ ; CHECK-SD-NEXT: ret
+ ;
+ ; CHECK-GI-LABEL: v2i128_i128:
+diff --git a/llvm/test/CodeGen/ARM/fp16-promote.ll b/llvm/test/CodeGen/ARM/fp16-promote.ll
+index 27a0bf2eb9037..5b3539def98a0 100644
+--- a/llvm/test/CodeGen/ARM/fp16-promote.ll
++++ b/llvm/test/CodeGen/ARM/fp16-promote.ll
+@@ -348,7 +348,7 @@ define half @test_tailcall_flipped(half %a, half %b) #0 {
+ ; No conversion is needed
+ define void @test_select(ptr %p, ptr %q, i1 zeroext %c) #0 {
+ ; CHECK-ALL-LABEL: test_select:
+-; CHECK-ALL: cmp r2, #0
++; CHECK-ALL: tst r2, #1
+ ; CHECK-ALL-NEXT: movne r1, r0
+ ; CHECK-ALL-NEXT: ldrh r1, [r1]
+ ; CHECK-ALL-NEXT: strh r1, [r0]
+diff --git a/llvm/test/CodeGen/Mips/cconv/vector.ll b/llvm/test/CodeGen/Mips/cconv/vector.ll
+index c64c60ddef73d..5cd2b77615fcd 100644
+--- a/llvm/test/CodeGen/Mips/cconv/vector.ll
++++ b/llvm/test/CodeGen/Mips/cconv/vector.ll
+@@ -6038,15 +6038,15 @@ entry:
+ define <4 x float> @select(<4 x i32> %cond, <4 x float> %arg1, <4 x float> %arg2) {
+ ; MIPS32-LABEL: select:
+ ; MIPS32: # %bb.0: # %entry
+-; MIPS32-NEXT: andi $1, $7, 1
+-; MIPS32-NEXT: lw $2, 16($sp)
+-; MIPS32-NEXT: andi $2, $2, 1
++; MIPS32-NEXT: lw $1, 16($sp)
++; MIPS32-NEXT: andi $2, $7, 1
++; MIPS32-NEXT: andi $1, $1, 1
+ ; MIPS32-NEXT: addiu $3, $sp, 44
+ ; MIPS32-NEXT: addiu $5, $sp, 28
+ ; MIPS32-NEXT: addiu $7, $sp, 48
+ ; MIPS32-NEXT: addiu $8, $sp, 32
+-; MIPS32-NEXT: movn $7, $8, $2
+-; MIPS32-NEXT: movn $3, $5, $1
++; MIPS32-NEXT: movn $7, $8, $1
++; MIPS32-NEXT: movn $3, $5, $2
+ ; MIPS32-NEXT: andi $1, $6, 1
+ ; MIPS32-NEXT: addiu $2, $sp, 40
+ ; MIPS32-NEXT: addiu $5, $sp, 24
+diff --git a/llvm/test/CodeGen/Mips/cmov.ll b/llvm/test/CodeGen/Mips/cmov.ll
+index bb3c7c27a122d..ee60b353b86b6 100644
+--- a/llvm/test/CodeGen/Mips/cmov.ll
++++ b/llvm/test/CodeGen/Mips/cmov.ll
+@@ -65,7 +65,7 @@ entry:
+
+ ; 64-CMOV: daddiu $[[R1:[0-9]+]], ${{[0-9]+}}, %got_disp(d)
+ ; 64-CMOV: daddiu $[[R0:[0-9]+]], ${{[0-9]+}}, %got_disp(c)
+-; 64-CMOV: movn $[[R1]], $[[R0]], $4
++; 64-CMOV: movn $[[R1]], $[[R0]], $2
+
+ ; 64-CMP-DAG: daddiu $[[R1:[0-9]+]], ${{[0-9]+}}, %got_disp(d)
+ ; 64-CMP-DAG: daddiu $[[R0:[0-9]+]], ${{[0-9]+}}, %got_disp(c)
+diff --git a/llvm/test/CodeGen/NVPTX/i1-select.ll b/llvm/test/CodeGen/NVPTX/i1-select.ll
+index c91a3df204d80..c13e494c3077a 100644
+--- a/llvm/test/CodeGen/NVPTX/i1-select.ll
++++ b/llvm/test/CodeGen/NVPTX/i1-select.ll
+@@ -70,9 +70,9 @@ define i32 @test_select_i1_trunc_2(i64 %a, i16 %b, i32 %c, i32 %true, i32 %false
+ define i32 @test_select_i1_basic(i32 %v1, i32 %v2, i32 %v3, i32 %true, i32 %false) {
+ ; CHECK-LABEL: test_select_i1_basic(
+ ; CHECK: {
+-; CHECK-NEXT: .reg .pred %p<4>;
++; CHECK-NEXT: .reg .pred %p<6>;
+ ; CHECK-NEXT: .reg .b32 %r<6>;
+-; CHECK-NEXT: .reg .b64 %rd<6>;
++; CHECK-NEXT: .reg .b64 %rd<4>;
+ ; CHECK-EMPTY:
+ ; CHECK-NEXT: // %bb.0:
+ ; CHECK-NEXT: ld.param.b32 %r1, [test_select_i1_basic_param_0];
+@@ -81,13 +81,13 @@ define i32 @test_select_i1_basic(i32 %v1, i32 %v2, i32 %v3, i32 %true, i32 %fals
+ ; CHECK-NEXT: setp.ne.b32 %p1, %r1, 0;
+ ; CHECK-NEXT: ld.param.b32 %r4, [test_select_i1_basic_param_2];
+ ; CHECK-NEXT: setp.eq.b32 %p2, %r4, 0;
+-; CHECK-NEXT: setp.eq.b32 %p3, %r3, 0;
++; CHECK-NEXT: and.pred %p3, %p1, %p2;
++; CHECK-NEXT: setp.eq.b32 %p4, %r3, 0;
++; CHECK-NEXT: or.pred %p5, %p4, %p3;
+ ; CHECK-NEXT: mov.b64 %rd1, test_select_i1_basic_param_4;
+ ; CHECK-NEXT: mov.b64 %rd2, test_select_i1_basic_param_3;
+-; CHECK-NEXT: selp.b64 %rd3, %rd2, %rd1, %p2;
+-; CHECK-NEXT: selp.b64 %rd4, %rd3, %rd1, %p1;
+-; CHECK-NEXT: selp.b64 %rd5, %rd2, %rd4, %p3;
+-; CHECK-NEXT: ld.param.b32 %r5, [%rd5];
++; CHECK-NEXT: selp.b64 %rd3, %rd2, %rd1, %p5;
++; CHECK-NEXT: ld.param.b32 %r5, [%rd3];
+ ; CHECK-NEXT: st.param.b32 [func_retval0], %r5;
+ ; CHECK-NEXT: ret;
+ %b1 = icmp eq i32 %v1, 0
+diff --git a/llvm/test/CodeGen/X86/fp-strict-scalar-cmp-fp16.ll b/llvm/test/CodeGen/X86/fp-strict-scalar-cmp-fp16.ll
+index 6a6b86e8efa7c..8e660e9193fcf 100644
+--- a/llvm/test/CodeGen/X86/fp-strict-scalar-cmp-fp16.ll
++++ b/llvm/test/CodeGen/X86/fp-strict-scalar-cmp-fp16.ll
+@@ -49,10 +49,12 @@ define i32 @test_f16_oeq_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
+ ; X86-FP16: # %bb.0:
+ ; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero
+ ; X86-FP16-NEXT: vucomish {{[0-9]+}}(%esp), %xmm0
++; X86-FP16-NEXT: setnp %al
++; X86-FP16-NEXT: sete %cl
++; X86-FP16-NEXT: testb %al, %cl
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; X86-FP16-NEXT: cmovnel %eax, %ecx
+-; X86-FP16-NEXT: cmovpl %eax, %ecx
+ ; X86-FP16-NEXT: movl (%ecx), %eax
+ ; X86-FP16-NEXT: retl
+ ;
+@@ -112,9 +114,11 @@ define i32 @test_f16_ogt_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
+ ; X86-FP16: # %bb.0:
+ ; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero
+ ; X86-FP16-NEXT: vucomish {{[0-9]+}}(%esp), %xmm0
++; X86-FP16-NEXT: seta %al
++; X86-FP16-NEXT: testb %al, %al
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X86-FP16-NEXT: cmoval %eax, %ecx
++; X86-FP16-NEXT: cmovnel %eax, %ecx
+ ; X86-FP16-NEXT: movl (%ecx), %eax
+ ; X86-FP16-NEXT: retl
+ ;
+@@ -173,9 +177,11 @@ define i32 @test_f16_oge_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
+ ; X86-FP16: # %bb.0:
+ ; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero
+ ; X86-FP16-NEXT: vucomish {{[0-9]+}}(%esp), %xmm0
++; X86-FP16-NEXT: setae %al
++; X86-FP16-NEXT: testb %al, %al
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X86-FP16-NEXT: cmovael %eax, %ecx
++; X86-FP16-NEXT: cmovnel %eax, %ecx
+ ; X86-FP16-NEXT: movl (%ecx), %eax
+ ; X86-FP16-NEXT: retl
+ ;
+@@ -236,9 +242,11 @@ define i32 @test_f16_olt_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
+ ; X86-FP16: # %bb.0:
+ ; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero
+ ; X86-FP16-NEXT: vucomish {{[0-9]+}}(%esp), %xmm0
++; X86-FP16-NEXT: seta %al
++; X86-FP16-NEXT: testb %al, %al
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X86-FP16-NEXT: cmoval %eax, %ecx
++; X86-FP16-NEXT: cmovnel %eax, %ecx
+ ; X86-FP16-NEXT: movl (%ecx), %eax
+ ; X86-FP16-NEXT: retl
+ ;
+@@ -299,9 +307,11 @@ define i32 @test_f16_ole_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
+ ; X86-FP16: # %bb.0:
+ ; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero
+ ; X86-FP16-NEXT: vucomish {{[0-9]+}}(%esp), %xmm0
++; X86-FP16-NEXT: setae %al
++; X86-FP16-NEXT: testb %al, %al
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X86-FP16-NEXT: cmovael %eax, %ecx
++; X86-FP16-NEXT: cmovnel %eax, %ecx
+ ; X86-FP16-NEXT: movl (%ecx), %eax
+ ; X86-FP16-NEXT: retl
+ ;
+@@ -360,6 +370,8 @@ define i32 @test_f16_one_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
+ ; X86-FP16: # %bb.0:
+ ; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero
+ ; X86-FP16-NEXT: vucomish {{[0-9]+}}(%esp), %xmm0
++; X86-FP16-NEXT: setne %al
++; X86-FP16-NEXT: testb %al, %al
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; X86-FP16-NEXT: cmovnel %eax, %ecx
+@@ -421,9 +433,11 @@ define i32 @test_f16_ord_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
+ ; X86-FP16: # %bb.0:
+ ; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero
+ ; X86-FP16-NEXT: vucomish {{[0-9]+}}(%esp), %xmm0
++; X86-FP16-NEXT: setnp %al
++; X86-FP16-NEXT: testb %al, %al
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X86-FP16-NEXT: cmovnpl %eax, %ecx
++; X86-FP16-NEXT: cmovnel %eax, %ecx
+ ; X86-FP16-NEXT: movl (%ecx), %eax
+ ; X86-FP16-NEXT: retl
+ ;
+@@ -482,9 +496,11 @@ define i32 @test_f16_ueq_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
+ ; X86-FP16: # %bb.0:
+ ; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero
+ ; X86-FP16-NEXT: vucomish {{[0-9]+}}(%esp), %xmm0
++; X86-FP16-NEXT: sete %al
++; X86-FP16-NEXT: testb %al, %al
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X86-FP16-NEXT: cmovel %eax, %ecx
++; X86-FP16-NEXT: cmovnel %eax, %ecx
+ ; X86-FP16-NEXT: movl (%ecx), %eax
+ ; X86-FP16-NEXT: retl
+ ;
+@@ -545,9 +561,11 @@ define i32 @test_f16_ugt_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
+ ; X86-FP16: # %bb.0:
+ ; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero
+ ; X86-FP16-NEXT: vucomish {{[0-9]+}}(%esp), %xmm0
++; X86-FP16-NEXT: setb %al
++; X86-FP16-NEXT: testb %al, %al
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X86-FP16-NEXT: cmovbl %eax, %ecx
++; X86-FP16-NEXT: cmovnel %eax, %ecx
+ ; X86-FP16-NEXT: movl (%ecx), %eax
+ ; X86-FP16-NEXT: retl
+ ;
+@@ -608,9 +626,11 @@ define i32 @test_f16_uge_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
+ ; X86-FP16: # %bb.0:
+ ; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero
+ ; X86-FP16-NEXT: vucomish {{[0-9]+}}(%esp), %xmm0
++; X86-FP16-NEXT: setbe %al
++; X86-FP16-NEXT: testb %al, %al
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X86-FP16-NEXT: cmovbel %eax, %ecx
++; X86-FP16-NEXT: cmovnel %eax, %ecx
+ ; X86-FP16-NEXT: movl (%ecx), %eax
+ ; X86-FP16-NEXT: retl
+ ;
+@@ -669,9 +689,11 @@ define i32 @test_f16_ult_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
+ ; X86-FP16: # %bb.0:
+ ; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero
+ ; X86-FP16-NEXT: vucomish {{[0-9]+}}(%esp), %xmm0
++; X86-FP16-NEXT: setb %al
++; X86-FP16-NEXT: testb %al, %al
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X86-FP16-NEXT: cmovbl %eax, %ecx
++; X86-FP16-NEXT: cmovnel %eax, %ecx
+ ; X86-FP16-NEXT: movl (%ecx), %eax
+ ; X86-FP16-NEXT: retl
+ ;
+@@ -730,9 +752,11 @@ define i32 @test_f16_ule_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
+ ; X86-FP16: # %bb.0:
+ ; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero
+ ; X86-FP16-NEXT: vucomish {{[0-9]+}}(%esp), %xmm0
++; X86-FP16-NEXT: setbe %al
++; X86-FP16-NEXT: testb %al, %al
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X86-FP16-NEXT: cmovbel %eax, %ecx
++; X86-FP16-NEXT: cmovnel %eax, %ecx
+ ; X86-FP16-NEXT: movl (%ecx), %eax
+ ; X86-FP16-NEXT: retl
+ ;
+@@ -793,10 +817,12 @@ define i32 @test_f16_une_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
+ ; X86-FP16: # %bb.0:
+ ; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero
+ ; X86-FP16-NEXT: vucomish {{[0-9]+}}(%esp), %xmm0
++; X86-FP16-NEXT: setp %al
++; X86-FP16-NEXT: setne %cl
++; X86-FP16-NEXT: orb %al, %cl
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; X86-FP16-NEXT: cmovnel %eax, %ecx
+-; X86-FP16-NEXT: cmovpl %eax, %ecx
+ ; X86-FP16-NEXT: movl (%ecx), %eax
+ ; X86-FP16-NEXT: retl
+ ;
+@@ -856,9 +882,11 @@ define i32 @test_f16_uno_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
+ ; X86-FP16: # %bb.0:
+ ; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero
+ ; X86-FP16-NEXT: vucomish {{[0-9]+}}(%esp), %xmm0
++; X86-FP16-NEXT: setp %al
++; X86-FP16-NEXT: testb %al, %al
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X86-FP16-NEXT: cmovpl %eax, %ecx
++; X86-FP16-NEXT: cmovnel %eax, %ecx
+ ; X86-FP16-NEXT: movl (%ecx), %eax
+ ; X86-FP16-NEXT: retl
+ ;
+@@ -919,10 +947,12 @@ define i32 @test_f16_oeq_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
+ ; X86-FP16: # %bb.0:
+ ; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero
+ ; X86-FP16-NEXT: vcomish {{[0-9]+}}(%esp), %xmm0
++; X86-FP16-NEXT: setnp %al
++; X86-FP16-NEXT: sete %cl
++; X86-FP16-NEXT: testb %al, %cl
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; X86-FP16-NEXT: cmovnel %eax, %ecx
+-; X86-FP16-NEXT: cmovpl %eax, %ecx
+ ; X86-FP16-NEXT: movl (%ecx), %eax
+ ; X86-FP16-NEXT: retl
+ ;
+@@ -982,9 +1012,11 @@ define i32 @test_f16_ogt_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
+ ; X86-FP16: # %bb.0:
+ ; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero
+ ; X86-FP16-NEXT: vcomish {{[0-9]+}}(%esp), %xmm0
++; X86-FP16-NEXT: seta %al
++; X86-FP16-NEXT: testb %al, %al
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X86-FP16-NEXT: cmoval %eax, %ecx
++; X86-FP16-NEXT: cmovnel %eax, %ecx
+ ; X86-FP16-NEXT: movl (%ecx), %eax
+ ; X86-FP16-NEXT: retl
+ ;
+@@ -1043,9 +1075,11 @@ define i32 @test_f16_oge_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
+ ; X86-FP16: # %bb.0:
+ ; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero
+ ; X86-FP16-NEXT: vcomish {{[0-9]+}}(%esp), %xmm0
++; X86-FP16-NEXT: setae %al
++; X86-FP16-NEXT: testb %al, %al
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X86-FP16-NEXT: cmovael %eax, %ecx
++; X86-FP16-NEXT: cmovnel %eax, %ecx
+ ; X86-FP16-NEXT: movl (%ecx), %eax
+ ; X86-FP16-NEXT: retl
+ ;
+@@ -1106,9 +1140,11 @@ define i32 @test_f16_olt_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
+ ; X86-FP16: # %bb.0:
+ ; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero
+ ; X86-FP16-NEXT: vcomish {{[0-9]+}}(%esp), %xmm0
++; X86-FP16-NEXT: seta %al
++; X86-FP16-NEXT: testb %al, %al
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X86-FP16-NEXT: cmoval %eax, %ecx
++; X86-FP16-NEXT: cmovnel %eax, %ecx
+ ; X86-FP16-NEXT: movl (%ecx), %eax
+ ; X86-FP16-NEXT: retl
+ ;
+@@ -1169,9 +1205,11 @@ define i32 @test_f16_ole_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
+ ; X86-FP16: # %bb.0:
+ ; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero
+ ; X86-FP16-NEXT: vcomish {{[0-9]+}}(%esp), %xmm0
++; X86-FP16-NEXT: setae %al
++; X86-FP16-NEXT: testb %al, %al
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X86-FP16-NEXT: cmovael %eax, %ecx
++; X86-FP16-NEXT: cmovnel %eax, %ecx
+ ; X86-FP16-NEXT: movl (%ecx), %eax
+ ; X86-FP16-NEXT: retl
+ ;
+@@ -1230,6 +1268,8 @@ define i32 @test_f16_one_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
+ ; X86-FP16: # %bb.0:
+ ; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero
+ ; X86-FP16-NEXT: vcomish {{[0-9]+}}(%esp), %xmm0
++; X86-FP16-NEXT: setne %al
++; X86-FP16-NEXT: testb %al, %al
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; X86-FP16-NEXT: cmovnel %eax, %ecx
+@@ -1291,9 +1331,11 @@ define i32 @test_f16_ord_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
+ ; X86-FP16: # %bb.0:
+ ; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero
+ ; X86-FP16-NEXT: vcomish {{[0-9]+}}(%esp), %xmm0
++; X86-FP16-NEXT: setnp %al
++; X86-FP16-NEXT: testb %al, %al
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X86-FP16-NEXT: cmovnpl %eax, %ecx
++; X86-FP16-NEXT: cmovnel %eax, %ecx
+ ; X86-FP16-NEXT: movl (%ecx), %eax
+ ; X86-FP16-NEXT: retl
+ ;
+@@ -1352,9 +1394,11 @@ define i32 @test_f16_ueq_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
+ ; X86-FP16: # %bb.0:
+ ; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero
+ ; X86-FP16-NEXT: vcomish {{[0-9]+}}(%esp), %xmm0
++; X86-FP16-NEXT: sete %al
++; X86-FP16-NEXT: testb %al, %al
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X86-FP16-NEXT: cmovel %eax, %ecx
++; X86-FP16-NEXT: cmovnel %eax, %ecx
+ ; X86-FP16-NEXT: movl (%ecx), %eax
+ ; X86-FP16-NEXT: retl
+ ;
+@@ -1415,9 +1459,11 @@ define i32 @test_f16_ugt_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
+ ; X86-FP16: # %bb.0:
+ ; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero
+ ; X86-FP16-NEXT: vcomish {{[0-9]+}}(%esp), %xmm0
++; X86-FP16-NEXT: setb %al
++; X86-FP16-NEXT: testb %al, %al
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X86-FP16-NEXT: cmovbl %eax, %ecx
++; X86-FP16-NEXT: cmovnel %eax, %ecx
+ ; X86-FP16-NEXT: movl (%ecx), %eax
+ ; X86-FP16-NEXT: retl
+ ;
+@@ -1478,9 +1524,11 @@ define i32 @test_f16_uge_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
+ ; X86-FP16: # %bb.0:
+ ; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero
+ ; X86-FP16-NEXT: vcomish {{[0-9]+}}(%esp), %xmm0
++; X86-FP16-NEXT: setbe %al
++; X86-FP16-NEXT: testb %al, %al
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X86-FP16-NEXT: cmovbel %eax, %ecx
++; X86-FP16-NEXT: cmovnel %eax, %ecx
+ ; X86-FP16-NEXT: movl (%ecx), %eax
+ ; X86-FP16-NEXT: retl
+ ;
+@@ -1539,9 +1587,11 @@ define i32 @test_f16_ult_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
+ ; X86-FP16: # %bb.0:
+ ; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero
+ ; X86-FP16-NEXT: vcomish {{[0-9]+}}(%esp), %xmm0
++; X86-FP16-NEXT: setb %al
++; X86-FP16-NEXT: testb %al, %al
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X86-FP16-NEXT: cmovbl %eax, %ecx
++; X86-FP16-NEXT: cmovnel %eax, %ecx
+ ; X86-FP16-NEXT: movl (%ecx), %eax
+ ; X86-FP16-NEXT: retl
+ ;
+@@ -1600,9 +1650,11 @@ define i32 @test_f16_ule_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
+ ; X86-FP16: # %bb.0:
+ ; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero
+ ; X86-FP16-NEXT: vcomish {{[0-9]+}}(%esp), %xmm0
++; X86-FP16-NEXT: setbe %al
++; X86-FP16-NEXT: testb %al, %al
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X86-FP16-NEXT: cmovbel %eax, %ecx
++; X86-FP16-NEXT: cmovnel %eax, %ecx
+ ; X86-FP16-NEXT: movl (%ecx), %eax
+ ; X86-FP16-NEXT: retl
+ ;
+@@ -1663,10 +1715,12 @@ define i32 @test_f16_une_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
+ ; X86-FP16: # %bb.0:
+ ; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero
+ ; X86-FP16-NEXT: vcomish {{[0-9]+}}(%esp), %xmm0
++; X86-FP16-NEXT: setp %al
++; X86-FP16-NEXT: setne %cl
++; X86-FP16-NEXT: orb %al, %cl
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; X86-FP16-NEXT: cmovnel %eax, %ecx
+-; X86-FP16-NEXT: cmovpl %eax, %ecx
+ ; X86-FP16-NEXT: movl (%ecx), %eax
+ ; X86-FP16-NEXT: retl
+ ;
+@@ -1726,9 +1780,11 @@ define i32 @test_f16_uno_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
+ ; X86-FP16: # %bb.0:
+ ; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero
+ ; X86-FP16-NEXT: vcomish {{[0-9]+}}(%esp), %xmm0
++; X86-FP16-NEXT: setp %al
++; X86-FP16-NEXT: testb %al, %al
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X86-FP16-NEXT: cmovpl %eax, %ecx
++; X86-FP16-NEXT: cmovnel %eax, %ecx
+ ; X86-FP16-NEXT: movl (%ecx), %eax
+ ; X86-FP16-NEXT: retl
+ ;
+diff --git a/llvm/test/CodeGen/X86/fp-strict-scalar-cmp.ll b/llvm/test/CodeGen/X86/fp-strict-scalar-cmp.ll
+index e3e2b6225a7ba..9c88632e68d4a 100644
+--- a/llvm/test/CodeGen/X86/fp-strict-scalar-cmp.ll
++++ b/llvm/test/CodeGen/X86/fp-strict-scalar-cmp.ll
+@@ -13,10 +13,12 @@ define i32 @test_f32_oeq_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; SSE-32-NEXT: ucomiss {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setnp %al
++; SSE-32-NEXT: sete %cl
++; SSE-32-NEXT: testb %al, %cl
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; SSE-32-NEXT: cmovnel %eax, %ecx
+-; SSE-32-NEXT: cmovpl %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -32,10 +34,12 @@ define i32 @test_f32_oeq_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; AVX-32-NEXT: vucomiss {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setnp %al
++; AVX-32-NEXT: sete %cl
++; AVX-32-NEXT: testb %al, %cl
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; AVX-32-NEXT: cmovnel %eax, %ecx
+-; AVX-32-NEXT: cmovpl %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -56,13 +60,16 @@ define i32 @test_f32_oeq_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+-; X87-NEXT: jne .LBB0_3
+-; X87-NEXT: # %bb.1:
+-; X87-NEXT: jp .LBB0_3
++; X87-NEXT: setnp %al
++; X87-NEXT: sete %cl
++; X87-NEXT: testb %al, %cl
++; X87-NEXT: jne .LBB0_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+-; X87-NEXT: .LBB0_3:
++; X87-NEXT: movl (%eax), %eax
++; X87-NEXT: retl
++; X87-NEXT: .LBB0_1:
++; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+ ; X87-NEXT: retl
+ ;
+@@ -73,10 +80,12 @@ define i32 @test_f32_oeq_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-CMOV-NEXT: fucompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setnp %al
++; X87-CMOV-NEXT: sete %cl
++; X87-CMOV-NEXT: testb %al, %cl
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; X87-CMOV-NEXT: cmovnel %eax, %ecx
+-; X87-CMOV-NEXT: cmovpl %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmp.f32(
+@@ -91,9 +100,11 @@ define i32 @test_f32_ogt_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; SSE-32-NEXT: ucomiss {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: seta %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmoval %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -108,9 +119,11 @@ define i32 @test_f32_ogt_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; AVX-32-NEXT: vucomiss {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: seta %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmoval %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -130,7 +143,9 @@ define i32 @test_f32_ogt_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: ja .LBB1_1
++; X87-NEXT: seta %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB1_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -147,9 +162,11 @@ define i32 @test_f32_ogt_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-CMOV-NEXT: fucompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: seta %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmoval %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmp.f32(
+@@ -164,9 +181,11 @@ define i32 @test_f32_oge_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; SSE-32-NEXT: ucomiss {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setae %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmovael %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -181,9 +200,11 @@ define i32 @test_f32_oge_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; AVX-32-NEXT: vucomiss {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setae %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmovael %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -203,7 +224,9 @@ define i32 @test_f32_oge_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: jae .LBB2_1
++; X87-NEXT: setae %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB2_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -220,9 +243,11 @@ define i32 @test_f32_oge_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-CMOV-NEXT: fucompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setae %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmovael %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmp.f32(
+@@ -237,9 +262,11 @@ define i32 @test_f32_olt_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; SSE-32-NEXT: ucomiss {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: seta %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmoval %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -254,9 +281,11 @@ define i32 @test_f32_olt_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; AVX-32-NEXT: vucomiss {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: seta %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmoval %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -276,7 +305,9 @@ define i32 @test_f32_olt_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: ja .LBB3_1
++; X87-NEXT: seta %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB3_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -293,9 +324,11 @@ define i32 @test_f32_olt_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-CMOV-NEXT: fucompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: seta %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmoval %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmp.f32(
+@@ -310,9 +343,11 @@ define i32 @test_f32_ole_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; SSE-32-NEXT: ucomiss {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setae %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmovael %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -327,9 +362,11 @@ define i32 @test_f32_ole_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; AVX-32-NEXT: vucomiss {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setae %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmovael %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -349,7 +386,9 @@ define i32 @test_f32_ole_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: jae .LBB4_1
++; X87-NEXT: setae %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB4_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -366,9 +405,11 @@ define i32 @test_f32_ole_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-CMOV-NEXT: fucompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setae %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmovael %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmp.f32(
+@@ -383,6 +424,8 @@ define i32 @test_f32_one_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; SSE-32-NEXT: ucomiss {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setne %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; SSE-32-NEXT: cmovnel %eax, %ecx
+@@ -400,6 +443,8 @@ define i32 @test_f32_one_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; AVX-32-NEXT: vucomiss {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setne %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; AVX-32-NEXT: cmovnel %eax, %ecx
+@@ -422,6 +467,8 @@ define i32 @test_f32_one_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
++; X87-NEXT: setne %al
++; X87-NEXT: testb %al, %al
+ ; X87-NEXT: jne .LBB5_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+@@ -439,6 +486,8 @@ define i32 @test_f32_one_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-CMOV-NEXT: fucompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setne %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; X87-CMOV-NEXT: cmovnel %eax, %ecx
+@@ -456,9 +505,11 @@ define i32 @test_f32_ord_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; SSE-32-NEXT: ucomiss {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setnp %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmovnpl %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -473,9 +524,11 @@ define i32 @test_f32_ord_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; AVX-32-NEXT: vucomiss {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setnp %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmovnpl %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -495,7 +548,9 @@ define i32 @test_f32_ord_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: jnp .LBB6_1
++; X87-NEXT: setnp %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB6_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -512,9 +567,11 @@ define i32 @test_f32_ord_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-CMOV-NEXT: fucompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setnp %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmovnpl %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmp.f32(
+@@ -529,9 +586,11 @@ define i32 @test_f32_ueq_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; SSE-32-NEXT: ucomiss {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: sete %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmovel %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -546,9 +605,11 @@ define i32 @test_f32_ueq_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; AVX-32-NEXT: vucomiss {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: sete %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmovel %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -568,7 +629,9 @@ define i32 @test_f32_ueq_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: je .LBB7_1
++; X87-NEXT: sete %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB7_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -585,9 +648,11 @@ define i32 @test_f32_ueq_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-CMOV-NEXT: fucompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: sete %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmovel %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmp.f32(
+@@ -602,9 +667,11 @@ define i32 @test_f32_ugt_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; SSE-32-NEXT: ucomiss {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setb %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmovbl %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -619,9 +686,11 @@ define i32 @test_f32_ugt_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; AVX-32-NEXT: vucomiss {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setb %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmovbl %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -641,7 +710,9 @@ define i32 @test_f32_ugt_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: jb .LBB8_1
++; X87-NEXT: setb %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB8_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -658,9 +729,11 @@ define i32 @test_f32_ugt_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-CMOV-NEXT: fucompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setb %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmovbl %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmp.f32(
+@@ -675,9 +748,11 @@ define i32 @test_f32_uge_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; SSE-32-NEXT: ucomiss {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setbe %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmovbel %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -692,9 +767,11 @@ define i32 @test_f32_uge_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; AVX-32-NEXT: vucomiss {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setbe %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmovbel %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -714,7 +791,9 @@ define i32 @test_f32_uge_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: jbe .LBB9_1
++; X87-NEXT: setbe %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB9_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -731,9 +810,11 @@ define i32 @test_f32_uge_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-CMOV-NEXT: fucompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setbe %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmovbel %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmp.f32(
+@@ -748,9 +829,11 @@ define i32 @test_f32_ult_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; SSE-32-NEXT: ucomiss {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setb %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmovbl %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -765,9 +848,11 @@ define i32 @test_f32_ult_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; AVX-32-NEXT: vucomiss {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setb %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmovbl %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -787,7 +872,9 @@ define i32 @test_f32_ult_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: jb .LBB10_1
++; X87-NEXT: setb %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB10_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -804,9 +891,11 @@ define i32 @test_f32_ult_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-CMOV-NEXT: fucompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setb %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmovbl %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmp.f32(
+@@ -821,9 +910,11 @@ define i32 @test_f32_ule_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; SSE-32-NEXT: ucomiss {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setbe %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmovbel %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -838,9 +929,11 @@ define i32 @test_f32_ule_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; AVX-32-NEXT: vucomiss {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setbe %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmovbel %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -860,7 +953,9 @@ define i32 @test_f32_ule_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: jbe .LBB11_1
++; X87-NEXT: setbe %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB11_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -877,9 +972,11 @@ define i32 @test_f32_ule_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-CMOV-NEXT: fucompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setbe %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmovbel %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmp.f32(
+@@ -894,10 +991,12 @@ define i32 @test_f32_une_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; SSE-32-NEXT: ucomiss {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setp %al
++; SSE-32-NEXT: setne %cl
++; SSE-32-NEXT: orb %al, %cl
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; SSE-32-NEXT: cmovnel %eax, %ecx
+-; SSE-32-NEXT: cmovpl %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -913,10 +1012,12 @@ define i32 @test_f32_une_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; AVX-32-NEXT: vucomiss {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setp %al
++; AVX-32-NEXT: setne %cl
++; AVX-32-NEXT: orb %al, %cl
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; AVX-32-NEXT: cmovnel %eax, %ecx
+-; AVX-32-NEXT: cmovpl %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -937,13 +1038,16 @@ define i32 @test_f32_une_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+-; X87-NEXT: jne .LBB12_3
+-; X87-NEXT: # %bb.1:
+-; X87-NEXT: jp .LBB12_3
++; X87-NEXT: setp %al
++; X87-NEXT: setne %cl
++; X87-NEXT: orb %al, %cl
++; X87-NEXT: jne .LBB12_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+-; X87-NEXT: .LBB12_3:
++; X87-NEXT: movl (%eax), %eax
++; X87-NEXT: retl
++; X87-NEXT: .LBB12_1:
++; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+ ; X87-NEXT: retl
+ ;
+@@ -954,10 +1058,12 @@ define i32 @test_f32_une_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-CMOV-NEXT: fucompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setp %al
++; X87-CMOV-NEXT: setne %cl
++; X87-CMOV-NEXT: orb %al, %cl
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; X87-CMOV-NEXT: cmovnel %eax, %ecx
+-; X87-CMOV-NEXT: cmovpl %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmp.f32(
+@@ -972,9 +1078,11 @@ define i32 @test_f32_uno_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; SSE-32-NEXT: ucomiss {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setp %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmovpl %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -989,9 +1097,11 @@ define i32 @test_f32_uno_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; AVX-32-NEXT: vucomiss {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setp %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmovpl %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -1011,7 +1121,9 @@ define i32 @test_f32_uno_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: jp .LBB13_1
++; X87-NEXT: setp %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB13_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -1028,9 +1140,11 @@ define i32 @test_f32_uno_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-CMOV-NEXT: fucompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setp %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmovpl %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmp.f32(
+@@ -1045,10 +1159,12 @@ define i32 @test_f64_oeq_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+ ; SSE-32-NEXT: ucomisd {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setnp %al
++; SSE-32-NEXT: sete %cl
++; SSE-32-NEXT: testb %al, %cl
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; SSE-32-NEXT: cmovnel %eax, %ecx
+-; SSE-32-NEXT: cmovpl %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -1064,10 +1180,12 @@ define i32 @test_f64_oeq_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+ ; AVX-32-NEXT: vucomisd {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setnp %al
++; AVX-32-NEXT: sete %cl
++; AVX-32-NEXT: testb %al, %cl
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; AVX-32-NEXT: cmovnel %eax, %ecx
+-; AVX-32-NEXT: cmovpl %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -1088,13 +1206,16 @@ define i32 @test_f64_oeq_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+-; X87-NEXT: jne .LBB14_3
+-; X87-NEXT: # %bb.1:
+-; X87-NEXT: jp .LBB14_3
++; X87-NEXT: setnp %al
++; X87-NEXT: sete %cl
++; X87-NEXT: testb %al, %cl
++; X87-NEXT: jne .LBB14_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+-; X87-NEXT: .LBB14_3:
++; X87-NEXT: movl (%eax), %eax
++; X87-NEXT: retl
++; X87-NEXT: .LBB14_1:
++; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+ ; X87-NEXT: retl
+ ;
+@@ -1105,10 +1226,12 @@ define i32 @test_f64_oeq_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-CMOV-NEXT: fucompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setnp %al
++; X87-CMOV-NEXT: sete %cl
++; X87-CMOV-NEXT: testb %al, %cl
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; X87-CMOV-NEXT: cmovnel %eax, %ecx
+-; X87-CMOV-NEXT: cmovpl %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmp.f64(
+@@ -1123,9 +1246,11 @@ define i32 @test_f64_ogt_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+ ; SSE-32-NEXT: ucomisd {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: seta %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmoval %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -1140,9 +1265,11 @@ define i32 @test_f64_ogt_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+ ; AVX-32-NEXT: vucomisd {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: seta %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmoval %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -1162,7 +1289,9 @@ define i32 @test_f64_ogt_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: ja .LBB15_1
++; X87-NEXT: seta %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB15_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -1179,9 +1308,11 @@ define i32 @test_f64_ogt_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-CMOV-NEXT: fucompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: seta %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmoval %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmp.f64(
+@@ -1196,9 +1327,11 @@ define i32 @test_f64_oge_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+ ; SSE-32-NEXT: ucomisd {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setae %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmovael %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -1213,9 +1346,11 @@ define i32 @test_f64_oge_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+ ; AVX-32-NEXT: vucomisd {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setae %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmovael %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -1235,7 +1370,9 @@ define i32 @test_f64_oge_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: jae .LBB16_1
++; X87-NEXT: setae %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB16_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -1252,9 +1389,11 @@ define i32 @test_f64_oge_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-CMOV-NEXT: fucompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setae %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmovael %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmp.f64(
+@@ -1269,9 +1408,11 @@ define i32 @test_f64_olt_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+ ; SSE-32-NEXT: ucomisd {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: seta %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmoval %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -1286,9 +1427,11 @@ define i32 @test_f64_olt_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+ ; AVX-32-NEXT: vucomisd {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: seta %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmoval %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -1308,7 +1451,9 @@ define i32 @test_f64_olt_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: ja .LBB17_1
++; X87-NEXT: seta %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB17_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -1325,9 +1470,11 @@ define i32 @test_f64_olt_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-CMOV-NEXT: fucompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: seta %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmoval %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmp.f64(
+@@ -1342,9 +1489,11 @@ define i32 @test_f64_ole_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+ ; SSE-32-NEXT: ucomisd {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setae %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmovael %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -1359,9 +1508,11 @@ define i32 @test_f64_ole_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+ ; AVX-32-NEXT: vucomisd {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setae %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmovael %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -1381,7 +1532,9 @@ define i32 @test_f64_ole_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: jae .LBB18_1
++; X87-NEXT: setae %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB18_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -1398,9 +1551,11 @@ define i32 @test_f64_ole_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-CMOV-NEXT: fucompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setae %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmovael %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmp.f64(
+@@ -1415,6 +1570,8 @@ define i32 @test_f64_one_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+ ; SSE-32-NEXT: ucomisd {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setne %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; SSE-32-NEXT: cmovnel %eax, %ecx
+@@ -1432,6 +1589,8 @@ define i32 @test_f64_one_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+ ; AVX-32-NEXT: vucomisd {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setne %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; AVX-32-NEXT: cmovnel %eax, %ecx
+@@ -1454,6 +1613,8 @@ define i32 @test_f64_one_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
++; X87-NEXT: setne %al
++; X87-NEXT: testb %al, %al
+ ; X87-NEXT: jne .LBB19_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+@@ -1471,6 +1632,8 @@ define i32 @test_f64_one_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-CMOV-NEXT: fucompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setne %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; X87-CMOV-NEXT: cmovnel %eax, %ecx
+@@ -1488,9 +1651,11 @@ define i32 @test_f64_ord_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+ ; SSE-32-NEXT: ucomisd {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setnp %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmovnpl %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -1505,9 +1670,11 @@ define i32 @test_f64_ord_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+ ; AVX-32-NEXT: vucomisd {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setnp %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmovnpl %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -1527,7 +1694,9 @@ define i32 @test_f64_ord_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: jnp .LBB20_1
++; X87-NEXT: setnp %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB20_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -1544,9 +1713,11 @@ define i32 @test_f64_ord_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-CMOV-NEXT: fucompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setnp %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmovnpl %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmp.f64(
+@@ -1561,9 +1732,11 @@ define i32 @test_f64_ueq_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+ ; SSE-32-NEXT: ucomisd {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: sete %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmovel %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -1578,9 +1751,11 @@ define i32 @test_f64_ueq_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+ ; AVX-32-NEXT: vucomisd {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: sete %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmovel %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -1600,7 +1775,9 @@ define i32 @test_f64_ueq_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: je .LBB21_1
++; X87-NEXT: sete %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB21_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -1617,9 +1794,11 @@ define i32 @test_f64_ueq_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-CMOV-NEXT: fucompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: sete %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmovel %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmp.f64(
+@@ -1634,9 +1813,11 @@ define i32 @test_f64_ugt_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+ ; SSE-32-NEXT: ucomisd {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setb %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmovbl %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -1651,9 +1832,11 @@ define i32 @test_f64_ugt_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+ ; AVX-32-NEXT: vucomisd {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setb %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmovbl %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -1673,7 +1856,9 @@ define i32 @test_f64_ugt_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: jb .LBB22_1
++; X87-NEXT: setb %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB22_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -1690,9 +1875,11 @@ define i32 @test_f64_ugt_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-CMOV-NEXT: fucompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setb %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmovbl %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmp.f64(
+@@ -1707,9 +1894,11 @@ define i32 @test_f64_uge_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+ ; SSE-32-NEXT: ucomisd {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setbe %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmovbel %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -1724,9 +1913,11 @@ define i32 @test_f64_uge_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+ ; AVX-32-NEXT: vucomisd {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setbe %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmovbel %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -1746,7 +1937,9 @@ define i32 @test_f64_uge_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: jbe .LBB23_1
++; X87-NEXT: setbe %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB23_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -1763,9 +1956,11 @@ define i32 @test_f64_uge_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-CMOV-NEXT: fucompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setbe %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmovbel %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmp.f64(
+@@ -1780,9 +1975,11 @@ define i32 @test_f64_ult_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+ ; SSE-32-NEXT: ucomisd {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setb %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmovbl %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -1797,9 +1994,11 @@ define i32 @test_f64_ult_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+ ; AVX-32-NEXT: vucomisd {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setb %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmovbl %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -1819,7 +2018,9 @@ define i32 @test_f64_ult_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: jb .LBB24_1
++; X87-NEXT: setb %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB24_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -1836,9 +2037,11 @@ define i32 @test_f64_ult_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-CMOV-NEXT: fucompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setb %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmovbl %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmp.f64(
+@@ -1853,9 +2056,11 @@ define i32 @test_f64_ule_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+ ; SSE-32-NEXT: ucomisd {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setbe %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmovbel %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -1870,9 +2075,11 @@ define i32 @test_f64_ule_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+ ; AVX-32-NEXT: vucomisd {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setbe %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmovbel %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -1892,7 +2099,9 @@ define i32 @test_f64_ule_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: jbe .LBB25_1
++; X87-NEXT: setbe %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB25_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -1909,9 +2118,11 @@ define i32 @test_f64_ule_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-CMOV-NEXT: fucompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setbe %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmovbel %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmp.f64(
+@@ -1926,10 +2137,12 @@ define i32 @test_f64_une_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+ ; SSE-32-NEXT: ucomisd {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setp %al
++; SSE-32-NEXT: setne %cl
++; SSE-32-NEXT: orb %al, %cl
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; SSE-32-NEXT: cmovnel %eax, %ecx
+-; SSE-32-NEXT: cmovpl %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -1945,10 +2158,12 @@ define i32 @test_f64_une_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+ ; AVX-32-NEXT: vucomisd {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setp %al
++; AVX-32-NEXT: setne %cl
++; AVX-32-NEXT: orb %al, %cl
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; AVX-32-NEXT: cmovnel %eax, %ecx
+-; AVX-32-NEXT: cmovpl %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -1969,13 +2184,16 @@ define i32 @test_f64_une_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+-; X87-NEXT: jne .LBB26_3
+-; X87-NEXT: # %bb.1:
+-; X87-NEXT: jp .LBB26_3
++; X87-NEXT: setp %al
++; X87-NEXT: setne %cl
++; X87-NEXT: orb %al, %cl
++; X87-NEXT: jne .LBB26_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+-; X87-NEXT: .LBB26_3:
++; X87-NEXT: movl (%eax), %eax
++; X87-NEXT: retl
++; X87-NEXT: .LBB26_1:
++; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+ ; X87-NEXT: retl
+ ;
+@@ -1986,10 +2204,12 @@ define i32 @test_f64_une_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-CMOV-NEXT: fucompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setp %al
++; X87-CMOV-NEXT: setne %cl
++; X87-CMOV-NEXT: orb %al, %cl
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; X87-CMOV-NEXT: cmovnel %eax, %ecx
+-; X87-CMOV-NEXT: cmovpl %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmp.f64(
+@@ -2004,9 +2224,11 @@ define i32 @test_f64_uno_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+ ; SSE-32-NEXT: ucomisd {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setp %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmovpl %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -2021,9 +2243,11 @@ define i32 @test_f64_uno_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+ ; AVX-32-NEXT: vucomisd {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setp %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmovpl %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -2043,7 +2267,9 @@ define i32 @test_f64_uno_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: jp .LBB27_1
++; X87-NEXT: setp %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB27_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -2060,9 +2286,11 @@ define i32 @test_f64_uno_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-CMOV-NEXT: fucompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setp %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmovpl %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmp.f64(
+@@ -2077,10 +2305,12 @@ define i32 @test_f32_oeq_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; SSE-32-NEXT: comiss {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setnp %al
++; SSE-32-NEXT: sete %cl
++; SSE-32-NEXT: testb %al, %cl
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; SSE-32-NEXT: cmovnel %eax, %ecx
+-; SSE-32-NEXT: cmovpl %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -2096,10 +2326,12 @@ define i32 @test_f32_oeq_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; AVX-32-NEXT: vcomiss {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setnp %al
++; AVX-32-NEXT: sete %cl
++; AVX-32-NEXT: testb %al, %cl
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; AVX-32-NEXT: cmovnel %eax, %ecx
+-; AVX-32-NEXT: cmovpl %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -2120,13 +2352,16 @@ define i32 @test_f32_oeq_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+-; X87-NEXT: jne .LBB28_3
+-; X87-NEXT: # %bb.1:
+-; X87-NEXT: jp .LBB28_3
++; X87-NEXT: setnp %al
++; X87-NEXT: sete %cl
++; X87-NEXT: testb %al, %cl
++; X87-NEXT: jne .LBB28_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+-; X87-NEXT: .LBB28_3:
++; X87-NEXT: movl (%eax), %eax
++; X87-NEXT: retl
++; X87-NEXT: .LBB28_1:
++; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+ ; X87-NEXT: retl
+ ;
+@@ -2137,10 +2372,12 @@ define i32 @test_f32_oeq_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-CMOV-NEXT: fcompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setnp %al
++; X87-CMOV-NEXT: sete %cl
++; X87-CMOV-NEXT: testb %al, %cl
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; X87-CMOV-NEXT: cmovnel %eax, %ecx
+-; X87-CMOV-NEXT: cmovpl %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmps.f32(
+@@ -2155,9 +2392,11 @@ define i32 @test_f32_ogt_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; SSE-32-NEXT: comiss {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: seta %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmoval %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -2172,9 +2411,11 @@ define i32 @test_f32_ogt_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; AVX-32-NEXT: vcomiss {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: seta %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmoval %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -2194,7 +2435,9 @@ define i32 @test_f32_ogt_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: ja .LBB29_1
++; X87-NEXT: seta %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB29_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -2211,9 +2454,11 @@ define i32 @test_f32_ogt_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-CMOV-NEXT: fcompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: seta %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmoval %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmps.f32(
+@@ -2228,9 +2473,11 @@ define i32 @test_f32_oge_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; SSE-32-NEXT: comiss {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setae %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmovael %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -2245,9 +2492,11 @@ define i32 @test_f32_oge_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; AVX-32-NEXT: vcomiss {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setae %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmovael %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -2267,7 +2516,9 @@ define i32 @test_f32_oge_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: jae .LBB30_1
++; X87-NEXT: setae %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB30_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -2284,9 +2535,11 @@ define i32 @test_f32_oge_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-CMOV-NEXT: fcompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setae %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmovael %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmps.f32(
+@@ -2301,9 +2554,11 @@ define i32 @test_f32_olt_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; SSE-32-NEXT: comiss {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: seta %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmoval %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -2318,9 +2573,11 @@ define i32 @test_f32_olt_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; AVX-32-NEXT: vcomiss {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: seta %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmoval %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -2340,7 +2597,9 @@ define i32 @test_f32_olt_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: ja .LBB31_1
++; X87-NEXT: seta %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB31_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -2357,9 +2616,11 @@ define i32 @test_f32_olt_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-CMOV-NEXT: fcompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: seta %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmoval %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmps.f32(
+@@ -2374,9 +2635,11 @@ define i32 @test_f32_ole_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; SSE-32-NEXT: comiss {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setae %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmovael %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -2391,9 +2654,11 @@ define i32 @test_f32_ole_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; AVX-32-NEXT: vcomiss {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setae %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmovael %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -2413,7 +2678,9 @@ define i32 @test_f32_ole_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: jae .LBB32_1
++; X87-NEXT: setae %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB32_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -2430,9 +2697,11 @@ define i32 @test_f32_ole_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-CMOV-NEXT: fcompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setae %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmovael %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmps.f32(
+@@ -2447,6 +2716,8 @@ define i32 @test_f32_one_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; SSE-32-NEXT: comiss {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setne %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; SSE-32-NEXT: cmovnel %eax, %ecx
+@@ -2464,6 +2735,8 @@ define i32 @test_f32_one_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; AVX-32-NEXT: vcomiss {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setne %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; AVX-32-NEXT: cmovnel %eax, %ecx
+@@ -2486,6 +2759,8 @@ define i32 @test_f32_one_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
++; X87-NEXT: setne %al
++; X87-NEXT: testb %al, %al
+ ; X87-NEXT: jne .LBB33_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+@@ -2503,6 +2778,8 @@ define i32 @test_f32_one_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-CMOV-NEXT: fcompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setne %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; X87-CMOV-NEXT: cmovnel %eax, %ecx
+@@ -2520,9 +2797,11 @@ define i32 @test_f32_ord_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; SSE-32-NEXT: comiss {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setnp %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmovnpl %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -2537,9 +2816,11 @@ define i32 @test_f32_ord_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; AVX-32-NEXT: vcomiss {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setnp %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmovnpl %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -2559,7 +2840,9 @@ define i32 @test_f32_ord_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: jnp .LBB34_1
++; X87-NEXT: setnp %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB34_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -2576,9 +2859,11 @@ define i32 @test_f32_ord_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-CMOV-NEXT: fcompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setnp %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmovnpl %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmps.f32(
+@@ -2593,9 +2878,11 @@ define i32 @test_f32_ueq_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; SSE-32-NEXT: comiss {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: sete %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmovel %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -2610,9 +2897,11 @@ define i32 @test_f32_ueq_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; AVX-32-NEXT: vcomiss {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: sete %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmovel %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -2632,7 +2921,9 @@ define i32 @test_f32_ueq_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: je .LBB35_1
++; X87-NEXT: sete %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB35_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -2649,9 +2940,11 @@ define i32 @test_f32_ueq_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-CMOV-NEXT: fcompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: sete %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmovel %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmps.f32(
+@@ -2666,9 +2959,11 @@ define i32 @test_f32_ugt_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; SSE-32-NEXT: comiss {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setb %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmovbl %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -2683,9 +2978,11 @@ define i32 @test_f32_ugt_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; AVX-32-NEXT: vcomiss {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setb %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmovbl %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -2705,7 +3002,9 @@ define i32 @test_f32_ugt_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: jb .LBB36_1
++; X87-NEXT: setb %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB36_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -2722,9 +3021,11 @@ define i32 @test_f32_ugt_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-CMOV-NEXT: fcompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setb %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmovbl %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmps.f32(
+@@ -2739,9 +3040,11 @@ define i32 @test_f32_uge_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; SSE-32-NEXT: comiss {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setbe %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmovbel %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -2756,9 +3059,11 @@ define i32 @test_f32_uge_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; AVX-32-NEXT: vcomiss {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setbe %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmovbel %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -2778,7 +3083,9 @@ define i32 @test_f32_uge_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: jbe .LBB37_1
++; X87-NEXT: setbe %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB37_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -2795,9 +3102,11 @@ define i32 @test_f32_uge_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-CMOV-NEXT: fcompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setbe %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmovbel %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmps.f32(
+@@ -2812,9 +3121,11 @@ define i32 @test_f32_ult_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; SSE-32-NEXT: comiss {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setb %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmovbl %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -2829,9 +3140,11 @@ define i32 @test_f32_ult_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; AVX-32-NEXT: vcomiss {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setb %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmovbl %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -2851,7 +3164,9 @@ define i32 @test_f32_ult_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: jb .LBB38_1
++; X87-NEXT: setb %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB38_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -2868,9 +3183,11 @@ define i32 @test_f32_ult_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-CMOV-NEXT: fcompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setb %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmovbl %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmps.f32(
+@@ -2885,9 +3202,11 @@ define i32 @test_f32_ule_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; SSE-32-NEXT: comiss {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setbe %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmovbel %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -2902,9 +3221,11 @@ define i32 @test_f32_ule_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; AVX-32-NEXT: vcomiss {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setbe %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmovbel %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -2924,7 +3245,9 @@ define i32 @test_f32_ule_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: jbe .LBB39_1
++; X87-NEXT: setbe %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB39_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -2941,9 +3264,11 @@ define i32 @test_f32_ule_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-CMOV-NEXT: fcompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setbe %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmovbel %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmps.f32(
+@@ -2958,10 +3283,12 @@ define i32 @test_f32_une_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; SSE-32-NEXT: comiss {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setp %al
++; SSE-32-NEXT: setne %cl
++; SSE-32-NEXT: orb %al, %cl
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; SSE-32-NEXT: cmovnel %eax, %ecx
+-; SSE-32-NEXT: cmovpl %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -2977,10 +3304,12 @@ define i32 @test_f32_une_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; AVX-32-NEXT: vcomiss {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setp %al
++; AVX-32-NEXT: setne %cl
++; AVX-32-NEXT: orb %al, %cl
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; AVX-32-NEXT: cmovnel %eax, %ecx
+-; AVX-32-NEXT: cmovpl %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -3001,13 +3330,16 @@ define i32 @test_f32_une_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+-; X87-NEXT: jne .LBB40_3
+-; X87-NEXT: # %bb.1:
+-; X87-NEXT: jp .LBB40_3
++; X87-NEXT: setp %al
++; X87-NEXT: setne %cl
++; X87-NEXT: orb %al, %cl
++; X87-NEXT: jne .LBB40_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+-; X87-NEXT: .LBB40_3:
++; X87-NEXT: movl (%eax), %eax
++; X87-NEXT: retl
++; X87-NEXT: .LBB40_1:
++; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+ ; X87-NEXT: retl
+ ;
+@@ -3018,10 +3350,12 @@ define i32 @test_f32_une_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-CMOV-NEXT: fcompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setp %al
++; X87-CMOV-NEXT: setne %cl
++; X87-CMOV-NEXT: orb %al, %cl
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; X87-CMOV-NEXT: cmovnel %eax, %ecx
+-; X87-CMOV-NEXT: cmovpl %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmps.f32(
+@@ -3036,9 +3370,11 @@ define i32 @test_f32_uno_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; SSE-32-NEXT: comiss {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setp %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmovpl %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -3053,9 +3389,11 @@ define i32 @test_f32_uno_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+ ; AVX-32-NEXT: vcomiss {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setp %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmovpl %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -3075,7 +3413,9 @@ define i32 @test_f32_uno_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: jp .LBB41_1
++; X87-NEXT: setp %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB41_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -3092,9 +3432,11 @@ define i32 @test_f32_uno_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
+ ; X87-CMOV-NEXT: fcompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setp %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmovpl %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmps.f32(
+@@ -3109,10 +3451,12 @@ define i32 @test_f64_oeq_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+ ; SSE-32-NEXT: comisd {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setnp %al
++; SSE-32-NEXT: sete %cl
++; SSE-32-NEXT: testb %al, %cl
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; SSE-32-NEXT: cmovnel %eax, %ecx
+-; SSE-32-NEXT: cmovpl %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -3128,10 +3472,12 @@ define i32 @test_f64_oeq_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+ ; AVX-32-NEXT: vcomisd {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setnp %al
++; AVX-32-NEXT: sete %cl
++; AVX-32-NEXT: testb %al, %cl
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; AVX-32-NEXT: cmovnel %eax, %ecx
+-; AVX-32-NEXT: cmovpl %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -3152,13 +3498,16 @@ define i32 @test_f64_oeq_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+-; X87-NEXT: jne .LBB42_3
+-; X87-NEXT: # %bb.1:
+-; X87-NEXT: jp .LBB42_3
++; X87-NEXT: setnp %al
++; X87-NEXT: sete %cl
++; X87-NEXT: testb %al, %cl
++; X87-NEXT: jne .LBB42_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+-; X87-NEXT: .LBB42_3:
++; X87-NEXT: movl (%eax), %eax
++; X87-NEXT: retl
++; X87-NEXT: .LBB42_1:
++; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+ ; X87-NEXT: retl
+ ;
+@@ -3169,10 +3518,12 @@ define i32 @test_f64_oeq_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-CMOV-NEXT: fcompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setnp %al
++; X87-CMOV-NEXT: sete %cl
++; X87-CMOV-NEXT: testb %al, %cl
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; X87-CMOV-NEXT: cmovnel %eax, %ecx
+-; X87-CMOV-NEXT: cmovpl %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmps.f64(
+@@ -3187,9 +3538,11 @@ define i32 @test_f64_ogt_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+ ; SSE-32-NEXT: comisd {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: seta %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmoval %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -3204,9 +3557,11 @@ define i32 @test_f64_ogt_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+ ; AVX-32-NEXT: vcomisd {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: seta %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmoval %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -3226,7 +3581,9 @@ define i32 @test_f64_ogt_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: ja .LBB43_1
++; X87-NEXT: seta %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB43_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -3243,9 +3600,11 @@ define i32 @test_f64_ogt_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-CMOV-NEXT: fcompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: seta %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmoval %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmps.f64(
+@@ -3260,9 +3619,11 @@ define i32 @test_f64_oge_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+ ; SSE-32-NEXT: comisd {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setae %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmovael %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -3277,9 +3638,11 @@ define i32 @test_f64_oge_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+ ; AVX-32-NEXT: vcomisd {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setae %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmovael %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -3299,7 +3662,9 @@ define i32 @test_f64_oge_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: jae .LBB44_1
++; X87-NEXT: setae %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB44_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -3316,9 +3681,11 @@ define i32 @test_f64_oge_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-CMOV-NEXT: fcompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setae %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmovael %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmps.f64(
+@@ -3333,9 +3700,11 @@ define i32 @test_f64_olt_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+ ; SSE-32-NEXT: comisd {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: seta %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmoval %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -3350,9 +3719,11 @@ define i32 @test_f64_olt_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+ ; AVX-32-NEXT: vcomisd {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: seta %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmoval %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -3372,7 +3743,9 @@ define i32 @test_f64_olt_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: ja .LBB45_1
++; X87-NEXT: seta %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB45_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -3389,9 +3762,11 @@ define i32 @test_f64_olt_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-CMOV-NEXT: fcompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: seta %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmoval %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmps.f64(
+@@ -3406,9 +3781,11 @@ define i32 @test_f64_ole_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+ ; SSE-32-NEXT: comisd {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setae %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmovael %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -3423,9 +3800,11 @@ define i32 @test_f64_ole_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+ ; AVX-32-NEXT: vcomisd {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setae %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmovael %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -3445,7 +3824,9 @@ define i32 @test_f64_ole_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: jae .LBB46_1
++; X87-NEXT: setae %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB46_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -3462,9 +3843,11 @@ define i32 @test_f64_ole_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-CMOV-NEXT: fcompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setae %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmovael %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmps.f64(
+@@ -3479,6 +3862,8 @@ define i32 @test_f64_one_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+ ; SSE-32-NEXT: comisd {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setne %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; SSE-32-NEXT: cmovnel %eax, %ecx
+@@ -3496,6 +3881,8 @@ define i32 @test_f64_one_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+ ; AVX-32-NEXT: vcomisd {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setne %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; AVX-32-NEXT: cmovnel %eax, %ecx
+@@ -3518,6 +3905,8 @@ define i32 @test_f64_one_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
++; X87-NEXT: setne %al
++; X87-NEXT: testb %al, %al
+ ; X87-NEXT: jne .LBB47_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+@@ -3535,6 +3924,8 @@ define i32 @test_f64_one_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-CMOV-NEXT: fcompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setne %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; X87-CMOV-NEXT: cmovnel %eax, %ecx
+@@ -3552,9 +3943,11 @@ define i32 @test_f64_ord_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+ ; SSE-32-NEXT: comisd {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setnp %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmovnpl %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -3569,9 +3962,11 @@ define i32 @test_f64_ord_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+ ; AVX-32-NEXT: vcomisd {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setnp %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmovnpl %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -3591,7 +3986,9 @@ define i32 @test_f64_ord_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: jnp .LBB48_1
++; X87-NEXT: setnp %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB48_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -3608,9 +4005,11 @@ define i32 @test_f64_ord_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-CMOV-NEXT: fcompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setnp %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmovnpl %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmps.f64(
+@@ -3625,9 +4024,11 @@ define i32 @test_f64_ueq_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+ ; SSE-32-NEXT: comisd {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: sete %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmovel %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -3642,9 +4043,11 @@ define i32 @test_f64_ueq_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+ ; AVX-32-NEXT: vcomisd {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: sete %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmovel %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -3664,7 +4067,9 @@ define i32 @test_f64_ueq_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: je .LBB49_1
++; X87-NEXT: sete %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB49_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -3681,9 +4086,11 @@ define i32 @test_f64_ueq_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-CMOV-NEXT: fcompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: sete %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmovel %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmps.f64(
+@@ -3698,9 +4105,11 @@ define i32 @test_f64_ugt_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+ ; SSE-32-NEXT: comisd {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setb %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmovbl %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -3715,9 +4124,11 @@ define i32 @test_f64_ugt_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+ ; AVX-32-NEXT: vcomisd {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setb %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmovbl %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -3737,7 +4148,9 @@ define i32 @test_f64_ugt_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: jb .LBB50_1
++; X87-NEXT: setb %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB50_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -3754,9 +4167,11 @@ define i32 @test_f64_ugt_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-CMOV-NEXT: fcompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setb %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmovbl %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmps.f64(
+@@ -3771,9 +4186,11 @@ define i32 @test_f64_uge_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+ ; SSE-32-NEXT: comisd {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setbe %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmovbel %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -3788,9 +4205,11 @@ define i32 @test_f64_uge_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+ ; AVX-32-NEXT: vcomisd {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setbe %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmovbel %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -3810,7 +4229,9 @@ define i32 @test_f64_uge_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: jbe .LBB51_1
++; X87-NEXT: setbe %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB51_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -3827,9 +4248,11 @@ define i32 @test_f64_uge_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-CMOV-NEXT: fcompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setbe %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmovbel %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmps.f64(
+@@ -3844,9 +4267,11 @@ define i32 @test_f64_ult_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+ ; SSE-32-NEXT: comisd {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setb %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmovbl %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -3861,9 +4286,11 @@ define i32 @test_f64_ult_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+ ; AVX-32-NEXT: vcomisd {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setb %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmovbl %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -3883,7 +4310,9 @@ define i32 @test_f64_ult_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: jb .LBB52_1
++; X87-NEXT: setb %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB52_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -3900,9 +4329,11 @@ define i32 @test_f64_ult_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-CMOV-NEXT: fcompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setb %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmovbl %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmps.f64(
+@@ -3917,9 +4348,11 @@ define i32 @test_f64_ule_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+ ; SSE-32-NEXT: comisd {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setbe %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmovbel %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -3934,9 +4367,11 @@ define i32 @test_f64_ule_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+ ; AVX-32-NEXT: vcomisd {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setbe %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmovbel %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -3956,7 +4391,9 @@ define i32 @test_f64_ule_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: jbe .LBB53_1
++; X87-NEXT: setbe %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB53_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -3973,9 +4410,11 @@ define i32 @test_f64_ule_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-CMOV-NEXT: fcompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setbe %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmovbel %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmps.f64(
+@@ -3990,10 +4429,12 @@ define i32 @test_f64_une_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+ ; SSE-32-NEXT: comisd {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setp %al
++; SSE-32-NEXT: setne %cl
++; SSE-32-NEXT: orb %al, %cl
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; SSE-32-NEXT: cmovnel %eax, %ecx
+-; SSE-32-NEXT: cmovpl %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -4009,10 +4450,12 @@ define i32 @test_f64_une_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+ ; AVX-32-NEXT: vcomisd {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setp %al
++; AVX-32-NEXT: setne %cl
++; AVX-32-NEXT: orb %al, %cl
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; AVX-32-NEXT: cmovnel %eax, %ecx
+-; AVX-32-NEXT: cmovpl %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -4033,13 +4476,16 @@ define i32 @test_f64_une_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+-; X87-NEXT: jne .LBB54_3
+-; X87-NEXT: # %bb.1:
+-; X87-NEXT: jp .LBB54_3
++; X87-NEXT: setp %al
++; X87-NEXT: setne %cl
++; X87-NEXT: orb %al, %cl
++; X87-NEXT: jne .LBB54_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+-; X87-NEXT: .LBB54_3:
++; X87-NEXT: movl (%eax), %eax
++; X87-NEXT: retl
++; X87-NEXT: .LBB54_1:
++; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+ ; X87-NEXT: retl
+ ;
+@@ -4050,10 +4496,12 @@ define i32 @test_f64_une_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-CMOV-NEXT: fcompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setp %al
++; X87-CMOV-NEXT: setne %cl
++; X87-CMOV-NEXT: orb %al, %cl
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; X87-CMOV-NEXT: cmovnel %eax, %ecx
+-; X87-CMOV-NEXT: cmovpl %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmps.f64(
+@@ -4068,9 +4516,11 @@ define i32 @test_f64_uno_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; SSE-32: # %bb.0:
+ ; SSE-32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+ ; SSE-32-NEXT: comisd {{[0-9]+}}(%esp), %xmm0
++; SSE-32-NEXT: setp %al
++; SSE-32-NEXT: testb %al, %al
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SSE-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; SSE-32-NEXT: cmovpl %eax, %ecx
++; SSE-32-NEXT: cmovnel %eax, %ecx
+ ; SSE-32-NEXT: movl (%ecx), %eax
+ ; SSE-32-NEXT: retl
+ ;
+@@ -4085,9 +4535,11 @@ define i32 @test_f64_uno_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; AVX-32: # %bb.0:
+ ; AVX-32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+ ; AVX-32-NEXT: vcomisd {{[0-9]+}}(%esp), %xmm0
++; AVX-32-NEXT: setp %al
++; AVX-32-NEXT: testb %al, %al
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; AVX-32-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; AVX-32-NEXT: cmovpl %eax, %ecx
++; AVX-32-NEXT: cmovnel %eax, %ecx
+ ; AVX-32-NEXT: movl (%ecx), %eax
+ ; AVX-32-NEXT: retl
+ ;
+@@ -4107,7 +4559,9 @@ define i32 @test_f64_uno_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-NEXT: fnstsw %ax
+ ; X87-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X87-NEXT: sahf
+-; X87-NEXT: jp .LBB55_1
++; X87-NEXT: setp %al
++; X87-NEXT: testb %al, %al
++; X87-NEXT: jne .LBB55_1
+ ; X87-NEXT: # %bb.2:
+ ; X87-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-NEXT: movl (%eax), %eax
+@@ -4124,9 +4578,11 @@ define i32 @test_f64_uno_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
+ ; X87-CMOV-NEXT: fcompi %st(1), %st
+ ; X87-CMOV-NEXT: fstp %st(0)
+ ; X87-CMOV-NEXT: wait
++; X87-CMOV-NEXT: setp %al
++; X87-CMOV-NEXT: testb %al, %al
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+-; X87-CMOV-NEXT: cmovpl %eax, %ecx
++; X87-CMOV-NEXT: cmovnel %eax, %ecx
+ ; X87-CMOV-NEXT: movl (%ecx), %eax
+ ; X87-CMOV-NEXT: retl
+ %cond = call i1 @llvm.experimental.constrained.fcmps.f64(
+diff --git a/llvm/test/CodeGen/X86/fp128-libcalls-strict.ll b/llvm/test/CodeGen/X86/fp128-libcalls-strict.ll
+index dfff88d30bcd4..cae271f7a2ed4 100644
+--- a/llvm/test/CodeGen/X86/fp128-libcalls-strict.ll
++++ b/llvm/test/CodeGen/X86/fp128-libcalls-strict.ll
+@@ -4129,6 +4129,7 @@ define i64 @cmp_ueq_q(i64 %a, i64 %b, fp128 %x, fp128 %y) #0 {
+ ; X86-NEXT: calll __unordtf2
+ ; X86-NEXT: addl $32, %esp
+ ; X86-NEXT: orb %bl, %al
++; X86-NEXT: testb $1, %al
+ ; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; X86-NEXT: cmovnel %eax, %ecx
+@@ -4212,6 +4213,7 @@ define i64 @cmp_ueq_q(i64 %a, i64 %b, fp128 %x, fp128 %y) #0 {
+ ; WIN-X86-NEXT: calll ___unordtf2
+ ; WIN-X86-NEXT: addl $32, %esp
+ ; WIN-X86-NEXT: orb %bl, %al
++; WIN-X86-NEXT: testb $1, %al
+ ; WIN-X86-NEXT: jne LBB39_1
+ ; WIN-X86-NEXT: # %bb.2:
+ ; WIN-X86-NEXT: leal 16(%ebp), %ecx
+diff --git a/llvm/test/CodeGen/X86/fp80-strict-scalar-cmp.ll b/llvm/test/CodeGen/X86/fp80-strict-scalar-cmp.ll
+index cb2361fbb8d37..81c7647bf04f6 100644
+--- a/llvm/test/CodeGen/X86/fp80-strict-scalar-cmp.ll
++++ b/llvm/test/CodeGen/X86/fp80-strict-scalar-cmp.ll
+@@ -12,13 +12,16 @@ define i32 @test_oeq_q(i32 %a, i32 %b, x86_fp80 %f1, x86_fp80 %f2) #0 {
+ ; X86-NEXT: fnstsw %ax
+ ; X86-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X86-NEXT: sahf
+-; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+-; X86-NEXT: jne .LBB0_3
+-; X86-NEXT: # %bb.1:
+-; X86-NEXT: jp .LBB0_3
++; X86-NEXT: setnp %al
++; X86-NEXT: sete %cl
++; X86-NEXT: testb %al, %cl
++; X86-NEXT: jne .LBB0_1
+ ; X86-NEXT: # %bb.2:
+ ; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+-; X86-NEXT: .LBB0_3:
++; X86-NEXT: movl (%eax), %eax
++; X86-NEXT: retl
++; X86-NEXT: .LBB0_1:
++; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-NEXT: movl (%eax), %eax
+ ; X86-NEXT: retl
+ ;
+@@ -50,7 +53,9 @@ define i32 @test_ogt_q(i32 %a, i32 %b, x86_fp80 %f1, x86_fp80 %f2) #0 {
+ ; X86-NEXT: fnstsw %ax
+ ; X86-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X86-NEXT: sahf
+-; X86-NEXT: ja .LBB1_1
++; X86-NEXT: seta %al
++; X86-NEXT: testb %al, %al
++; X86-NEXT: jne .LBB1_1
+ ; X86-NEXT: # %bb.2:
+ ; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-NEXT: movl (%eax), %eax
+@@ -87,7 +92,9 @@ define i32 @test_oge_q(i32 %a, i32 %b, x86_fp80 %f1, x86_fp80 %f2) #0 {
+ ; X86-NEXT: fnstsw %ax
+ ; X86-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X86-NEXT: sahf
+-; X86-NEXT: jae .LBB2_1
++; X86-NEXT: setae %al
++; X86-NEXT: testb %al, %al
++; X86-NEXT: jne .LBB2_1
+ ; X86-NEXT: # %bb.2:
+ ; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-NEXT: movl (%eax), %eax
+@@ -124,7 +131,9 @@ define i32 @test_olt_q(i32 %a, i32 %b, x86_fp80 %f1, x86_fp80 %f2) #0 {
+ ; X86-NEXT: fnstsw %ax
+ ; X86-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X86-NEXT: sahf
+-; X86-NEXT: ja .LBB3_1
++; X86-NEXT: seta %al
++; X86-NEXT: testb %al, %al
++; X86-NEXT: jne .LBB3_1
+ ; X86-NEXT: # %bb.2:
+ ; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-NEXT: movl (%eax), %eax
+@@ -161,7 +170,9 @@ define i32 @test_ole_q(i32 %a, i32 %b, x86_fp80 %f1, x86_fp80 %f2) #0 {
+ ; X86-NEXT: fnstsw %ax
+ ; X86-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X86-NEXT: sahf
+-; X86-NEXT: jae .LBB4_1
++; X86-NEXT: setae %al
++; X86-NEXT: testb %al, %al
++; X86-NEXT: jne .LBB4_1
+ ; X86-NEXT: # %bb.2:
+ ; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-NEXT: movl (%eax), %eax
+@@ -198,6 +209,8 @@ define i32 @test_one_q(i32 %a, i32 %b, x86_fp80 %f1, x86_fp80 %f2) #0 {
+ ; X86-NEXT: fnstsw %ax
+ ; X86-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X86-NEXT: sahf
++; X86-NEXT: setne %al
++; X86-NEXT: testb %al, %al
+ ; X86-NEXT: jne .LBB5_1
+ ; X86-NEXT: # %bb.2:
+ ; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+@@ -235,7 +248,9 @@ define i32 @test_ord_q(i32 %a, i32 %b, x86_fp80 %f1, x86_fp80 %f2) #0 {
+ ; X86-NEXT: fnstsw %ax
+ ; X86-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X86-NEXT: sahf
+-; X86-NEXT: jnp .LBB6_1
++; X86-NEXT: setnp %al
++; X86-NEXT: testb %al, %al
++; X86-NEXT: jne .LBB6_1
+ ; X86-NEXT: # %bb.2:
+ ; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-NEXT: movl (%eax), %eax
+@@ -272,7 +287,9 @@ define i32 @test_ueq_q(i32 %a, i32 %b, x86_fp80 %f1, x86_fp80 %f2) #0 {
+ ; X86-NEXT: fnstsw %ax
+ ; X86-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X86-NEXT: sahf
+-; X86-NEXT: je .LBB7_1
++; X86-NEXT: sete %al
++; X86-NEXT: testb %al, %al
++; X86-NEXT: jne .LBB7_1
+ ; X86-NEXT: # %bb.2:
+ ; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-NEXT: movl (%eax), %eax
+@@ -309,7 +326,9 @@ define i32 @test_ugt_q(i32 %a, i32 %b, x86_fp80 %f1, x86_fp80 %f2) #0 {
+ ; X86-NEXT: fnstsw %ax
+ ; X86-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X86-NEXT: sahf
+-; X86-NEXT: jb .LBB8_1
++; X86-NEXT: setb %al
++; X86-NEXT: testb %al, %al
++; X86-NEXT: jne .LBB8_1
+ ; X86-NEXT: # %bb.2:
+ ; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-NEXT: movl (%eax), %eax
+@@ -346,7 +365,9 @@ define i32 @test_uge_q(i32 %a, i32 %b, x86_fp80 %f1, x86_fp80 %f2) #0 {
+ ; X86-NEXT: fnstsw %ax
+ ; X86-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X86-NEXT: sahf
+-; X86-NEXT: jbe .LBB9_1
++; X86-NEXT: setbe %al
++; X86-NEXT: testb %al, %al
++; X86-NEXT: jne .LBB9_1
+ ; X86-NEXT: # %bb.2:
+ ; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-NEXT: movl (%eax), %eax
+@@ -383,7 +404,9 @@ define i32 @test_ult_q(i32 %a, i32 %b, x86_fp80 %f1, x86_fp80 %f2) #0 {
+ ; X86-NEXT: fnstsw %ax
+ ; X86-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X86-NEXT: sahf
+-; X86-NEXT: jb .LBB10_1
++; X86-NEXT: setb %al
++; X86-NEXT: testb %al, %al
++; X86-NEXT: jne .LBB10_1
+ ; X86-NEXT: # %bb.2:
+ ; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-NEXT: movl (%eax), %eax
+@@ -420,7 +443,9 @@ define i32 @test_ule_q(i32 %a, i32 %b, x86_fp80 %f1, x86_fp80 %f2) #0 {
+ ; X86-NEXT: fnstsw %ax
+ ; X86-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X86-NEXT: sahf
+-; X86-NEXT: jbe .LBB11_1
++; X86-NEXT: setbe %al
++; X86-NEXT: testb %al, %al
++; X86-NEXT: jne .LBB11_1
+ ; X86-NEXT: # %bb.2:
+ ; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-NEXT: movl (%eax), %eax
+@@ -457,13 +482,16 @@ define i32 @test_une_q(i32 %a, i32 %b, x86_fp80 %f1, x86_fp80 %f2) #0 {
+ ; X86-NEXT: fnstsw %ax
+ ; X86-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X86-NEXT: sahf
+-; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+-; X86-NEXT: jne .LBB12_3
+-; X86-NEXT: # %bb.1:
+-; X86-NEXT: jp .LBB12_3
++; X86-NEXT: setp %al
++; X86-NEXT: setne %cl
++; X86-NEXT: orb %al, %cl
++; X86-NEXT: jne .LBB12_1
+ ; X86-NEXT: # %bb.2:
+ ; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+-; X86-NEXT: .LBB12_3:
++; X86-NEXT: movl (%eax), %eax
++; X86-NEXT: retl
++; X86-NEXT: .LBB12_1:
++; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-NEXT: movl (%eax), %eax
+ ; X86-NEXT: retl
+ ;
+@@ -495,7 +523,9 @@ define i32 @test_uno_q(i32 %a, i32 %b, x86_fp80 %f1, x86_fp80 %f2) #0 {
+ ; X86-NEXT: fnstsw %ax
+ ; X86-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X86-NEXT: sahf
+-; X86-NEXT: jp .LBB13_1
++; X86-NEXT: setp %al
++; X86-NEXT: testb %al, %al
++; X86-NEXT: jne .LBB13_1
+ ; X86-NEXT: # %bb.2:
+ ; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-NEXT: movl (%eax), %eax
+@@ -532,13 +562,16 @@ define i32 @test_oeq_s(i32 %a, i32 %b, x86_fp80 %f1, x86_fp80 %f2) #0 {
+ ; X86-NEXT: fnstsw %ax
+ ; X86-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X86-NEXT: sahf
+-; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+-; X86-NEXT: jne .LBB14_3
+-; X86-NEXT: # %bb.1:
+-; X86-NEXT: jp .LBB14_3
++; X86-NEXT: setnp %al
++; X86-NEXT: sete %cl
++; X86-NEXT: testb %al, %cl
++; X86-NEXT: jne .LBB14_1
+ ; X86-NEXT: # %bb.2:
+ ; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+-; X86-NEXT: .LBB14_3:
++; X86-NEXT: movl (%eax), %eax
++; X86-NEXT: retl
++; X86-NEXT: .LBB14_1:
++; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-NEXT: movl (%eax), %eax
+ ; X86-NEXT: retl
+ ;
+@@ -570,7 +603,9 @@ define i32 @test_ogt_s(i32 %a, i32 %b, x86_fp80 %f1, x86_fp80 %f2) #0 {
+ ; X86-NEXT: fnstsw %ax
+ ; X86-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X86-NEXT: sahf
+-; X86-NEXT: ja .LBB15_1
++; X86-NEXT: seta %al
++; X86-NEXT: testb %al, %al
++; X86-NEXT: jne .LBB15_1
+ ; X86-NEXT: # %bb.2:
+ ; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-NEXT: movl (%eax), %eax
+@@ -607,7 +642,9 @@ define i32 @test_oge_s(i32 %a, i32 %b, x86_fp80 %f1, x86_fp80 %f2) #0 {
+ ; X86-NEXT: fnstsw %ax
+ ; X86-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X86-NEXT: sahf
+-; X86-NEXT: jae .LBB16_1
++; X86-NEXT: setae %al
++; X86-NEXT: testb %al, %al
++; X86-NEXT: jne .LBB16_1
+ ; X86-NEXT: # %bb.2:
+ ; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-NEXT: movl (%eax), %eax
+@@ -644,7 +681,9 @@ define i32 @test_olt_s(i32 %a, i32 %b, x86_fp80 %f1, x86_fp80 %f2) #0 {
+ ; X86-NEXT: fnstsw %ax
+ ; X86-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X86-NEXT: sahf
+-; X86-NEXT: ja .LBB17_1
++; X86-NEXT: seta %al
++; X86-NEXT: testb %al, %al
++; X86-NEXT: jne .LBB17_1
+ ; X86-NEXT: # %bb.2:
+ ; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-NEXT: movl (%eax), %eax
+@@ -681,7 +720,9 @@ define i32 @test_ole_s(i32 %a, i32 %b, x86_fp80 %f1, x86_fp80 %f2) #0 {
+ ; X86-NEXT: fnstsw %ax
+ ; X86-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X86-NEXT: sahf
+-; X86-NEXT: jae .LBB18_1
++; X86-NEXT: setae %al
++; X86-NEXT: testb %al, %al
++; X86-NEXT: jne .LBB18_1
+ ; X86-NEXT: # %bb.2:
+ ; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-NEXT: movl (%eax), %eax
+@@ -718,6 +759,8 @@ define i32 @test_one_s(i32 %a, i32 %b, x86_fp80 %f1, x86_fp80 %f2) #0 {
+ ; X86-NEXT: fnstsw %ax
+ ; X86-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X86-NEXT: sahf
++; X86-NEXT: setne %al
++; X86-NEXT: testb %al, %al
+ ; X86-NEXT: jne .LBB19_1
+ ; X86-NEXT: # %bb.2:
+ ; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+@@ -755,7 +798,9 @@ define i32 @test_ord_s(i32 %a, i32 %b, x86_fp80 %f1, x86_fp80 %f2) #0 {
+ ; X86-NEXT: fnstsw %ax
+ ; X86-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X86-NEXT: sahf
+-; X86-NEXT: jnp .LBB20_1
++; X86-NEXT: setnp %al
++; X86-NEXT: testb %al, %al
++; X86-NEXT: jne .LBB20_1
+ ; X86-NEXT: # %bb.2:
+ ; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-NEXT: movl (%eax), %eax
+@@ -792,7 +837,9 @@ define i32 @test_ueq_s(i32 %a, i32 %b, x86_fp80 %f1, x86_fp80 %f2) #0 {
+ ; X86-NEXT: fnstsw %ax
+ ; X86-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X86-NEXT: sahf
+-; X86-NEXT: je .LBB21_1
++; X86-NEXT: sete %al
++; X86-NEXT: testb %al, %al
++; X86-NEXT: jne .LBB21_1
+ ; X86-NEXT: # %bb.2:
+ ; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-NEXT: movl (%eax), %eax
+@@ -829,7 +876,9 @@ define i32 @test_ugt_s(i32 %a, i32 %b, x86_fp80 %f1, x86_fp80 %f2) #0 {
+ ; X86-NEXT: fnstsw %ax
+ ; X86-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X86-NEXT: sahf
+-; X86-NEXT: jb .LBB22_1
++; X86-NEXT: setb %al
++; X86-NEXT: testb %al, %al
++; X86-NEXT: jne .LBB22_1
+ ; X86-NEXT: # %bb.2:
+ ; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-NEXT: movl (%eax), %eax
+@@ -866,7 +915,9 @@ define i32 @test_uge_s(i32 %a, i32 %b, x86_fp80 %f1, x86_fp80 %f2) #0 {
+ ; X86-NEXT: fnstsw %ax
+ ; X86-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X86-NEXT: sahf
+-; X86-NEXT: jbe .LBB23_1
++; X86-NEXT: setbe %al
++; X86-NEXT: testb %al, %al
++; X86-NEXT: jne .LBB23_1
+ ; X86-NEXT: # %bb.2:
+ ; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-NEXT: movl (%eax), %eax
+@@ -903,7 +954,9 @@ define i32 @test_ult_s(i32 %a, i32 %b, x86_fp80 %f1, x86_fp80 %f2) #0 {
+ ; X86-NEXT: fnstsw %ax
+ ; X86-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X86-NEXT: sahf
+-; X86-NEXT: jb .LBB24_1
++; X86-NEXT: setb %al
++; X86-NEXT: testb %al, %al
++; X86-NEXT: jne .LBB24_1
+ ; X86-NEXT: # %bb.2:
+ ; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-NEXT: movl (%eax), %eax
+@@ -940,7 +993,9 @@ define i32 @test_ule_s(i32 %a, i32 %b, x86_fp80 %f1, x86_fp80 %f2) #0 {
+ ; X86-NEXT: fnstsw %ax
+ ; X86-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X86-NEXT: sahf
+-; X86-NEXT: jbe .LBB25_1
++; X86-NEXT: setbe %al
++; X86-NEXT: testb %al, %al
++; X86-NEXT: jne .LBB25_1
+ ; X86-NEXT: # %bb.2:
+ ; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-NEXT: movl (%eax), %eax
+@@ -977,13 +1032,16 @@ define i32 @test_une_s(i32 %a, i32 %b, x86_fp80 %f1, x86_fp80 %f2) #0 {
+ ; X86-NEXT: fnstsw %ax
+ ; X86-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X86-NEXT: sahf
+-; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+-; X86-NEXT: jne .LBB26_3
+-; X86-NEXT: # %bb.1:
+-; X86-NEXT: jp .LBB26_3
++; X86-NEXT: setp %al
++; X86-NEXT: setne %cl
++; X86-NEXT: orb %al, %cl
++; X86-NEXT: jne .LBB26_1
+ ; X86-NEXT: # %bb.2:
+ ; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+-; X86-NEXT: .LBB26_3:
++; X86-NEXT: movl (%eax), %eax
++; X86-NEXT: retl
++; X86-NEXT: .LBB26_1:
++; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-NEXT: movl (%eax), %eax
+ ; X86-NEXT: retl
+ ;
+@@ -1015,7 +1073,9 @@ define i32 @test_uno_s(i32 %a, i32 %b, x86_fp80 %f1, x86_fp80 %f2) #0 {
+ ; X86-NEXT: fnstsw %ax
+ ; X86-NEXT: # kill: def $ah killed $ah killed $ax
+ ; X86-NEXT: sahf
+-; X86-NEXT: jp .LBB27_1
++; X86-NEXT: setp %al
++; X86-NEXT: testb %al, %al
++; X86-NEXT: jne .LBB27_1
+ ; X86-NEXT: # %bb.2:
+ ; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-NEXT: movl (%eax), %eax
+diff --git a/llvm/test/CodeGen/X86/isel-select-cmov.ll b/llvm/test/CodeGen/X86/isel-select-cmov.ll
+index d013ad2c7fbff..6ced7f45b6233 100644
+--- a/llvm/test/CodeGen/X86/isel-select-cmov.ll
++++ b/llvm/test/CodeGen/X86/isel-select-cmov.ll
+@@ -47,7 +47,7 @@ define zeroext i8 @select_cmov_i8(i1 zeroext %cond, i8 zeroext %a, i8 zeroext %b
+ ;
+ ; SDAG-X86-LABEL: select_cmov_i8:
+ ; SDAG-X86: ## %bb.0:
+-; SDAG-X86-NEXT: cmpb $0, {{[0-9]+}}(%esp)
++; SDAG-X86-NEXT: testb $1, {{[0-9]+}}(%esp)
+ ; SDAG-X86-NEXT: jne LBB0_1
+ ; SDAG-X86-NEXT: ## %bb.2:
+ ; SDAG-X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+@@ -60,7 +60,7 @@ define zeroext i8 @select_cmov_i8(i1 zeroext %cond, i8 zeroext %a, i8 zeroext %b
+ ;
+ ; SDAG-X86-CMOV-LABEL: select_cmov_i8:
+ ; SDAG-X86-CMOV: ## %bb.0:
+-; SDAG-X86-CMOV-NEXT: cmpb $0, {{[0-9]+}}(%esp)
++; SDAG-X86-CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
+ ; SDAG-X86-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SDAG-X86-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; SDAG-X86-CMOV-NEXT: cmovnel %eax, %ecx
+@@ -155,7 +155,7 @@ define zeroext i16 @select_cmov_i16(i1 zeroext %cond, i16 zeroext %a, i16 zeroex
+ ;
+ ; SDAG-X86-LABEL: select_cmov_i16:
+ ; SDAG-X86: ## %bb.0:
+-; SDAG-X86-NEXT: cmpb $0, {{[0-9]+}}(%esp)
++; SDAG-X86-NEXT: testb $1, {{[0-9]+}}(%esp)
+ ; SDAG-X86-NEXT: jne LBB1_1
+ ; SDAG-X86-NEXT: ## %bb.2:
+ ; SDAG-X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+@@ -168,7 +168,7 @@ define zeroext i16 @select_cmov_i16(i1 zeroext %cond, i16 zeroext %a, i16 zeroex
+ ;
+ ; SDAG-X86-CMOV-LABEL: select_cmov_i16:
+ ; SDAG-X86-CMOV: ## %bb.0:
+-; SDAG-X86-CMOV-NEXT: cmpb $0, {{[0-9]+}}(%esp)
++; SDAG-X86-CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
+ ; SDAG-X86-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SDAG-X86-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; SDAG-X86-CMOV-NEXT: cmovnel %eax, %ecx
+@@ -360,7 +360,7 @@ define i32 @select_cmov_i32(i1 zeroext %cond, i32 %a, i32 %b) {
+ ;
+ ; SDAG-X86-LABEL: select_cmov_i32:
+ ; SDAG-X86: ## %bb.0:
+-; SDAG-X86-NEXT: cmpb $0, {{[0-9]+}}(%esp)
++; SDAG-X86-NEXT: testb $1, {{[0-9]+}}(%esp)
+ ; SDAG-X86-NEXT: jne LBB3_1
+ ; SDAG-X86-NEXT: ## %bb.2:
+ ; SDAG-X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+@@ -373,7 +373,7 @@ define i32 @select_cmov_i32(i1 zeroext %cond, i32 %a, i32 %b) {
+ ;
+ ; SDAG-X86-CMOV-LABEL: select_cmov_i32:
+ ; SDAG-X86-CMOV: ## %bb.0:
+-; SDAG-X86-CMOV-NEXT: cmpb $0, {{[0-9]+}}(%esp)
++; SDAG-X86-CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
+ ; SDAG-X86-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SDAG-X86-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; SDAG-X86-CMOV-NEXT: cmovnel %eax, %ecx
+@@ -549,7 +549,7 @@ define i64 @select_cmov_i64(i1 zeroext %cond, i64 %a, i64 %b) {
+ ;
+ ; SDAG-X86-LABEL: select_cmov_i64:
+ ; SDAG-X86: ## %bb.0:
+-; SDAG-X86-NEXT: cmpb $0, {{[0-9]+}}(%esp)
++; SDAG-X86-NEXT: testb $1, {{[0-9]+}}(%esp)
+ ; SDAG-X86-NEXT: jne LBB5_1
+ ; SDAG-X86-NEXT: ## %bb.2:
+ ; SDAG-X86-NEXT: leal {{[0-9]+}}(%esp), %ecx
+@@ -563,7 +563,7 @@ define i64 @select_cmov_i64(i1 zeroext %cond, i64 %a, i64 %b) {
+ ;
+ ; SDAG-X86-CMOV-LABEL: select_cmov_i64:
+ ; SDAG-X86-CMOV: ## %bb.0:
+-; SDAG-X86-CMOV-NEXT: cmpb $0, {{[0-9]+}}(%esp)
++; SDAG-X86-CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
+ ; SDAG-X86-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; SDAG-X86-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
+ ; SDAG-X86-CMOV-NEXT: cmovnel %eax, %ecx
+diff --git a/llvm/test/CodeGen/X86/select-constant-xor.ll b/llvm/test/CodeGen/X86/select-constant-xor.ll
+index efc367d204cf1..5d80e04fef38c 100644
+--- a/llvm/test/CodeGen/X86/select-constant-xor.ll
++++ b/llvm/test/CodeGen/X86/select-constant-xor.ll
+@@ -172,8 +172,10 @@ define i32 @selecti8i32(i8 %a) {
+ define i32 @icmpasreq(i32 %input, i32 %a, i32 %b) {
+ ; X86-LABEL: icmpasreq:
+ ; X86: # %bb.0:
+-; X86-NEXT: cmpl $0, {{[0-9]+}}(%esp)
+-; X86-NEXT: js .LBB8_1
++; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
++; X86-NEXT: sarl $31, %eax
++; X86-NEXT: cmpl $-1, %eax
++; X86-NEXT: je .LBB8_1
+ ; X86-NEXT: # %bb.2:
+ ; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-NEXT: movl (%eax), %eax
+@@ -198,8 +200,10 @@ define i32 @icmpasreq(i32 %input, i32 %a, i32 %b) {
+ define i32 @icmpasrne(i32 %input, i32 %a, i32 %b) {
+ ; X86-LABEL: icmpasrne:
+ ; X86: # %bb.0:
+-; X86-NEXT: cmpl $0, {{[0-9]+}}(%esp)
+-; X86-NEXT: jns .LBB9_1
++; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
++; X86-NEXT: sarl $31, %eax
++; X86-NEXT: cmpl $-1, %eax
++; X86-NEXT: jne .LBB9_1
+ ; X86-NEXT: # %bb.2:
+ ; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+ ; X86-NEXT: movl (%eax), %eax
+diff --git a/llvm/test/CodeGen/X86/select-mmx.ll b/llvm/test/CodeGen/X86/select-mmx.ll
+index 8a4308a5af64b..cc6603382082c 100644
+--- a/llvm/test/CodeGen/X86/select-mmx.ll
++++ b/llvm/test/CodeGen/X86/select-mmx.ll
+@@ -85,8 +85,8 @@ define i64 @test49(i64 %arg, i64 %x, i64 %y) {
+ ; X86-NEXT: .cfi_def_cfa_register %ebp
+ ; X86-NEXT: andl $-8, %esp
+ ; X86-NEXT: subl $8, %esp
+-; X86-NEXT: movl 8(%ebp), %eax
+-; X86-NEXT: orl 12(%ebp), %eax
++; X86-NEXT: movl 12(%ebp), %eax
++; X86-NEXT: orl 8(%ebp), %eax
+ ; X86-NEXT: je .LBB1_1
+ ; X86-NEXT: # %bb.2:
<Skipped 43 lines>
================================================================
---- gitweb:
http://git.pld-linux.org/gitweb.cgi/packages/llvm.git/commitdiff/f6f72ea7517f69bacf7ec0d0387306067d0028d1
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