linux-libc-headers/trunk/include: asm-alpha/agp.h
asm-alpha/cacheflush.h asm-alpha/errno.h asm-alpha...
mmazur
cvs at pld-linux.org
Tue Jul 5 23:00:39 CEST 2005
Author: mmazur
Date: Tue Jul 5 22:58:33 2005
New Revision: 6206
Added:
linux-libc-headers/trunk/include/asm-arm/arch-imx/imxfb.h
linux-libc-headers/trunk/include/asm-arm/arch-omap/aic23.h
linux-libc-headers/trunk/include/asm-arm/arch-omap/board-netstar.h
linux-libc-headers/trunk/include/asm-arm/arch-omap/board-voiceblue.h
linux-libc-headers/trunk/include/asm-arm/arch-pxa/poodle.h
linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/otom-map.h
linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-adc.h
linux-libc-headers/trunk/include/asm-arm/mach/sharpsl_param.h
linux-libc-headers/trunk/include/asm-ia64/sn/pcibus_provider_defs.h
linux-libc-headers/trunk/include/asm-ia64/sn/pcidev.h
linux-libc-headers/trunk/include/asm-ia64/sn/tioca.h
linux-libc-headers/trunk/include/asm-ia64/sn/tioca_provider.h
linux-libc-headers/trunk/include/asm-ia64/sn/xp.h
linux-libc-headers/trunk/include/asm-mips/vr41xx/pci.h
linux-libc-headers/trunk/include/asm-mips/vr41xx/siu.h
linux-libc-headers/trunk/include/asm-ppc/suspend.h
linux-libc-headers/trunk/include/asm-ppc64/agp.h
linux-libc-headers/trunk/include/asm-ppc64/imalloc.h
linux-libc-headers/trunk/include/asm-ppc64/pSeries_reconfig.h
linux-libc-headers/trunk/include/asm-ppc64/pmc.h
linux-libc-headers/trunk/include/asm-ppc64/smu.h
linux-libc-headers/trunk/include/asm-sh/cpu-sh3/timer.h
linux-libc-headers/trunk/include/asm-sh/cpu-sh4/timer.h
linux-libc-headers/trunk/include/asm-sh/sh03/
linux-libc-headers/trunk/include/asm-sh/sh03/ide.h
linux-libc-headers/trunk/include/asm-sh/sh03/io.h
linux-libc-headers/trunk/include/asm-sh/sh03/sh03.h
linux-libc-headers/trunk/include/asm-sparc64/rwsem-const.h
linux-libc-headers/trunk/include/asm-um/elf-i386.h
linux-libc-headers/trunk/include/asm-um/elf-ppc.h
linux-libc-headers/trunk/include/asm-um/elf-x86_64.h
linux-libc-headers/trunk/include/linux/ip_mp_alg.h
linux-libc-headers/trunk/include/linux/patchkey.h
linux-libc-headers/trunk/include/linux/superhyway.h
linux-libc-headers/trunk/include/linux/tc_act/tc_defact.h
linux-libc-headers/trunk/include/linux/tc_ematch/
linux-libc-headers/trunk/include/linux/tc_ematch/tc_em_cmp.h
linux-libc-headers/trunk/include/linux/tc_ematch/tc_em_meta.h
linux-libc-headers/trunk/include/linux/tc_ematch/tc_em_nbyte.h
linux-libc-headers/trunk/include/linux/usb_cdc.h
linux-libc-headers/trunk/include/sound/ak4114.h
Modified:
linux-libc-headers/trunk/include/asm-alpha/agp.h
linux-libc-headers/trunk/include/asm-alpha/cacheflush.h
linux-libc-headers/trunk/include/asm-alpha/errno.h
linux-libc-headers/trunk/include/asm-alpha/siginfo.h
linux-libc-headers/trunk/include/asm-alpha/spinlock.h
linux-libc-headers/trunk/include/asm-alpha/system.h
linux-libc-headers/trunk/include/asm-alpha/unistd.h
linux-libc-headers/trunk/include/asm-arm/arch-cl7500/hardware.h
linux-libc-headers/trunk/include/asm-arm/arch-cl7500/vmalloc.h
linux-libc-headers/trunk/include/asm-arm/arch-clps711x/vmalloc.h
linux-libc-headers/trunk/include/asm-arm/arch-ebsa110/vmalloc.h
linux-libc-headers/trunk/include/asm-arm/arch-ebsa285/vmalloc.h
linux-libc-headers/trunk/include/asm-arm/arch-epxa10db/vmalloc.h
linux-libc-headers/trunk/include/asm-arm/arch-h720x/hardware.h
linux-libc-headers/trunk/include/asm-arm/arch-h720x/vmalloc.h
linux-libc-headers/trunk/include/asm-arm/arch-imx/hardware.h
linux-libc-headers/trunk/include/asm-arm/arch-imx/imx-regs.h
linux-libc-headers/trunk/include/asm-arm/arch-imx/vmalloc.h
linux-libc-headers/trunk/include/asm-arm/arch-integrator/lm.h
linux-libc-headers/trunk/include/asm-arm/arch-integrator/platform.h
linux-libc-headers/trunk/include/asm-arm/arch-integrator/vmalloc.h
linux-libc-headers/trunk/include/asm-arm/arch-iop3xx/vmalloc.h
linux-libc-headers/trunk/include/asm-arm/arch-ixp2000/io.h
linux-libc-headers/trunk/include/asm-arm/arch-ixp2000/irqs.h
linux-libc-headers/trunk/include/asm-arm/arch-ixp2000/ixdp2x00.h
linux-libc-headers/trunk/include/asm-arm/arch-ixp2000/ixdp2x01.h
linux-libc-headers/trunk/include/asm-arm/arch-ixp2000/ixp2000-regs.h
linux-libc-headers/trunk/include/asm-arm/arch-ixp2000/platform.h
linux-libc-headers/trunk/include/asm-arm/arch-ixp2000/system.h
linux-libc-headers/trunk/include/asm-arm/arch-ixp2000/vmalloc.h
linux-libc-headers/trunk/include/asm-arm/arch-ixp4xx/io.h
linux-libc-headers/trunk/include/asm-arm/arch-ixp4xx/platform.h
linux-libc-headers/trunk/include/asm-arm/arch-ixp4xx/uncompress.h
linux-libc-headers/trunk/include/asm-arm/arch-ixp4xx/vmalloc.h
linux-libc-headers/trunk/include/asm-arm/arch-l7200/vmalloc.h
linux-libc-headers/trunk/include/asm-arm/arch-lh7a40x/vmalloc.h
linux-libc-headers/trunk/include/asm-arm/arch-omap/board-h2.h
linux-libc-headers/trunk/include/asm-arm/arch-omap/board-h3.h
linux-libc-headers/trunk/include/asm-arm/arch-omap/board-h4.h
linux-libc-headers/trunk/include/asm-arm/arch-omap/board-innovator.h
linux-libc-headers/trunk/include/asm-arm/arch-omap/board-osk.h
linux-libc-headers/trunk/include/asm-arm/arch-omap/fpga.h
linux-libc-headers/trunk/include/asm-arm/arch-omap/hardware.h
linux-libc-headers/trunk/include/asm-arm/arch-omap/irqs.h
linux-libc-headers/trunk/include/asm-arm/arch-omap/mcbsp.h
linux-libc-headers/trunk/include/asm-arm/arch-omap/memory.h
linux-libc-headers/trunk/include/asm-arm/arch-omap/mux.h
linux-libc-headers/trunk/include/asm-arm/arch-omap/vmalloc.h
linux-libc-headers/trunk/include/asm-arm/arch-pxa/corgi.h
linux-libc-headers/trunk/include/asm-arm/arch-pxa/idp.h
linux-libc-headers/trunk/include/asm-arm/arch-pxa/irqs.h
linux-libc-headers/trunk/include/asm-arm/arch-pxa/pxa-regs.h
linux-libc-headers/trunk/include/asm-arm/arch-pxa/vmalloc.h
linux-libc-headers/trunk/include/asm-arm/arch-rpc/hardware.h
linux-libc-headers/trunk/include/asm-arm/arch-rpc/io.h
linux-libc-headers/trunk/include/asm-arm/arch-rpc/vmalloc.h
linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/hardware.h
linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/io.h
linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/irqs.h
linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/map.h
linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/memory.h
linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-clock.h
linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-gpio.h
linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-iis.h
linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-irq.h
linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-lcd.h
linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-mem.h
linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-nand.h
linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-rtc.h
linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-serial.h
linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-spi.h
linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-timer.h
linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-udc.h
linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-watchdog.h
linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/system.h
linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/uncompress.h
linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/vmalloc.h
linux-libc-headers/trunk/include/asm-arm/arch-sa1100/vmalloc.h
linux-libc-headers/trunk/include/asm-arm/arch-shark/vmalloc.h
linux-libc-headers/trunk/include/asm-arm/arch-versatile/platform.h
linux-libc-headers/trunk/include/asm-arm/arch-versatile/vmalloc.h
linux-libc-headers/trunk/include/asm-arm/cacheflush.h
linux-libc-headers/trunk/include/asm-arm/ecard.h
linux-libc-headers/trunk/include/asm-arm/elf.h
linux-libc-headers/trunk/include/asm-arm/hardware/amba.h
linux-libc-headers/trunk/include/asm-arm/hardware/sa1111.h
linux-libc-headers/trunk/include/asm-arm/mach/arch.h
linux-libc-headers/trunk/include/asm-arm/mach/map.h
linux-libc-headers/trunk/include/asm-arm/ptrace.h
linux-libc-headers/trunk/include/asm-arm/unistd.h
linux-libc-headers/trunk/include/asm-arm26/cacheflush.h
linux-libc-headers/trunk/include/asm-arm26/elf.h
linux-libc-headers/trunk/include/asm-arm26/unistd.h
linux-libc-headers/trunk/include/asm-cris/arch-v10/sv_addr_ag.h
linux-libc-headers/trunk/include/asm-cris/cacheflush.h
linux-libc-headers/trunk/include/asm-cris/io.h
linux-libc-headers/trunk/include/asm-cris/pgalloc.h
linux-libc-headers/trunk/include/asm-cris/system.h
linux-libc-headers/trunk/include/asm-cris/unistd.h
linux-libc-headers/trunk/include/asm-frv/cacheflush.h
linux-libc-headers/trunk/include/asm-frv/system.h
linux-libc-headers/trunk/include/asm-frv/tlbflush.h
linux-libc-headers/trunk/include/asm-frv/unistd.h
linux-libc-headers/trunk/include/asm-h8300/cacheflush.h
linux-libc-headers/trunk/include/asm-h8300/mman.h
linux-libc-headers/trunk/include/asm-h8300/system.h
linux-libc-headers/trunk/include/asm-h8300/unistd.h
linux-libc-headers/trunk/include/asm-i386/agp.h
linux-libc-headers/trunk/include/asm-i386/apic.h
linux-libc-headers/trunk/include/asm-i386/apicdef.h
linux-libc-headers/trunk/include/asm-i386/cacheflush.h
linux-libc-headers/trunk/include/asm-i386/checksum.h
linux-libc-headers/trunk/include/asm-i386/cpu.h
linux-libc-headers/trunk/include/asm-i386/cpufeature.h
linux-libc-headers/trunk/include/asm-i386/desc.h
linux-libc-headers/trunk/include/asm-i386/e820.h
linux-libc-headers/trunk/include/asm-i386/floppy.h
linux-libc-headers/trunk/include/asm-i386/hardirq.h
linux-libc-headers/trunk/include/asm-i386/linkage.h
linux-libc-headers/trunk/include/asm-i386/mach-default/mach_traps.h
linux-libc-headers/trunk/include/asm-i386/mach-numaq/mach_ipi.h
linux-libc-headers/trunk/include/asm-i386/module.h
linux-libc-headers/trunk/include/asm-i386/mpspec.h
linux-libc-headers/trunk/include/asm-i386/msr.h
linux-libc-headers/trunk/include/asm-i386/pgalloc.h
linux-libc-headers/trunk/include/asm-i386/processor.h
linux-libc-headers/trunk/include/asm-i386/segment.h
linux-libc-headers/trunk/include/asm-i386/suspend.h
linux-libc-headers/trunk/include/asm-i386/system.h
linux-libc-headers/trunk/include/asm-i386/timer.h
linux-libc-headers/trunk/include/asm-i386/unaligned.h
linux-libc-headers/trunk/include/asm-i386/unistd.h
linux-libc-headers/trunk/include/asm-ia64/agp.h
linux-libc-headers/trunk/include/asm-ia64/cacheflush.h
linux-libc-headers/trunk/include/asm-ia64/gcc_intrin.h
linux-libc-headers/trunk/include/asm-ia64/hw_irq.h
linux-libc-headers/trunk/include/asm-ia64/pal.h
linux-libc-headers/trunk/include/asm-ia64/pgalloc.h
linux-libc-headers/trunk/include/asm-ia64/processor.h
linux-libc-headers/trunk/include/asm-ia64/sal.h
linux-libc-headers/trunk/include/asm-ia64/sn/addrs.h
linux-libc-headers/trunk/include/asm-ia64/sn/arch.h
linux-libc-headers/trunk/include/asm-ia64/sn/bte.h
linux-libc-headers/trunk/include/asm-ia64/sn/geo.h
linux-libc-headers/trunk/include/asm-ia64/sn/nodepda.h
linux-libc-headers/trunk/include/asm-ia64/sn/pda.h
linux-libc-headers/trunk/include/asm-ia64/sn/shubio.h
linux-libc-headers/trunk/include/asm-ia64/sn/sn_cpuid.h
linux-libc-headers/trunk/include/asm-ia64/sn/sn_sal.h
linux-libc-headers/trunk/include/asm-ia64/sn/types.h
linux-libc-headers/trunk/include/asm-m32r/cacheflush.h
linux-libc-headers/trunk/include/asm-m32r/mmu.h
linux-libc-headers/trunk/include/asm-m32r/pgalloc.h
linux-libc-headers/trunk/include/asm-m32r/serial.h
linux-libc-headers/trunk/include/asm-m32r/spinlock.h
linux-libc-headers/trunk/include/asm-m32r/system.h
linux-libc-headers/trunk/include/asm-m32r/unistd.h
linux-libc-headers/trunk/include/asm-m68k/cacheflush.h
linux-libc-headers/trunk/include/asm-m68k/checksum.h
linux-libc-headers/trunk/include/asm-m68k/io.h
linux-libc-headers/trunk/include/asm-m68k/processor.h
linux-libc-headers/trunk/include/asm-m68k/unistd.h
linux-libc-headers/trunk/include/asm-m68knommu/MC68328.h
linux-libc-headers/trunk/include/asm-m68knommu/MC68EZ328.h
linux-libc-headers/trunk/include/asm-m68knommu/MC68VZ328.h
linux-libc-headers/trunk/include/asm-m68knommu/cacheflush.h
linux-libc-headers/trunk/include/asm-m68knommu/entry.h
linux-libc-headers/trunk/include/asm-m68knommu/mmu.h
linux-libc-headers/trunk/include/asm-m68knommu/system.h
linux-libc-headers/trunk/include/asm-m68knommu/unistd.h
linux-libc-headers/trunk/include/asm-mips/cacheflush.h
linux-libc-headers/trunk/include/asm-mips/ddb5xxx/ddb5xxx.h
linux-libc-headers/trunk/include/asm-mips/errno.h
linux-libc-headers/trunk/include/asm-mips/io.h
linux-libc-headers/trunk/include/asm-mips/pgtable-32.h
linux-libc-headers/trunk/include/asm-mips/pgtable-64.h
linux-libc-headers/trunk/include/asm-mips/serial.h
linux-libc-headers/trunk/include/asm-mips/siginfo.h
linux-libc-headers/trunk/include/asm-mips/system.h
linux-libc-headers/trunk/include/asm-mips/unaligned.h
linux-libc-headers/trunk/include/asm-mips/unistd.h
linux-libc-headers/trunk/include/asm-mips/vr41xx/vr41xx.h
linux-libc-headers/trunk/include/asm-parisc/assembly.h
linux-libc-headers/trunk/include/asm-parisc/cacheflush.h
linux-libc-headers/trunk/include/asm-parisc/dma.h
linux-libc-headers/trunk/include/asm-parisc/eisa_eeprom.h
linux-libc-headers/trunk/include/asm-parisc/errno.h
linux-libc-headers/trunk/include/asm-parisc/floppy.h
linux-libc-headers/trunk/include/asm-parisc/hardirq.h
linux-libc-headers/trunk/include/asm-parisc/hardware.h
linux-libc-headers/trunk/include/asm-parisc/io.h
linux-libc-headers/trunk/include/asm-parisc/irq.h
linux-libc-headers/trunk/include/asm-parisc/led.h
linux-libc-headers/trunk/include/asm-parisc/module.h
linux-libc-headers/trunk/include/asm-parisc/parisc-device.h
linux-libc-headers/trunk/include/asm-parisc/pdc_chassis.h
linux-libc-headers/trunk/include/asm-parisc/pdcpat.h
linux-libc-headers/trunk/include/asm-parisc/pgalloc.h
linux-libc-headers/trunk/include/asm-parisc/spinlock.h
linux-libc-headers/trunk/include/asm-parisc/system.h
linux-libc-headers/trunk/include/asm-parisc/unistd.h
linux-libc-headers/trunk/include/asm-parisc/unwind.h
linux-libc-headers/trunk/include/asm-ppc/agp.h
linux-libc-headers/trunk/include/asm-ppc/keylargo.h
linux-libc-headers/trunk/include/asm-ppc/macio.h
linux-libc-headers/trunk/include/asm-ppc/of_device.h
linux-libc-headers/trunk/include/asm-ppc/open_pic.h
linux-libc-headers/trunk/include/asm-ppc/ppcboot.h
linux-libc-headers/trunk/include/asm-ppc/todc.h
linux-libc-headers/trunk/include/asm-ppc/unistd.h
linux-libc-headers/trunk/include/asm-ppc64/a.out.h
linux-libc-headers/trunk/include/asm-ppc64/cacheflush.h
linux-libc-headers/trunk/include/asm-ppc64/eeh.h
linux-libc-headers/trunk/include/asm-ppc64/elf.h
linux-libc-headers/trunk/include/asm-ppc64/hvcall.h
linux-libc-headers/trunk/include/asm-ppc64/iSeries/HvCallPci.h
linux-libc-headers/trunk/include/asm-ppc64/iSeries/mf.h
linux-libc-headers/trunk/include/asm-ppc64/lmb.h
linux-libc-headers/trunk/include/asm-ppc64/mmu.h
linux-libc-headers/trunk/include/asm-ppc64/mmu_context.h
linux-libc-headers/trunk/include/asm-ppc64/paca.h
linux-libc-headers/trunk/include/asm-ppc64/pgalloc.h
linux-libc-headers/trunk/include/asm-ppc64/processor.h
linux-libc-headers/trunk/include/asm-ppc64/rtas.h
linux-libc-headers/trunk/include/asm-ppc64/systemcfg.h
linux-libc-headers/trunk/include/asm-ppc64/unistd.h
linux-libc-headers/trunk/include/asm-ppc64/xics.h
linux-libc-headers/trunk/include/asm-s390/cacheflush.h
linux-libc-headers/trunk/include/asm-s390/ccwdev.h
linux-libc-headers/trunk/include/asm-s390/pgalloc.h
linux-libc-headers/trunk/include/asm-s390/posix_types.h
linux-libc-headers/trunk/include/asm-s390/ptrace.h
linux-libc-headers/trunk/include/asm-s390/unistd.h
linux-libc-headers/trunk/include/asm-s390/user.h
linux-libc-headers/trunk/include/asm-sh/cacheflush.h
linux-libc-headers/trunk/include/asm-sh/checksum.h
linux-libc-headers/trunk/include/asm-sh/cpu-sh2/cacheflush.h
linux-libc-headers/trunk/include/asm-sh/cpu-sh3/cacheflush.h
linux-libc-headers/trunk/include/asm-sh/cpu-sh4/cacheflush.h
linux-libc-headers/trunk/include/asm-sh/floppy.h
linux-libc-headers/trunk/include/asm-sh/hardirq.h
linux-libc-headers/trunk/include/asm-sh/irq.h
linux-libc-headers/trunk/include/asm-sh/pgalloc.h
linux-libc-headers/trunk/include/asm-sh/pgtable-2level.h
linux-libc-headers/trunk/include/asm-sh/system.h
linux-libc-headers/trunk/include/asm-sh/unistd.h
linux-libc-headers/trunk/include/asm-sh64/cacheflush.h
linux-libc-headers/trunk/include/asm-sh64/checksum.h
linux-libc-headers/trunk/include/asm-sh64/elf.h
linux-libc-headers/trunk/include/asm-sh64/hardirq.h
linux-libc-headers/trunk/include/asm-sh64/hardware.h
linux-libc-headers/trunk/include/asm-sh64/io.h
linux-libc-headers/trunk/include/asm-sh64/ioctls.h
linux-libc-headers/trunk/include/asm-sh64/irq.h
linux-libc-headers/trunk/include/asm-sh64/module.h
linux-libc-headers/trunk/include/asm-sh64/pgalloc.h
linux-libc-headers/trunk/include/asm-sh64/system.h
linux-libc-headers/trunk/include/asm-sh64/unistd.h
linux-libc-headers/trunk/include/asm-sparc/cacheflush.h
linux-libc-headers/trunk/include/asm-sparc/errno.h
linux-libc-headers/trunk/include/asm-sparc/floppy.h
linux-libc-headers/trunk/include/asm-sparc/io.h
linux-libc-headers/trunk/include/asm-sparc/mostek.h
linux-libc-headers/trunk/include/asm-sparc/mxcc.h
linux-libc-headers/trunk/include/asm-sparc/system.h
linux-libc-headers/trunk/include/asm-sparc/unistd.h
linux-libc-headers/trunk/include/asm-sparc64/agp.h
linux-libc-headers/trunk/include/asm-sparc64/cacheflush.h
linux-libc-headers/trunk/include/asm-sparc64/checksum.h
linux-libc-headers/trunk/include/asm-sparc64/compat.h
linux-libc-headers/trunk/include/asm-sparc64/cpudata.h
linux-libc-headers/trunk/include/asm-sparc64/errno.h
linux-libc-headers/trunk/include/asm-sparc64/iommu.h
linux-libc-headers/trunk/include/asm-sparc64/mmu.h
linux-libc-headers/trunk/include/asm-sparc64/mmu_context.h
linux-libc-headers/trunk/include/asm-sparc64/mostek.h
linux-libc-headers/trunk/include/asm-sparc64/parport.h
linux-libc-headers/trunk/include/asm-sparc64/pbm.h
linux-libc-headers/trunk/include/asm-sparc64/pgalloc.h
linux-libc-headers/trunk/include/asm-sparc64/spinlock.h
linux-libc-headers/trunk/include/asm-sparc64/spitfire.h
linux-libc-headers/trunk/include/asm-sparc64/stat.h
linux-libc-headers/trunk/include/asm-sparc64/system.h
linux-libc-headers/trunk/include/asm-sparc64/unistd.h
linux-libc-headers/trunk/include/asm-um/archparam-i386.h
linux-libc-headers/trunk/include/asm-um/archparam-ppc.h
linux-libc-headers/trunk/include/asm-um/fixmap.h
linux-libc-headers/trunk/include/asm-um/io.h
linux-libc-headers/trunk/include/asm-um/linkage.h
linux-libc-headers/trunk/include/asm-um/processor-generic.h
linux-libc-headers/trunk/include/asm-um/processor-i386.h
linux-libc-headers/trunk/include/asm-um/ptrace-i386.h
linux-libc-headers/trunk/include/asm-v850/cacheflush.h
linux-libc-headers/trunk/include/asm-v850/io.h
linux-libc-headers/trunk/include/asm-v850/me2.h
linux-libc-headers/trunk/include/asm-v850/system.h
linux-libc-headers/trunk/include/asm-v850/unistd.h
linux-libc-headers/trunk/include/asm-x86_64/agp.h
linux-libc-headers/trunk/include/asm-x86_64/apic.h
linux-libc-headers/trunk/include/asm-x86_64/apicdef.h
linux-libc-headers/trunk/include/asm-x86_64/bootsetup.h
linux-libc-headers/trunk/include/asm-x86_64/cacheflush.h
linux-libc-headers/trunk/include/asm-x86_64/cpufeature.h
linux-libc-headers/trunk/include/asm-x86_64/e820.h
linux-libc-headers/trunk/include/asm-x86_64/floppy.h
linux-libc-headers/trunk/include/asm-x86_64/io_apic.h
linux-libc-headers/trunk/include/asm-x86_64/kdebug.h
linux-libc-headers/trunk/include/asm-x86_64/mmu_context.h
linux-libc-headers/trunk/include/asm-x86_64/mpspec.h
linux-libc-headers/trunk/include/asm-x86_64/msr.h
linux-libc-headers/trunk/include/asm-x86_64/nmi.h
linux-libc-headers/trunk/include/asm-x86_64/pgalloc.h
linux-libc-headers/trunk/include/asm-x86_64/processor.h
linux-libc-headers/trunk/include/asm-x86_64/proto.h
linux-libc-headers/trunk/include/asm-x86_64/segment.h
linux-libc-headers/trunk/include/asm-x86_64/suspend.h
linux-libc-headers/trunk/include/asm-x86_64/system.h
linux-libc-headers/trunk/include/asm-x86_64/unaligned.h
linux-libc-headers/trunk/include/asm-x86_64/unistd.h
linux-libc-headers/trunk/include/linux/acpi.h
linux-libc-headers/trunk/include/linux/aio_abi.h
linux-libc-headers/trunk/include/linux/atalk.h
linux-libc-headers/trunk/include/linux/atmdev.h
linux-libc-headers/trunk/include/linux/audit.h
linux-libc-headers/trunk/include/linux/auto_fs4.h
linux-libc-headers/trunk/include/linux/awe_voice.h
linux-libc-headers/trunk/include/linux/backing-dev.h
linux-libc-headers/trunk/include/linux/bitops.h
linux-libc-headers/trunk/include/linux/compat.h
linux-libc-headers/trunk/include/linux/compat_ioctl.h
linux-libc-headers/trunk/include/linux/console.h
linux-libc-headers/trunk/include/linux/console_struct.h
linux-libc-headers/trunk/include/linux/consolemap.h
linux-libc-headers/trunk/include/linux/cpufreq.h
linux-libc-headers/trunk/include/linux/cycx_drv.h
linux-libc-headers/trunk/include/linux/device.h
linux-libc-headers/trunk/include/linux/dqblk_xfs.h
linux-libc-headers/trunk/include/linux/dvb/audio.h
linux-libc-headers/trunk/include/linux/dvb/ca.h
linux-libc-headers/trunk/include/linux/dvb/dmx.h
linux-libc-headers/trunk/include/linux/dvb/frontend.h
linux-libc-headers/trunk/include/linux/dvb/net.h
linux-libc-headers/trunk/include/linux/dvb/osd.h
linux-libc-headers/trunk/include/linux/dvb/version.h
linux-libc-headers/trunk/include/linux/dvb/video.h
linux-libc-headers/trunk/include/linux/efi.h
linux-libc-headers/trunk/include/linux/err.h
linux-libc-headers/trunk/include/linux/errno.h
linux-libc-headers/trunk/include/linux/ethtool.h
linux-libc-headers/trunk/include/linux/ext3_fs.h
linux-libc-headers/trunk/include/linux/fb.h
linux-libc-headers/trunk/include/linux/fs.h
linux-libc-headers/trunk/include/linux/gameport.h
linux-libc-headers/trunk/include/linux/generic_serial.h
linux-libc-headers/trunk/include/linux/gfp.h
linux-libc-headers/trunk/include/linux/hiddev.h
linux-libc-headers/trunk/include/linux/i2c-id.h
linux-libc-headers/trunk/include/linux/i2c.h
linux-libc-headers/trunk/include/linux/i2o-dev.h
linux-libc-headers/trunk/include/linux/ibmtr.h
linux-libc-headers/trunk/include/linux/if.h
linux-libc-headers/trunk/include/linux/if_arp.h
linux-libc-headers/trunk/include/linux/if_tr.h
linux-libc-headers/trunk/include/linux/init_task.h
linux-libc-headers/trunk/include/linux/input.h
linux-libc-headers/trunk/include/linux/ioport.h
linux-libc-headers/trunk/include/linux/ipmi_smi.h
linux-libc-headers/trunk/include/linux/ixjuser.h
linux-libc-headers/trunk/include/linux/jhash.h
linux-libc-headers/trunk/include/linux/journal-head.h
linux-libc-headers/trunk/include/linux/joystick.h
linux-libc-headers/trunk/include/linux/kernel.h
linux-libc-headers/trunk/include/linux/keyboard.h
linux-libc-headers/trunk/include/linux/kprobes.h
linux-libc-headers/trunk/include/linux/libata.h
linux-libc-headers/trunk/include/linux/loop.h
linux-libc-headers/trunk/include/linux/major.h
linux-libc-headers/trunk/include/linux/mempool.h
linux-libc-headers/trunk/include/linux/mii.h
linux-libc-headers/trunk/include/linux/mod_devicetable.h
linux-libc-headers/trunk/include/linux/module.h
linux-libc-headers/trunk/include/linux/moduleparam.h
linux-libc-headers/trunk/include/linux/msdos_fs.h
linux-libc-headers/trunk/include/linux/mtio.h
linux-libc-headers/trunk/include/linux/namei.h
linux-libc-headers/trunk/include/linux/net.h
linux-libc-headers/trunk/include/linux/netdevice.h
linux-libc-headers/trunk/include/linux/netfilter.h
linux-libc-headers/trunk/include/linux/netfilter_arp/arp_tables.h
linux-libc-headers/trunk/include/linux/netfilter_ipv4.h
linux-libc-headers/trunk/include/linux/netfilter_ipv4/ip_conntrack_tcp.h
linux-libc-headers/trunk/include/linux/netfilter_ipv4/ip_tables.h
linux-libc-headers/trunk/include/linux/netfilter_ipv6/ip6_tables.h
linux-libc-headers/trunk/include/linux/nfs_fs_sb.h
linux-libc-headers/trunk/include/linux/nfs_xdr.h
linux-libc-headers/trunk/include/linux/nfsd/state.h
linux-libc-headers/trunk/include/linux/nfsd/xdr4.h
linux-libc-headers/trunk/include/linux/pci_ids.h
linux-libc-headers/trunk/include/linux/pcieport_if.h
linux-libc-headers/trunk/include/linux/personality.h
linux-libc-headers/trunk/include/linux/pkt_cls.h
linux-libc-headers/trunk/include/linux/pkt_sched.h
linux-libc-headers/trunk/include/linux/pmu.h
linux-libc-headers/trunk/include/linux/posix-timers.h
linux-libc-headers/trunk/include/linux/posix_acl.h
linux-libc-headers/trunk/include/linux/reiserfs_acl.h
linux-libc-headers/trunk/include/linux/reiserfs_fs.h
linux-libc-headers/trunk/include/linux/reiserfs_xattr.h
linux-libc-headers/trunk/include/linux/rtnetlink.h
linux-libc-headers/trunk/include/linux/scx200.h
linux-libc-headers/trunk/include/linux/scx200_gpio.h
linux-libc-headers/trunk/include/linux/sdladrv.h
linux-libc-headers/trunk/include/linux/security.h
linux-libc-headers/trunk/include/linux/serial_core.h
linux-libc-headers/trunk/include/linux/serio.h
linux-libc-headers/trunk/include/linux/skbuff.h
linux-libc-headers/trunk/include/linux/sockios.h
linux-libc-headers/trunk/include/linux/soundcard.h
linux-libc-headers/trunk/include/linux/stallion.h
linux-libc-headers/trunk/include/linux/sunrpc/cache.h
linux-libc-headers/trunk/include/linux/sunrpc/clnt.h
linux-libc-headers/trunk/include/linux/sunrpc/sched.h
linux-libc-headers/trunk/include/linux/sunrpc/svc.h
linux-libc-headers/trunk/include/linux/sunrpc/xprt.h
linux-libc-headers/trunk/include/linux/suspend.h
linux-libc-headers/trunk/include/linux/sysctl.h
linux-libc-headers/trunk/include/linux/sysdev.h
linux-libc-headers/trunk/include/linux/sysfs.h
linux-libc-headers/trunk/include/linux/sysrq.h
linux-libc-headers/trunk/include/linux/threads.h
linux-libc-headers/trunk/include/linux/tiocl.h
linux-libc-headers/trunk/include/linux/uinput.h
linux-libc-headers/trunk/include/linux/usbdevice_fs.h
linux-libc-headers/trunk/include/linux/videodev2.h
linux-libc-headers/trunk/include/linux/vt_kern.h
linux-libc-headers/trunk/include/linux/workqueue.h
linux-libc-headers/trunk/include/linux/xfrm.h
linux-libc-headers/trunk/include/scsi/scsi.h
linux-libc-headers/trunk/include/sound/ac97_codec.h
linux-libc-headers/trunk/include/sound/ak4117.h
linux-libc-headers/trunk/include/sound/ak4xxx-adda.h
linux-libc-headers/trunk/include/sound/asound.h
linux-libc-headers/trunk/include/sound/asoundef.h
linux-libc-headers/trunk/include/sound/control.h
linux-libc-headers/trunk/include/sound/cs46xx.h
linux-libc-headers/trunk/include/sound/emu10k1.h
linux-libc-headers/trunk/include/sound/gus.h
linux-libc-headers/trunk/include/sound/hwdep.h
linux-libc-headers/trunk/include/sound/mixer_oss.h
linux-libc-headers/trunk/include/sound/mpu401.h
linux-libc-headers/trunk/include/sound/rawmidi.h
linux-libc-headers/trunk/include/sound/seq_midi_emul.h
linux-libc-headers/trunk/include/sound/seq_virmidi.h
linux-libc-headers/trunk/include/sound/trident.h
linux-libc-headers/trunk/include/sound/version.h
linux-libc-headers/trunk/include/sound/ymfpci.h
Log:
- 2.6.12 update part III -- the main thing
Modified: linux-libc-headers/trunk/include/asm-alpha/agp.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-alpha/agp.h (original)
+++ linux-libc-headers/trunk/include/asm-alpha/agp.h Tue Jul 5 22:58:33 2005
@@ -10,4 +10,14 @@
#define flush_agp_mappings()
#define flush_agp_cache() mb()
+/* Convert a physical address to an address suitable for the GART. */
+#define phys_to_gart(x) (x)
+#define gart_to_phys(x) (x)
+
+/* GATT allocation. Returns/accepts GATT kernel virtual address. */
+#define alloc_gatt_pages(order) \
+ ((char *)__get_free_pages(GFP_KERNEL, (order)))
+#define free_gatt_pages(table, order) \
+ free_pages((unsigned long)(table), (order))
+
#endif
Modified: linux-libc-headers/trunk/include/asm-alpha/cacheflush.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-alpha/cacheflush.h (original)
+++ linux-libc-headers/trunk/include/asm-alpha/cacheflush.h Tue Jul 5 22:58:33 2005
@@ -6,7 +6,7 @@
#define flush_cache_all() do { } while (0)
#define flush_cache_mm(mm) do { } while (0)
#define flush_cache_range(vma, start, end) do { } while (0)
-#define flush_cache_page(vma, vmaddr) do { } while (0)
+#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
#define flush_dcache_page(page) do { } while (0)
#define flush_dcache_mmap_lock(mapping) do { } while (0)
#define flush_dcache_mmap_unlock(mapping) do { } while (0)
Modified: linux-libc-headers/trunk/include/asm-alpha/errno.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-alpha/errno.h (original)
+++ linux-libc-headers/trunk/include/asm-alpha/errno.h Tue Jul 5 22:58:33 2005
@@ -101,6 +101,8 @@
#undef EKEYEXPIRED
#undef EKEYREVOKED
#undef EKEYREJECTED
+#undef EOWNERDEAD
+#undef ENOTRECOVERABLE
#define EDEADLK 11 /* Resource deadlock would occur */
#define EAGAIN 35 /* Try again */
@@ -212,4 +214,9 @@
#define EKEYREVOKED 134 /* Key has been revoked */
#define EKEYREJECTED 135 /* Key was rejected by service */
+/* for robust mutexes */
+#define EOWNERDEAD 136 /* Owner died */
+#define ENOTRECOVERABLE 137 /* State not recoverable */
+
+
#endif
Modified: linux-libc-headers/trunk/include/asm-alpha/siginfo.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-alpha/siginfo.h (original)
+++ linux-libc-headers/trunk/include/asm-alpha/siginfo.h Tue Jul 5 22:58:33 2005
@@ -4,8 +4,6 @@
#define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int))
#define __ARCH_SI_TRAPNO
-#define SIGEV_PAD_SIZE ((SIGEV_MAX_SIZE/sizeof(int)) - 4)
-
#include <linux/siginfo.h>
#endif
Modified: linux-libc-headers/trunk/include/asm-alpha/spinlock.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-alpha/spinlock.h (original)
+++ linux-libc-headers/trunk/include/asm-alpha/spinlock.h Tue Jul 5 22:58:33 2005
@@ -13,7 +13,7 @@
*/
typedef struct {
- volatile unsigned int lock /*__attribute__((aligned(32))) */;
+ volatile unsigned int lock;
#ifdef CONFIG_DEBUG_SPINLOCK
int on_cpu;
int line_no;
@@ -21,40 +21,26 @@
struct task_struct * task;
const char *base_file;
#endif
-#ifdef CONFIG_PREEMPT
- unsigned int break_lock;
-#endif
} spinlock_t;
#ifdef CONFIG_DEBUG_SPINLOCK
-#define SPIN_LOCK_UNLOCKED (spinlock_t) {0, -1, 0, NULL, NULL, NULL}
-#define spin_lock_init(x) \
- ((x)->lock = 0, (x)->on_cpu = -1, (x)->previous = NULL, (x)->task = NULL)
+#define SPIN_LOCK_UNLOCKED (spinlock_t){ 0, -1, 0, NULL, NULL, NULL }
#else
-#define SPIN_LOCK_UNLOCKED (spinlock_t) { 0 }
-#define spin_lock_init(x) ((x)->lock = 0)
+#define SPIN_LOCK_UNLOCKED (spinlock_t){ 0 }
#endif
+#define spin_lock_init(x) do { *(x) = SPIN_LOCK_UNLOCKED; } while(0)
#define spin_is_locked(x) ((x)->lock != 0)
-#define spin_unlock_wait(x) ({ do { barrier(); } while ((x)->lock); })
-#define _raw_spin_lock_flags(lock, flags) _raw_spin_lock(lock)
+#define spin_unlock_wait(x) do { barrier(); } while ((x)->lock)
#ifdef CONFIG_DEBUG_SPINLOCK
extern void _raw_spin_unlock(spinlock_t * lock);
extern void debug_spin_lock(spinlock_t * lock, const char *, int);
extern int debug_spin_trylock(spinlock_t * lock, const char *, int);
-
-#define _raw_spin_lock(LOCK) debug_spin_lock(LOCK, __BASE_FILE__, __LINE__)
-#define _raw_spin_trylock(LOCK) debug_spin_trylock(LOCK, __BASE_FILE__, __LINE__)
-
-#define spin_lock_own(LOCK, LOCATION) \
-do { \
- if (!((LOCK)->lock && (LOCK)->on_cpu == smp_processor_id())) \
- printk("%s: called on %d from %p but lock %s on %d\n", \
- LOCATION, smp_processor_id(), \
- __builtin_return_address(0), \
- (LOCK)->lock ? "taken" : "freed", (LOCK)->on_cpu); \
-} while (0)
+#define _raw_spin_lock(LOCK) \
+ debug_spin_lock(LOCK, __BASE_FILE__, __LINE__)
+#define _raw_spin_trylock(LOCK) \
+ debug_spin_trylock(LOCK, __BASE_FILE__, __LINE__)
#else
static inline void _raw_spin_unlock(spinlock_t * lock)
{
@@ -66,19 +52,16 @@
{
long tmp;
- /* Use sub-sections to put the actual loop at the end
- of this object file's text section so as to perfect
- branch prediction. */
__asm__ __volatile__(
"1: ldl_l %0,%1\n"
- " blbs %0,2f\n"
- " or %0,1,%0\n"
+ " bne %0,2f\n"
+ " lda %0,1\n"
" stl_c %0,%1\n"
" beq %0,2f\n"
" mb\n"
".subsection 2\n"
"2: ldl %0,%1\n"
- " blbs %0,2b\n"
+ " bne %0,2b\n"
" br 1b\n"
".previous"
: "=&r" (tmp), "=m" (lock->lock)
@@ -89,22 +72,29 @@
{
return !test_and_set_bit(0, &lock->lock);
}
-
-#define spin_lock_own(LOCK, LOCATION) ((void)0)
#endif /* CONFIG_DEBUG_SPINLOCK */
+#define _raw_spin_lock_flags(lock, flags) _raw_spin_lock(lock)
+
/***********************************************************/
typedef struct {
- volatile unsigned int write_lock:1, read_counter:31;
-#ifdef CONFIG_PREEMPT
- unsigned int break_lock;
-#endif
-} /*__attribute__((aligned(32)))*/ rwlock_t;
+ volatile unsigned int lock;
+} rwlock_t;
+
+#define RW_LOCK_UNLOCKED (rwlock_t){ 0 }
-#define RW_LOCK_UNLOCKED (rwlock_t) { 0, 0 }
+#define rwlock_init(x) do { *(x) = RW_LOCK_UNLOCKED; } while(0)
-#define rwlock_init(x) do { *(x) = RW_LOCK_UNLOCKED; } while(0)
+static inline int read_can_lock(rwlock_t *lock)
+{
+ return (lock->lock & 1) == 0;
+}
+
+static inline int write_can_lock(rwlock_t *lock)
+{
+ return lock->lock == 0;
+}
#ifdef CONFIG_DEBUG_RWLOCK
extern void _raw_write_lock(rwlock_t * lock);
@@ -117,7 +107,7 @@
__asm__ __volatile__(
"1: ldl_l %1,%0\n"
" bne %1,6f\n"
- " or $31,1,%1\n"
+ " lda %1,1\n"
" stl_c %1,%0\n"
" beq %1,6f\n"
" mb\n"
@@ -140,7 +130,7 @@
" subl %1,2,%1\n"
" stl_c %1,%0\n"
" beq %1,6f\n"
- "4: mb\n"
+ " mb\n"
".subsection 2\n"
"6: ldl %1,%0\n"
" blbs %1,6b\n"
@@ -151,6 +141,28 @@
}
#endif /* CONFIG_DEBUG_RWLOCK */
+static inline int _raw_read_trylock(rwlock_t * lock)
+{
+ long regx;
+ int success;
+
+ __asm__ __volatile__(
+ "1: ldl_l %1,%0\n"
+ " lda %2,0\n"
+ " blbs %1,2f\n"
+ " subl %1,2,%2\n"
+ " stl_c %2,%0\n"
+ " beq %2,6f\n"
+ "2: mb\n"
+ ".subsection 2\n"
+ "6: br 1b\n"
+ ".previous"
+ : "=m" (*lock), "=&r" (regx), "=&r" (success)
+ : "m" (*lock) : "memory");
+
+ return success;
+}
+
static inline int _raw_write_trylock(rwlock_t * lock)
{
long regx;
@@ -160,10 +172,9 @@
"1: ldl_l %1,%0\n"
" lda %2,0\n"
" bne %1,2f\n"
- " or $31,1,%1\n"
- " stl_c %1,%0\n"
- " beq %1,6f\n"
" lda %2,1\n"
+ " stl_c %2,%0\n"
+ " beq %2,6f\n"
"2: mb\n"
".subsection 2\n"
"6: br 1b\n"
@@ -177,7 +188,7 @@
static inline void _raw_write_unlock(rwlock_t * lock)
{
mb();
- *(volatile int *)lock = 0;
+ lock->lock = 0;
}
static inline void _raw_read_unlock(rwlock_t * lock)
Modified: linux-libc-headers/trunk/include/asm-alpha/system.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-alpha/system.h (original)
+++ linux-libc-headers/trunk/include/asm-alpha/system.h Tue Jul 5 22:58:33 2005
@@ -620,4 +620,6 @@
#endif /* __ASSEMBLY__ */
+#define arch_align_stack(x) (x)
+
#endif
Modified: linux-libc-headers/trunk/include/asm-alpha/unistd.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-alpha/unistd.h (original)
+++ linux-libc-headers/trunk/include/asm-alpha/unistd.h Tue Jul 5 22:58:33 2005
@@ -374,8 +374,11 @@
#define __NR_mq_notify 436
#define __NR_mq_getsetattr 437
#define __NR_waitid 438
+#define __NR_add_key 439
+#define __NR_request_key 440
+#define __NR_keyctl 441
-#define NR_SYSCALLS 439
+#define NR_SYSCALLS 442
#if defined(__GNUC__)
@@ -636,6 +639,6 @@
have declarations. If we use no prototype, then we get warnings from
-Wstrict-prototypes. Ho hum. */
-#define cond_syscall(x) asm(".weak\t" #x "\n" #x " = sys_ni_syscall");
+#define cond_syscall(x) asm(".weak\t" #x "\n" #x " = sys_ni_syscall")
#endif /* _ALPHA_UNISTD_H */
Modified: linux-libc-headers/trunk/include/asm-arm/arch-cl7500/hardware.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-cl7500/hardware.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-cl7500/hardware.h Tue Jul 5 22:58:33 2005
@@ -13,6 +13,12 @@
#include <asm/arch/memory.h>
#include <asm/hardware/iomd.h>
+#ifdef __ASSEMBLY__
+#define IOMEM(x) x
+#else
+#define IOMEM(x) ((void *)(x))
+#endif
+
/*
* What hardware must be present
*/
@@ -27,7 +33,7 @@
#define IO_START 0x03000000 /* I/O */
#define IO_SIZE 0x01000000
-#define IO_BASE 0xe0000000
+#define IO_BASE IOMEM(0xe0000000)
#define ISA_START 0x0c000000 /* ISA */
#define ISA_SIZE 0x00010000
@@ -49,11 +55,11 @@
#define FLUSH_BASE 0xdf000000
-#define VIDC_BASE 0xe0400000
-#define IOMD_BASE 0xe0200000
-#define IOC_BASE 0xe0200000
-#define FLOPPYDMA_BASE 0xe002a000
-#define PCIO_BASE 0xe0010000
+#define VIDC_BASE (void *)0xe0400000
+#define IOMD_BASE IOMEM(0xe0200000)
+#define IOC_BASE IOMEM(0xe0200000)
+#define FLOPPYDMA_BASE IOMEM(0xe002a000)
+#define PCIO_BASE IOMEM(0xe0010000)
#define FLUSH_BASE_PHYS 0x00000000 /* ROM */
@@ -63,4 +69,3 @@
#define ISASLOT_IO 0x80400000
#endif
-
Modified: linux-libc-headers/trunk/include/asm-arm/arch-cl7500/vmalloc.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-cl7500/vmalloc.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-cl7500/vmalloc.h Tue Jul 5 22:58:33 2005
@@ -1,15 +1,4 @@
/*
* linux/include/asm-arm/arch-cl7500/vmalloc.h
*/
-
-/*
- * Just any arbitrary offset to the start of the vmalloc VM area: the
- * current 8MB value just means that there will be a 8MB "hole" after the
- * physical memory until the kernel virtual memory starts. That means that
- * any out-of-bounds memory accesses will hopefully be caught.
- * The vmalloc() routines leaves a hole of 4kB between each vmalloced
- * area for the same reason. ;)
- */
-#define VMALLOC_OFFSET (8*1024*1024)
-#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
#define VMALLOC_END (PAGE_OFFSET + 0x1c000000)
Modified: linux-libc-headers/trunk/include/asm-arm/arch-clps711x/vmalloc.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-clps711x/vmalloc.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-clps711x/vmalloc.h Tue Jul 5 22:58:33 2005
@@ -17,15 +17,4 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
-
-/*
- * Just any arbitrary offset to the start of the vmalloc VM area: the
- * current 8MB value just means that there will be a 8MB "hole" after the
- * physical memory until the kernel virtual memory starts. That means that
- * any out-of-bounds memory accesses will hopefully be caught.
- * The vmalloc() routines leaves a hole of 4kB between each vmalloced
- * area for the same reason. ;)
- */
-#define VMALLOC_OFFSET (8*1024*1024)
-#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
#define VMALLOC_END (PAGE_OFFSET + 0x10000000)
Modified: linux-libc-headers/trunk/include/asm-arm/arch-ebsa110/vmalloc.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-ebsa110/vmalloc.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-ebsa110/vmalloc.h Tue Jul 5 22:58:33 2005
@@ -7,15 +7,4 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
-
-/*
- * Just any arbitrary offset to the start of the vmalloc VM area: the
- * current 8MB value just means that there will be a 8MB "hole" after the
- * physical memory until the kernel virtual memory starts. That means that
- * any out-of-bounds memory accesses will hopefully be caught.
- * The vmalloc() routines leaves a hole of 4kB between each vmalloced
- * area for the same reason. ;)
- */
-#define VMALLOC_OFFSET (8*1024*1024)
-#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
#define VMALLOC_END (PAGE_OFFSET + 0x1f000000)
Modified: linux-libc-headers/trunk/include/asm-arm/arch-ebsa285/vmalloc.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-ebsa285/vmalloc.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-ebsa285/vmalloc.h Tue Jul 5 22:58:33 2005
@@ -7,17 +7,6 @@
*/
-/*
- * Just any arbitrary offset to the start of the vmalloc VM area: the
- * current 8MB value just means that there will be a 8MB "hole" after the
- * physical memory until the kernel virtual memory starts. That means that
- * any out-of-bounds memory accesses will hopefully be caught.
- * The vmalloc() routines leaves a hole of 4kB between each vmalloced
- * area for the same reason. ;)
- */
-#define VMALLOC_OFFSET (8*1024*1024)
-#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
-
#ifdef CONFIG_ARCH_FOOTBRIDGE
#define VMALLOC_END (PAGE_OFFSET + 0x30000000)
#else
Modified: linux-libc-headers/trunk/include/asm-arm/arch-epxa10db/vmalloc.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-epxa10db/vmalloc.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-epxa10db/vmalloc.h Tue Jul 5 22:58:33 2005
@@ -17,15 +17,4 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
-
-/*
- * Just any arbitrary offset to the start of the vmalloc VM area: the
- * current 8MB value just means that there will be a 8MB "hole" after the
- * physical memory until the kernel virtual memory starts. That means that
- * any out-of-bounds memory accesses will hopefully be caught.
- * The vmalloc() routines leaves a hole of 4kB between each vmalloced
- * area for the same reason. ;)
- */
-#define VMALLOC_OFFSET (8*1024*1024)
-#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
#define VMALLOC_END (PAGE_OFFSET + 0x10000000)
Modified: linux-libc-headers/trunk/include/asm-arm/arch-h720x/hardware.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-h720x/hardware.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-h720x/hardware.h Tue Jul 5 22:58:33 2005
@@ -36,7 +36,7 @@
#endif
/* Macro to access the CPU IO */
-#define CPU_IO(x) (*(volatile u32*)(x))
+#define CPU_IO(x) (*(volatile __u32*)(x))
/* Macro to access general purpose regs (base, offset) */
#define CPU_REG(x,y) CPU_IO(x+y)
Modified: linux-libc-headers/trunk/include/asm-arm/arch-h720x/vmalloc.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-h720x/vmalloc.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-h720x/vmalloc.h Tue Jul 5 22:58:33 2005
@@ -5,17 +5,6 @@
#ifndef __ARCH_ARM_VMALLOC_H
#define __ARCH_ARM_VMALLOC_H
-/*
- * Just any arbitrary offset to the start of the vmalloc VM area: the
- * current 8MB value just means that there will be a 8MB "hole" after the
- * physical memory until the kernel virtual memory starts. That means that
- * any out-of-bounds memory accesses will hopefully be caught.
- * The vmalloc() routines leaves a hole of 4kB between each vmalloced
- * area for the same reason. ;)
- */
-#define VMALLOC_OFFSET (8*1024*1024)
-#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
-#define VMALLOC_VMADDR(x) ((unsigned long)(x))
#define VMALLOC_END (PAGE_OFFSET + 0x10000000)
#endif
Modified: linux-libc-headers/trunk/include/asm-arm/arch-imx/hardware.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-imx/hardware.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-imx/hardware.h Tue Jul 5 22:58:33 2005
@@ -26,9 +26,7 @@
#ifndef __ASSEMBLY__
# define __REG(x) (*((volatile __u32 *)IO_ADDRESS(x)))
-# define __REG2(x,y) \
- ( __builtin_constant_p(y) ? (__REG((x) + (y))) \
- : (*(volatile __u32 *)((__u32)&__REG(x) + (y))) )
+# define __REG2(x,y) (*(volatile __u32 *)((__u32)&__REG(x) + (y)))
#endif
/*
Modified: linux-libc-headers/trunk/include/asm-arm/arch-imx/imx-regs.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-imx/imx-regs.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-imx/imx-regs.h Tue Jul 5 22:58:33 2005
@@ -228,6 +228,30 @@
#define PD31_BIN_SPI2_TXD ( GPIO_PORTD | GPIO_BIN | 31 )
/*
+ * PWM controller
+ */
+#define PWMC __REG(IMX_PWM_BASE + 0x00) /* PWM Control Register */
+#define PWMS __REG(IMX_PWM_BASE + 0x04) /* PWM Sample Register */
+#define PWMP __REG(IMX_PWM_BASE + 0x08) /* PWM Period Register */
+#define PWMCNT __REG(IMX_PWM_BASE + 0x0C) /* PWM Counter Register */
+
+#define PWMC_HCTR (0x01<<18) /* Halfword FIFO Data Swapping */
+#define PWMC_BCTR (0x01<<17) /* Byte FIFO Data Swapping */
+#define PWMC_SWR (0x01<<16) /* Software Reset */
+#define PWMC_CLKSRC (0x01<<15) /* Clock Source */
+#define PWMC_PRESCALER(x) (((x-1) & 0x7F) << 8) /* PRESCALER */
+#define PWMC_IRQ (0x01<< 7) /* Interrupt Request */
+#define PWMC_IRQEN (0x01<< 6) /* Interrupt Request Enable */
+#define PWMC_FIFOAV (0x01<< 5) /* FIFO Available */
+#define PWMC_EN (0x01<< 4) /* Enables/Disables the PWM */
+#define PWMC_REPEAT(x) (((x) & 0x03) << 2) /* Sample Repeats */
+#define PWMC_CLKSEL(x) (((x) & 0x03) << 0) /* Clock Selection */
+
+#define PWMS_SAMPLE(x) ((x) & 0xFFFF) /* Contains a two-sample word */
+#define PWMP_PERIOD(x) ((x) & 0xFFFF) /* Represents the PWM's period */
+#define PWMC_COUNTER(x) ((x) & 0xFFFF) /* Represents the current count value */
+
+/*
* DMA Controller
*/
#define DCR __REG(IMX_DMAC_BASE +0x00) /* DMA Control Register */
Added: linux-libc-headers/trunk/include/asm-arm/arch-imx/imxfb.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/asm-arm/arch-imx/imxfb.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,35 @@
+/*
+ * This structure describes the machine which we are running on.
+ */
+struct imxfb_mach_info {
+ u_long pixclock;
+
+ u_short xres;
+ u_short yres;
+
+ u_char bpp;
+ u_char hsync_len;
+ u_char left_margin;
+ u_char right_margin;
+
+ u_char vsync_len;
+ u_char upper_margin;
+ u_char lower_margin;
+ u_char sync;
+
+ u_int cmap_greyscale:1,
+ cmap_inverse:1,
+ cmap_static:1,
+ unused:29;
+
+ u_int pcr;
+ u_int pwmr;
+ u_int lscr1;
+
+ u_char * fixed_screen_cpu;
+ dma_addr_t fixed_screen_dma;
+
+ void (*lcd_power)(int);
+ void (*backlight_power)(int);
+};
+void set_imx_fb_info(struct imxfb_mach_info *hard_imx_fb_info);
Modified: linux-libc-headers/trunk/include/asm-arm/arch-imx/vmalloc.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-imx/vmalloc.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-imx/vmalloc.h Tue Jul 5 22:58:33 2005
@@ -17,16 +17,4 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
-
-/*
- * Just any arbitrary offset to the start of the vmalloc VM area: the
- * current 8MB value just means that there will be a 8MB "hole" after the
- * physical memory until the kernel virtual memory starts. That means that
- * any out-of-bounds memory accesses will hopefully be caught.
- * The vmalloc() routines leaves a hole of 4kB between each vmalloced
- * area for the same reason. ;)
- */
-#define VMALLOC_OFFSET (8*1024*1024)
-#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
-#define VMALLOC_VMADDR(x) ((unsigned long)(x))
#define VMALLOC_END (PAGE_OFFSET + 0x10000000)
Modified: linux-libc-headers/trunk/include/asm-arm/arch-integrator/lm.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-integrator/lm.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-integrator/lm.h Tue Jul 5 22:58:33 2005
@@ -10,7 +10,7 @@
struct device_driver drv;
int (*probe)(struct lm_device *);
void (*remove)(struct lm_device *);
- int (*suspend)(struct lm_device *, __u32);
+ int (*suspend)(struct lm_device *, pm_message_t);
int (*resume)(struct lm_device *);
};
Modified: linux-libc-headers/trunk/include/asm-arm/arch-integrator/platform.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-integrator/platform.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-integrator/platform.h Tue Jul 5 22:58:33 2005
@@ -39,22 +39,22 @@
* Memory definitions
* ------------------------------------------------------------------------
* Integrator memory map
- *
+ *
*/
#define INTEGRATOR_BOOT_ROM_LO 0x00000000
#define INTEGRATOR_BOOT_ROM_HI 0x20000000
#define INTEGRATOR_BOOT_ROM_BASE INTEGRATOR_BOOT_ROM_HI /* Normal position */
#define INTEGRATOR_BOOT_ROM_SIZE SZ_512K
-/*
+/*
* New Core Modules have different amounts of SSRAM, the amount of SSRAM
* fitted can be found in HDR_STAT.
- *
+ *
* The symbol INTEGRATOR_SSRAM_SIZE is kept, however this now refers to
* the minimum amount of SSRAM fitted on any core module.
- *
+ *
* New Core Modules also alias the SSRAM.
- *
+ *
*/
#define INTEGRATOR_SSRAM_BASE 0x00000000
#define INTEGRATOR_SSRAM_ALIAS_BASE 0x10800000
@@ -66,9 +66,9 @@
#define INTEGRATOR_MBRD_SSRAM_BASE 0x28000000
#define INTEGRATOR_MBRD_SSRAM_SIZE SZ_512K
-/*
+/*
* SDRAM is a SIMM therefore the size is not known.
- *
+ *
*/
#define INTEGRATOR_SDRAM_BASE 0x00040000
@@ -78,9 +78,9 @@
#define INTEGRATOR_HDR2_SDRAM_BASE 0xA0000000
#define INTEGRATOR_HDR3_SDRAM_BASE 0xB0000000
-/*
+/*
* Logic expansion modules
- *
+ *
*/
#define INTEGRATOR_LOGIC_MODULES_BASE 0xC0000000
#define INTEGRATOR_LOGIC_MODULE0_BASE 0xC0000000
@@ -91,7 +91,7 @@
/* ------------------------------------------------------------------------
* Integrator header card registers
* ------------------------------------------------------------------------
- *
+ *
*/
#define INTEGRATOR_HDR_ID_OFFSET 0x00
#define INTEGRATOR_HDR_PROC_OFFSET 0x04
@@ -184,12 +184,12 @@
/* ------------------------------------------------------------------------
* Integrator system registers
* ------------------------------------------------------------------------
- *
+ *
*/
-/*
+/*
* System Controller
- *
+ *
*/
#define INTEGRATOR_SC_ID_OFFSET 0x00
#define INTEGRATOR_SC_OSC_OFFSET 0x04
@@ -229,11 +229,11 @@
#define INTEGRATOR_SC_CTRL_URTS1 (1 << 6)
#define INTEGRATOR_SC_CTRL_UDTR1 (1 << 7)
-/*
+/*
* External Bus Interface
- *
+ *
*/
-#define INTEGRATOR_EBI_BASE 0x12000000
+#define INTEGRATOR_EBI_BASE 0x12000000
#define INTEGRATOR_EBI_CSR0_OFFSET 0x00
#define INTEGRATOR_EBI_CSR1_OFFSET 0x04
@@ -278,9 +278,9 @@
#define INTEGRATOR_KBD_BASE 0x18000000 /* Keyboard */
#define INTEGRATOR_MOUSE_BASE 0x19000000 /* Mouse */
-/*
+/*
* LED's & Switches
- *
+ *
*/
#define INTEGRATOR_DBG_ALPHA_OFFSET 0x00
#define INTEGRATOR_DBG_LEDS_OFFSET 0x04
@@ -292,14 +292,18 @@
#define INTEGRATOR_DBG_SWITCH (INTEGRATOR_DBG_BASE + INTEGRATOR_DBG_SWITCH_OFFSET)
+#if defined(CONFIG_ARCH_INTEGRATOR_AP)
#define INTEGRATOR_GPIO_BASE 0x1B000000 /* GPIO */
+#elif defined(CONFIG_ARCH_INTEGRATOR_CP)
+#define INTEGRATOR_GPIO_BASE 0xC9000000 /* GPIO */
+#endif
/* ------------------------------------------------------------------------
* KMI keyboard/mouse definitions
* ------------------------------------------------------------------------
*/
/* PS2 Keyboard interface */
-#define KMI0_BASE INTEGRATOR_KBD_BASE
+#define KMI0_BASE INTEGRATOR_KBD_BASE
/* PS2 Mouse interface */
#define KMI1_BASE INTEGRATOR_MOUSE_BASE
@@ -312,7 +316,7 @@
* This represents a fairly liberal usage of address space. Even though
* the V3 only has two windows (therefore we need to map stuff on the fly),
* we maintain the same addresses, even if they're not mapped.
- *
+ *
*/
#define PHYS_PCI_MEM_BASE 0x40000000 /* 512M to xxx */
/* unused 256M from A0000000-AFFFFFFF might be used for I2O ???
@@ -325,7 +329,7 @@
*/
#define PHYS_PCI_V3_BASE 0x62000000
-#define PCI_DRAMSIZE INTEGRATOR_SSRAM_SIZE
+#define PCI_DRAMSIZE INTEGRATOR_SSRAM_SIZE
/* 'export' these to UHAL */
#define UHAL_PCI_IO PCI_IO_BASE
@@ -333,7 +337,7 @@
#define UHAL_PCI_ALLOC_IO_BASE 0x00004000
#define UHAL_PCI_ALLOC_MEM_BASE PCI_MEM_BASE
#define UHAL_PCI_MAX_SLOT 20
-
+
/* ========================================================================
* Start of uHAL definitions
* ========================================================================
@@ -342,17 +346,17 @@
/* ------------------------------------------------------------------------
* Integrator Interrupt Controllers
* ------------------------------------------------------------------------
- *
- * Offsets from interrupt controller base
- *
+ *
+ * Offsets from interrupt controller base
+ *
* System Controller interrupt controller base is
- *
+ *
* INTEGRATOR_IC_BASE + (header_number << 6)
- *
+ *
* Core Module interrupt controller base is
- *
- * INTEGRATOR_HDR_IC
- *
+ *
+ * INTEGRATOR_HDR_IC
+ *
*/
#define IRQ_STATUS 0
#define IRQ_RAW_STATUS 0x04
@@ -373,22 +377,22 @@
/* ------------------------------------------------------------------------
* Interrupts
* ------------------------------------------------------------------------
- *
- *
+ *
+ *
* Each Core Module has two interrupts controllers, one on the core module
* itself and one in the system controller on the motherboard. The
* READ_INT macro in target.s reads both interrupt controllers and returns
* a 32 bit bitmask, bits 0 to 23 are interrupts from the system controller
* and bits 24 to 31 are from the core module.
- *
+ *
* The following definitions relate to the bitmask returned by READ_INT.
- *
+ *
*/
/* ------------------------------------------------------------------------
* LED's - The header LED is not accessible via the uHAL API
* ------------------------------------------------------------------------
- *
+ *
*/
#define GREEN_LED 0x01
#define YELLOW_LED 0x02
@@ -398,44 +402,44 @@
#define LED_BANK INTEGRATOR_DBG_LEDS
-/*
+/*
* Memory definitions - run uHAL out of SSRAM.
- *
+ *
*/
#define uHAL_MEMORY_SIZE INTEGRATOR_SSRAM_SIZE
-/*
+/*
* Application Flash
- *
+ *
*/
#define FLASH_BASE INTEGRATOR_FLASH_BASE
#define FLASH_SIZE INTEGRATOR_FLASH_SIZE
#define FLASH_END (FLASH_BASE + FLASH_SIZE - 1)
#define FLASH_BLOCK_SIZE SZ_128K
-/*
+/*
* Boot Flash
- *
+ *
*/
#define EPROM_BASE INTEGRATOR_BOOT_ROM_HI
#define EPROM_SIZE INTEGRATOR_BOOT_ROM_SIZE
#define EPROM_END (EPROM_BASE + EPROM_SIZE - 1)
-/*
+/*
* Clean base - dummy
- *
+ *
*/
#define CLEAN_BASE EPROM_BASE
-/*
+/*
* Timer definitions
- *
+ *
* Only use timer 1 & 2
* (both run at 24MHz and will need the clock divider set to 16).
- *
+ *
* Timer 0 runs at bus frequency and therefore could vary and currently
* uHAL can't handle that.
- *
+ *
*/
#define INTEGRATOR_TIMER0_BASE INTEGRATOR_CT_BASE
@@ -446,9 +450,9 @@
#define MAX_PERIOD 699050
#define TICKS_PER_uSEC 24
-/*
- * These are useconds NOT ticks.
- *
+/*
+ * These are useconds NOT ticks.
+ *
*/
#define mSEC_1 1000
#define mSEC_5 (mSEC_1 * 5)
Modified: linux-libc-headers/trunk/include/asm-arm/arch-integrator/vmalloc.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-integrator/vmalloc.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-integrator/vmalloc.h Tue Jul 5 22:58:33 2005
@@ -17,15 +17,4 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
-
-/*
- * Just any arbitrary offset to the start of the vmalloc VM area: the
- * current 8MB value just means that there will be a 8MB "hole" after the
- * physical memory until the kernel virtual memory starts. That means that
- * any out-of-bounds memory accesses will hopefully be caught.
- * The vmalloc() routines leaves a hole of 4kB between each vmalloced
- * area for the same reason. ;)
- */
-#define VMALLOC_OFFSET (8*1024*1024)
-#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
#define VMALLOC_END (PAGE_OFFSET + 0x10000000)
Modified: linux-libc-headers/trunk/include/asm-arm/arch-iop3xx/vmalloc.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-iop3xx/vmalloc.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-iop3xx/vmalloc.h Tue Jul 5 22:58:33 2005
@@ -10,9 +10,6 @@
* The vmalloc() routines leaves a hole of 4kB between each vmalloced
* area for the same reason. ;)
*/
-#define VMALLOC_OFFSET (8*1024*1024)
-#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
-#define VMALLOC_VMADDR(x) ((unsigned long)(x))
//#define VMALLOC_END (0xe8000000)
/* increase usable physical RAM to ~992M per RMK */
#define VMALLOC_END (0xfe000000)
Modified: linux-libc-headers/trunk/include/asm-arm/arch-ixp2000/io.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-ixp2000/io.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-ixp2000/io.h Tue Jul 5 22:58:33 2005
@@ -1,5 +1,5 @@
/*
- * linux/include/asm-arm/arch-ixdp2000/io.h
+ * linux/include/asm-arm/arch-ixp2000/io.h
*
* Original Author: Naeem M Afzal <naeem.m.afzal at intel.com>
* Maintainer: Deepak Saxena <dsaxena at plexity.net>
@@ -17,20 +17,20 @@
#define IO_SPACE_LIMIT 0xffffffff
#define __mem_pci(a) (a)
-
-/*
- * Pick up VMALLOC_END
- */
#define ___io(p) ((void *)((p)+IXP2000_PCI_IO_VIRT_BASE))
/*
- * IXP2000 does not do proper byte-lane conversion for PCI addresses,
- * so we need to override standard functions.
+ * The IXP2400 before revision B0 asserts byte lanes for PCI I/O
+ * transactions the other way round (MEM transactions don't have this
+ * issue), so we need to override the standard functions. B0 and later
+ * have a bit that can be set to 1 to get the 'proper' behavior, but
+ * since that isn't available on the A? revisions we just keep doing
+ * things manually.
*/
-#define alignb(addr) (((unsigned long)addr & ~3) + (3 - ((unsigned long)addr & 3)))
-#define alignw(addr) (((unsigned long)addr & ~2) + (2 - ((unsigned long)addr & 2)))
+#define alignb(addr) (void *)((unsigned long)addr ^ 3)
+#define alignw(addr) (void *)((unsigned long)addr ^ 2)
-#define outb(v,p) __raw_writeb(v,alignb(___io(p)))
+#define outb(v,p) __raw_writeb((v),alignb(___io(p)))
#define outw(v,p) __raw_writew((v),alignw(___io(p)))
#define outl(v,p) __raw_writel((v),___io(p))
@@ -53,8 +53,8 @@
/*
* This is an ugly hack but the CS8900 on the 2x01's does not sit in any sort
* of "I/O space" and is just direct mapped into a 32-bit-only addressable
- * bus. The address space for this bus is such that we can't really easilly
- * make it contigous to the PCI I/O address range, and it also does not
+ * bus. The address space for this bus is such that we can't really easily
+ * make it contiguous to the PCI I/O address range, and it also does not
* need swapping like PCI addresses do (IXDP2x01 is a BE platform).
* B/C of this we can't use the standard in/out functions and need to
* runtime check if the incoming address is a PCI address or for
@@ -75,9 +75,9 @@
* Is this cycle meant for the CS8900?
*/
if ((machine_is_ixdp2401() || machine_is_ixdp2801()) &&
- ((port >= IXDP2X01_CS8900_VIRT_BASE) &&
- (port <= IXDP2X01_CS8900_VIRT_END))) {
- __u8 *buf8 = (u8*)buf;
+ (((__u32)port >= (__u32)IXDP2X01_CS8900_VIRT_BASE) &&
+ ((__u32)port <= (__u32)IXDP2X01_CS8900_VIRT_END))) {
+ __u8 *buf8 = (__u8*)buf;
register __u32 tmp32;
do {
@@ -100,10 +100,10 @@
* Is this cycle meant for the CS8900?
*/
if ((machine_is_ixdp2401() || machine_is_ixdp2801()) &&
- ((port >= IXDP2X01_CS8900_VIRT_BASE) &&
- (port <= IXDP2X01_CS8900_VIRT_END))) {
+ (((__u32)port >= (__u32)IXDP2X01_CS8900_VIRT_BASE) &&
+ ((__u32)port <= (__u32)IXDP2X01_CS8900_VIRT_END))) {
register __u32 tmp32;
- __u8 *buf8 = (u8*)buf;
+ __u8 *buf8 = (__u8*)buf;
do {
tmp32 = *buf8++;
tmp32 |= (*buf8++) << 8;
@@ -124,8 +124,8 @@
* Is this cycle meant for the CS8900?
*/
if ((machine_is_ixdp2401() || machine_is_ixdp2801()) &&
- ((port >= IXDP2X01_CS8900_VIRT_BASE) &&
- (port <= IXDP2X01_CS8900_VIRT_END))) {
+ (((__u32)port >= (__u32)IXDP2X01_CS8900_VIRT_BASE) &&
+ ((__u32)port <= (__u32)IXDP2X01_CS8900_VIRT_END))) {
return (__u16)(*port);
}
@@ -137,8 +137,8 @@
register volatile __u32 *port = (volatile __u32 *)ptr;
if ((machine_is_ixdp2401() || machine_is_ixdp2801()) &&
- ((port >= IXDP2X01_CS8900_VIRT_BASE) &&
- (port <= IXDP2X01_CS8900_VIRT_END))) {
+ (((__u32)port >= (__u32)IXDP2X01_CS8900_VIRT_BASE) &&
+ ((__u32)port <= (__u32)IXDP2X01_CS8900_VIRT_END))) {
*port = value;
return;
}
Modified: linux-libc-headers/trunk/include/asm-arm/arch-ixp2000/irqs.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-ixp2000/irqs.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-ixp2000/irqs.h Tue Jul 5 22:58:33 2005
@@ -45,12 +45,12 @@
#define IRQ_IXP2000_ME_ATTN 14
#define IRQ_IXP2000_PCI 15 /* PCI INTA or INTB */
#define IRQ_IXP2000_THDA0 16 /* thread 0-31A */
-#define IRQ_IXP2000_THDA1 17 /* thread 32-63A */
-#define IRQ_IXP2000_THDA2 18 /* thread 64-95A, IXP2800 only */
+#define IRQ_IXP2000_THDA1 17 /* thread 32-63A, IXP2800 only */
+#define IRQ_IXP2000_THDA2 18 /* thread 64-95A */
#define IRQ_IXP2000_THDA3 19 /* thread 96-127A, IXP2800 only */
#define IRQ_IXP2000_THDB0 24 /* thread 0-31B */
-#define IRQ_IXP2000_THDB1 25 /* thread 32-63B */
-#define IRQ_IXP2000_THDB2 26 /* thread 64-95B, IXP2800 only */
+#define IRQ_IXP2000_THDB1 25 /* thread 32-63B, IXP2800 only */
+#define IRQ_IXP2000_THDB2 26 /* thread 64-95B */
#define IRQ_IXP2000_THDB3 27 /* thread 96-127B, IXP2800 only */
/* define generic GPIOs */
Modified: linux-libc-headers/trunk/include/asm-arm/arch-ixp2000/ixdp2x00.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-ixp2000/ixdp2x00.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-ixp2000/ixdp2x00.h Tue Jul 5 22:58:33 2005
@@ -21,7 +21,7 @@
* On board CPLD memory map
*/
#define IXDP2X00_PHYS_CPLD_BASE 0xc7000000
-#define IXDP2X00_VIRT_CPLD_BASE 0xfefdd000
+#define IXDP2X00_VIRT_CPLD_BASE 0xfafff000
#define IXDP2X00_CPLD_SIZE 0x00001000
Modified: linux-libc-headers/trunk/include/asm-arm/arch-ixp2000/ixdp2x01.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-ixp2000/ixdp2x01.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-ixp2000/ixdp2x01.h Tue Jul 5 22:58:33 2005
@@ -1,5 +1,5 @@
/*
- * include/asm/arch/ixdp2x01.h
+ * include/asm-arm/arch-ixp2000/ixdp2x01.h
*
* Platform definitions for IXDP2X01 && IXDP2801 systems
*
@@ -18,11 +18,11 @@
#define __IXDP2X01_H__
#define IXDP2X01_PHYS_CPLD_BASE 0xc6024000
-#define IXDP2X01_VIRT_CPLD_BASE 0xfefdd000
-#define IXDP2X01_CPLD_REGION_SIZE 0x1000
+#define IXDP2X01_VIRT_CPLD_BASE 0xfafff000
+#define IXDP2X01_CPLD_REGION_SIZE 0x00001000
-#define IXDP2X01_CPLD_VIRT_REG(reg) (volatile u32*)(IXDP2X01_VIRT_CPLD_BASE | reg)
-#define IXDP2X01_CPLD_PHYS_REG(reg) (volatile u32*)(IXDP2X01_PHYS_CPLD_BASE | reg)
+#define IXDP2X01_CPLD_VIRT_REG(reg) (volatile unsigned long*)(IXDP2X01_VIRT_CPLD_BASE | reg)
+#define IXDP2X01_CPLD_PHYS_REG(reg) (volatile __u32*)(IXDP2X01_PHYS_CPLD_BASE | reg)
#define IXDP2X01_UART1_VIRT_BASE IXDP2X01_CPLD_VIRT_REG(0x40)
#define IXDP2X01_UART1_PHYS_BASE IXDP2X01_CPLD_PHYS_REG(0x40)
Modified: linux-libc-headers/trunk/include/asm-arm/arch-ixp2000/ixp2000-regs.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-ixp2000/ixp2000-regs.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-ixp2000/ixp2000-regs.h Tue Jul 5 22:58:33 2005
@@ -19,41 +19,57 @@
#define _IXP2000_REGS_H_
/*
- * Static I/O regions. The manual defines each region as being several
- * MB in size, but all the registers are within the first 4K, so there's
- * no purpose in mapping the whole region in.
- */
-#define IXP2000_SLOWPORT_CSR_PHYS_BASE 0xc0080000
-#define IXP2000_SLOWPORT_CSR_VIRT_BASE 0xfefff000
-#define IXP2000_SLOWPORT_CSR_SIZE 0x1000
-
-#define IXP2000_GLOBAL_REG_PHYS_BASE 0xc0004000
-#define IXP2000_GLOBAL_REG_VIRT_BASE 0xfeffe000
-#define IXP2000_GLOBAL_REG_SIZE 0x1000
+ * Static I/O regions.
+ *
+ * Most of the registers are clumped in 4K regions spread throughout
+ * the 0xc0000000 -> 0xc0100000 address range, but we just map in
+ * the whole range using a single 1 MB section instead of small
+ * 4K pages. This has two advantages for us:
+ *
+ * 1) We use only one TLB entry for large number of on-chip I/O devices.
+ *
+ * 2) We can easily set the Section attributes to XCB=101 on the IXP2400
+ * as required per erratum #66. We accomplish this by using a
+ * new MT_IXP2000_DEVICE memory type with the bits set as required.
+ *
+ * CAP stands for CSR Access Proxy.
+ *
+ * If you change the virtual address of this mapping, please propagate
+ * the change to arch/arm/kernel/debug.S, which hardcodes the virtual
+ * address of the UART located in this region.
+ */
+
+#define IXP2000_CAP_PHYS_BASE 0xc0000000
+#define IXP2000_CAP_VIRT_BASE 0xfef00000
+#define IXP2000_CAP_SIZE 0x00100000
+/*
+ * Addresses for specific on-chip peripherals
+ */
+#define IXP2000_SLOWPORT_CSR_VIRT_BASE 0xfef80000
+#define IXP2000_GLOBAL_REG_VIRT_BASE 0xfef04000
#define IXP2000_UART_PHYS_BASE 0xc0030000
#define IXP2000_UART_VIRT_BASE 0xfef30000
-#define IXP2000_UART_SIZE 0x1000
-
-#define IXP2000_TIMER_PHYS_BASE 0xc0020000
-#define IXP2000_TIMER_VIRT_BASE 0xfeffc000
-#define IXP2000_TIMER_SIZE 0x1000
-
-#define IXP2000_GPIO_PHYS_BASE 0xc0010000
-#define IXP2000_GPIO_VIRT_BASE 0xfeffb000
-#define IXP2000_GPIO_SIZE 0x1000
+#define IXP2000_TIMER_VIRT_BASE 0xfef20000
+#define IXP2000_GPIO_VIRT_BASE 0Xfef10000
+/*
+ * Devices outside of the 0xc0000000 -> 0xc0100000 range. The virtual
+ * addresses of the INTCTL and PCI_CSR mappings are hardcoded in
+ * entry-macro.S, so if you ever change these please propagate
+ * the change.
+ */
#define IXP2000_INTCTL_PHYS_BASE 0xd6000000
-#define IXP2000_INTCTL_VIRT_BASE 0xfeffa000
-#define IXP2000_INTCTL_SIZE 0x01000
+#define IXP2000_INTCTL_VIRT_BASE 0xfee00000
+#define IXP2000_INTCTL_SIZE 0x00100000
#define IXP2000_PCI_CREG_PHYS_BASE 0xde000000
-#define IXP2000_PCI_CREG_VIRT_BASE 0xfeff0000
-#define IXP2000_PCI_CREG_SIZE 0x1000
+#define IXP2000_PCI_CREG_VIRT_BASE 0xfed00000
+#define IXP2000_PCI_CREG_SIZE 0x00100000
#define IXP2000_PCI_CSR_PHYS_BASE 0xdf000000
-#define IXP2000_PCI_CSR_VIRT_BASE 0xfefde000
-#define IXP2000_PCI_CSR_SIZE 0x1000
+#define IXP2000_PCI_CSR_VIRT_BASE 0xfec00000
+#define IXP2000_PCI_CSR_SIZE 0x00100000
#define IXP2000_PCI_IO_PHYS_BASE 0xd8000000
#define IXP2000_PCI_IO_VIRT_BASE 0xfd000000
@@ -67,7 +83,6 @@
#define IXP2000_PCI_CFG1_VIRT_BASE 0xfb000000
#define IXP2000_PCI_CFG1_SIZE 0x01000000
-
/*
* Timers
*/
@@ -113,6 +128,30 @@
#define IXP2000_IRQ_ERR_ENABLE_SET IXP2000_INTCTL_REG(0x2c)
#define IXP2000_FIQ_ERR_ENABLE_CLR IXP2000_INTCTL_REG(0x30)
#define IXP2000_IRQ_ERR_ENABLE_CLR IXP2000_INTCTL_REG(0x34)
+#define IXP2000_IRQ_THD_RAW_STATUS_A_0 IXP2000_INTCTL_REG(0x60)
+#define IXP2000_IRQ_THD_RAW_STATUS_A_1 IXP2000_INTCTL_REG(0x64)
+#define IXP2000_IRQ_THD_RAW_STATUS_A_2 IXP2000_INTCTL_REG(0x68)
+#define IXP2000_IRQ_THD_RAW_STATUS_A_3 IXP2000_INTCTL_REG(0x6c)
+#define IXP2000_IRQ_THD_RAW_STATUS_B_0 IXP2000_INTCTL_REG(0x80)
+#define IXP2000_IRQ_THD_RAW_STATUS_B_1 IXP2000_INTCTL_REG(0x84)
+#define IXP2000_IRQ_THD_RAW_STATUS_B_2 IXP2000_INTCTL_REG(0x88)
+#define IXP2000_IRQ_THD_RAW_STATUS_B_3 IXP2000_INTCTL_REG(0x8c)
+#define IXP2000_IRQ_THD_ENABLE_SET_A_0 IXP2000_INTCTL_REG(0x160)
+#define IXP2000_IRQ_THD_ENABLE_SET_A_1 IXP2000_INTCTL_REG(0x164)
+#define IXP2000_IRQ_THD_ENABLE_SET_A_2 IXP2000_INTCTL_REG(0x168)
+#define IXP2000_IRQ_THD_ENABLE_SET_A_3 IXP2000_INTCTL_REG(0x16c)
+#define IXP2000_IRQ_THD_ENABLE_SET_B_0 IXP2000_INTCTL_REG(0x180)
+#define IXP2000_IRQ_THD_ENABLE_SET_B_1 IXP2000_INTCTL_REG(0x184)
+#define IXP2000_IRQ_THD_ENABLE_SET_B_2 IXP2000_INTCTL_REG(0x188)
+#define IXP2000_IRQ_THD_ENABLE_SET_B_3 IXP2000_INTCTL_REG(0x18c)
+#define IXP2000_IRQ_THD_ENABLE_CLEAR_A_0 IXP2000_INTCTL_REG(0x1e0)
+#define IXP2000_IRQ_THD_ENABLE_CLEAR_A_1 IXP2000_INTCTL_REG(0x1e4)
+#define IXP2000_IRQ_THD_ENABLE_CLEAR_A_2 IXP2000_INTCTL_REG(0x1e8)
+#define IXP2000_IRQ_THD_ENABLE_CLEAR_A_3 IXP2000_INTCTL_REG(0x1ec)
+#define IXP2000_IRQ_THD_ENABLE_CLEAR_B_0 IXP2000_INTCTL_REG(0x200)
+#define IXP2000_IRQ_THD_ENABLE_CLEAR_B_1 IXP2000_INTCTL_REG(0x204)
+#define IXP2000_IRQ_THD_ENABLE_CLEAR_B_2 IXP2000_INTCTL_REG(0x208)
+#define IXP2000_IRQ_THD_ENABLE_CLEAR_B_3 IXP2000_INTCTL_REG(0x20c)
/*
* Mask of valid IRQs in the 32-bit IRQ register. We use
@@ -195,7 +234,7 @@
#define IXP2000_PCICNTL_PNR (1<<17) /* PCI not Reset bit of PCI_CONTROL */
#define IXP2000_PCICNTL_PCF (1<<28) /* PCI Centrolfunction bit */
-#define IXP2000_XSCALE_INT (1<<1) /* Interrupt from XScale to PCI */
+#define IXP2000_XSCALE_INT (1<<1) /* Interrupt from XScale to PCI */
/* These are from the IRQ register in the PCI ISR register */
#define PCI_CONTROL_BE_DEO (1 << 22) /* Big Endian Data Enable Out */
Modified: linux-libc-headers/trunk/include/asm-arm/arch-ixp2000/platform.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-ixp2000/platform.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-ixp2000/platform.h Tue Jul 5 22:58:33 2005
@@ -1,5 +1,5 @@
/*
- * include/asm-arh/arch-ixp2000/platform.h
+ * include/asm-arm/arch-ixp2000/platform.h
*
* Various bits of code used by platform-level code.
*
@@ -20,7 +20,7 @@
* to on-chip I/O register to not complete fully. What this means is
* that if you have a write to on-chip I/O followed by a back-to-back
* read or write, the first write will happen twice. OR...if it's
- * not a back-to-back trasaction, the read or write will generate
+ * not a back-to-back transaction, the read or write will generate
* incorrect data.
*
* The official work around for this is to set the on-chip I/O regions
@@ -50,7 +50,7 @@
* Boards may multiplex different devices on the 2nd channel of
* the slowport interface that each need different configuration
* settings. For example, the IXDP2400 uses channel 2 on the interface
- * to access the CPLD, the switch fabric card, and te media card. Each
+ * to access the CPLD, the switch fabric card, and the media card. Each
* one needs a different mode so drivers must save/restore the mode
* before and after each operation.
*
@@ -121,6 +121,7 @@
struct pci_sys_data;
+__u32 *ixp2000_pci_config_addr(unsigned int bus, unsigned int devfn, int where);
void ixp2000_pci_preinit(void);
int ixp2000_pci_setup(int, struct pci_sys_data*);
struct pci_bus* ixp2000_pci_scan_bus(int, struct pci_sys_data*);
Modified: linux-libc-headers/trunk/include/asm-arm/arch-ixp2000/system.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-ixp2000/system.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-ixp2000/system.h Tue Jul 5 22:58:33 2005
@@ -19,7 +19,7 @@
static inline void arch_reset(char mode)
{
- cli();
+ local_irq_disable();
/*
* Reset flash banking register so that we are pointing at
Modified: linux-libc-headers/trunk/include/asm-arm/arch-ixp2000/vmalloc.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-ixp2000/vmalloc.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-ixp2000/vmalloc.h Tue Jul 5 22:58:33 2005
@@ -17,7 +17,4 @@
* The vmalloc() routines leaves a hole of 4kB between each vmalloced
* area for the same reason. ;)
*/
-#define VMALLOC_OFFSET (8*1024*1024)
-#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
-#define VMALLOC_VMADDR(x) ((unsigned long)(x))
-#define VMALLOC_END 0xfb000000
+#define VMALLOC_END 0xfaffefff
Modified: linux-libc-headers/trunk/include/asm-arm/arch-ixp4xx/io.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-ixp4xx/io.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-ixp4xx/io.h Tue Jul 5 22:58:33 2005
@@ -20,7 +20,7 @@
#define BIT(x) ((1)<<(x))
-extern int (*ixp4xx_pci_read)(__u32 addr, __u32 cmd, u32* data);
+extern int (*ixp4xx_pci_read)(__u32 addr, __u32 cmd, __u32* data);
extern int ixp4xx_pci_write(__u32 addr, __u32 cmd, __u32 data);
Modified: linux-libc-headers/trunk/include/asm-arm/arch-ixp4xx/platform.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-ixp4xx/platform.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-ixp4xx/platform.h Tue Jul 5 22:58:33 2005
@@ -15,6 +15,12 @@
#include <asm/types.h>
+#ifndef __ARMEB__
+#define REG_OFFSET 0
+#else
+#define REG_OFFSET 3
+#endif
+
/*
* Expansion bus memory regions
*/
Modified: linux-libc-headers/trunk/include/asm-arm/arch-ixp4xx/uncompress.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-ixp4xx/uncompress.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-ixp4xx/uncompress.h Tue Jul 5 22:58:33 2005
@@ -19,7 +19,7 @@
#define TX_DONE (UART_LSR_TEMT|UART_LSR_THRE)
-static volatile u32* uart_base;
+static volatile __u32* uart_base;
static __inline__ void putc(char c)
{
@@ -49,9 +49,9 @@
* Coyote and gtwx5715 only have UART2 connected
*/
if (machine_is_adi_coyote() || machine_is_gtwx5715())
- uart_base = (volatile u32*) IXP4XX_UART2_BASE_PHYS;
+ uart_base = (volatile __u32*) IXP4XX_UART2_BASE_PHYS;
else
- uart_base = (volatile u32*) IXP4XX_UART1_BASE_PHYS;
+ uart_base = (volatile __u32*) IXP4XX_UART1_BASE_PHYS;
}
/*
Modified: linux-libc-headers/trunk/include/asm-arm/arch-ixp4xx/vmalloc.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-ixp4xx/vmalloc.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-ixp4xx/vmalloc.h Tue Jul 5 22:58:33 2005
@@ -1,17 +1,5 @@
/*
* linux/include/asm-arm/arch-ixp4xx/vmalloc.h
*/
-
-/*
- * Just any arbitrary offset to the start of the vmalloc VM area: the
- * current 8MB value just means that there will be a 8MB "hole" after the
- * physical memory until the kernel virtual memory starts. That means that
- * any out-of-bounds memory accesses will hopefully be caught.
- * The vmalloc() routines leaves a hole of 4kB between each vmalloced
- * area for the same reason. ;)
- */
-#define VMALLOC_OFFSET (8*1024*1024)
-#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
-#define VMALLOC_VMADDR(x) ((unsigned long)(x))
#define VMALLOC_END (0xFF000000)
Modified: linux-libc-headers/trunk/include/asm-arm/arch-l7200/vmalloc.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-l7200/vmalloc.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-l7200/vmalloc.h Tue Jul 5 22:58:33 2005
@@ -1,15 +1,4 @@
/*
* linux/include/asm-arm/arch-l7200/vmalloc.h
*/
-
-/*
- * Just any arbitrary offset to the start of the vmalloc VM area: the
- * current 8MB value just means that there will be a 8MB "hole" after the
- * physical memory until the kernel virtual memory starts. That means that
- * any out-of-bounds memory accesses will hopefully be caught.
- * The vmalloc() routines leaves a hole of 4kB between each vmalloced
- * area for the same reason. ;)
- */
-#define VMALLOC_OFFSET (8*1024*1024)
-#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
#define VMALLOC_END (PAGE_OFFSET + 0x10000000)
Modified: linux-libc-headers/trunk/include/asm-arm/arch-lh7a40x/vmalloc.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-lh7a40x/vmalloc.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-lh7a40x/vmalloc.h Tue Jul 5 22:58:33 2005
@@ -7,15 +7,4 @@
* version 2 as published by the Free Software Foundation.
*
*/
-
-/*
- * Just any arbitrary offset to the start of the vmalloc VM area: the
- * current 8MB value just means that there will be a 8MB "hole" after
- * the physical memory until the kernel virtual memory starts. That
- * means that any out-of-bounds memory accesses will hopefully be
- * caught. The vmalloc() routines leaves a hole of 4kB (one page)
- * between each vmalloced area for the same reason. ;)
- */
-#define VMALLOC_OFFSET (8*1024*1024)
-#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
#define VMALLOC_END (0xe8000000)
Added: linux-libc-headers/trunk/include/asm-arm/arch-omap/aic23.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/asm-arm/arch-omap/aic23.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,112 @@
+/*
+ * linux/include/asm-arm/arch-omap/aic23.h
+ *
+ * Hardware definitions for TI TLV320AIC23 audio codec
+ *
+ * Copyright (C) 2002 RidgeRun, Inc.
+ * Author: Steve Johnson
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef __ASM_ARCH_AIC23_H
+#define __ASM_ARCH_AIC23_H
+
+// Codec TLV320AIC23
+#define LEFT_LINE_VOLUME_ADDR 0x00
+#define RIGHT_LINE_VOLUME_ADDR 0x01
+#define LEFT_CHANNEL_VOLUME_ADDR 0x02
+#define RIGHT_CHANNEL_VOLUME_ADDR 0x03
+#define ANALOG_AUDIO_CONTROL_ADDR 0x04
+#define DIGITAL_AUDIO_CONTROL_ADDR 0x05
+#define POWER_DOWN_CONTROL_ADDR 0x06
+#define DIGITAL_AUDIO_FORMAT_ADDR 0x07
+#define SAMPLE_RATE_CONTROL_ADDR 0x08
+#define DIGITAL_INTERFACE_ACT_ADDR 0x09
+#define RESET_CONTROL_ADDR 0x0F
+
+// Left (right) line input volume control register
+#define LRS_ENABLED 0x0100
+#define LIM_MUTED 0x0080
+#define LIV_DEFAULT 0x0017
+#define LIV_MAX 0x001f
+#define LIV_MIN 0x0000
+
+// Left (right) channel headphone volume control register
+#define LZC_ON 0x0080
+#define LHV_DEFAULT 0x0079
+#define LHV_MAX 0x007f
+#define LHV_MIN 0x0000
+
+// Analog audio path control register
+#define STE_ENABLED 0x0020
+#define DAC_SELECTED 0x0010
+#define BYPASS_ON 0x0008
+#define INSEL_MIC 0x0004
+#define MICM_MUTED 0x0002
+#define MICB_20DB 0x0001
+
+// Digital audio path control register
+#define DACM_MUTE 0x0008
+#define DEEMP_32K 0x0002
+#define DEEMP_44K 0x0004
+#define DEEMP_48K 0x0006
+#define ADCHP_ON 0x0001
+
+// Power control down register
+#define DEVICE_POWER_OFF 0x0080
+#define CLK_OFF 0x0040
+#define OSC_OFF 0x0020
+#define OUT_OFF 0x0010
+#define DAC_OFF 0x0008
+#define ADC_OFF 0x0004
+#define MIC_OFF 0x0002
+#define LINE_OFF 0x0001
+
+// Digital audio interface register
+#define MS_MASTER 0x0040
+#define LRSWAP_ON 0x0020
+#define LRP_ON 0x0010
+#define IWL_16 0x0000
+#define IWL_20 0x0004
+#define IWL_24 0x0008
+#define IWL_32 0x000C
+#define FOR_I2S 0x0002
+#define FOR_DSP 0x0003
+
+// Sample rate control register
+#define CLKOUT_HALF 0x0080
+#define CLKIN_HALF 0x0040
+#define BOSR_384fs 0x0002 // BOSR_272fs when in USB mode
+#define USB_CLK_ON 0x0001
+#define SR_MASK 0xf
+#define CLKOUT_SHIFT 7
+#define CLKIN_SHIFT 6
+#define SR_SHIFT 2
+#define BOSR_SHIFT 1
+
+// Digital interface register
+#define ACT_ON 0x0001
+
+#define TLV320AIC23ID1 (0x1a) // cs low
+#define TLV320AIC23ID2 (0x1b) // cs high
+
+#endif /* __ASM_ARCH_AIC23_H */
Modified: linux-libc-headers/trunk/include/asm-arm/arch-omap/board-h2.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-omap/board-h2.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-omap/board-h2.h Tue Jul 5 22:58:33 2005
@@ -21,8 +21,8 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
@@ -32,9 +32,7 @@
/* Placeholder for H2 specific defines */
/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
-#define OMAP1610_ETHR_BASE 0xE8000000
-#define OMAP1610_ETHR_SIZE SZ_4K
-#define OMAP1610_ETHR_START 0x04000000
+#define OMAP1610_ETHR_START 0x04000300
/* Intel STRATA NOR flash at CS3 or CS2B(NAND Boot) */
#define OMAP_NOR_FLASH_SIZE SZ_32M
Modified: linux-libc-headers/trunk/include/asm-arm/arch-omap/board-h3.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-omap/board-h3.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-omap/board-h3.h Tue Jul 5 22:58:33 2005
@@ -28,9 +28,7 @@
#define __ASM_ARCH_OMAP_H3_H
/* In OMAP1710 H3 the Ethernet is directly connected to CS1 */
-#define OMAP1710_ETHR_BASE 0xE8000000
-#define OMAP1710_ETHR_SIZE SZ_4K
-#define OMAP1710_ETHR_START 0x04000000
+#define OMAP1710_ETHR_START 0x04000300
/* Intel STRATA NOR flash at CS3 or CS2B(NAND Boot) */
#define OMAP_NOR_FLASH_SIZE SZ_32M
Modified: linux-libc-headers/trunk/include/asm-arm/arch-omap/board-h4.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-omap/board-h4.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-omap/board-h4.h Tue Jul 5 22:58:33 2005
@@ -21,8 +21,8 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
Modified: linux-libc-headers/trunk/include/asm-arm/arch-omap/board-innovator.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-omap/board-innovator.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-omap/board-innovator.h Tue Jul 5 22:58:33 2005
@@ -19,8 +19,8 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef __ASM_ARCH_OMAP_INNOVATOR_H
@@ -74,8 +74,7 @@
#if defined (CONFIG_ARCH_OMAP16XX)
/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
-#define INNOVATOR1610_ETHR_START 0x04000000
-#define INNOVATOR1610_ETHR_SIZE SZ_4K
+#define INNOVATOR1610_ETHR_START 0x04000300
#endif /* CONFIG_ARCH_OMAP1610 */
#endif /* __ASM_ARCH_OMAP_INNOVATOR_H */
Added: linux-libc-headers/trunk/include/asm-arm/arch-omap/board-netstar.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/asm-arm/arch-omap/board-netstar.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,19 @@
+/*
+ * Copyright (C) 2004 2N Telekomunikace, Ladislav Michl <michl at 2n.cz>
+ *
+ * Hardware definitions for OMAP5910 based NetStar board.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARCH_NETSTAR_H
+#define __ASM_ARCH_NETSTAR_H
+
+#include <asm/arch/tc.h>
+
+#define OMAP_NAND_FLASH_START1 OMAP_CS1_PHYS + (1 << 23)
+#define OMAP_NAND_FLASH_START2 OMAP_CS1_PHYS + (2 << 23)
+
+#endif /* __ASM_ARCH_NETSTAR_H */
Modified: linux-libc-headers/trunk/include/asm-arm/arch-omap/board-osk.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-omap/board-osk.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-omap/board-osk.h Tue Jul 5 22:58:33 2005
@@ -21,8 +21,8 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
@@ -30,9 +30,7 @@
#define __ASM_ARCH_OMAP_OSK_H
/* At OMAP5912 OSK the Ethernet is directly connected to CS1 */
-#define OMAP_OSK_ETHR_BASE 0xE8800000
-#define OMAP_OSK_ETHR_SIZE SZ_4K
-#define OMAP_OSK_ETHR_START 0x04800000
+#define OMAP_OSK_ETHR_START 0x04800300
/* Micron NOR flash at CS3 mapped to address 0x0 if BM bit is 1 */
#define OMAP_OSK_NOR_FLASH_BASE 0xD8000000
Added: linux-libc-headers/trunk/include/asm-arm/arch-omap/board-voiceblue.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/asm-arm/arch-omap/board-voiceblue.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2004 2N Telekomunikace, Ladislav Michl <michl at 2n.cz>
+ *
+ * Hardware definitions for OMAP5910 based VoiceBlue board.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARCH_VOICEBLUE_H
+#define __ASM_ARCH_VOICEBLUE_H
+
+#if (EXTERNAL_MAX_NR_PORTS < 4)
+#undef EXTERNAL_MAX_NR_PORTS
+#define EXTERNAL_MAX_NR_PORTS 4
+#endif
+
+extern void voiceblue_wdt_enable(void);
+extern void voiceblue_wdt_disable(void);
+extern void voiceblue_wdt_ping(void);
+extern void voiceblue_reset(void);
+
+#endif /* __ASM_ARCH_VOICEBLUE_H */
+
Modified: linux-libc-headers/trunk/include/asm-arm/arch-omap/fpga.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-omap/fpga.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-omap/fpga.h Tue Jul 5 22:58:33 2005
@@ -38,8 +38,7 @@
#define H2P2_DBG_FPGA_SIZE SZ_4K /* SIZE */
#define H2P2_DBG_FPGA_START 0x04000000 /* PA */
-#define H2P2_DBG_FPGA_ETHR_START H2P2_DBG_FPGA_START
-#define H2P2_DBG_FPGA_ETHR_BASE H2P2_DBG_FPGA_BASE
+#define H2P2_DBG_FPGA_ETHR_START (H2P2_DBG_FPGA_START + 0x300)
#define H2P2_DBG_FPGA_FPGA_REV (H2P2_DBG_FPGA_BASE + 0x10) /* FPGA Revision */
#define H2P2_DBG_FPGA_BOARD_REV (H2P2_DBG_FPGA_BASE + 0x12) /* Board Revision */
#define H2P2_DBG_FPGA_GPIO (H2P2_DBG_FPGA_BASE + 0x14) /* GPIO outputs */
@@ -48,12 +47,31 @@
#define H2P2_DBG_FPGA_LAN_STATUS (H2P2_DBG_FPGA_BASE + 0x1A) /* LAN Status line */
#define H2P2_DBG_FPGA_LAN_RESET (H2P2_DBG_FPGA_BASE + 0x1C) /* LAN Reset line */
-/* LEDs definition on debug board (16 LEDs) */
-#define H2P2_DBG_FPGA_LED_CLAIMRELEASE (1 << 15)
-#define H2P2_DBG_FPGA_LED_STARTSTOP (1 << 14)
-#define H2P2_DBG_FPGA_LED_HALTED (1 << 13)
-#define H2P2_DBG_FPGA_LED_IDLE (1 << 12)
-#define H2P2_DBG_FPGA_LED_TIMER (1 << 11)
+/* NOTE: most boards don't have a static mapping for the FPGA ... */
+struct h2p2_dbg_fpga {
+ /* offset 0x00 */
+ __u16 smc91x[8];
+ /* offset 0x10 */
+ __u16 fpga_rev;
+ __u16 board_rev;
+ __u16 gpio_outputs;
+ __u16 leds;
+ /* offset 0x18 */
+ __u16 misc_inputs;
+ __u16 lan_status;
+ __u16 lan_reset;
+ __u16 reserved0;
+ /* offset 0x20 */
+ __u16 ps2_data;
+ __u16 ps2_ctrl;
+ /* plus also 4 rs232 ports ... */
+};
+
+/* LEDs definition on debug board (16 LEDs, all physically green) */
+#define H2P2_DBG_FPGA_LED_GREEN (1 << 15)
+#define H2P2_DBG_FPGA_LED_AMBER (1 << 14)
+#define H2P2_DBG_FPGA_LED_RED (1 << 13)
+#define H2P2_DBG_FPGA_LED_BLUE (1 << 12)
/* cpu0 load-meter LEDs */
#define H2P2_DBG_FPGA_LOAD_METER (1 << 0) // A bit of fun on our board ...
#define H2P2_DBG_FPGA_LOAD_METER_SIZE 11
@@ -116,7 +134,6 @@
#define INNOVATOR_FPGA_IMR2 (OMAP1510_FPGA_BASE + 0x210)
#define OMAP1510_FPGA_ETHR_START (OMAP1510_FPGA_START + 0x300)
-#define OMAP1510_FPGA_ETHR_BASE (OMAP1510_FPGA_BASE + 0x300)
/*
* Power up Giga UART driver, turn on HID clock.
Modified: linux-libc-headers/trunk/include/asm-arm/arch-omap/hardware.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-omap/hardware.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-omap/hardware.h Tue Jul 5 22:58:33 2005
@@ -88,58 +88,31 @@
#define ULPD_REG_BASE (0xfffe0800)
#define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14)
#define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30)
+# define DIS_USB_PVCI_CLK (1 << 5) /* no USB/FAC synch */
+# define USB_MCLK_EN (1 << 4) /* enable W4_USB_CLKO */
#define ULPD_SOFT_REQ (ULPD_REG_BASE + 0x34)
+# define SOFT_UDC_REQ (1 << 4)
+# define SOFT_USB_CLK_REQ (1 << 3)
+# define SOFT_DPLL_REQ (1 << 0)
#define ULPD_DPLL_CTRL (ULPD_REG_BASE + 0x3c)
#define ULPD_STATUS_REQ (ULPD_REG_BASE + 0x40)
#define ULPD_APLL_CTRL (ULPD_REG_BASE + 0x4c)
#define ULPD_POWER_CTRL (ULPD_REG_BASE + 0x50)
+#define ULPD_SOFT_DISABLE_REQ_REG (ULPD_REG_BASE + 0x68)
+# define DIS_MMC2_DPLL_REQ (1 << 11)
+# define DIS_MMC1_DPLL_REQ (1 << 10)
+# define DIS_UART3_DPLL_REQ (1 << 9)
+# define DIS_UART2_DPLL_REQ (1 << 8)
+# define DIS_UART1_DPLL_REQ (1 << 7)
+# define DIS_USB_HOST_DPLL_REQ (1 << 6)
+#define ULPD_SDW_CLK_DIV_CTRL_SEL (ULPD_REG_BASE + 0x74)
#define ULPD_CAM_CLK_CTRL (ULPD_REG_BASE + 0x7c)
/*
* ---------------------------------------------------------------------------
- * Timers
+ * Watchdog timer
* ---------------------------------------------------------------------------
*/
-#define OMAP_32kHz_TIMER_BASE 0xfffb9000
-
-/* 32k Timer Registers */
-#define TIMER32k_CR 0x08
-#define TIMER32k_TVR 0x00
-#define TIMER32k_TCR 0x04
-
-/* 32k Timer Control Register definition */
-#define TIMER32k_TSS (1<<0)
-#define TIMER32k_TRB (1<<1)
-#define TIMER32k_INT (1<<2)
-#define TIMER32k_ARL (1<<3)
-
-/* MPU Timer base addresses */
-#define OMAP_TIMER1_BASE (0xfffec500)
-#define OMAP_TIMER2_BASE (0xfffec600)
-#define OMAP_TIMER3_BASE (0xfffec700)
-#define OMAP_MPUTIMER_BASE OMAP_TIMER1_BASE
-#define OMAP_MPUTIMER_OFFSET 0x100
-
-/* MPU Timer Registers */
-#define OMAP_TIMER1_CNTL (OMAP_TIMER_BASE1 + 0x0)
-#define OMAP_TIMER1_LOAD_TIM (OMAP_TIMER_BASE1 + 0x4)
-#define OMAP_TIMER1_READ_TIM (OMAP_TIMER_BASE1 + 0x8)
-
-#define OMAP_TIMER2_CNTL (OMAP_TIMER_BASE2 + 0x0)
-#define OMAP_TIMER2_LOAD_TIM (OMAP_TIMER_BASE2 + 0x4)
-#define OMAP_TIMER2_READ_TIM (OMAP_TIMER_BASE2 + 0x8)
-
-#define OMAP_TIMER3_CNTL (OMAP_TIMER_BASE3 + 0x0)
-#define OMAP_TIMER3_LOAD_TIM (OMAP_TIMER_BASE3 + 0x4)
-#define OMAP_TIMER3_READ_TIM (OMAP_TIMER_BASE3 + 0x8)
-
-/* CNTL_TIMER register bits */
-#define MPUTIM_FREE (1<<6)
-#define MPUTIM_CLOCK_ENABLE (1<<5)
-#define MPUTIM_PTV_MASK (0x7<<MPUTIM_PTV_BIT)
-#define MPUTIM_PTV_BIT 2
-#define MPUTIM_AR (1<<1)
-#define MPUTIM_ST (1<<0)
/* Watchdog timer within the OMAP3.2 gigacell */
#define OMAP_MPU_WATCHDOG_BASE (0xfffec800)
@@ -182,29 +155,6 @@
#define IRQ_GMR_REG_OFFSET 0xa0
/*
- * ---------------------------------------------------------------------------
- * Traffic controller memory interface
- * ---------------------------------------------------------------------------
- */
-#define TCMIF_BASE 0xfffecc00
-#define IMIF_PRIO (TCMIF_BASE + 0x00)
-#define EMIFS_PRIO (TCMIF_BASE + 0x04)
-#define EMIFF_PRIO (TCMIF_BASE + 0x08)
-#define EMIFS_CONFIG (TCMIF_BASE + 0x0c)
-#define EMIFS_CS0_CONFIG (TCMIF_BASE + 0x10)
-#define EMIFS_CS1_CONFIG (TCMIF_BASE + 0x14)
-#define EMIFS_CS2_CONFIG (TCMIF_BASE + 0x18)
-#define EMIFS_CS3_CONFIG (TCMIF_BASE + 0x1c)
-#define EMIFF_SDRAM_CONFIG (TCMIF_BASE + 0x20)
-#define EMIFF_MRS (TCMIF_BASE + 0x24)
-#define TC_TIMEOUT1 (TCMIF_BASE + 0x28)
-#define TC_TIMEOUT2 (TCMIF_BASE + 0x2c)
-#define TC_TIMEOUT3 (TCMIF_BASE + 0x30)
-#define TC_ENDIANISM (TCMIF_BASE + 0x34)
-#define EMIFF_SDRAM_CONFIG_2 (TCMIF_BASE + 0x3c)
-#define EMIF_CFG_DYNAMIC_WS (TCMIF_BASE + 0x40)
-
-/*
* ----------------------------------------------------------------------------
* System control registers
* ----------------------------------------------------------------------------
@@ -278,6 +228,18 @@
#define MPUI_DSP_BOOT_CONFIG (MPUI_BASE + 0x18)
#define MPUI_DSP_API_CONFIG (MPUI_BASE + 0x1c)
+/*
+ * ----------------------------------------------------------------------------
+ * LED Pulse Generator
+ * ----------------------------------------------------------------------------
+ */
+#define OMAP_LPG1_BASE 0xfffbd000
+#define OMAP_LPG2_BASE 0xfffbd800
+#define OMAP_LPG1_LCR (OMAP_LPG1_BASE + 0x00)
+#define OMAP_LPG1_PMR (OMAP_LPG1_BASE + 0x04)
+#define OMAP_LPG2_LCR (OMAP_LPG2_BASE + 0x00)
+#define OMAP_LPG2_PMR (OMAP_LPG2_BASE + 0x04)
+
#ifndef __ASSEMBLER__
/*
@@ -292,12 +254,12 @@
#define OMAP1510_BASE_BAUD (12000000/16)
#define OMAP16XX_BASE_BAUD (48000000/16)
-#define is_omap_port(p) ({int __ret = 0; \
- if (p == (char*)IO_ADDRESS(OMAP_UART1_BASE) || \
- p == (char*)IO_ADDRESS(OMAP_UART2_BASE) || \
- p == (char*)IO_ADDRESS(OMAP_UART3_BASE)) \
- __ret = 1; \
- __ret; \
+#define is_omap_port(p) ({int __ret = 0; \
+ if (p == IO_ADDRESS(OMAP_UART1_BASE) || \
+ p == IO_ADDRESS(OMAP_UART2_BASE) || \
+ p == IO_ADDRESS(OMAP_UART3_BASE)) \
+ __ret = 1; \
+ __ret; \
})
/*
@@ -348,6 +310,14 @@
#include "board-osk.h"
#endif
+#ifdef CONFIG_MACH_VOICEBLUE
+#include "board-voiceblue.h"
+#endif
+
+#ifdef CONFIG_MACH_NETSTAR
+#include "board-netstar.h"
+#endif
+
#endif /* !__ASSEMBLER__ */
#endif /* __ASM_ARCH_OMAP_HARDWARE_H */
Modified: linux-libc-headers/trunk/include/asm-arm/arch-omap/irqs.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-omap/irqs.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-omap/irqs.h Tue Jul 5 22:58:33 2005
@@ -149,9 +149,16 @@
#define INT_1610_McBSP2RX_OF (31 + IH2_BASE)
#define INT_1610_STI (32 + IH2_BASE)
#define INT_1610_STI_WAKEUP (33 + IH2_BASE)
+#define INT_1610_GPTIMER3 (34 + IH2_BASE)
+#define INT_1610_GPTIMER4 (35 + IH2_BASE)
+#define INT_1610_GPTIMER5 (36 + IH2_BASE)
+#define INT_1610_GPTIMER6 (37 + IH2_BASE)
+#define INT_1610_GPTIMER7 (38 + IH2_BASE)
+#define INT_1610_GPTIMER8 (39 + IH2_BASE)
#define INT_1610_GPIO_BANK2 (40 + IH2_BASE)
#define INT_1610_GPIO_BANK3 (41 + IH2_BASE)
#define INT_1610_MMC2 (42 + IH2_BASE)
+#define INT_1610_CF (43 + IH2_BASE)
#define INT_1610_GPIO_BANK4 (48 + IH2_BASE)
#define INT_1610_SPI (49 + IH2_BASE)
#define INT_1610_DMA_CH6 (53 + IH2_BASE)
Modified: linux-libc-headers/trunk/include/asm-arm/arch-omap/mcbsp.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-omap/mcbsp.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-omap/mcbsp.h Tue Jul 5 22:58:33 2005
@@ -250,4 +250,8 @@
/* SPI specific API */
void omap_mcbsp_set_spi_mode(unsigned int id, const struct omap_mcbsp_spi_cfg * spi_cfg);
+/* Polled read/write functions */
+int omap_mcbsp_pollread(unsigned int id, __u16 * buf);
+int omap_mcbsp_pollwrite(unsigned int id, __u16 buf);
+
#endif
Modified: linux-libc-headers/trunk/include/asm-arm/arch-omap/memory.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-omap/memory.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-omap/memory.h Tue Jul 5 22:58:33 2005
@@ -25,8 +25,8 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
Modified: linux-libc-headers/trunk/include/asm-arm/arch-omap/mux.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-omap/mux.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-omap/mux.h Tue Jul 5 22:58:33 2005
@@ -174,6 +174,7 @@
M14_1510_GPIO2,
/* OMAP1610 GPIO */
+ P18_1610_GPIO3,
Y15_1610_GPIO17,
/* OMAP-1710 GPIO */
@@ -239,6 +240,7 @@
V5_1610_GPIO24,
AA20_1610_GPIO_41,
W19_1610_GPIO48,
+ M7_1610_GPIO62,
/* OMAP-1610 uWire */
V19_1610_UWIRE_SCLK,
@@ -316,6 +318,12 @@
R10_1610_MCLK_ON,
R10_1610_MCLK_OFF,
+ /* CompactFlash controller */
+ P11_1610_CF_CD2,
+ R11_1610_CF_IOIS16,
+ V10_1610_CF_IREQ,
+ W10_1610_CF_RESET,
+ W11_1610_CF_CD1,
} reg_cfg_t;
#if defined(__MUX_C__) && defined(CONFIG_OMAP_MUX)
@@ -355,7 +363,8 @@
/* USB internal master generic */
MUX_CFG("R18_USB_VBUS", 7, 9, 2, 1, 11, 0, NA, 0, 1)
MUX_CFG("R18_1510_USB_GPIO0", 7, 9, 0, 1, 11, 1, NA, 0, 1)
-MUX_CFG("W4_USB_PUEN", D, 3, 0, 3, 5, 1, NA, 0, 1)
+/* works around erratum: W4_USB_PUEN and W4_USB_PUDIS are switched! */
+MUX_CFG("W4_USB_PUEN", D, 3, 3, 3, 5, 1, NA, 0, 1)
MUX_CFG("W4_USB_CLKO", D, 3, 1, 3, 5, 0, NA, 0, 1)
MUX_CFG("W4_USB_HIGHZ", D, 3, 4, 3, 5, 0, 3, 0, 1)
MUX_CFG("W4_GPIO58", D, 3, 7, 3, 5, 0, 3, 0, 1)
@@ -388,6 +397,7 @@
MUX_CFG("M14_1510_GPIO2", 7, 3, 0, 1, 9, 1, 0, 0, 1)
/* OMAP1610 GPIO */
+MUX_CFG("P18_1610_GPIO3", 7, 0, 0, 1, 8, 0, NA, 0, 1)
MUX_CFG("Y15_1610_GPIO17", A, 0, 7, 2, 6, 0, NA, 0, 1)
/* OMAP-1710 GPIO */
@@ -454,6 +464,7 @@
MUX_CFG("V5_1610_GPIO24", B, 15, 7, 2, 21, 0, 2, 1, 1)
MUX_CFG("AA20_1610_GPIO_41", 9, 9, 7, 1, 31, 0, 1, 1, 1)
MUX_CFG("W19_1610_GPIO48", 8, 15, 7, 1, 23, 1, 1, 0, 1)
+MUX_CFG("M7_1610_GPIO62", 10, 0, 0, 4, 24, 0, 4, 0, 1)
/* OMAP-1610 uWire */
MUX_CFG("V19_1610_UWIRE_SCLK", 8, 6, 0, 1, 20, 0, 1, 1, 1)
@@ -528,6 +539,13 @@
MUX_CFG("V5_1710_MCLK_OFF", B, 15, 6, NA, 0, 0, NA, 0, 0)
MUX_CFG("R10_1610_MCLK_ON", B, 18, 0, NA, 22, 0, NA, 1, 0)
MUX_CFG("R10_1610_MCLK_OFF", B, 18, 6, 2, 22, 1, 2, 1, 1)
+
+/* CompactFlash controller, conflicts with MMC1 */
+MUX_CFG("P11_1610_CF_CD2", A, 27, 3, 2, 15, 1, 2, 1, 1)
+MUX_CFG("R11_1610_CF_IOIS16", B, 0, 3, 2, 16, 1, 2, 1, 1)
+MUX_CFG("V10_1610_CF_IREQ", A, 24, 3, 2, 14, 0, 2, 0, 1)
+MUX_CFG("W10_1610_CF_RESET", A, 18, 3, 2, 12, 1, 2, 1, 1)
+MUX_CFG("W11_1610_CF_CD1", 10, 15, 3, 3, 8, 1, 3, 1, 1)
};
#endif /* __MUX_C__ */
Modified: linux-libc-headers/trunk/include/asm-arm/arch-omap/vmalloc.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-omap/vmalloc.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-omap/vmalloc.h Tue Jul 5 22:58:33 2005
@@ -17,17 +17,5 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
-
-/*
- * Just any arbitrary offset to the start of the vmalloc VM area: the
- * current 8MB value just means that there will be a 8MB "hole" after the
- * physical memory until the kernel virtual memory starts. That means that
- * any out-of-bounds memory accesses will hopefully be caught.
- * The vmalloc() routines leaves a hole of 4kB between each vmalloced
- * area for the same reason. ;)
- */
-#define VMALLOC_OFFSET (8*1024*1024)
-#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
-#define VMALLOC_VMADDR(x) ((unsigned long)(x))
#define VMALLOC_END (PAGE_OFFSET + 0x10000000)
Modified: linux-libc-headers/trunk/include/asm-arm/arch-pxa/corgi.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-pxa/corgi.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-pxa/corgi.h Tue Jul 5 22:58:33 2005
@@ -100,39 +100,9 @@
/*
- * Corgi Parameter Area Definitions
+ * Shared data structures
*/
-#define FLASH_MEM_BASE 0xa0000a00
-#define FLASH_MAGIC_CHG(a,b,c,d) ( ( d << 24 ) | ( c << 16 ) | ( b << 8 ) | a )
-
-#define FLASH_COMADJ_MAJIC FLASH_MAGIC_CHG('C','M','A','D')
-#define FLASH_COMADJ_MAGIC_ADR 0x00
-#define FLASH_COMADJ_DATA_ADR 0x04
-
-#define FLASH_PHAD_MAJIC FLASH_MAGIC_CHG('P','H','A','D')
-#define FLASH_PHAD_MAGIC_ADR 0x38
-#define FLASH_PHAD_DATA_ADR 0x3C
-
-struct sharpsl_flash_param_info {
- unsigned int comadj_keyword;
- unsigned int comadj;
-
- unsigned int uuid_keyword;
- unsigned char uuid[16];
-
- unsigned int touch_keyword;
- unsigned int touch1;
- unsigned int touch2;
- unsigned int touch3;
- unsigned int touch4;
-
- unsigned int adadj_keyword;
- unsigned int adadj;
-
- unsigned int phad_keyword;
- unsigned int phadadj;
-};
-
+extern struct platform_device corgiscoop_device;
/*
* External Functions
Modified: linux-libc-headers/trunk/include/asm-arm/arch-pxa/idp.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-pxa/idp.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-pxa/idp.h Tue Jul 5 22:58:33 2005
@@ -10,19 +10,19 @@
* 2001-09-13: Cliff Brake <cbrake at accelent.com>
* Initial code
*
+ * 2005-02-15: Cliff Brake <cliff.brake at gmail.com>
+ * <http://www.vibren.com> <http://bec-systems.com>
+ * Changes for 2.6 kernel.
*/
/*
* Note: this file must be safe to include in assembly files
+ *
+ * Support for the Vibren PXA255 IDP requires rev04 or later
+ * IDP hardware.
*/
-/* comment out following if you have a rev01 board */
-#define PXA_IDP_REV02 1
-
-#ifdef PXA_IDP_REV02
-//Use this as well for 0017-x004 and greater pcb's:
-#define PXA_IDP_REV04 1
#define IDP_FLASH_PHYS (PXA_CS0_PHYS)
#define IDP_ALT_FLASH_PHYS (PXA_CS1_PHYS)
@@ -37,26 +37,18 @@
* virtual memory map
*/
-#define IDP_IDE_BASE (0xf0000000)
-#define IDP_IDE_SIZE (1*1024*1024)
-#define IDE_REG_STRIDE 4
-
-#define IDP_ETH_BASE (IDP_IDE_BASE + IDP_IDE_SIZE)
-#define IDP_ETH_SIZE (1*1024*1024)
-#define ETH_BASE IDP_ETH_BASE //smc9194 driver compatibility issue
-
-#define IDP_COREVOLT_BASE (IDP_ETH_BASE + IDP_ETH_SIZE)
+#define IDP_COREVOLT_VIRT (0xf0000000)
#define IDP_COREVOLT_SIZE (1*1024*1024)
-#define IDP_CPLD_BASE (IDP_COREVOLT_BASE + IDP_COREVOLT_SIZE)
+#define IDP_CPLD_VIRT (IDP_COREVOLT_VIRT + IDP_COREVOLT_SIZE)
#define IDP_CPLD_SIZE (1*1024*1024)
-#if (IDP_CPLD_BASE + IDP_CPLD_SIZE) > 0xfc000000
+#if (IDP_CPLD_VIRT + IDP_CPLD_SIZE) > 0xfc000000
#error Your custom IO space is getting a bit large !!
#endif
-#define CPLD_P2V(x) ((x) - IDP_CPLD_PHYS + IDP_CPLD_BASE)
-#define CPLD_V2P(x) ((x) - IDP_CPLD_BASE + IDP_CPLD_PHYS)
+#define CPLD_P2V(x) ((x) - IDP_CPLD_PHYS + IDP_CPLD_VIRT)
+#define CPLD_V2P(x) ((x) - IDP_CPLD_VIRT + IDP_CPLD_PHYS)
#ifndef __ASSEMBLY__
# define __CPLD_REG(x) (*((volatile unsigned long *)CPLD_P2V(x)))
@@ -64,7 +56,7 @@
# define __CPLD_REG(x) CPLD_P2V(x)
#endif
-/* board level registers in the CPLD: (offsets from CPLD_BASE) */
+/* board level registers in the CPLD: (offsets from CPLD_VIRT) */
#define _IDP_CPLD_REV (IDP_CPLD_PHYS + 0x00)
#define _IDP_CPLD_PERIPH_PWR (IDP_CPLD_PHYS + 0x04)
@@ -141,32 +133,10 @@
#define PCC_DETECT(x) (GPLR(7 + (x)) & GPIO_bit(7 + (x)))
-/*
- * Macros for LCD Driver
- */
-
-#ifdef CONFIG_FB_PXA
-
-#define FB_BACKLIGHT_ON() (IDP_CPLD_LCD |= (1<<1))
-#define FB_BACKLIGHT_OFF() (IDP_CPLD_LCD &= ~(1<<1))
-
-#define FB_PWR_ON() (IDP_CPLD_LCD |= (1<< 0))
-#define FB_PWR_OFF() (IDP_CPLD_LCD &= ~(1<<0))
-
-#define FB_VLCD_ON() (IDP_CPLD_LCD |= (1<<2))
-#define FB_VLCD_OFF() (IDP_CPLD_LCD &= ~(1<<2))
-
-#endif
-
/* A listing of interrupts used by external hardware devices */
-#ifdef PXA_IDP_REV04
#define TOUCH_PANEL_IRQ IRQ_GPIO(5)
#define IDE_IRQ IRQ_GPIO(21)
-#else
-#define TOUCH_PANEL_IRQ IRQ_GPIO(21)
-#define IDE_IRQ IRQ_GPIO(5)
-#endif
#define TOUCH_PANEL_IRQ_EDGE IRQT_FALLING
@@ -195,8 +165,6 @@
#define IDP_LEDS_MASK (IDP_HB_LED | IDP_BUSY_LED)
-#define IDP_WRITE_LEDS(value) (IDP_CPLD_LED_CONTROL = (IDP_CPLD_LED_CONTROL & (~(IDP_LEDS_MASK)) | value))
-
/*
* macros for MTD driver
*/
@@ -228,238 +196,4 @@
inputs = (IDP_CPLD_KB_ROW & 0x7f);\
}
-#else
-
-/*
- * following is for rev01 boards only
- */
-
-#define IDP_FLASH_PHYS (PXA_CS0_PHYS)
-#define IDP_ALT_FLASH_PHYS (PXA_CS1_PHYS)
-#define IDP_MEDIAQ_PHYS (PXA_CS3_PHYS)
-#define IDP_CTRL_PORT_PHYS (PXA_CS5_PHYS + 0x02C00000)
-#define IDP_IDE_PHYS (PXA_CS5_PHYS + 0x03000000)
-#define IDP_ETH_PHYS (PXA_CS5_PHYS + 0x03400000)
-#define IDP_COREVOLT_PHYS (PXA_CS5_PHYS + 0x03800000)
-#define IDP_CPLD_PHYS (PXA_CS5_PHYS + 0x03C00000)
-
-
-/*
- * virtual memory map
- */
-
-#define IDP_CTRL_PORT_BASE (0xf0000000)
-#define IDP_CTRL_PORT_SIZE (1*1024*1024)
-
-#define IDP_IDE_BASE (IDP_CTRL_PORT_BASE + IDP_CTRL_PORT_SIZE)
-#define IDP_IDE_SIZE (1*1024*1024)
-#define IDP_ETH_BASE (IDP_IDE_BASE + IDP_IDE_SIZE)
-#define IDP_ETH_SIZE (1*1024*1024)
-
-#define IDP_COREVOLT_BASE (IDP_ETH_BASE + IDP_ETH_SIZE)
-#define IDP_COREVOLT_SIZE (1*1024*1024)
-
-#define IDP_CPLD_BASE (IDP_COREVOLT_BASE + IDP_COREVOLT_SIZE)
-#define IDP_CPLD_SIZE (1*1024*1024)
-
-#if (IDP_CPLD_BASE + IDP_CPLD_SIZE) > 0xfc000000
-#error Your custom IO space is getting a bit large !!
-#endif
-
-#define CPLD_P2V(x) ((x) - IDP_CPLD_PHYS + IDP_CPLD_BASE)
-#define CPLD_V2P(x) ((x) - IDP_CPLD_BASE + IDP_CPLD_PHYS)
-
-#ifndef __ASSEMBLY__
-# define __CPLD_REG(x) (*((volatile unsigned long *)CPLD_P2V(x)))
-#else
-# define __CPLD_REG(x) CPLD_P2V(x)
-#endif
-
-/* board level registers in the CPLD: (offsets from CPLD_BASE) */
-
-#define _IDP_CPLD_LED_CONTROL (IDP_CPLD_PHYS + 0x00)
-#define _IDP_CPLD_PERIPH_PWR (IDP_CPLD_PHYS + 0x04)
-#define _IDP_CPLD_CIR (IDP_CPLD_PHYS + 0x08)
-#define _IDP_CPLD_KB_COL_HIGH (IDP_CPLD_PHYS + 0x0C)
-#define _IDP_CPLD_KB_COL_LOW (IDP_CPLD_PHYS + 0x10)
-#define _IDP_CPLD_PCCARD_EN (IDP_CPLD_PHYS + 0x14)
-#define _IDP_CPLD_GPIOH_DIR (IDP_CPLD_PHYS + 0x18)
-#define _IDP_CPLD_GPIOH_VALUE (IDP_CPLD_PHYS + 0x1C)
-#define _IDP_CPLD_GPIOL_DIR (IDP_CPLD_PHYS + 0x20)
-#define _IDP_CPLD_GPIOL_VALUE (IDP_CPLD_PHYS + 0x24)
-#define _IDP_CPLD_MISC (IDP_CPLD_PHYS + 0x28)
-#define _IDP_CPLD_PCCARD0_STATUS (IDP_CPLD_PHYS + 0x2C)
-#define _IDP_CPLD_PCCARD1_STATUS (IDP_CPLD_PHYS + 0x30)
-
-/* FPGA register virtual addresses */
-#define IDP_CPLD_LED_CONTROL __CPLD_REG(_IDP_CPLD_LED_CONTROL) /* write only */
-#define IDP_CPLD_PERIPH_PWR __CPLD_REG(_IDP_CPLD_PERIPH_PWR) /* write only */
-#define IDP_CPLD_CIR __CPLD_REG(_IDP_CPLD_CIR) /* write only */
-#define IDP_CPLD_KB_COL_HIGH __CPLD_REG(_IDP_CPLD_KB_COL_HIGH) /* write only */
-#define IDP_CPLD_KB_COL_LOW __CPLD_REG(_IDP_CPLD_KB_COL_LOW) /* write only */
-#define IDP_CPLD_PCCARD_EN __CPLD_REG(_IDP_CPLD_PCCARD_EN) /* write only */
-#define IDP_CPLD_GPIOH_DIR __CPLD_REG(_IDP_CPLD_GPIOH_DIR) /* write only */
-#define IDP_CPLD_GPIOH_VALUE __CPLD_REG(_IDP_CPLD_GPIOH_VALUE) /* write only */
-#define IDP_CPLD_GPIOL_DIR __CPLD_REG(_IDP_CPLD_GPIOL_DIR) /* write only */
-#define IDP_CPLD_GPIOL_VALUE __CPLD_REG(_IDP_CPLD_GPIOL_VALUE) /* write only */
-#define IDP_CPLD_MISC __CPLD_REG(_IDP_CPLD_MISC) /* read only */
-#define IDP_CPLD_PCCARD0_STATUS __CPLD_REG(_IDP_CPLD_PCCARD0_STATUS) /* read only */
-#define IDP_CPLD_PCCARD1_STATUS __CPLD_REG(_IDP_CPLD_PCCARD1_STATUS) /* read only */
-
-
-#ifndef __ASSEMBLY__
-
-/* shadow registers for write only registers */
-extern unsigned int idp_cpld_led_control_shadow;
-extern unsigned int idp_cpld_periph_pwr_shadow;
-extern unsigned int idp_cpld_cir_shadow;
-extern unsigned int idp_cpld_kb_col_high_shadow;
-extern unsigned int idp_cpld_kb_col_low_shadow;
-extern unsigned int idp_cpld_pccard_en_shadow;
-extern unsigned int idp_cpld_gpioh_dir_shadow;
-extern unsigned int idp_cpld_gpioh_value_shadow;
-extern unsigned int idp_cpld_gpiol_dir_shadow;
-extern unsigned int idp_cpld_gpiol_value_shadow;
-
-extern unsigned int idp_control_port_shadow;
-
-/*
- * macros to write to write only register
- *
- * none of these macros are protected from
- * multiple drivers using them in interrupt context.
- */
-
-#define WRITE_IDP_CPLD_LED_CONTROL(value, mask) \
-{\
- idp_cpld_led_control_shadow = (((value & mask) | (idp_cpld_led_control_shadow & ~mask)));\
- IDP_CPLD_LED_CONTROL = idp_cpld_led_control_shadow;\
-}
-#define WRITE_IDP_CPLD_PERIPH_PWR(value, mask) \
-{\
- idp_cpld_periph_pwr_shadow = ((value & mask) | (idp_cpld_periph_pwr_shadow & ~mask));\
- IDP_CPLD_PERIPH_PWR = idp_cpld_periph_pwr_shadow;\
-}
-#define WRITE_IDP_CPLD_CIR(value, mask) \
-{\
- idp_cpld_cir_shadow = ((value & mask) | (idp_cpld_cir_shadow & ~mask));\
- IDP_CPLD_CIR = idp_cpld_cir_shadow;\
-}
-#define WRITE_IDP_CPLD_KB_COL_HIGH(value, mask) \
-{\
- idp_cpld_kb_col_high_shadow = ((value & mask) | (idp_cpld_kb_col_high_shadow & ~mask));\
- IDP_CPLD_KB_COL_HIGH = idp_cpld_kb_col_high_shadow;\
-}
-#define WRITE_IDP_CPLD_KB_COL_LOW(value, mask) \
-{\
- idp_cpld_kb_col_low_shadow = ((value & mask) | (idp_cpld_kb_col_low_shadow & ~mask));\
- IDP_CPLD_KB_COL_LOW = idp_cpld_kb_col_low_shadow;\
-}
-#define WRITE_IDP_CPLD_PCCARD_EN(value, mask) \
-{\
- idp_cpld_ = ((value & mask) | (idp_cpld_led_control_shadow & ~mask));\
- IDP_CPLD_LED_CONTROL = idp_cpld_led_control_shadow;\
-}
-#define WRITE_IDP_CPLD_GPIOH_DIR(value, mask) \
-{\
- idp_cpld_gpioh_dir_shadow = ((value & mask) | (idp_cpld_gpioh_dir_shadow & ~mask));\
- IDP_CPLD_GPIOH_DIR = idp_cpld_gpioh_dir_shadow;\
-}
-#define WRITE_IDP_CPLD_GPIOH_VALUE(value, mask) \
-{\
- idp_cpld_gpioh_value_shadow = ((value & mask) | (idp_cpld_gpioh_value_shadow & ~mask));\
- IDP_CPLD_GPIOH_VALUE = idp_cpld_gpioh_value_shadow;\
-}
-#define WRITE_IDP_CPLD_GPIOL_DIR(value, mask) \
-{\
- idp_cpld_gpiol_dir_shadow = ((value & mask) | (idp_cpld_gpiol_dir_shadow & ~mask));\
- IDP_CPLD_GPIOL_DIR = idp_cpld_gpiol_dir_shadow;\
-}
-#define WRITE_IDP_CPLD_GPIOL_VALUE(value, mask) \
-{\
- idp_cpld_gpiol_value_shadow = ((value & mask) | (idp_cpld_gpiol_value_shadow & ~mask));\
- IDP_CPLD_GPIOL_VALUE = idp_cpld_gpiol_value_shadow;\
-}
-
-#define WRITE_IDP_CONTROL_PORT(value, mask) \
-{\
- idp_control_port_shadow = ((value & mask) | (idp_control_port_shadow & ~mask));\
- (*((volatile unsigned long *)IDP_CTRL_PORT_BASE)) = idp_control_port_shadow;\
-}
-
-#endif
-
-/* A listing of interrupts used by external hardware devices */
-
-#define TOUCH_PANEL_IRQ IRQ_GPIO(21)
-#define TOUCH_PANEL_IRQ_EGDE IRQT_FALLING
-
-#define ETHERNET_IRQ IRQ_GPIO(4)
-#define ETHERNET_IRQ_EDGE IRQT_RISING
-
-/*
- * Bit masks for various registers
- */
-
-
-/* control port */
-#define IDP_CONTROL_PORT_PCSLOT0_0 (1 << 0)
-#define IDP_CONTROL_PORT_PCSLOT0_1 (1 << 1)
-#define IDP_CONTROL_PORT_PCSLOT0_2 (1 << 2)
-#define IDP_CONTROL_PORT_PCSLOT0_3 (1 << 3)
-#define IDP_CONTROL_PORT_PCSLOT1_1 (1 << 4)
-#define IDP_CONTROL_PORT_PCSLOT1_2 (1 << 5)
-#define IDP_CONTROL_PORT_PCSLOT1_3 (1 << 6)
-#define IDP_CONTROL_PORT_PCSLOT1_4 (1 << 7)
-#define IDP_CONTROL_PORT_SERIAL1_EN (1 << 9)
-#define IDP_CONTROL_PORT_SERIAL2_EN (1 << 10)
-#define IDP_CONTROL_PORT_SERIAL3_EN (1 << 11)
-#define IDP_CONTROL_PORT_IRDA_FIR (1 << 12)
-#define IDP_CONTROL_PORT_IRDA_M0 (1 << 13)
-#define IDP_CONTROL_PORT_IRDA_M1 (1 << 14)
-#define IDP_CONTROL_PORT_I2S_PWR (1 << 15)
-#define IDP_CONTROL_PORT_FLASH_WP (1 << 19)
-#define IDP_CONTROL_PORT_MILL_EN (1 << 20)
-#define IDP_CONTROL_PORT_LCD_PWR (1 << 21)
-#define IDP_CONTROL_PORT_LCD_BKLEN (1 << 22)
-#define IDP_CONTROL_PORT_LCD_ENAVLCD (1 << 23)
-
-/*
- * Macros for LCD Driver
- */
-
-#ifdef CONFIG_FB_PXA
-
-#define FB_BACKLIGHT_ON() WRITE_IDP_CONTROL_PORT(IDP_CONTROL_PORT_LCD_BKLEN, IDP_CONTROL_PORT_LCD_BKLEN)
-#define FB_BACKLIGHT_OFF() WRITE_IDP_CONTROL_PORT(0, IDP_CONTROL_PORT_LCD_BKLEN)
-
-#define FB_PWR_ON() WRITE_IDP_CONTROL_PORT(IDP_CONTROL_PORT_LCD_PWR, IDP_CONTROL_PORT_LCD_PWR)
-#define FB_PWR_OFF() WRITE_IDP_CONTROL_PORT(0, IDP_CONTROL_PORT_LCD_PWR)
-
-#define FB_VLCD_ON() WRITE_IDP_CONTROL_PORT(IDP_CONTROL_PORT_LCD_ENAVLCD, IDP_CONTROL_PORT_LCD_ENAVLCD)
-#define FB_VLCD_OFF() WRITE_IDP_CONTROL_PORT(0, IDP_CONTROL_PORT_LCD_ENAVLCD)
-
-#endif
-
-
-/*
- * Macros for LED Driver
- */
-
-/* leds 0 = ON */
-#define IDP_HB_LED 0x1
-#define IDP_BUSY_LED 0x2
-
-#define IDP_LEDS_MASK (IDP_HB_LED | IDP_BUSY_LED)
-
-#define IDP_WRITE_LEDS(value) WRITE_IDP_CPLD_LED_CONTROL(value, IDP_LEDS_MASK)
-
-/*
- * macros for MTD driver
- */
-
-#define FLASH_WRITE_PROTECT_DISABLE() WRITE_IDP_CONTROL_PORT(0, IDP_CONTROL_PORT_FLASH_WP)
-#define FLASH_WRITE_PROTECT_ENABLE() WRITE_IDP_CONTROL_PORT(IDP_CONTROL_PORT_FLASH_WP, IDP_CONTROL_PORT_FLASH_WP)
-
-#endif
Modified: linux-libc-headers/trunk/include/asm-arm/arch-pxa/irqs.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-pxa/irqs.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-pxa/irqs.h Tue Jul 5 22:58:33 2005
@@ -139,14 +139,41 @@
#define IRQ_S0_BVD1_STSCHG (IRQ_BOARD_END + 53)
#define IRQ_S1_BVD1_STSCHG (IRQ_BOARD_END + 54)
+#define IRQ_LOCOMO_START (IRQ_BOARD_END)
+#define IRQ_LOCOMO_KEY (IRQ_BOARD_END + 0)
+#define IRQ_LOCOMO_GPIO0 (IRQ_BOARD_END + 1)
+#define IRQ_LOCOMO_GPIO1 (IRQ_BOARD_END + 2)
+#define IRQ_LOCOMO_GPIO2 (IRQ_BOARD_END + 3)
+#define IRQ_LOCOMO_GPIO3 (IRQ_BOARD_END + 4)
+#define IRQ_LOCOMO_GPIO4 (IRQ_BOARD_END + 5)
+#define IRQ_LOCOMO_GPIO5 (IRQ_BOARD_END + 6)
+#define IRQ_LOCOMO_GPIO6 (IRQ_BOARD_END + 7)
+#define IRQ_LOCOMO_GPIO7 (IRQ_BOARD_END + 8)
+#define IRQ_LOCOMO_GPIO8 (IRQ_BOARD_END + 9)
+#define IRQ_LOCOMO_GPIO9 (IRQ_BOARD_END + 10)
+#define IRQ_LOCOMO_GPIO10 (IRQ_BOARD_END + 11)
+#define IRQ_LOCOMO_GPIO11 (IRQ_BOARD_END + 12)
+#define IRQ_LOCOMO_GPIO12 (IRQ_BOARD_END + 13)
+#define IRQ_LOCOMO_GPIO13 (IRQ_BOARD_END + 14)
+#define IRQ_LOCOMO_GPIO14 (IRQ_BOARD_END + 15)
+#define IRQ_LOCOMO_GPIO15 (IRQ_BOARD_END + 16)
+#define IRQ_LOCOMO_LT (IRQ_BOARD_END + 17)
+#define IRQ_LOCOMO_SPI_RFR (IRQ_BOARD_END + 18)
+#define IRQ_LOCOMO_SPI_RFW (IRQ_BOARD_END + 19)
+#define IRQ_LOCOMO_SPI_OVRN (IRQ_BOARD_END + 20)
+#define IRQ_LOCOMO_SPI_TEND (IRQ_BOARD_END + 21)
+
/*
* Figure out the MAX IRQ number.
*
* If we have an SA1111, the max IRQ is S1_BVD1_STSCHG+1.
+ * If we have an LoCoMo, the max IRQ is IRQ_LOCOMO_SPI_TEND+1
* Otherwise, we have the standard IRQs only.
*/
#ifdef CONFIG_SA1111
#define NR_IRQS (IRQ_S1_BVD1_STSCHG + 1)
+#elif defined(CONFIG_SHARP_LOCOMO)
+#define NR_IRQS (IRQ_LOCOMO_SPI_TEND + 1)
#elif defined(CONFIG_ARCH_LUBBOCK) || \
defined(CONFIG_MACH_MAINSTONE)
#define NR_IRQS (IRQ_BOARD_END)
@@ -184,3 +211,8 @@
#define MAINSTONE_S1_STSCHG_IRQ MAINSTONE_IRQ(14)
#define MAINSTONE_S1_IRQ MAINSTONE_IRQ(15)
+/* LoCoMo Interrupts (CONFIG_SHARP_LOCOMO) */
+#define IRQ_LOCOMO_KEY_BASE (IRQ_BOARD_START + 0)
+#define IRQ_LOCOMO_GPIO_BASE (IRQ_BOARD_START + 1)
+#define IRQ_LOCOMO_LT_BASE (IRQ_BOARD_START + 2)
+#define IRQ_LOCOMO_SPI_BASE (IRQ_BOARD_START + 3)
Added: linux-libc-headers/trunk/include/asm-arm/arch-pxa/poodle.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/asm-arm/arch-pxa/poodle.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,70 @@
+/*
+ * linux/include/asm-arm/arch-pxa/poodle.h
+ *
+ * May be copied or modified under the terms of the GNU General Public
+ * License. See linux/COPYING for more information.
+ *
+ * Based on:
+ * linux/include/asm-arm/arch-sa1100/collie.h
+ *
+ * ChangeLog:
+ * 04-06-2001 Lineo Japan, Inc.
+ * 04-16-2001 SHARP Corporation
+ * Update to 2.6 John Lenz
+ */
+#ifndef __ASM_ARCH_POODLE_H
+#define __ASM_ARCH_POODLE_H 1
+
+/*
+ * GPIOs
+ */
+/* PXA GPIOs */
+#define POODLE_GPIO_ON_KEY (0)
+#define POODLE_GPIO_AC_IN (1)
+#define POODLE_GPIO_CO 16
+#define POODLE_GPIO_TP_INT (5)
+#define POODLE_GPIO_WAKEUP (11) /* change battery */
+#define POODLE_GPIO_GA_INT (10)
+#define POODLE_GPIO_IR_ON (22)
+#define POODLE_GPIO_HP_IN (4)
+#define POODLE_GPIO_CF_IRQ (17)
+#define POODLE_GPIO_CF_CD (14)
+#define POODLE_GPIO_CF_STSCHG (14)
+#define POODLE_GPIO_SD_PWR (33)
+#define POODLE_GPIO_nSD_CLK (6)
+#define POODLE_GPIO_nSD_WP (7)
+#define POODLE_GPIO_nSD_INT (8)
+#define POODLE_GPIO_nSD_DETECT (9)
+#define POODLE_GPIO_MAIN_BAT_LOW (13)
+#define POODLE_GPIO_BAT_COVER (13)
+#define POODLE_GPIO_ADC_TEMP_ON (21)
+#define POODLE_GPIO_BYPASS_ON (36)
+#define POODLE_GPIO_CHRG_ON (38)
+#define POODLE_GPIO_CHRG_FULL (16)
+
+/* PXA GPIOs */
+#define POODLE_IRQ_GPIO_ON_KEY IRQ_GPIO0
+#define POODLE_IRQ_GPIO_AC_IN IRQ_GPIO1
+#define POODLE_IRQ_GPIO_HP_IN IRQ_GPIO4
+#define POODLE_IRQ_GPIO_CO IRQ_GPIO16
+#define POODLE_IRQ_GPIO_TP_INT IRQ_GPIO5
+#define POODLE_IRQ_GPIO_WAKEUP IRQ_GPIO11
+#define POODLE_IRQ_GPIO_GA_INT IRQ_GPIO10
+#define POODLE_IRQ_GPIO_CF_IRQ IRQ_GPIO17
+#define POODLE_IRQ_GPIO_CF_CD IRQ_GPIO14
+#define POODLE_IRQ_GPIO_nSD_INT IRQ_GPIO8
+#define POODLE_IRQ_GPIO_nSD_DETECT IRQ_GPIO9
+#define POODLE_IRQ_GPIO_MAIN_BAT_LOW IRQ_GPIO13
+
+/* SCOOP GPIOs */
+#define POODLE_SCOOP_CHARGE_ON SCOOP_GPCR_PA11
+#define POODLE_SCOOP_CP401 SCOOP_GPCR_PA13
+#define POODLE_SCOOP_VPEN SCOOP_GPCR_PA18
+#define POODLE_SCOOP_L_PCLK SCOOP_GPCR_PA20
+#define POODLE_SCOOP_L_LCLK SCOOP_GPCR_PA21
+#define POODLE_SCOOP_HS_OUT SCOOP_GPCR_PA22
+
+#define POODLE_SCOOP_IO_DIR ( POODLE_SCOOP_VPEN | POODLE_SCOOP_HS_OUT )
+#define POODLE_SCOOP_IO_OUT ( 0 )
+
+#endif /* __ASM_ARCH_POODLE_H */
Modified: linux-libc-headers/trunk/include/asm-arm/arch-pxa/pxa-regs.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-pxa/pxa-regs.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-pxa/pxa-regs.h Tue Jul 5 22:58:33 2005
@@ -1295,6 +1295,7 @@
#define GPIO111_MMCDAT3 111 /* MMC DAT3 (PXA27x) */
#define GPIO111_MMCCS1 111 /* MMC Chip Select 1 (PXA27x) */
#define GPIO112_MMCCMD 112 /* MMC CMD (PXA27x) */
+#define GPIO113_I2S_SYSCLK 113 /* I2S System Clock (PXA27x) */
#define GPIO113_AC97_RESET_N 113 /* AC97 NRESET on (PXA27x) */
/* GPIO alternate function mode & direction */
@@ -1427,6 +1428,7 @@
#define GPIO111_MMCDAT3_MD (111 | GPIO_ALT_FN_1_OUT)
#define GPIO110_MMCCS1_MD (111 | GPIO_ALT_FN_1_OUT)
#define GPIO112_MMCCMD_MD (112 | GPIO_ALT_FN_1_OUT)
+#define GPIO113_I2S_SYSCLK_MD (113 | GPIO_ALT_FN_1_OUT)
#define GPIO113_AC97_RESET_N_MD (113 | GPIO_ALT_FN_2_OUT)
#define GPIO117_I2CSCL_MD (117 | GPIO_ALT_FN_1_OUT)
#define GPIO118_I2CSDA_MD (118 | GPIO_ALT_FN_1_IN)
Modified: linux-libc-headers/trunk/include/asm-arm/arch-pxa/vmalloc.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-pxa/vmalloc.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-pxa/vmalloc.h Tue Jul 5 22:58:33 2005
@@ -8,15 +8,4 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
-
-/*
- * Just any arbitrary offset to the start of the vmalloc VM area: the
- * current 8MB value just means that there will be a 8MB "hole" after the
- * physical memory until the kernel virtual memory starts. That means that
- * any out-of-bounds memory accesses will hopefully be caught.
- * The vmalloc() routines leaves a hole of 4kB between each vmalloced
- * area for the same reason. ;)
- */
-#define VMALLOC_OFFSET (8*1024*1024)
-#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
#define VMALLOC_END (0xe8000000)
Modified: linux-libc-headers/trunk/include/asm-arm/arch-rpc/hardware.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-rpc/hardware.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-rpc/hardware.h Tue Jul 5 22:58:33 2005
@@ -14,6 +14,12 @@
#include <asm/arch/memory.h>
+#ifndef __ASSEMBLY__
+#define IOMEM(x) ((void *)(x))
+#else
+#define IOMEM(x) x
+#endif /* __ASSEMBLY__ */
+
/*
* What hardware must be present
*/
@@ -34,7 +40,7 @@
#define IO_START 0x03000000 /* I/O */
#define IO_SIZE 0x01000000
-#define IO_BASE 0xe0000000
+#define IO_BASE IOMEM(0xe0000000)
#define SCREEN_START 0x02000000 /* VRAM */
#define SCREEN_END 0xdfc00000
@@ -46,12 +52,12 @@
/*
* IO Addresses
*/
-#define VIDC_BASE 0xe0400000
+#define VIDC_BASE (void *)0xe0400000
#define EXPMASK_BASE 0xe0360000
-#define IOMD_BASE 0xe0200000
-#define IOC_BASE 0xe0200000
-#define PCIO_BASE 0xe0010000
-#define FLOPPYDMA_BASE 0xe002a000
+#define IOMD_BASE IOMEM(0xe0200000)
+#define IOC_BASE IOMEM(0xe0200000)
+#define PCIO_BASE IOMEM(0xe0010000)
+#define FLOPPYDMA_BASE IOMEM(0xe002a000)
#define FLUSH_BASE_PHYS 0x00000000 /* ROM */
Modified: linux-libc-headers/trunk/include/asm-arm/arch-rpc/io.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-rpc/io.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-rpc/io.h Tue Jul 5 22:58:33 2005
@@ -128,9 +128,9 @@
{
void *ret;
if (__PORT_PCIO(port))
- ret = (void *)PCIO_BASE;
+ ret = PCIO_BASE;
else
- ret = (void *)IO_BASE;
+ ret = IO_BASE;
return ret + (port << 2);
}
@@ -230,8 +230,8 @@
result; \
})
-#define __ioaddrc(port) \
- ((void *)(__PORT_PCIO((port)) ? PCIO_BASE : IO_BASE) + ((port) << 2))
+#define __ioaddrc(port) \
+ ((__PORT_PCIO(port) ? PCIO_BASE : IO_BASE) + ((port) << 2))
#define inb(p) (__builtin_constant_p((p)) ? __inbc(p) : __inb(p))
#define inw(p) (__builtin_constant_p((p)) ? __inwc(p) : __inw(p))
Modified: linux-libc-headers/trunk/include/asm-arm/arch-rpc/vmalloc.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-rpc/vmalloc.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-rpc/vmalloc.h Tue Jul 5 22:58:33 2005
@@ -7,15 +7,4 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
-
-/*
- * Just any arbitrary offset to the start of the vmalloc VM area: the
- * current 8MB value just means that there will be a 8MB "hole" after the
- * physical memory until the kernel virtual memory starts. That means that
- * any out-of-bounds memory accesses will hopefully be caught.
- * The vmalloc() routines leaves a hole of 4kB between each vmalloced
- * area for the same reason. ;)
- */
-#define VMALLOC_OFFSET (8*1024*1024)
-#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
#define VMALLOC_END (PAGE_OFFSET + 0x1c000000)
Modified: linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/hardware.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/hardware.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/hardware.h Tue Jul 5 22:58:33 2005
@@ -97,11 +97,7 @@
#include <asm/sizes.h>
#include <asm/arch/map.h>
-/* machine specific includes, such as the BAST */
-
-#if defined(CONFIG_ARCH_BAST)
-#include <asm/arch/bast-cpld.h>
-#endif
+/* machine specific hardware definitions should go after this */
/* currently here until moved into config (todo) */
#define CONFIG_NO_MULTIWORD_IO
Modified: linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/io.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/io.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/io.h Tue Jul 5 22:58:33 2005
@@ -8,6 +8,7 @@
* Modifications:
* 06-Dec-1997 RMK Created.
* 02-Sep-2003 BJD Modified for S3C2410
+ * 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
*
*/
@@ -26,10 +27,10 @@
#define __PORT_PCIO(x) ((x) < (1<<28))
-#define PCIO_BASE (S3C2410_VA_ISA_WORD)
-#define PCIO_BASE_b (S3C2410_VA_ISA_BYTE)
-#define PCIO_BASE_w (S3C2410_VA_ISA_WORD)
-#define PCIO_BASE_l (S3C2410_VA_ISA_WORD)
+#define PCIO_BASE (S3C24XX_VA_ISA_WORD)
+#define PCIO_BASE_b (S3C24XX_VA_ISA_BYTE)
+#define PCIO_BASE_w (S3C24XX_VA_ISA_WORD)
+#define PCIO_BASE_l (S3C24XX_VA_ISA_WORD)
/*
* Dynamic IO functions - let the compiler
* optimize the expressions
@@ -65,9 +66,9 @@
return (unsigned sz)value; \
}
-static inline void *__ioaddr (unsigned int port)
+static inline void *__ioaddr (unsigned long port)
{
- return (void *)(__PORT_PCIO(port) ? PCIO_BASE + port : port);
+ return __PORT_PCIO(port) ? (PCIO_BASE + port) : (void *)port;
}
#define DECLARE_IO(sz,fnsuffix,instr) \
@@ -167,7 +168,7 @@
result; \
})
-#define __ioaddrc(port) ((void *)(__PORT_PCIO(port) ? PCIO_BASE + (port) : (port)))
+#define __ioaddrc(port) ((__PORT_PCIO(port) ? PCIO_BASE + (port) : (void *)(port)))
#define inb(p) (__builtin_constant_p((p)) ? __inbc(p) : __inb(p))
#define inw(p) (__builtin_constant_p((p)) ? __inwc(p) : __inw(p))
@@ -177,7 +178,7 @@
#define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p))
#define __ioaddr(p) (__builtin_constant_p((p)) ? __ioaddr(p) : __ioaddrc(p))
/* the following macro is deprecated */
-#define ioaddr(port) __ioaddr((port))
+#define ioaddr(port) __ioaddr((port))
#define insb(p,d,l) __raw_readsb(__ioaddr(p),d,l)
#define insw(p,d,l) __raw_readsw(__ioaddr(p),d,l)
Modified: linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/irqs.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/irqs.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/irqs.h Tue Jul 5 22:58:33 2005
@@ -1,6 +1,6 @@
/* linux/include/asm-arm/arch-s3c2410/irqs.h
*
- * Copyright (c) 2003 Simtec Electronics
+ * Copyright (c) 2003-2005 Simtec Electronics
* Ben Dooks <ben at simtec.co.uk>
*
* This program is free software; you can redistribute it and/or modify
@@ -11,6 +11,8 @@
* 12-May-2003 BJD Created file
* 08-Jan-2003 BJD Linux 2.6.0 version, moved BAST bits out
* 12-Mar-2004 BJD Fixed bug in header protection
+ * 10-Feb-2005 BJD Added camera IRQ from guillaume.gourat at nexvision.tv
+ * 28-Feb-2005 BJD Updated s3c2440 IRQs
*/
@@ -35,7 +37,8 @@
#define IRQ_EINT3 S3C2410_IRQ(3)
#define IRQ_EINT4t7 S3C2410_IRQ(4) /* 20 */
#define IRQ_EINT8t23 S3C2410_IRQ(5)
-#define IRQ_RESERVED6 S3C2410_IRQ(6)
+#define IRQ_RESERVED6 S3C2410_IRQ(6) /* for s3c2410 */
+#define IRQ_CAM S3C2410_IRQ(6) /* for s3c2440 */
#define IRQ_BATT_FLT S3C2410_IRQ(7)
#define IRQ_TICK S3C2410_IRQ(8) /* 24 */
#define IRQ_WDT S3C2410_IRQ(9)
@@ -54,6 +57,7 @@
#define IRQ_SPI0 S3C2410_IRQ(22)
#define IRQ_UART1 S3C2410_IRQ(23)
#define IRQ_RESERVED24 S3C2410_IRQ(24) /* 40 */
+#define IRQ_NFCON S3C2410_IRQ(24) /* for s3c2440 */
#define IRQ_USBD S3C2410_IRQ(25)
#define IRQ_USBH S3C2410_IRQ(26)
#define IRQ_IIC S3C2410_IRQ(27)
@@ -109,7 +113,14 @@
#define IRQ_TC S3C2410_IRQ(63)
#define IRQ_ADC S3C2410_IRQ(64)
-#define NR_IRQS (IRQ_ADC+1)
+/* extra irqs for s3c2440 */
+
+#define IRQ_S3C2440_CAM_C S3C2410_IRQ(65)
+#define IRQ_S3C2440_CAM_P S3C2410_IRQ(66)
+#define IRQ_S3C2440_WDT S3C2410_IRQ(67)
+#define IRQ_S3C2440_AC97 S3C2410_IRQ(68)
+
+#define NR_IRQS (IRQ_S3C2440_AC97+1)
#endif /* __ASM_ARCH_IRQ_H */
Modified: linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/map.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/map.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/map.h Tue Jul 5 22:58:33 2005
@@ -10,8 +10,10 @@
* published by the Free Software Foundation.
*
* Changelog:
- * 12-May-2003 BJD Created file
- * 06-Jan-2003 BJD Linux 2.6.0 version, moved bast specifics out
+ * 12-May-2003 BJD Created file
+ * 06-Jan-2003 BJD Linux 2.6.0 version, moved bast specifics out
+ * 10-Feb-2005 BJD Added CAMIF definition from guillaume.gourat at nexvision.tv
+ * 10-Mar-2005 LCVR Added support to S3C2400, changed {VA,SZ} names
*/
#ifndef __ASM_ARCH_MAP_H
@@ -28,108 +30,139 @@
* as they are only useful to certain drivers...
*/
+#ifndef __ASSEMBLY__
+#define S3C2410_ADDR(x) ((void *)0xF0000000 + (x))
+#else
#define S3C2410_ADDR(x) (0xF0000000 + (x))
+#endif
+
+#define S3C2400_ADDR(x) S3C2410_ADDR(x)
/* interrupt controller is the first thing we put in, to make
* the assembly code for the irq detection easier
*/
-#define S3C2410_VA_IRQ S3C2410_ADDR(0x00000000)
+#define S3C24XX_VA_IRQ S3C2410_ADDR(0x00000000)
+#define S3C2400_PA_IRQ (0x14400000)
#define S3C2410_PA_IRQ (0x4A000000)
-#define S3C2410_SZ_IRQ SZ_1M
+#define S3C24XX_SZ_IRQ SZ_1M
/* memory controller registers */
-#define S3C2410_VA_MEMCTRL S3C2410_ADDR(0x00100000)
+#define S3C24XX_VA_MEMCTRL S3C2410_ADDR(0x00100000)
+#define S3C2400_PA_MEMCTRL (0x14000000)
#define S3C2410_PA_MEMCTRL (0x48000000)
-#define S3C2410_SZ_MEMCTRL SZ_1M
+#define S3C24XX_SZ_MEMCTRL SZ_1M
/* USB host controller */
-#define S3C2410_VA_USBHOST S3C2410_ADDR(0x00200000)
+#define S3C24XX_VA_USBHOST S3C2410_ADDR(0x00200000)
+#define S3C2400_PA_USBHOST (0x14200000)
#define S3C2410_PA_USBHOST (0x49000000)
-#define S3C2410_SZ_USBHOST SZ_1M
+#define S3C24XX_SZ_USBHOST SZ_1M
/* DMA controller */
-#define S3C2410_VA_DMA S3C2410_ADDR(0x00300000)
+#define S3C24XX_VA_DMA S3C2410_ADDR(0x00300000)
+#define S3C2400_PA_DMA (0x14600000)
#define S3C2410_PA_DMA (0x4B000000)
-#define S3C2410_SZ_DMA SZ_1M
+#define S3C24XX_SZ_DMA SZ_1M
/* Clock and Power management */
-#define S3C2410_VA_CLKPWR S3C2410_ADDR(0x00400000)
+#define S3C24XX_VA_CLKPWR S3C2410_ADDR(0x00400000)
+#define S3C2400_PA_CLKPWR (0x14800000)
#define S3C2410_PA_CLKPWR (0x4C000000)
-#define S3C2410_SZ_CLKPWR SZ_1M
+#define S3C24XX_SZ_CLKPWR SZ_1M
/* LCD controller */
-#define S3C2410_VA_LCD S3C2410_ADDR(0x00600000)
+#define S3C24XX_VA_LCD S3C2410_ADDR(0x00600000)
+#define S3C2400_PA_LCD (0x14A00000)
#define S3C2410_PA_LCD (0x4D000000)
-#define S3C2410_SZ_LCD SZ_1M
+#define S3C24XX_SZ_LCD SZ_1M
/* NAND flash controller */
-#define S3C2410_VA_NAND S3C2410_ADDR(0x00700000)
+#define S3C24XX_VA_NAND S3C2410_ADDR(0x00700000)
#define S3C2410_PA_NAND (0x4E000000)
-#define S3C2410_SZ_NAND SZ_1M
+#define S3C24XX_SZ_NAND SZ_1M
+
+/* MMC controller - available on the S3C2400 */
+#define S3C2400_VA_MMC S3C2400_ADDR(0x00700000)
+#define S3C2400_PA_MMC (0x15A00000)
+#define S3C2400_SZ_MMC SZ_1M
/* UARTs */
-#define S3C2410_VA_UART S3C2410_ADDR(0x00800000)
+#define S3C24XX_VA_UART S3C2410_ADDR(0x00800000)
+#define S3C2400_PA_UART (0x15000000)
#define S3C2410_PA_UART (0x50000000)
-#define S3C2410_SZ_UART SZ_1M
+#define S3C24XX_SZ_UART SZ_1M
/* Timers */
-#define S3C2410_VA_TIMER S3C2410_ADDR(0x00900000)
+#define S3C24XX_VA_TIMER S3C2410_ADDR(0x00900000)
+#define S3C2400_PA_TIMER (0x15100000)
#define S3C2410_PA_TIMER (0x51000000)
-#define S3C2410_SZ_TIMER SZ_1M
+#define S3C24XX_SZ_TIMER SZ_1M
/* USB Device port */
-#define S3C2410_VA_USBDEV S3C2410_ADDR(0x00A00000)
+#define S3C24XX_VA_USBDEV S3C2410_ADDR(0x00A00000)
+#define S3C2400_PA_USBDEV (0x15200140)
#define S3C2410_PA_USBDEV (0x52000000)
-#define S3C2410_SZ_USBDEV SZ_1M
+#define S3C24XX_SZ_USBDEV SZ_1M
/* Watchdog */
-#define S3C2410_VA_WATCHDOG S3C2410_ADDR(0x00B00000)
+#define S3C24XX_VA_WATCHDOG S3C2410_ADDR(0x00B00000)
+#define S3C2400_PA_WATCHDOG (0x15300000)
#define S3C2410_PA_WATCHDOG (0x53000000)
-#define S3C2410_SZ_WATCHDOG SZ_1M
+#define S3C24XX_SZ_WATCHDOG SZ_1M
/* IIC hardware controller */
-#define S3C2410_VA_IIC S3C2410_ADDR(0x00C00000)
+#define S3C24XX_VA_IIC S3C2410_ADDR(0x00C00000)
+#define S3C2400_PA_IIC (0x15400000)
#define S3C2410_PA_IIC (0x54000000)
-#define S3C2410_SZ_IIC SZ_1M
+#define S3C24XX_SZ_IIC SZ_1M
-#define VA_IIC_BASE (S3C2410_VA_IIC)
+#define VA_IIC_BASE (S3C24XX_VA_IIC)
/* IIS controller */
-#define S3C2410_VA_IIS S3C2410_ADDR(0x00D00000)
+#define S3C24XX_VA_IIS S3C2410_ADDR(0x00D00000)
+#define S3C2400_PA_IIS (0x15508000)
#define S3C2410_PA_IIS (0x55000000)
-#define S3C2410_SZ_IIS SZ_1M
+#define S3C24XX_SZ_IIS SZ_1M
/* GPIO ports */
-#define S3C2410_VA_GPIO S3C2410_ADDR(0x00E00000)
+#define S3C24XX_VA_GPIO S3C2410_ADDR(0x00E00000)
+#define S3C2400_PA_GPIO (0x15600000)
#define S3C2410_PA_GPIO (0x56000000)
-#define S3C2410_SZ_GPIO SZ_1M
+#define S3C24XX_SZ_GPIO SZ_1M
/* RTC */
-#define S3C2410_VA_RTC S3C2410_ADDR(0x00F00000)
+#define S3C24XX_VA_RTC S3C2410_ADDR(0x00F00000)
+#define S3C2400_PA_RTC (0x15700040)
#define S3C2410_PA_RTC (0x57000000)
-#define S3C2410_SZ_RTC SZ_1M
+#define S3C24XX_SZ_RTC SZ_1M
/* ADC */
-#define S3C2410_VA_ADC S3C2410_ADDR(0x01000000)
+#define S3C24XX_VA_ADC S3C2410_ADDR(0x01000000)
+#define S3C2400_PA_ADC (0x15800000)
#define S3C2410_PA_ADC (0x58000000)
-#define S3C2410_SZ_ADC SZ_1M
+#define S3C24XX_SZ_ADC SZ_1M
/* SPI */
-#define S3C2410_VA_SPI S3C2410_ADDR(0x01100000)
+#define S3C24XX_VA_SPI S3C2410_ADDR(0x01100000)
+#define S3C2400_PA_SPI (0x15900000)
#define S3C2410_PA_SPI (0x59000000)
-#define S3C2410_SZ_SPI SZ_1M
+#define S3C24XX_SZ_SPI SZ_1M
/* SDI */
-#define S3C2410_VA_SDI S3C2410_ADDR(0x01200000)
+#define S3C24XX_VA_SDI S3C2410_ADDR(0x01200000)
#define S3C2410_PA_SDI (0x5A000000)
-#define S3C2410_SZ_SDI SZ_1M
+#define S3C24XX_SZ_SDI SZ_1M
+
+/* CAMIF */
+#define S3C2440_PA_CAMIF (0x4F000000)
+#define S3C2440_SZ_CAMIF SZ_1M
/* ISA style IO, for each machine to sort out mappings for, if it
* implements it. We reserve two 16M regions for ISA.
*/
-#define S3C2410_VA_ISA_WORD S3C2410_ADDR(0x02000000)
-#define S3C2410_VA_ISA_BYTE S3C2410_ADDR(0x03000000)
+#define S3C24XX_VA_ISA_WORD S3C2410_ADDR(0x02000000)
+#define S3C24XX_VA_ISA_BYTE S3C2410_ADDR(0x03000000)
/* physical addresses of all the chip-select areas */
@@ -144,5 +177,16 @@
#define S3C2410_SDRAM_PA (S3C2410_CS6)
+#define S3C2400_CS0 (0x00000000)
+#define S3C2400_CS1 (0x02000000)
+#define S3C2400_CS2 (0x04000000)
+#define S3C2400_CS3 (0x06000000)
+#define S3C2400_CS4 (0x08000000)
+#define S3C2400_CS5 (0x0A000000)
+#define S3C2400_CS6 (0x0C000000)
+#define S3C2400_CS7 (0x0E000000)
+
+#define S3C2400_SDRAM_PA (S3C2400_CS6)
+
#endif /* __ASM_ARCH_MAP_H */
Modified: linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/memory.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/memory.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/memory.h Tue Jul 5 22:58:33 2005
@@ -17,15 +17,21 @@
* 21-Mar-1999 RMK Renamed to memory.h
* RMK Added TASK_SIZE and PAGE_OFFSET
* 05-Apr-2004 BJD Copied and altered for arch-s3c2410
+ * 17-Mar-2005 LCVR Modified for S3C2400
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
/*
- * DRAM starts at 0x30000000
+ * DRAM starts at 0x30000000 for S3C2410/S3C2440
+ * and at 0x0C000000 for S3C2400
*/
+#ifdef CONFIG_CPU_S3C2400
+#define PHYS_OFFSET (0x0C000000UL)
+#else
#define PHYS_OFFSET (0x30000000UL)
+#endif
/*
* These are exactly the same on the S3C2410 as the
Added: linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/otom-map.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/otom-map.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,30 @@
+/* linux/include/asm-arm/arch-s3c2410/otom-map.h
+ *
+ * (c) 2005 Guillaume GOURAT / NexVision
+ * guillaume.gourat at nexvision.fr
+ *
+ * NexVision OTOM board memory map definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/* needs arch/map.h including with this */
+
+/* ok, we've used up to 0x01300000, now we need to find space for the
+ * peripherals that live in the nGCS[x] areas, which are quite numerous
+ * in their space.
+ */
+
+#ifndef __ASM_ARCH_OTOMMAP_H
+#define __ASM_ARCH_OTOMMAP_H
+
+#define OTOM_PA_CS8900A_BASE (S3C2410_CS3 + 0x01000000) /* nGCS3 +0x01000000 */
+#define OTOM_VA_CS8900A_BASE S3C2410_ADDR(0x04000000) /* 0xF4000000 */
+
+/* physical offset addresses for the peripherals */
+
+#define OTOM_PA_FLASH0_BASE (S3C2410_CS0) /* Bank 0 */
+
+#endif /* __ASM_ARCH_OTOMMAP_H */
Added: linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-adc.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-adc.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,63 @@
+/* linux/include/asm/arch-s3c2410/regs-adc.h
+ *
+ * Copyright (c) 2004 Shannon Holland <holland at loser.net>
+ *
+ * This program is free software; yosu can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S3C2410 ADC registers
+ *
+ * Changelog:
+ * 27-09-2004 SAH Created file
+*/
+
+#ifndef __ASM_ARCH_REGS_ADC_H
+#define __ASM_ARCH_REGS_ADC_H "regs-adc.h"
+
+#define S3C2410_ADCREG(x) (x)
+
+#define S3C2410_ADCCON S3C2410_ADCREG(0x00)
+#define S3C2410_ADCTSC S3C2410_ADCREG(0x04)
+#define S3C2410_ADCDLY S3C2410_ADCREG(0x08)
+#define S3C2410_ADCDAT0 S3C2410_ADCREG(0x0C)
+#define S3C2410_ADCDAT1 S3C2410_ADCREG(0x10)
+
+
+/* ADCCON Register Bits */
+#define S3C2410_ADCCON_ECFLG (1<<15)
+#define S3C2410_ADCCON_PRSCEN (1<<14)
+#define S3C2410_ADCCON_PRSCVL(x) (((x)&0xFF)<<6)
+#define S3C2410_ADCCON_PRSCVLMASK (0xFF<<6)
+#define S3C2410_ADCCON_SELMUX(x) (((x)&0x7)<<3)
+#define S3C2410_ADCCON_MUXMASK (0x7<<3)
+#define S3C2410_ADCCON_STDBM (1<<2)
+#define S3C2410_ADCCON_READ_START (1<<1)
+#define S3C2410_ADCCON_ENABLE_START (1<<0)
+#define S3C2410_ADCCON_STARTMASK (0x3<<0)
+
+
+/* ADCTSC Register Bits */
+#define S3C2410_ADCTSC_YM_SEN (1<<7)
+#define S3C2410_ADCTSC_YP_SEN (1<<6)
+#define S3C2410_ADCTSC_XM_SEN (1<<5)
+#define S3C2410_ADCTSC_XP_SEN (1<<4)
+#define S3C2410_ADCTSC_PULL_UP_DISABLE (1<<3)
+#define S3C2410_ADCTSC_AUTO_PST (1<<2)
+#define S3C2410_ADCTSC_XY_PST (0x3<<0)
+
+/* ADCDAT0 Bits */
+#define S3C2410_ADCDAT0_UPDOWN (1<<15)
+#define S3C2410_ADCDAT0_AUTO_PST (1<<14)
+#define S3C2410_ADCDAT0_XY_PST (0x3<<12)
+#define S3C2410_ADCDAT0_XPDATA_MASK (0x03FF)
+
+/* ADCDAT1 Bits */
+#define S3C2410_ADCDAT1_UPDOWN (1<<15)
+#define S3C2410_ADCDAT1_AUTO_PST (1<<14)
+#define S3C2410_ADCDAT1_XY_PST (0x3<<12)
+#define S3C2410_ADCDAT1_YPDATA_MASK (0x03FF)
+
+#endif /* __ASM_ARCH_REGS_ADC_H */
+
+
Modified: linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-clock.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-clock.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-clock.h Tue Jul 5 22:58:33 2005
@@ -10,18 +10,19 @@
* S3C2410 clock register definitions
*
* Changelog:
- * 18-Aug-2004 Ben Dooks Added 2440 definitions
- * 08-Aug-2004 Herbert Pötzl Added CLKCON definitions
- * 19-06-2003 Ben Dooks Created file
- * 12-03-2004 Ben Dooks Updated include protection
- * 29-Sep-2004 Ben Dooks Fixed usage for assembly inclusion
- * 10-Feb-2005 Ben Dooks Fixed CAMDIVN address (Guillaume Gourat)
+ * 18-Aug-2004 Ben Dooks Added 2440 definitions
+ * 08-Aug-2004 Herbert Pötzl Added CLKCON definitions
+ * 19-06-2003 Ben Dooks Created file
+ * 12-03-2004 Ben Dooks Updated include protection
+ * 29-Sep-2004 Ben Dooks Fixed usage for assembly inclusion
+ * 10-Feb-2005 Ben Dooks Fixed CAMDIVN address (Guillaume Gourat)
+ * 10-Mar-2005 Lucas Villa Real Changed S3C2410_VA to S3C24XX_VA
*/
#ifndef __ASM_ARM_REGS_CLOCK
#define __ASM_ARM_REGS_CLOCK "$Id$"
-#define S3C2410_CLKREG(x) ((x) + S3C2410_VA_CLKPWR)
+#define S3C2410_CLKREG(x) ((x) + S3C24XX_VA_CLKPWR)
#define S3C2410_PLLVAL(_m,_p,_s) ((_m) << 12 | ((_p) << 4) | ((_s)))
Modified: linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-gpio.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-gpio.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-gpio.h Tue Jul 5 22:58:33 2005
@@ -18,6 +18,8 @@
* 17-10-2004 BJD Added GSTATUS1 register definitions
* 18-11-2004 BJD Fixed definitions of GPE3, GPE4, GPE5 and GPE6
* 18-11-2004 BJD Added S3C2440 AC97 controls
+ * 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
+ * 28-Mar-2005 LCVR Fixed definition of GPB10
*/
@@ -35,7 +37,7 @@
#define S3C2410_GPIO_BANKG (32*6)
#define S3C2410_GPIO_BANKH (32*7)
-#define S3C2410_GPIO_BASE(pin) ((((pin) & ~31) >> 1) + S3C2410_VA_GPIO)
+#define S3C2410_GPIO_BASE(pin) ((((pin) & ~31) >> 1) + S3C24XX_VA_GPIO)
#define S3C2410_GPIO_OFFSET(pin) ((pin) & 31)
/* general configuration options */
@@ -44,7 +46,7 @@
/* configure GPIO ports A..G */
-#define S3C2410_GPIOREG(x) ((x) + S3C2410_VA_GPIO)
+#define S3C2410_GPIOREG(x) ((x) + S3C24XX_VA_GPIO)
/* port A - 22bits, zero in bit X makes pin X output
* 1 makes port special function, this is default
@@ -211,9 +213,9 @@
#define S3C2410_GPB9_nXDACK0 (0x02 << 18)
#define S3C2410_GPB10 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 10)
-#define S3C2410_GPB10_INP (0x00 << 18)
-#define S3C2410_GPB10_OUTP (0x01 << 18)
-#define S3C2410_GPB10_nXDRE0 (0x02 << 18)
+#define S3C2410_GPB10_INP (0x00 << 20)
+#define S3C2410_GPB10_OUTP (0x01 << 20)
+#define S3C2410_GPB10_nXDRE0 (0x02 << 20)
/* Port C consits of 16 GPIO/Special function
*
Modified: linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-iis.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-iis.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-iis.h Tue Jul 5 22:58:33 2005
@@ -13,6 +13,8 @@
* 19-06-2003 BJD Created file
* 26-06-2003 BJD Finished off definitions for register addresses
* 12-03-2004 BJD Updated include protection
+ * 07-03-2005 BJD Added FIFO size flags and S3C2440 MPLL
+ * 05-04-2005 LCVR Added IISFCON definitions for the S3C2400
*/
#ifndef __ASM_ARCH_REGS_IIS_H
@@ -20,6 +22,7 @@
#define S3C2410_IISCON (0x00)
+#define S3C2440_IISCON_MPLL (1<<9)
#define S3C2410_IISCON_LRINDEX (1<<8)
#define S3C2410_IISCON_TXFIFORDY (1<<7)
#define S3C2410_IISCON_RXFIFORDY (1<<6)
@@ -42,6 +45,7 @@
#define S3C2410_IISMOD_MSB (1<<4)
#define S3C2410_IISMOD_8BIT (0<<3)
#define S3C2410_IISMOD_16BIT (1<<3)
+#define S3C2410_IISMOD_BITMASK (1<<3)
#define S3C2410_IISMOD_256FS (0<<1)
#define S3C2410_IISMOD_384FS (1<<1)
#define S3C2410_IISMOD_16FS (0<<0)
@@ -50,7 +54,7 @@
#define S3C2410_IISPSR (0x08)
#define S3C2410_IISPSR_INTMASK (31<<5)
-#define S3C2410_IISPSR_INTSHFIT (5)
+#define S3C2410_IISPSR_INTSHIFT (5)
#define S3C2410_IISPSR_EXTMASK (31<<0)
#define S3C2410_IISPSR_EXTSHFIT (0)
@@ -60,8 +64,19 @@
#define S3C2410_IISFCON_RXDMA (1<<14)
#define S3C2410_IISFCON_TXENABLE (1<<13)
#define S3C2410_IISFCON_RXENABLE (1<<12)
+#define S3C2410_IISFCON_TXMASK (0x3f << 6)
+#define S3C2410_IISFCON_TXSHIFT (6)
+#define S3C2410_IISFCON_RXMASK (0x3f)
+#define S3C2410_IISFCON_RXSHIFT (0)
+
+#define S3C2400_IISFCON_TXDMA (1<<11)
+#define S3C2400_IISFCON_RXDMA (1<<10)
+#define S3C2400_IISFCON_TXENABLE (1<<9)
+#define S3C2400_IISFCON_RXENABLE (1<<8)
+#define S3C2400_IISFCON_TXMASK (0x07 << 4)
+#define S3C2400_IISFCON_TXSHIFT (4)
+#define S3C2400_IISFCON_RXMASK (0x07)
+#define S3C2400_IISFCON_RXSHIFT (0)
#define S3C2410_IISFIFO (0x10)
-
#endif /* __ASM_ARCH_REGS_IIS_H */
-
Modified: linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-irq.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-irq.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-irq.h Tue Jul 5 22:58:33 2005
@@ -12,6 +12,7 @@
* Changelog:
* 19-06-2003 BJD Created file
* 12-03-2004 BJD Updated include protection
+ * 10-03-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
*/
@@ -20,8 +21,8 @@
/* interrupt controller */
-#define S3C2410_IRQREG(x) ((x) + S3C2410_VA_IRQ)
-#define S3C2410_EINTREG(x) ((x) + S3C2410_VA_GPIO)
+#define S3C2410_IRQREG(x) ((x) + S3C24XX_VA_IRQ)
+#define S3C2410_EINTREG(x) ((x) + S3C24XX_VA_GPIO)
#define S3C2410_SRCPND S3C2410_IRQREG(0x000)
#define S3C2410_INTMOD S3C2410_IRQREG(0x004)
Modified: linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-lcd.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-lcd.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-lcd.h Tue Jul 5 22:58:33 2005
@@ -13,13 +13,14 @@
* 12-06-2003 BJD Created file
* 26-06-2003 BJD Updated LCDCON register definitions
* 12-03-2004 BJD Updated include protection
+ * 10-03-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
*/
#ifndef ___ASM_ARCH_REGS_LCD_H
#define ___ASM_ARCH_REGS_LCD_H "$Id$"
-#define S3C2410_LCDREG(x) ((x) + S3C2410_VA_LCD)
+#define S3C2410_LCDREG(x) ((x) + S3C24XX_VA_LCD)
/* LCD control registers */
#define S3C2410_LCDCON1 S3C2410_LCDREG(0x00)
Modified: linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-mem.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-mem.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-mem.h Tue Jul 5 22:58:33 2005
@@ -11,6 +11,8 @@
*
* Changelog:
* 29-Sep-2004 BJD Initial include for Linux
+ * 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
+ * 04-Apr-2005 LCVR Added S3C2400 DRAM/BANKSIZE_MASK definitions
*
*/
@@ -18,7 +20,7 @@
#define __ASM_ARM_MEMREGS_H "$Id$"
#ifndef S3C2410_MEMREG
-#define S3C2410_MEMREG(x) (S3C2410_VA_MEMCTRL + (x))
+#define S3C2410_MEMREG(x) (S3C24XX_VA_MEMCTRL + (x))
#endif
/* bus width, and wait state control */
@@ -133,8 +135,29 @@
#define S3C2410_BANKCON_Tacs4 (0x3 << 13)
#define S3C2410_BANKCON_SRAM (0x0 << 15)
+#define S3C2400_BANKCON_EDODRAM (0x2 << 15)
#define S3C2410_BANKCON_SDRAM (0x3 << 15)
+/* next bits only for EDO DRAM in 6,7 */
+#define S3C2400_BANKCON_EDO_Trdc1 (0x00 << 4)
+#define S3C2400_BANKCON_EDO_Trdc2 (0x01 << 4)
+#define S3C2400_BANKCON_EDO_Trdc3 (0x02 << 4)
+#define S3C2400_BANKCON_EDO_Trdc4 (0x03 << 4)
+
+/* CAS pulse width */
+#define S3C2400_BANKCON_EDO_PULSE1 (0x00 << 3)
+#define S3C2400_BANKCON_EDO_PULSE2 (0x01 << 3)
+
+/* CAS pre-charge */
+#define S3C2400_BANKCON_EDO_TCP1 (0x00 << 2)
+#define S3C2400_BANKCON_EDO_TCP2 (0x01 << 2)
+
+/* control column address select */
+#define S3C2400_BANKCON_EDO_SCANb8 (0x00 << 0)
+#define S3C2400_BANKCON_EDO_SCANb9 (0x01 << 0)
+#define S3C2400_BANKCON_EDO_SCANb10 (0x02 << 0)
+#define S3C2400_BANKCON_EDO_SCANb11 (0x03 << 0)
+
/* next bits only for SDRAM in 6,7 */
#define S3C2410_BANKCON_Trdc2 (0x00 << 2)
#define S3C2410_BANKCON_Trdc3 (0x01 << 2)
@@ -161,6 +184,12 @@
#define S3C2410_REFRESH_TRP_3clk (1<<20)
#define S3C2410_REFRESH_TRP_4clk (2<<20)
+#define S3C2400_REFRESH_DRAM_TRP_MASK (3<<20)
+#define S3C2400_REFRESH_DRAM_TRP_1_5clk (0<<20)
+#define S3C2400_REFRESH_DRAM_TRP_2_5clk (1<<20)
+#define S3C2400_REFRESH_DRAM_TRP_3_5clk (2<<20)
+#define S3C2400_REFRESH_DRAM_TRP_4_5clk (3<<20)
+
#define S3C2410_REFRESH_TSRC_MASK (3<<18)
#define S3C2410_REFRESH_TSRC_4clk (0<<18)
#define S3C2410_REFRESH_TSRC_5clk (1<<18)
@@ -183,6 +212,7 @@
#define S3C2410_BANKSIZE_4M (0x5 << 0)
#define S3C2410_BANKSIZE_2M (0x4 << 0)
#define S3C2410_BANKSIZE_MASK (0x7 << 0)
+#define S3C2400_BANKSIZE_MASK (0x4 << 0)
#define S3C2410_BANKSIZE_SCLK_EN (1<<4)
#define S3C2410_BANKSIZE_SCKE_EN (1<<5)
#define S3C2410_BANKSIZE_BURST (1<<7)
Modified: linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-nand.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-nand.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-nand.h Tue Jul 5 22:58:33 2005
@@ -1,16 +1,17 @@
/* linux/include/asm-arm/arch-s3c2410/regs-nand.h
*
- * Copyright (c) 2004 Simtec Electronics <linux at simtec.co.uk>
+ * Copyright (c) 2004,2005 Simtec Electronics <linux at simtec.co.uk>
* http://www.simtec.co.uk/products/SWLINUX/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
- * S3C2410 clock register definitions
+ * S3C2410 NAND register definitions
*
* Changelog:
* 18-Aug-2004 BJD Copied file from 2.4 and updated
+ * 01-May-2005 BJD Added definitions for s3c2440 controller
*/
#ifndef __ASM_ARM_REGS_NAND
@@ -26,6 +27,22 @@
#define S3C2410_NFSTAT S3C2410_NFREG(0x10)
#define S3C2410_NFECC S3C2410_NFREG(0x14)
+#define S3C2440_NFCONT S3C2410_NFREG(0x04)
+#define S3C2440_NFCMD S3C2410_NFREG(0x08)
+#define S3C2440_NFADDR S3C2410_NFREG(0x0C)
+#define S3C2440_NFDATA S3C2410_NFREG(0x10)
+#define S3C2440_NFECCD0 S3C2410_NFREG(0x14)
+#define S3C2440_NFECCD1 S3C2410_NFREG(0x18)
+#define S3C2440_NFECCD S3C2410_NFREG(0x1C)
+#define S3C2440_NFSTAT S3C2410_NFREG(0x20)
+#define S3C2440_NFESTAT0 S3C2410_NFREG(0x24)
+#define S3C2440_NFESTAT1 S3C2410_NFREG(0x28)
+#define S3C2440_NFMECC0 S3C2410_NFREG(0x2C)
+#define S3C2440_NFMECC1 S3C2410_NFREG(0x30)
+#define S3C2440_NFSECC S3C2410_NFREG(0x34)
+#define S3C2440_NFSBLK S3C2410_NFREG(0x38)
+#define S3C2440_NFEBLK S3C2410_NFREG(0x3C)
+
#define S3C2410_NFCONF_EN (1<<15)
#define S3C2410_NFCONF_512BYTE (1<<14)
#define S3C2410_NFCONF_4STEP (1<<13)
@@ -37,7 +54,28 @@
#define S3C2410_NFSTAT_BUSY (1<<0)
-/* think ECC can only be 8bit read? */
+#define S3C2440_NFCONF_BUSWIDTH_8 (0<<0)
+#define S3C2440_NFCONF_BUSWIDTH_16 (1<<0)
+#define S3C2440_NFCONF_ADVFLASH (1<<3)
+#define S3C2440_NFCONF_TACLS(x) ((x)<<12)
+#define S3C2440_NFCONF_TWRPH0(x) ((x)<<8)
+#define S3C2440_NFCONF_TWRPH1(x) ((x)<<4)
+
+#define S3C2440_NFCONT_LOCKTIGHT (1<<13)
+#define S3C2440_NFCONT_SOFTLOCK (1<<12)
+#define S3C2440_NFCONT_ILLEGALACC_EN (1<<10)
+#define S3C2440_NFCONT_RNBINT_EN (1<<9)
+#define S3C2440_NFCONT_RN_FALLING (1<<8)
+#define S3C2440_NFCONT_SPARE_ECCLOCK (1<<6)
+#define S3C2440_NFCONT_MAIN_ECCLOCK (1<<5)
+#define S3C2440_NFCONT_INITECC (1<<4)
+#define S3C2440_NFCONT_nFCE (1<<1)
+#define S3C2440_NFCONT_ENABLE (1<<0)
+
+#define S3C2440_NFSTAT_READY (1<<0)
+#define S3C2440_NFSTAT_nCE (1<<1)
+#define S3C2440_NFSTAT_RnB_CHANGE (1<<2)
+#define S3C2440_NFSTAT_ILLEGAL_ACCESS (1<<3)
#endif /* __ASM_ARM_REGS_NAND */
Modified: linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-rtc.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-rtc.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-rtc.h Tue Jul 5 22:58:33 2005
@@ -12,12 +12,13 @@
* Changelog:
* 19-06-2003 BJD Created file
* 12-03-2004 BJD Updated include protection
+ * 15-01-2005 LCVR Changed S3C2410_VA to S3C24XX_VA (s3c2400 support)
*/
#ifndef __ASM_ARCH_REGS_RTC_H
#define __ASM_ARCH_REGS_RTC_H __FILE__
-#define S3C2410_RTCREG(x) ((x) + S3C2410_VA_RTC)
+#define S3C2410_RTCREG(x) ((x) + S3C24XX_VA_RTC)
#define S3C2410_RTCCON S3C2410_RTCREG(0x40)
#define S3C2410_RTCCON_RTCEN (1<<0)
Modified: linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-serial.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-serial.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-serial.h Tue Jul 5 22:58:33 2005
@@ -27,14 +27,17 @@
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ * Modifications:
+ * 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA (s3c2400 support)
*/
#ifndef __ASM_ARM_REGS_SERIAL_H
#define __ASM_ARM_REGS_SERIAL_H
-#define S3C2410_VA_UART0 (S3C2410_VA_UART)
-#define S3C2410_VA_UART1 (S3C2410_VA_UART + 0x4000 )
-#define S3C2410_VA_UART2 (S3C2410_VA_UART + 0x8000 )
+#define S3C24XX_VA_UART0 (S3C24XX_VA_UART)
+#define S3C24XX_VA_UART1 (S3C24XX_VA_UART + 0x4000 )
+#define S3C24XX_VA_UART2 (S3C24XX_VA_UART + 0x8000 )
#define S3C2410_PA_UART0 (S3C2410_PA_UART)
#define S3C2410_PA_UART1 (S3C2410_PA_UART + 0x4000 )
@@ -73,6 +76,11 @@
#define S3C2440_UCON_UCLK (1<<10)
#define S3C2440_UCON_PCLK2 (2<<10)
#define S3C2440_UCON_FCLK (3<<10)
+#define S3C2440_UCON2_FCLK_EN (1<<15)
+#define S3C2440_UCON0_DIVMASK (15 << 12)
+#define S3C2440_UCON1_DIVMASK (15 << 12)
+#define S3C2440_UCON2_DIVMASK (7 << 12)
+#define S3C2440_UCON_DIVSHIFT (12)
#define S3C2410_UCON_UCLK (1<<10)
#define S3C2410_UCON_SBREAK (1<<4)
Modified: linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-spi.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-spi.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-spi.h Tue Jul 5 22:58:33 2005
@@ -12,6 +12,7 @@
* 20-04-2004 KF Created file
* 04-10-2004 BJD Removed VA address (no longer mapped)
* tidied file for submission
+ * 03-04-2005 LCVR Added S3C2400_SPPIN_nCS definition
*/
#ifndef __ASM_ARCH_REGS_SPI_H
@@ -46,6 +47,7 @@
#define S3C2410_SPPIN_ENMUL (1<<2) /* Multi Master Error detect */
#define S3C2410_SPPIN_RESERVED (1<<1)
+#define S3C2400_SPPIN_nCS (1<<1) /* SPI Card Select */
#define S3C2410_SPPIN_KEEP (1<<0) /* Master Out keep */
Modified: linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-timer.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-timer.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-timer.h Tue Jul 5 22:58:33 2005
@@ -13,13 +13,15 @@
* 05-06-2003 BJD Created file
* 26-06-2003 BJD Added more timer definitions to mux / control
* 12-03-2004 BJD Updated include protection
+ * 10-02-2005 BJD Added S3C2410_TCFG1_MUX4_SHIFT (Guillaume Gourat)
+ * 10-03-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
*/
#ifndef __ASM_ARCH_REGS_TIMER_H
#define __ASM_ARCH_REGS_TIMER_H "$Id$"
-#define S3C2410_TIMERREG(x) (S3C2410_VA_TIMER + (x))
+#define S3C2410_TIMERREG(x) (S3C24XX_VA_TIMER + (x))
#define S3C2410_TIMERREG2(tmr,reg) S3C2410_TIMERREG((reg)+0x0c+((tmr)*0x0c))
#define S3C2410_TCFG0 S3C2410_TIMERREG(0x00)
@@ -38,6 +40,7 @@
#define S3C2410_TCFG1_MUX4_DIV16 (3<<16)
#define S3C2410_TCFG1_MUX4_TCLK1 (4<<16)
#define S3C2410_TCFG1_MUX4_MASK (15<<16)
+#define S3C2410_TCFG1_MUX4_SHIFT (16)
#define S3C2410_TCFG1_MUX3_DIV2 (0<<12)
#define S3C2410_TCFG1_MUX3_DIV4 (1<<12)
Modified: linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-udc.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-udc.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-udc.h Tue Jul 5 22:58:33 2005
@@ -11,13 +11,14 @@
* 01-08-2004 Initial creation
* 12-09-2004 Cleanup for submission
* 24-10-2004 Fixed S3C2410_UDC_MAXP_REG definition
+ * 10-03-2005 Changed S3C2410_VA to S3C24XX_VA
*/
#ifndef __ASM_ARCH_REGS_UDC_H
#define __ASM_ARCH_REGS_UDC_H
-#define S3C2410_USBDREG(x) ((x) + S3C2410_VA_USBDEV)
+#define S3C2410_USBDREG(x) ((x) + S3C24XX_VA_USBDEV)
#define S3C2410_UDC_FUNC_ADDR_REG S3C2410_USBDREG(0x0140)
#define S3C2410_UDC_PWR_REG S3C2410_USBDREG(0x0144)
Modified: linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-watchdog.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-watchdog.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/regs-watchdog.h Tue Jul 5 22:58:33 2005
@@ -12,13 +12,14 @@
* Changelog:
* 21-06-2003 BJD Created file
* 12-03-2004 BJD Updated include protection
+ * 10-03-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
*/
#ifndef __ASM_ARCH_REGS_WATCHDOG_H
#define __ASM_ARCH_REGS_WATCHDOG_H "$Id$"
-#define S3C2410_WDOGREG(x) ((x) + S3C2410_VA_WATCHDOG)
+#define S3C2410_WDOGREG(x) ((x) + S3C24XX_VA_WATCHDOG)
#define S3C2410_WTCON S3C2410_WDOGREG(0x00)
#define S3C2410_WTDAT S3C2410_WDOGREG(0x04)
Modified: linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/system.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/system.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/system.h Tue Jul 5 22:58:33 2005
@@ -30,7 +30,7 @@
void s3c24xx_default_idle(void)
{
- unsigned long reg = S3C2410_CLKCON;
+ void *reg = S3C2410_CLKCON;
unsigned long tmp;
int i;
Modified: linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/uncompress.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/uncompress.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/uncompress.h Tue Jul 5 22:58:33 2005
@@ -15,6 +15,8 @@
* 12-Mar-2004 BJD Updated header protection
* 12-Oct-2004 BJD Take account of debug uart configuration
* 15-Nov-2004 BJD Fixed uart configuration
+ * 22-Feb-2005 BJD Added watchdog to uncompress
+ * 04-Apr-2005 LCVR Added support to S3C2400 (no cpuid at GSTATUS1)
*/
#ifndef __ASM_ARCH_UNCOMPRESS_H
@@ -23,12 +25,16 @@
/* defines for UART registers */
#include "asm/arch/regs-serial.h"
#include "asm/arch/regs-gpio.h"
+#include "asm/arch/regs-watchdog.h"
#include <asm/arch/map.h>
/* working in physical space... */
#undef S3C2410_GPIOREG
+#undef S3C2410_WDOGREG
+
#define S3C2410_GPIOREG(x) ((S3C2410_PA_GPIO + (x)))
+#define S3C2410_WDOGREG(x) ((S3C2410_PA_WATCHDOG + (x)))
/* how many bytes we allow into the FIFO at a time in FIFO mode */
#define FIFO_MAX (14)
@@ -54,21 +60,6 @@
}
-/* currently we do not need the watchdog... */
-#define arch_decomp_wdog()
-
-
-static void error(char *err);
-
-static void
-arch_decomp_setup(void)
-{
- /* we may need to setup the uart(s) here if we are not running
- * on an BAST... the BAST will have left the uarts configured
- * after calling linux.
- */
-}
-
/* we can deal with the case the UARTs are being run
* in FIFO mode, so that we don't hold up our execution
* waiting for tx to happen...
@@ -77,9 +68,12 @@
static void
putc(char ch)
{
- int cpuid = *((volatile unsigned int *)S3C2410_GSTATUS1);
+ int cpuid = S3C2410_GSTATUS1_2410;
+#ifndef CONFIG_CPU_S3C2400
+ cpuid = *((volatile unsigned int *)S3C2410_GSTATUS1);
cpuid &= S3C2410_GSTATUS1_IDMASK;
+#endif
if (ch == '\n')
putc('\r'); /* expand newline to \r\n */
@@ -120,4 +114,47 @@
}
}
+/* CONFIG_S3C2410_BOOT_WATCHDOG
+ *
+ * Simple boot-time watchdog setup, to reboot the system if there is
+ * any problem with the boot process
+*/
+
+#ifdef CONFIG_S3C2410_BOOT_WATCHDOG
+
+#define WDOG_COUNT (0xff00)
+
+#define __raw_writel(d,ad) do { *((volatile unsigned int *)(ad)) = (d); } while(0)
+
+static inline void arch_decomp_wdog(void)
+{
+ __raw_writel(WDOG_COUNT, S3C2410_WTCNT);
+}
+
+static void arch_decomp_wdog_start(void)
+{
+ __raw_writel(WDOG_COUNT, S3C2410_WTDAT);
+ __raw_writel(WDOG_COUNT, S3C2410_WTCNT);
+ __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x40), S3C2410_WTCON);
+}
+
+#else
+#define arch_decomp_wdog_start()
+#define arch_decomp_wdog()
+#endif
+
+static void error(char *err);
+
+static void
+arch_decomp_setup(void)
+{
+ /* we may need to setup the uart(s) here if we are not running
+ * on an BAST... the BAST will have left the uarts configured
+ * after calling linux.
+ */
+
+ arch_decomp_wdog_start();
+}
+
+
#endif /* __ASM_ARCH_UNCOMPRESS_H */
Modified: linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/vmalloc.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/vmalloc.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-s3c2410/vmalloc.h Tue Jul 5 22:58:33 2005
@@ -19,18 +19,6 @@
#ifndef __ASM_ARCH_VMALLOC_H
#define __ASM_ARCH_VMALLOC_H
-/*
- * Just any arbitrary offset to the start of the vmalloc VM area: the
- * current 8MB value just means that there will be a 8MB "hole" after the
- * physical memory until the kernel virtual memory starts. That means that
- * any out-of-bounds memory accesses will hopefully be caught.
- * The vmalloc() routines leaves a hole of 4kB between each vmalloced
- * area for the same reason. ;)
- */
-
-#define VMALLOC_OFFSET (8*1024*1024)
-#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
-#define VMALLOC_VMADDR(x) ((unsigned long)(x))
#define VMALLOC_END (0xE0000000)
#endif /* __ASM_ARCH_VMALLOC_H */
Modified: linux-libc-headers/trunk/include/asm-arm/arch-sa1100/vmalloc.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-sa1100/vmalloc.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-sa1100/vmalloc.h Tue Jul 5 22:58:33 2005
@@ -1,15 +1,4 @@
/*
* linux/include/asm-arm/arch-sa1100/vmalloc.h
*/
-
-/*
- * Just any arbitrary offset to the start of the vmalloc VM area: the
- * current 8MB value just means that there will be a 8MB "hole" after the
- * physical memory until the kernel virtual memory starts. That means that
- * any out-of-bounds memory accesses will hopefully be caught.
- * The vmalloc() routines leaves a hole of 4kB between each vmalloced
- * area for the same reason. ;)
- */
-#define VMALLOC_OFFSET (8*1024*1024)
-#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
#define VMALLOC_END (0xe8000000)
Modified: linux-libc-headers/trunk/include/asm-arm/arch-shark/vmalloc.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-shark/vmalloc.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-shark/vmalloc.h Tue Jul 5 22:58:33 2005
@@ -1,15 +1,4 @@
/*
* linux/include/asm-arm/arch-rpc/vmalloc.h
*/
-
-/*
- * Just any arbitrary offset to the start of the vmalloc VM area: the
- * current 8MB value just means that there will be a 8MB "hole" after the
- * physical memory until the kernel virtual memory starts. That means that
- * any out-of-bounds memory accesses will hopefully be caught.
- * The vmalloc() routines leaves a hole of 4kB between each vmalloced
- * area for the same reason. ;)
- */
-#define VMALLOC_OFFSET (8*1024*1024)
-#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
#define VMALLOC_END (PAGE_OFFSET + 0x10000000)
Modified: linux-libc-headers/trunk/include/asm-arm/arch-versatile/platform.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-versatile/platform.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-versatile/platform.h Tue Jul 5 22:58:33 2005
@@ -498,11 +498,17 @@
/*
* IB2 Versatile/AB expansion board definitions
*/
-#define VERSATILE_IB2_CAMERA_BANK 0x24000000
-#define VERSATILE_IB2_KBD_DATAREG 0x25000000
-#define VERSATILE_IB2_IER 0x26000000 /* for VICINTSOURCE27 */
-#define VERSATILE_IB2_CTRL 0x27000000
-#define VERSATILE_IB2_STAT 0x27000004
+#define VERSATILE_IB2_CAMERA_BANK VERSATILE_IB2_BASE
+#define VERSATILE_IB2_KBD_DATAREG (VERSATILE_IB2_BASE + 0x01000000)
+
+/* VICINTSOURCE27 */
+#define VERSATILE_IB2_INT_BASE (VERSATILE_IB2_BASE + 0x02000000)
+#define VERSATILE_IB2_IER (VERSATILE_IB2_INT_BASE + 0)
+#define VERSATILE_IB2_ISR (VERSATILE_IB2_INT_BASE + 4)
+
+#define VERSATILE_IB2_CTL_BASE (VERSATILE_IB2_BASE + 0x03000000)
+#define VERSATILE_IB2_CTRL (VERSATILE_IB2_CTL_BASE + 0)
+#define VERSATILE_IB2_STAT (VERSATILE_IB2_CTL_BASE + 4)
#endif
#endif
Modified: linux-libc-headers/trunk/include/asm-arm/arch-versatile/vmalloc.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/arch-versatile/vmalloc.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/arch-versatile/vmalloc.h Tue Jul 5 22:58:33 2005
@@ -18,16 +18,4 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
-
-/*
- * Just any arbitrary offset to the start of the vmalloc VM area: the
- * current 8MB value just means that there will be a 8MB "hole" after the
- * physical memory until the kernel virtual memory starts. That means that
- * any out-of-bounds memory accesses will hopefully be caught.
- * The vmalloc() routines leaves a hole of 4kB between each vmalloced
- * area for the same reason. ;)
- */
-#define VMALLOC_OFFSET (8*1024*1024)
-#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
-#define VMALLOC_VMADDR(x) ((unsigned long)(x))
#define VMALLOC_END (PAGE_OFFSET + 0x18000000)
Modified: linux-libc-headers/trunk/include/asm-arm/cacheflush.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/cacheflush.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/cacheflush.h Tue Jul 5 22:58:33 2005
@@ -234,16 +234,16 @@
* space" model to handle this.
*/
#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
- do { \
- flush_cache_page(vma, vaddr); \
- memcpy(dst, src, len); \
- flush_dcache_page(page); \
+ do { \
+ flush_cache_page(vma, vaddr, page_to_pfn(page));\
+ memcpy(dst, src, len); \
+ flush_dcache_page(page); \
} while (0)
#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
- do { \
- flush_cache_page(vma, vaddr); \
- memcpy(dst, src, len); \
+ do { \
+ flush_cache_page(vma, vaddr, page_to_pfn(page));\
+ memcpy(dst, src, len); \
} while (0)
/*
@@ -266,7 +266,7 @@
}
static inline void
-flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr)
+flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn)
{
if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask)) {
unsigned long addr = user_addr & PAGE_MASK;
@@ -309,9 +309,9 @@
extern void flush_dcache_page(struct page *);
#define flush_dcache_mmap_lock(mapping) \
- spin_lock_irq(&(mapping)->tree_lock)
+ write_lock_irq(&(mapping)->tree_lock)
#define flush_dcache_mmap_unlock(mapping) \
- spin_unlock_irq(&(mapping)->tree_lock)
+ write_unlock_irq(&(mapping)->tree_lock)
#define flush_icache_user_range(vma,page,addr,len) \
flush_dcache_page(page)
Modified: linux-libc-headers/trunk/include/asm-arm/ecard.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/ecard.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/ecard.h Tue Jul 5 22:58:33 2005
@@ -155,8 +155,8 @@
struct resource resource[ECARD_NUM_RESOURCES];
/* Public data */
- volatile unsigned char *irqaddr; /* address of IRQ register */
- volatile unsigned char *fiqaddr; /* address of FIQ register */
+ void *irqaddr; /* address of IRQ register */
+ void *fiqaddr; /* address of FIQ register */
unsigned char irqmask; /* IRQ mask */
unsigned char fiqmask; /* FIQ mask */
unsigned char claimed; /* Card claimed? */
@@ -207,9 +207,16 @@
extern int ecard_readchunk (struct in_chunk_dir *cd, struct expansion_card *ec, int id, int num);
/*
- * Obtain the address of a card
+ * Obtain the address of a card. This returns the "old style" address
+ * and should no longer be used.
*/
-extern unsigned int ecard_address (struct expansion_card *ec, card_type_t card_type, card_speed_t speed);
+static inline unsigned int
+ecard_address(struct expansion_card *ec, card_type_t type, card_speed_t speed)
+{
+ extern unsigned int __ecard_address(struct expansion_card *,
+ card_type_t, card_speed_t);
+ return __ecard_address(ec, type, speed);
+}
/*
* Request and release ecard resources
Modified: linux-libc-headers/trunk/include/asm-arm/elf.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/elf.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/elf.h Tue Jul 5 22:58:33 2005
@@ -34,9 +34,9 @@
*/
#define ELF_CLASS ELFCLASS32
#ifdef __ARMEB__
-#define ELF_DATA ELFDATA2MSB;
+#define ELF_DATA ELFDATA2MSB
#else
-#define ELF_DATA ELFDATA2LSB;
+#define ELF_DATA ELFDATA2LSB
#endif
#define ELF_ARCH EM_ARM
Modified: linux-libc-headers/trunk/include/asm-arm/hardware/amba.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/hardware/amba.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/hardware/amba.h Tue Jul 5 22:58:33 2005
@@ -31,7 +31,7 @@
int (*probe)(struct amba_device *, void *);
int (*remove)(struct amba_device *);
void (*shutdown)(struct amba_device *);
- int (*suspend)(struct amba_device *, __u32);
+ int (*suspend)(struct amba_device *, pm_message_t);
int (*resume)(struct amba_device *);
struct amba_id *id_table;
};
Modified: linux-libc-headers/trunk/include/asm-arm/hardware/sa1111.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/hardware/sa1111.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/hardware/sa1111.h Tue Jul 5 22:58:33 2005
@@ -567,7 +567,7 @@
unsigned int devid;
int (*probe)(struct sa1111_dev *);
int (*remove)(struct sa1111_dev *);
- int (*suspend)(struct sa1111_dev *, __u32);
+ int (*suspend)(struct sa1111_dev *, pm_message_t);
int (*resume)(struct sa1111_dev *);
};
Modified: linux-libc-headers/trunk/include/asm-arm/mach/arch.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/mach/arch.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/mach/arch.h Tue Jul 5 22:58:33 2005
@@ -16,7 +16,7 @@
struct machine_desc {
/*
- * Note! The first four elements are used
+ * Note! The first five elements are used
* by assembler code in head-armv.S
*/
unsigned int nr; /* architecture number */
Modified: linux-libc-headers/trunk/include/asm-arm/mach/map.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/mach/map.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/mach/map.h Tue Jul 5 22:58:33 2005
@@ -18,13 +18,14 @@
struct meminfo;
-#define MT_DEVICE 0
-#define MT_CACHECLEAN 1
-#define MT_MINICLEAN 2
-#define MT_LOW_VECTORS 3
-#define MT_HIGH_VECTORS 4
-#define MT_MEMORY 5
-#define MT_ROM 6
+#define MT_DEVICE 0
+#define MT_CACHECLEAN 1
+#define MT_MINICLEAN 2
+#define MT_LOW_VECTORS 3
+#define MT_HIGH_VECTORS 4
+#define MT_MEMORY 5
+#define MT_ROM 6
+#define MT_IXP2000_DEVICE 7
extern void create_memmap_holes(struct meminfo *);
extern void memtable_init(struct meminfo *);
Added: linux-libc-headers/trunk/include/asm-arm/mach/sharpsl_param.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/asm-arm/mach/sharpsl_param.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,37 @@
+/*
+ * Hardware parameter area specific to Sharp SL series devices
+ *
+ * Copyright (c) 2005 Richard Purdie
+ *
+ * Based on Sharp's 2.4 kernel patches
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+struct sharpsl_param_info {
+ unsigned int comadj_keyword;
+ unsigned int comadj;
+
+ unsigned int uuid_keyword;
+ unsigned char uuid[16];
+
+ unsigned int touch_keyword;
+ unsigned int touch_xp;
+ unsigned int touch_yp;
+ unsigned int touch_xd;
+ unsigned int touch_yd;
+
+ unsigned int adadj_keyword;
+ unsigned int adadj;
+
+ unsigned int phad_keyword;
+ unsigned int phadadj;
+} __attribute__((packed));
+
+
+extern struct sharpsl_param_info sharpsl_param;
+extern void sharpsl_save_param(void);
+
Modified: linux-libc-headers/trunk/include/asm-arm/ptrace.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/ptrace.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/ptrace.h Tue Jul 5 22:58:33 2005
@@ -16,6 +16,9 @@
#define PTRACE_GETFPREGS 14
#define PTRACE_SETFPREGS 15
+#define PTRACE_GETWMMXREGS 18
+#define PTRACE_SETWMMXREGS 19
+
#define PTRACE_OLDSETOPTIONS 21
#define PTRACE_GET_THREAD_AREA 22
Modified: linux-libc-headers/trunk/include/asm-arm/unistd.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm/unistd.h (original)
+++ linux-libc-headers/trunk/include/asm-arm/unistd.h Tue Jul 5 22:58:33 2005
@@ -1,7 +1,7 @@
/*
* linux/include/asm-arm/unistd.h
*
- * Copyright (C) 2001-2003 Russell King
+ * Copyright (C) 2001-2005 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -307,6 +307,50 @@
#define __NR_mq_getsetattr (__NR_SYSCALL_BASE+279)
#define __NR_waitid (__NR_SYSCALL_BASE+280)
+#if 0 /* reserve these for un-muxing socketcall */
+#define __NR_socket (__NR_SYSCALL_BASE+281)
+#define __NR_bind (__NR_SYSCALL_BASE+282)
+#define __NR_connect (__NR_SYSCALL_BASE+283)
+#define __NR_listen (__NR_SYSCALL_BASE+284)
+#define __NR_accept (__NR_SYSCALL_BASE+285)
+#define __NR_getsockname (__NR_SYSCALL_BASE+286)
+#define __NR_getpeername (__NR_SYSCALL_BASE+287)
+#define __NR_socketpair (__NR_SYSCALL_BASE+288)
+#define __NR_send (__NR_SYSCALL_BASE+289)
+#define __NR_sendto (__NR_SYSCALL_BASE+290)
+#define __NR_recv (__NR_SYSCALL_BASE+291)
+#define __NR_recvfrom (__NR_SYSCALL_BASE+292)
+#define __NR_shutdown (__NR_SYSCALL_BASE+293)
+#define __NR_setsockopt (__NR_SYSCALL_BASE+294)
+#define __NR_getsockopt (__NR_SYSCALL_BASE+295)
+#define __NR_sendmsg (__NR_SYSCALL_BASE+296)
+#define __NR_recvmsg (__NR_SYSCALL_BASE+297)
+#endif
+
+#if 0 /* reserve these for un-muxing ipc */
+#define __NR_semop (__NR_SYSCALL_BASE+298)
+#define __NR_semget (__NR_SYSCALL_BASE+299)
+#define __NR_semctl (__NR_SYSCALL_BASE+300)
+#define __NR_msgsnd (__NR_SYSCALL_BASE+301)
+#define __NR_msgrcv (__NR_SYSCALL_BASE+302)
+#define __NR_msgget (__NR_SYSCALL_BASE+303)
+#define __NR_msgctl (__NR_SYSCALL_BASE+304)
+#define __NR_shmat (__NR_SYSCALL_BASE+305)
+#define __NR_shmdt (__NR_SYSCALL_BASE+306)
+#define __NR_shmget (__NR_SYSCALL_BASE+307)
+#define __NR_shmctl (__NR_SYSCALL_BASE+308)
+#endif
+
+#define __NR_add_key (__NR_SYSCALL_BASE+309)
+#define __NR_request_key (__NR_SYSCALL_BASE+310)
+#define __NR_keyctl (__NR_SYSCALL_BASE+311)
+
+#if 0 /* reserved for un-muxing ipc */
+#define __NR_semtimedop (__NR_SYSCALL_BASE+312)
+#endif
+
+#define __NR_vserver (__NR_SYSCALL_BASE+313)
+
/*
* The following SWIs are ARM private.
*/
@@ -315,8 +359,7 @@
#define __ARM_NR_cacheflush (__ARM_NR_BASE+2)
#define __ARM_NR_usr26 (__ARM_NR_BASE+3)
#define __ARM_NR_usr32 (__ARM_NR_BASE+4)
-
-#define __ARM_NR_set_tls (__ARM_NR_BASE+0x800)
+#define __ARM_NR_set_tls (__ARM_NR_BASE+5)
#define __sys2(x) #x
#define __sys1(x) __sys2(x)
@@ -335,7 +378,7 @@
#define __syscall_return(type, res) \
do { \
- if ((unsigned long)(res) >= (unsigned long)(-125)) { \
+ if ((unsigned long)(res) >= (unsigned long)(-129)) { \
errno = -(res); \
res = -1; \
} \
@@ -487,6 +530,6 @@
* What we want is __attribute__((weak,alias("sys_ni_syscall"))),
* but it doesn't work on all toolchains, so we just do it by hand
*/
-#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall");
+#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
#endif /* __ASM_ARM_UNISTD_H */
Modified: linux-libc-headers/trunk/include/asm-arm26/cacheflush.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm26/cacheflush.h (original)
+++ linux-libc-headers/trunk/include/asm-arm26/cacheflush.h Tue Jul 5 22:58:33 2005
@@ -22,7 +22,7 @@
#define flush_cache_all() do { } while (0)
#define flush_cache_mm(mm) do { } while (0)
#define flush_cache_range(vma,start,end) do { } while (0)
-#define flush_cache_page(vma,vmaddr) do { } while (0)
+#define flush_cache_page(vma,vmaddr,pfn) do { } while (0)
#define flush_cache_vmap(start, end) do { } while (0)
#define flush_cache_vunmap(start, end) do { } while (0)
Modified: linux-libc-headers/trunk/include/asm-arm26/elf.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm26/elf.h (original)
+++ linux-libc-headers/trunk/include/asm-arm26/elf.h Tue Jul 5 22:58:33 2005
@@ -36,7 +36,7 @@
* These are used to set parameters in the core dumps.
*/
#define ELF_CLASS ELFCLASS32
-#define ELF_DATA ELFDATA2LSB;
+#define ELF_DATA ELFDATA2LSB
#define ELF_ARCH EM_ARM
#define USE_ELF_CORE_DUMP
Modified: linux-libc-headers/trunk/include/asm-arm26/unistd.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-arm26/unistd.h (original)
+++ linux-libc-headers/trunk/include/asm-arm26/unistd.h Tue Jul 5 22:58:33 2005
@@ -473,6 +473,6 @@
* What we want is __attribute__((weak,alias("sys_ni_syscall"))),
* but it doesn't work on all toolchains, so we just do it by hand
*/
-#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall");
+#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
#endif /* __ASM_ARM_UNISTD_H */
Modified: linux-libc-headers/trunk/include/asm-cris/arch-v10/sv_addr_ag.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-cris/arch-v10/sv_addr_ag.h (original)
+++ linux-libc-headers/trunk/include/asm-cris/arch-v10/sv_addr_ag.h Tue Jul 5 22:58:33 2005
@@ -64,10 +64,10 @@
/*--- Obsolete. Kept for backw compatibility. ---*/
/* Reads (or writes) a byte/uword/udword from the specified mode
register. */
-#define IO_RD(reg) (*(volatile u32*)(reg))
-#define IO_RD_B(reg) (*(volatile u8*)(reg))
-#define IO_RD_W(reg) (*(volatile u16*)(reg))
-#define IO_RD_D(reg) (*(volatile u32*)(reg))
+#define IO_RD(reg) (*(volatile __u32*)(reg))
+#define IO_RD_B(reg) (*(volatile __u8*)(reg))
+#define IO_RD_W(reg) (*(volatile __u16*)(reg))
+#define IO_RD_D(reg) (*(volatile __u32*)(reg))
/*------------------------------------------------------------
!* Start addresses of the different memory areas.
@@ -97,12 +97,12 @@
!*-----------------------------------------------------------*/
#ifndef __ASSEMBLER__
-# define IO_TYPECAST_UDWORD (volatile u32*)
-# define IO_TYPECAST_RO_UDWORD (const volatile u32*)
-# define IO_TYPECAST_UWORD (volatile u16*)
-# define IO_TYPECAST_RO_UWORD (const volatile u16*)
-# define IO_TYPECAST_BYTE (volatile u8*)
-# define IO_TYPECAST_RO_BYTE (const volatile u8*)
+# define IO_TYPECAST_UDWORD (volatile __u32*)
+# define IO_TYPECAST_RO_UDWORD (const volatile __u32*)
+# define IO_TYPECAST_UWORD (volatile __u16*)
+# define IO_TYPECAST_RO_UWORD (const volatile __u16*)
+# define IO_TYPECAST_BYTE (volatile __u8*)
+# define IO_TYPECAST_RO_BYTE (const volatile __u8*)
#else
# define IO_TYPECAST_UDWORD
# define IO_TYPECAST_RO_UDWORD
Modified: linux-libc-headers/trunk/include/asm-cris/cacheflush.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-cris/cacheflush.h (original)
+++ linux-libc-headers/trunk/include/asm-cris/cacheflush.h Tue Jul 5 22:58:33 2005
@@ -9,7 +9,7 @@
#define flush_cache_all() do { } while (0)
#define flush_cache_mm(mm) do { } while (0)
#define flush_cache_range(vma, start, end) do { } while (0)
-#define flush_cache_page(vma, vmaddr) do { } while (0)
+#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
#define flush_dcache_page(page) do { } while (0)
#define flush_dcache_mmap_lock(mapping) do { } while (0)
#define flush_dcache_mmap_unlock(mapping) do { } while (0)
Modified: linux-libc-headers/trunk/include/asm-cris/io.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-cris/io.h (original)
+++ linux-libc-headers/trunk/include/asm-cris/io.h Tue Jul 5 22:58:33 2005
@@ -86,4 +86,15 @@
#define outsw(x,y,z)
#define outsl(x,y,z)
+/*
+ * Convert a physical pointer to a virtual kernel pointer for /dev/mem
+ * access
+ */
+#define xlate_dev_mem_ptr(p) __va(p)
+
+/*
+ * Convert a virtual cached pointer to an uncached pointer
+ */
+#define xlate_dev_kmem_ptr(p) p
+
#endif
Modified: linux-libc-headers/trunk/include/asm-cris/pgalloc.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-cris/pgalloc.h (original)
+++ linux-libc-headers/trunk/include/asm-cris/pgalloc.h Tue Jul 5 22:58:33 2005
@@ -1,7 +1,6 @@
#ifndef _CRIS_PGALLOC_H
#define _CRIS_PGALLOC_H
-#include <asm/page.h>
#include <linux/threads.h>
#define pmd_populate_kernel(mm, pmd, pte) pmd_set(pmd, pte)
Modified: linux-libc-headers/trunk/include/asm-cris/system.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-cris/system.h (original)
+++ linux-libc-headers/trunk/include/asm-cris/system.h Tue Jul 5 22:58:33 2005
@@ -69,4 +69,6 @@
return x;
}
+#define arch_align_stack(x) (x)
+
#endif
Modified: linux-libc-headers/trunk/include/asm-cris/unistd.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-cris/unistd.h (original)
+++ linux-libc-headers/trunk/include/asm-cris/unistd.h Tue Jul 5 22:58:33 2005
@@ -359,6 +359,6 @@
* What we want is __attribute__((weak,alias("sys_ni_syscall"))),
* but it doesn't work on all toolchains, so we just do it by hand
*/
-#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall");
+#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
#endif /* _ASM_CRIS_UNISTD_H_ */
Modified: linux-libc-headers/trunk/include/asm-frv/cacheflush.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-frv/cacheflush.h (original)
+++ linux-libc-headers/trunk/include/asm-frv/cacheflush.h Tue Jul 5 22:58:33 2005
@@ -21,7 +21,7 @@
#define flush_cache_all() do {} while(0)
#define flush_cache_mm(mm) do {} while(0)
#define flush_cache_range(mm, start, end) do {} while(0)
-#define flush_cache_page(vma, vmaddr) do {} while(0)
+#define flush_cache_page(vma, vmaddr, pfn) do {} while(0)
#define flush_cache_vmap(start, end) do {} while(0)
#define flush_cache_vunmap(start, end) do {} while(0)
#define flush_dcache_mmap_lock(mapping) do {} while(0)
Modified: linux-libc-headers/trunk/include/asm-frv/system.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-frv/system.h (original)
+++ linux-libc-headers/trunk/include/asm-frv/system.h Tue Jul 5 22:58:33 2005
@@ -123,4 +123,6 @@
extern void die_if_kernel(const char *, ...) __attribute__((format(printf, 1, 2)));
extern void free_initmem(void);
+#define arch_align_stack(x) (x)
+
#endif /* _ASM_SYSTEM_H */
Modified: linux-libc-headers/trunk/include/asm-frv/tlbflush.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-frv/tlbflush.h (original)
+++ linux-libc-headers/trunk/include/asm-frv/tlbflush.h Tue Jul 5 22:58:33 2005
@@ -58,7 +58,8 @@
#define __flush_tlb_global() flush_tlb_all()
#define flush_tlb() flush_tlb_all()
#define flush_tlb_kernel_range(start, end) flush_tlb_all()
-#define flush_tlb_pgtables(mm,start,end) asm volatile("movgs gr0,scr0 ! movgs gr0,scr1");
+#define flush_tlb_pgtables(mm,start,end) \
+ asm volatile("movgs %0,scr0 ! movgs %0,scr1" :: "r"(ULONG_MAX) : "memory");
#else
Modified: linux-libc-headers/trunk/include/asm-frv/unistd.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-frv/unistd.h (original)
+++ linux-libc-headers/trunk/include/asm-frv/unistd.h Tue Jul 5 22:58:33 2005
@@ -470,7 +470,7 @@
* but it doesn't work on all toolchains, so we just do it by hand
*/
#ifndef cond_syscall
-#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall");
+#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
#endif
#endif /* _ASM_UNISTD_H_ */
Modified: linux-libc-headers/trunk/include/asm-h8300/cacheflush.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-h8300/cacheflush.h (original)
+++ linux-libc-headers/trunk/include/asm-h8300/cacheflush.h Tue Jul 5 22:58:33 2005
@@ -13,7 +13,7 @@
#define flush_cache_all()
#define flush_cache_mm(mm)
#define flush_cache_range(vma,a,b)
-#define flush_cache_page(vma,p)
+#define flush_cache_page(vma,p,pfn)
#define flush_dcache_page(page)
#define flush_dcache_mmap_lock(mapping)
#define flush_dcache_mmap_unlock(mapping)
Modified: linux-libc-headers/trunk/include/asm-h8300/mman.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-h8300/mman.h (original)
+++ linux-libc-headers/trunk/include/asm-h8300/mman.h Tue Jul 5 22:58:33 2005
@@ -4,6 +4,7 @@
#define PROT_READ 0x1 /* page can be read */
#define PROT_WRITE 0x2 /* page can be written */
#define PROT_EXEC 0x4 /* page can be executed */
+#define PROT_SEM 0x8 /* page may be used for atomic ops */
#define PROT_NONE 0x0 /* page can not be accessed */
#define PROT_GROWSDOWN 0x01000000 /* mprotect flag: extend change to start of growsdown vma */
#define PROT_GROWSUP 0x02000000 /* mprotect flag: extend change to end of growsup vma */
@@ -19,6 +20,8 @@
#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */
#define MAP_LOCKED 0x2000 /* pages are locked */
#define MAP_NORESERVE 0x4000 /* don't check for reservations */
+#define MAP_POPULATE 0x8000 /* populate (prefault) pagetables */
+#define MAP_NONBLOCK 0x10000 /* do not block on IO */
#define MS_ASYNC 1 /* sync memory asynchronously */
#define MS_INVALIDATE 2 /* invalidate the caches */
Modified: linux-libc-headers/trunk/include/asm-h8300/system.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-h8300/system.h (original)
+++ linux-libc-headers/trunk/include/asm-h8300/system.h Tue Jul 5 22:58:33 2005
@@ -143,4 +143,6 @@
asm("jmp @@0"); \
})
+#define arch_align_stack(x) (x)
+
#endif /* _H8300_SYSTEM_H */
Modified: linux-libc-headers/trunk/include/asm-h8300/unistd.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-h8300/unistd.h (original)
+++ linux-libc-headers/trunk/include/asm-h8300/unistd.h Tue Jul 5 22:58:33 2005
@@ -310,163 +310,155 @@
return (type) (res); \
} while (0)
-#define _syscall0(type, name) \
-type name(void) \
-{ \
- register long __res __asm__("er0"); \
- __asm__ __volatile__ ("mov.l %1,er0\n\t" \
- "trapa #0\n\t" \
- : "=r" (__res) \
- : "ir" (__NR_##name) \
- : "cc"); \
- if ((unsigned long)(__res) >= (unsigned long)(-125)) { \
- errno = -__res; \
- __res = -1; \
- } \
- return (type)__res; \
-}
-
-#define _syscall1(type, name, atype, a) \
-type name(atype a) \
-{ \
- register long __res __asm__("er0"); \
- __asm__ __volatile__ ("mov.l %2, er1\n\t" \
- "mov.l %1, er0\n\t" \
- "trapa #0\n\t" \
- : "=r" (__res) \
- : "ir" (__NR_##name), \
- "g" ((long)a) \
- : "cc", "er1"); \
- if ((unsigned long)(__res) >= (unsigned long)(-125)) { \
- errno = -__res; \
- __res = -1; \
- } \
- return (type)__res; \
-}
-
-#define _syscall2(type, name, atype, a, btype, b) \
-type name(atype a, btype b) \
-{ \
- register long __res __asm__("er0"); \
- __asm__ __volatile__ ("mov.l %3, er2\n\t" \
- "mov.l %2, er1\n\t" \
- "mov.l %1, er0\n\t" \
- "trapa #0\n\t" \
- : "=r" (__res) \
- : "ir" (__NR_##name), \
- "g" ((long)a), \
- "g" ((long)b) \
- : "cc", "er1", "er2"); \
- if ((unsigned long)(__res) >= (unsigned long)(-125)) { \
- errno = -__res; \
- __res = -1; \
- } \
- return (type)__res; \
-}
-
-#define _syscall3(type, name, atype, a, btype, b, ctype, c) \
-type name(atype a, btype b, ctype c) \
-{ \
- register long __res __asm__("er0"); \
- __asm__ __volatile__ ("mov.l %4, er3\n\t" \
- "mov.l %3, er2\n\t" \
- "mov.l %2, er1\n\t" \
- "mov.l %1, er0\n\t" \
- "trapa #0\n\t" \
- : "=r" (__res) \
- : "ir" (__NR_##name), \
- "g" ((long)a), \
- "g" ((long)b), \
- "g" ((long)c) \
- : "cc", "er1", "er2", "er3"); \
- if ((unsigned long)(__res) >= (unsigned long)(-125)) { \
- errno = -__res; \
- __res = -1; \
- } \
- return (type)__res; \
-}
-
-#define _syscall4(type, name, atype, a, btype, b, ctype, c, dtype, d) \
-type name(atype a, btype b, ctype c, dtype d) \
-{ \
- register long __res __asm__("er0"); \
- __asm__ __volatile__ ("mov.l %5, er4\n\t" \
- "mov.l %4, er3\n\t" \
- "mov.l %3, er2\n\t" \
- "mov.l %2, er1\n\t" \
- "mov.l %1, er0\n\t" \
- "trapa #0\n\t" \
- : "=r" (__res) \
- : "ir" (__NR_##name), \
- "g" ((long)a), \
- "g" ((long)b), \
- "g" ((long)c), \
- "g" ((long)d) \
- : "cc", "er1", "er2", "er3", "er4"); \
- if ((unsigned long)(__res) >= (unsigned long)(-125)) { \
- errno = -__res; \
- __res = -1; \
- } \
- return (type)__res; \
-}
-
-#define _syscall5(type, name, atype, a, btype, b, ctype, c, dtype, d, etype, e) \
-type name(atype a, btype b, ctype c, dtype d, etype e) \
-{ \
- register long __res __asm__("er0"); \
- __asm__ __volatile__ ("mov.l %6, er5\n\t" \
- "mov.l %5, er4\n\t" \
- "mov.l %4, er3\n\t" \
- "mov.l %3, er2\n\t" \
- "mov.l %2, er1\n\t" \
- "mov.l %1, er0\n\t" \
- "trapa #0\n\t" \
- : "=r" (__res) \
- : "ir" (__NR_##name), \
- "g" ((long)a), \
- "g" ((long)b), \
- "g" ((long)c), \
- "g" ((long)d), \
- "m" ((long)e) \
- : "cc", "er1", "er2", "er3", "er4", "er5"); \
- if ((unsigned long)(__res) >= (unsigned long)(-125)) { \
- errno = -__res; \
- __res = -1; \
- } \
- return (type)__res; \
-}
-
-#define _syscall6(type, name, atype, a, btype, b, ctype, c, dtype, d, \
- etype, e, ftype, f) \
-type name(atype a, btype b, ctype c, dtype d, etype e, ftype f) \
-{ \
- register long __res __asm__("er0"); \
- __asm__ __volatile__ ("mov.l er6, at -sp\n\t" \
- "mov.l %7, er6\n\t" \
- "mov.l %6, er5\n\t" \
- "mov.l %5, er4\n\t" \
- "mov.l %4, er3\n\t" \
- "mov.l %3, er2\n\t" \
- "mov.l %2, er1\n\t" \
- "mov.l %1, er0\n\t" \
- "trapa #0\n\t" \
- "mov.l @sp+,er6" \
- : "=r" (__res) \
- : "ir" (__NR_##name), \
- "g" ((long)a), \
- "g" ((long)b), \
- "g" ((long)c), \
- "g" ((long)d), \
- "m" ((long)e), \
- "m" ((long)e) \
- : "cc", "er1", "er2", "er3", "er4", "er5"); \
- if ((unsigned long)(__res) >= (unsigned long)(-125)) { \
- errno = -__res; \
- __res = -1; \
- } \
- return (type)__res; \
+#define _syscall0(type, name) \
+type name(void) \
+{ \
+ register long __res __asm__("er0"); \
+ __asm__ __volatile__ ("mov.l %1,er0\n\t" \
+ "trapa #0\n\t" \
+ : "=r" (__res) \
+ : "g" (__NR_##name) \
+ : "cc", "memory"); \
+ __syscall_return(type, __res); \
+}
+
+#define _syscall1(type, name, atype, a) \
+type name(atype a) \
+{ \
+ register long __res __asm__("er0"); \
+ register long _a __asm__("er1"); \
+ _a = (long)a; \
+ __asm__ __volatile__ ("mov.l %1,er0\n\t" \
+ "trapa #0\n\t" \
+ : "=r" (__res) \
+ : "g" (__NR_##name), \
+ "g" (_a) \
+ : "cc", "memory"); \
+ __syscall_return(type, __res); \
+}
+
+#define _syscall2(type, name, atype, a, btype, b) \
+type name(atype a, btype b) \
+{ \
+ register long __res __asm__("er0"); \
+ register long _a __asm__("er1"); \
+ register long _b __asm__("er2"); \
+ _a = (long)a; \
+ _b = (long)b; \
+ __asm__ __volatile__ ("mov.l %1,er0\n\t" \
+ "trapa #0\n\t" \
+ : "=r" (__res) \
+ : "g" (__NR_##name), \
+ "g" (_a), \
+ "g" (_b) \
+ : "cc", "memory"); \
+ __syscall_return(type, __res); \
+}
+
+#define _syscall3(type, name, atype, a, btype, b, ctype, c) \
+type name(atype a, btype b, ctype c) \
+{ \
+ register long __res __asm__("er0"); \
+ register long _a __asm__("er1"); \
+ register long _b __asm__("er2"); \
+ register long _c __asm__("er3"); \
+ _a = (long)a; \
+ _b = (long)b; \
+ _c = (long)c; \
+ __asm__ __volatile__ ("mov.l %1,er0\n\t" \
+ "trapa #0\n\t" \
+ : "=r" (__res) \
+ : "g" (__NR_##name), \
+ "g" (_a), \
+ "g" (_b), \
+ "g" (_c) \
+ : "cc", "memory"); \
+ __syscall_return(type, __res); \
+}
+
+#define _syscall4(type, name, atype, a, btype, b, \
+ ctype, c, dtype, d) \
+type name(atype a, btype b, ctype c, dtype d) \
+{ \
+ register long __res __asm__("er0"); \
+ register long _a __asm__("er1"); \
+ register long _b __asm__("er2"); \
+ register long _c __asm__("er3"); \
+ register long _d __asm__("er4"); \
+ _a = (long)a; \
+ _b = (long)b; \
+ _c = (long)c; \
+ _d = (long)d; \
+ __asm__ __volatile__ ("mov.l %1,er0\n\t" \
+ "trapa #0\n\t" \
+ : "=r" (__res) \
+ : "g" (__NR_##name), \
+ "g" (_a), \
+ "g" (_b), \
+ "g" (_c), \
+ "g" (_d) \
+ : "cc", "memory"); \
+ __syscall_return(type, __res); \
+}
+
+#define _syscall5(type, name, atype, a, btype, b, \
+ ctype, c, dtype, d, etype, e) \
+type name(atype a, btype b, ctype c, dtype d, etype e) \
+{ \
+ register long __res __asm__("er0"); \
+ register long _a __asm__("er1"); \
+ register long _b __asm__("er2"); \
+ register long _c __asm__("er3"); \
+ register long _d __asm__("er4"); \
+ register long _e __asm__("er5"); \
+ _a = (long)a; \
+ _b = (long)b; \
+ _c = (long)c; \
+ _d = (long)d; \
+ _e = (long)e; \
+ __asm__ __volatile__ ("mov.l %1,er0\n\t" \
+ "trapa #0\n\t" \
+ : "=r" (__res) \
+ : "g" (__NR_##name), \
+ "g" (_a), \
+ "g" (_b), \
+ "g" (_c), \
+ "g" (_d), \
+ "g" (_e) \
+ : "cc", "memory"); \
+ __syscall_return(type, __res); \
+}
+
+#define _syscall6(type, name, atype, a, btype, b, \
+ ctype, c, dtype, d, etype, e, ftype, f) \
+type name(atype a, btype b, ctype c, dtype d, etype e, ftype f) \
+{ \
+ register long __res __asm__("er0"); \
+ register long _a __asm__("er1"); \
+ register long _b __asm__("er2"); \
+ register long _c __asm__("er3"); \
+ register long _d __asm__("er4"); \
+ register long _e __asm__("er5"); \
+ register long _f __asm__("er6"); \
+ _a = (long)a; \
+ _b = (long)b; \
+ _c = (long)c; \
+ _d = (long)d; \
+ _e = (long)e; \
+ _f = (long)f; \
+ __asm__ __volatile__ ("mov.l %1,er0\n\t" \
+ "trapa #0\n\t" \
+ : "=r" (__res) \
+ : "g" (__NR_##name), \
+ "g" (_a), \
+ "g" (_b), \
+ "g" (_c), \
+ "g" (_d), \
+ "g" (_e) \
+ "g" (_f) \
+ : "cc", "memory"); \
+ __syscall_return(type, __res); \
}
-
#ifdef __KERNEL_SYSCALLS__
Modified: linux-libc-headers/trunk/include/asm-i386/agp.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-i386/agp.h (original)
+++ linux-libc-headers/trunk/include/asm-i386/agp.h Tue Jul 5 22:58:33 2005
@@ -21,4 +21,14 @@
worth it. Would need a page for it. */
#define flush_agp_cache() asm volatile("wbinvd":::"memory")
+/* Convert a physical address to an address suitable for the GART. */
+#define phys_to_gart(x) (x)
+#define gart_to_phys(x) (x)
+
+/* GATT allocation. Returns/accepts GATT kernel virtual address. */
+#define alloc_gatt_pages(order) \
+ ((char *)__get_free_pages(GFP_KERNEL, (order)))
+#define free_gatt_pages(table, order) \
+ free_pages((unsigned long)(table), (order))
+
#endif
Modified: linux-libc-headers/trunk/include/asm-i386/apic.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-i386/apic.h (original)
+++ linux-libc-headers/trunk/include/asm-i386/apic.h Tue Jul 5 22:58:33 2005
@@ -108,7 +108,6 @@
extern void disable_APIC_timer(void);
extern void enable_APIC_timer(void);
-extern int check_nmi_watchdog (void);
extern void enable_NMI_through_LVT0 (void * dummy);
extern unsigned int nmi_watchdog;
Modified: linux-libc-headers/trunk/include/asm-i386/apicdef.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-i386/apicdef.h (original)
+++ linux-libc-headers/trunk/include/asm-i386/apicdef.h Tue Jul 5 22:58:33 2005
@@ -372,6 +372,5 @@
} __attribute__ ((packed));
-#undef u32
#endif
Modified: linux-libc-headers/trunk/include/asm-i386/cacheflush.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-i386/cacheflush.h (original)
+++ linux-libc-headers/trunk/include/asm-i386/cacheflush.h Tue Jul 5 22:58:33 2005
@@ -7,7 +7,7 @@
#define flush_cache_all() do { } while (0)
#define flush_cache_mm(mm) do { } while (0)
#define flush_cache_range(vma, start, end) do { } while (0)
-#define flush_cache_page(vma, vmaddr) do { } while (0)
+#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
#define flush_dcache_page(page) do { } while (0)
#define flush_dcache_mmap_lock(mapping) do { } while (0)
#define flush_dcache_mmap_unlock(mapping) do { } while (0)
Modified: linux-libc-headers/trunk/include/asm-i386/checksum.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-i386/checksum.h (original)
+++ linux-libc-headers/trunk/include/asm-i386/checksum.h Tue Jul 5 22:58:33 2005
@@ -33,7 +33,7 @@
* passed in an incorrect kernel address to one of these functions.
*
* If you use these functions directly please don't forget the
- * verify_area().
+ * access_ok().
*/
static __inline__
unsigned int csum_partial_copy_nocheck (const unsigned char *src, unsigned char *dst,
Modified: linux-libc-headers/trunk/include/asm-i386/cpu.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-i386/cpu.h (original)
+++ linux-libc-headers/trunk/include/asm-i386/cpu.h Tue Jul 5 22:58:33 2005
@@ -11,7 +11,6 @@
struct i386_cpu {
struct cpu cpu;
};
-extern struct i386_cpu cpu_devices[NR_CPUS];
extern int arch_register_cpu(int num);
#ifdef CONFIG_HOTPLUG_CPU
extern void arch_unregister_cpu(int);
Modified: linux-libc-headers/trunk/include/asm-i386/cpufeature.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-i386/cpufeature.h (original)
+++ linux-libc-headers/trunk/include/asm-i386/cpufeature.h Tue Jul 5 22:58:33 2005
@@ -87,8 +87,8 @@
#define X86_FEATURE_XCRYPT_EN (5*32+ 7) /* on-CPU crypto enabled */
/* More extended AMD flags: CPUID level 0x80000001, ecx, word 6 */
-#define X86_FEATURE_LAHF_LM (5*32+ 0) /* LAHF/SAHF in long mode */
-#define X86_FEATURE_CMP_LEGACY (5*32+ 1) /* If yes HyperThreading not valid */
+#define X86_FEATURE_LAHF_LM (6*32+ 0) /* LAHF/SAHF in long mode */
+#define X86_FEATURE_CMP_LEGACY (6*32+ 1) /* If yes HyperThreading not valid */
#define cpu_has(c, bit) test_bit(bit, (c)->x86_capability)
#define boot_cpu_has(bit) test_bit(bit, boot_cpu_data.x86_capability)
Modified: linux-libc-headers/trunk/include/asm-i386/desc.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-i386/desc.h (original)
+++ linux-libc-headers/trunk/include/asm-i386/desc.h Tue Jul 5 22:58:33 2005
@@ -4,6 +4,8 @@
#include <asm/ldt.h>
#include <asm/segment.h>
+#define CPU_16BIT_STACK_SIZE 1024
+
#ifndef __ASSEMBLY__
#include <linux/preempt.h>
@@ -15,6 +17,8 @@
extern struct desc_struct cpu_gdt_table[GDT_ENTRIES];
DECLARE_PER_CPU(struct desc_struct, cpu_gdt_table[GDT_ENTRIES]);
+DECLARE_PER_CPU(unsigned char, cpu_16bit_stack[CPU_16BIT_STACK_SIZE]);
+
struct Xgt_desc_struct {
unsigned short size;
unsigned long address __attribute__((packed));
Modified: linux-libc-headers/trunk/include/asm-i386/e820.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-i386/e820.h (original)
+++ linux-libc-headers/trunk/include/asm-i386/e820.h Tue Jul 5 22:58:33 2005
@@ -13,7 +13,7 @@
#define __E820_HEADER
#define E820MAP 0x2d0 /* our map */
-#define E820MAX 32 /* number of entries in E820MAP */
+#define E820MAX 128 /* number of entries in E820MAP */
#define E820NR 0x1e8 /* # entries in E820MAP */
#define E820_RAM 1
Modified: linux-libc-headers/trunk/include/asm-i386/floppy.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-i386/floppy.h (original)
+++ linux-libc-headers/trunk/include/asm-i386/floppy.h Tue Jul 5 22:58:33 2005
@@ -256,7 +256,7 @@
return 0;
}
-struct fd_routine_l {
+static struct fd_routine_l {
int (*_request_dma)(unsigned int dmanr, const char * device_id);
void (*_free_dma)(unsigned int dmanr);
int (*_get_dma_residue)(unsigned int dummy);
Modified: linux-libc-headers/trunk/include/asm-i386/hardirq.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-i386/hardirq.h (original)
+++ linux-libc-headers/trunk/include/asm-i386/hardirq.h Tue Jul 5 22:58:33 2005
@@ -11,8 +11,13 @@
unsigned int apic_timer_irqs; /* arch dependent */
} ____cacheline_aligned irq_cpustat_t;
-#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
+DECLARE_PER_CPU(irq_cpustat_t, irq_stat);
+extern irq_cpustat_t irq_stat[];
+
+#define __ARCH_IRQ_STAT
+#define __IRQ_STAT(cpu, member) (per_cpu(irq_stat, cpu).member)
void ack_bad_irq(unsigned int irq);
+#include <linux/irq_cpustat.h>
#endif /* __ASM_HARDIRQ_H */
Modified: linux-libc-headers/trunk/include/asm-i386/linkage.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-i386/linkage.h (original)
+++ linux-libc-headers/trunk/include/asm-i386/linkage.h Tue Jul 5 22:58:33 2005
@@ -5,9 +5,7 @@
#define FASTCALL(x) x __attribute__((regparm(3)))
#define fastcall __attribute__((regparm(3)))
-#ifdef CONFIG_REGPARM
-# define prevent_tail_call(ret) __asm__ ("" : "=r" (ret) : "0" (ret))
-#endif
+#define prevent_tail_call(ret) __asm__ ("" : "=r" (ret) : "0" (ret))
#ifdef CONFIG_X86_ALIGNMENT_16
#define __ALIGN .align 16,0x90
Modified: linux-libc-headers/trunk/include/asm-i386/mach-default/mach_traps.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-i386/mach-default/mach_traps.h (original)
+++ linux-libc-headers/trunk/include/asm-i386/mach-default/mach_traps.h Tue Jul 5 22:58:33 2005
@@ -7,6 +7,8 @@
#ifndef _MACH_TRAPS_H
#define _MACH_TRAPS_H
+#include <asm/mc146818rtc.h>
+
static inline void clear_mem_error(unsigned char reason)
{
reason = (reason & 0xf) | 4;
@@ -20,10 +22,20 @@
static inline void reassert_nmi(void)
{
+ int old_reg = -1;
+
+ if (do_i_have_lock_cmos())
+ old_reg = current_lock_cmos_reg();
+ else
+ lock_cmos(0); /* register doesn't matter here */
outb(0x8f, 0x70);
inb(0x71); /* dummy */
outb(0x0f, 0x70);
inb(0x71); /* dummy */
+ if (old_reg >= 0)
+ outb(old_reg, 0x70);
+ else
+ unlock_cmos();
}
#endif /* !_MACH_TRAPS_H */
Modified: linux-libc-headers/trunk/include/asm-i386/mach-numaq/mach_ipi.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-i386/mach-numaq/mach_ipi.h (original)
+++ linux-libc-headers/trunk/include/asm-i386/mach-numaq/mach_ipi.h Tue Jul 5 22:58:33 2005
@@ -1,7 +1,7 @@
#ifndef __ASM_MACH_IPI_H
#define __ASM_MACH_IPI_H
-inline void send_IPI_mask_sequence(cpumask_t, int vector);
+void send_IPI_mask_sequence(cpumask_t, int vector);
static inline void send_IPI_mask(cpumask_t mask, int vector)
{
Modified: linux-libc-headers/trunk/include/asm-i386/module.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-i386/module.h (original)
+++ linux-libc-headers/trunk/include/asm-i386/module.h Tue Jul 5 22:58:33 2005
@@ -52,6 +52,8 @@
#define MODULE_PROC_FAMILY "CYRIXIII "
#elif defined CONFIG_MVIAC3_2
#define MODULE_PROC_FAMILY "VIAC3-2 "
+#elif CONFIG_MGEODEGX1
+#define MODULE_PROC_FAMILY "GEODEGX1 "
#else
#error unknown processor family
#endif
Modified: linux-libc-headers/trunk/include/asm-i386/mpspec.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-i386/mpspec.h (original)
+++ linux-libc-headers/trunk/include/asm-i386/mpspec.h Tue Jul 5 22:58:33 2005
@@ -22,7 +22,6 @@
extern struct mpc_config_intsrc mp_irqs [MAX_IRQ_SOURCES];
extern int mpc_default_type;
extern int mp_bus_id_to_pci_bus [MAX_MP_BUSSES];
-extern int mp_current_pci_id;
extern unsigned long mp_lapic_addr;
extern int pic_mode;
extern int using_apic_timer;
Modified: linux-libc-headers/trunk/include/asm-i386/msr.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-i386/msr.h (original)
+++ linux-libc-headers/trunk/include/asm-i386/msr.h Tue Jul 5 22:58:33 2005
@@ -32,6 +32,21 @@
wrmsr (msr, lo, hi);
}
+/* wrmsr with exception handling */
+#define wrmsr_safe(msr,a,b) ({ int ret__; \
+ asm volatile("2: wrmsr ; xorl %0,%0\n" \
+ "1:\n\t" \
+ ".section .fixup,\"ax\"\n\t" \
+ "3: movl %4,%0 ; jmp 1b\n\t" \
+ ".previous\n\t" \
+ ".section __ex_table,\"a\"\n" \
+ " .align 4\n\t" \
+ " .long 2b,3b\n\t" \
+ ".previous" \
+ : "=a" (ret__) \
+ : "c" (msr), "0" (a), "d" (b), "i" (-EFAULT));\
+ ret__; })
+
#define rdtsc(low,high) \
__asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high))
Modified: linux-libc-headers/trunk/include/asm-i386/pgalloc.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-i386/pgalloc.h (original)
+++ linux-libc-headers/trunk/include/asm-i386/pgalloc.h Tue Jul 5 22:58:33 2005
@@ -1,7 +1,6 @@
#ifndef _I386_PGALLOC_H
#define _I386_PGALLOC_H
-#include <asm/processor.h>
#include <asm/fixmap.h>
#include <linux/threads.h>
Modified: linux-libc-headers/trunk/include/asm-i386/processor.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-i386/processor.h (original)
+++ linux-libc-headers/trunk/include/asm-i386/processor.h Tue Jul 5 22:58:33 2005
@@ -97,12 +97,12 @@
#endif
extern int phys_proc_id[NR_CPUS];
+extern int cpu_core_id[NR_CPUS];
extern char ignore_fpu_irq;
extern void identify_cpu(struct cpuinfo_x86 *);
extern void print_cpu_info(struct cpuinfo_x86 *);
extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c);
-extern void dodgy_tsc(void);
#ifdef CONFIG_X86_HT
extern void detect_ht(struct cpuinfo_x86 *c);
@@ -136,7 +136,7 @@
* clear %ecx since some cpus (Cyrix MII) do not set or clear %ecx
* resulting in stale register contents being returned.
*/
-static inline void cpuid(int op, int *eax, int *ebx, int *ecx, int *edx)
+static inline void cpuid(unsigned int op, unsigned int *eax, unsigned int *ebx, unsigned int *ecx, unsigned int *edx)
{
__asm__("cpuid"
: "=a" (*eax),
@@ -146,6 +146,18 @@
: "0" (op), "c"(0));
}
+/* Some CPUID calls want 'count' to be placed in ecx */
+static inline void cpuid_count(int op, int count, int *eax, int *ebx, int *ecx,
+ int *edx)
+{
+ __asm__("cpuid"
+ : "=a" (*eax),
+ "=b" (*ebx),
+ "=c" (*ecx),
+ "=d" (*edx)
+ : "0" (op), "c" (count));
+}
+
/*
* CPUID functions returning a single datum
*/
@@ -487,6 +499,14 @@
regs->esp = new_esp; \
} while (0)
+/*
+ * This special macro can be used to load a debugging register
+ */
+#define loaddebug(thread,register) \
+ __asm__("movl %0,%%db" #register \
+ : /* no output */ \
+ :"r" ((thread)->debugreg[register]))
+
/* Forward declaration, a strange C thing */
struct task_struct;
struct mm_struct;
Modified: linux-libc-headers/trunk/include/asm-i386/segment.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-i386/segment.h (original)
+++ linux-libc-headers/trunk/include/asm-i386/segment.h Tue Jul 5 22:58:33 2005
@@ -38,7 +38,7 @@
* 24 - APM BIOS support
* 25 - APM BIOS support
*
- * 26 - unused
+ * 26 - ESPFIX small SS
* 27 - unused
* 28 - unused
* 29 - unused
@@ -71,6 +71,9 @@
#define GDT_ENTRY_PNPBIOS_BASE (GDT_ENTRY_KERNEL_BASE + 6)
#define GDT_ENTRY_APMBIOS_BASE (GDT_ENTRY_KERNEL_BASE + 11)
+#define GDT_ENTRY_ESPFIX_SS (GDT_ENTRY_KERNEL_BASE + 14)
+#define __ESPFIX_SS (GDT_ENTRY_ESPFIX_SS * 8)
+
#define GDT_ENTRY_DOUBLEFAULT_TSS 31
/*
Modified: linux-libc-headers/trunk/include/asm-i386/suspend.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-i386/suspend.h (original)
+++ linux-libc-headers/trunk/include/asm-i386/suspend.h Tue Jul 5 22:58:33 2005
@@ -10,10 +10,12 @@
arch_prepare_suspend(void)
{
/* If you want to make non-PSE machine work, turn off paging
- in do_magic. swsusp_pg_dir should have identity mapping, so
+ in swsusp_arch_suspend. swsusp_pg_dir should have identity mapping, so
it could work... */
- if (!cpu_has_pse)
+ if (!cpu_has_pse) {
+ printk(KERN_ERR "PSE is required for swsusp.\n");
return -EPERM;
+ }
return 0;
}
@@ -34,11 +36,6 @@
unsigned long return_address;
} __attribute__((packed));
-#define loaddebug(thread,register) \
- __asm__("movl %0,%%db" #register \
- : /* no output */ \
- :"r" ((thread)->debugreg[register]))
-
#ifdef CONFIG_ACPI_SLEEP
extern unsigned long saved_eip;
extern unsigned long saved_esp;
@@ -61,5 +58,4 @@
/* routines for saving/restoring kernel state */
extern int acpi_save_state_mem(void);
-extern int acpi_save_state_disk(void);
#endif
Modified: linux-libc-headers/trunk/include/asm-i386/system.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-i386/system.h (original)
+++ linux-libc-headers/trunk/include/asm-i386/system.h Tue Jul 5 22:58:33 2005
@@ -336,4 +336,6 @@
extern int es7000_plat;
void cpu_idle_wait(void);
+extern unsigned long arch_align_stack(unsigned long sp);
+
#endif
Modified: linux-libc-headers/trunk/include/asm-i386/timer.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-i386/timer.h (original)
+++ linux-libc-headers/trunk/include/asm-i386/timer.h Tue Jul 5 22:58:33 2005
@@ -53,6 +53,7 @@
extern unsigned long calibrate_tsc(void);
extern void init_cpu_khz(void);
+extern int recalibrate_cpu_khz(void);
#ifdef CONFIG_HPET_TIMER
extern struct init_timer_opts timer_hpet_init;
extern unsigned long calibrate_tsc_hpet(unsigned long *tsc_hpet_quotient_ptr);
Modified: linux-libc-headers/trunk/include/asm-i386/unaligned.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-i386/unaligned.h (original)
+++ linux-libc-headers/trunk/include/asm-i386/unaligned.h Tue Jul 5 22:58:33 2005
@@ -15,7 +15,7 @@
*
* This macro should be used for accessing values larger in size than
* single bytes at locations that are expected to be improperly aligned,
- * e.g. retrieving a __u16 value from a location not u16-aligned.
+ * e.g. retrieving a __u16 value from a location not __u16-aligned.
*
* Note that unaligned accesses can be very expensive on some architectures.
*/
@@ -28,7 +28,7 @@
*
* This macro should be used for placing values larger in size than
* single bytes at locations that are expected to be improperly aligned,
- * e.g. writing a __u16 value to a location not u16-aligned.
+ * e.g. writing a __u16 value to a location not __u16-aligned.
*
* Note that unaligned accesses can be very expensive on some architectures.
*/
Modified: linux-libc-headers/trunk/include/asm-i386/unistd.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-i386/unistd.h (original)
+++ linux-libc-headers/trunk/include/asm-i386/unistd.h Tue Jul 5 22:58:33 2005
@@ -434,7 +434,7 @@
* but it doesn't work on all toolchains, so we just do it by hand
*/
#ifndef cond_syscall
-#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall");
+#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
#endif
#endif /* _ASM_I386_UNISTD_H_ */
Modified: linux-libc-headers/trunk/include/asm-ia64/agp.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ia64/agp.h (original)
+++ linux-libc-headers/trunk/include/asm-ia64/agp.h Tue Jul 5 22:58:33 2005
@@ -18,4 +18,14 @@
#define flush_agp_mappings() /* nothing */
#define flush_agp_cache() mb()
+/* Convert a physical address to an address suitable for the GART. */
+#define phys_to_gart(x) (x)
+#define gart_to_phys(x) (x)
+
+/* GATT allocation. Returns/accepts GATT kernel virtual address. */
+#define alloc_gatt_pages(order) \
+ ((char *)__get_free_pages(GFP_KERNEL, (order)))
+#define free_gatt_pages(table, order) \
+ free_pages((unsigned long)(table), (order))
+
#endif /* _ASM_IA64_AGP_H */
Modified: linux-libc-headers/trunk/include/asm-ia64/cacheflush.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ia64/cacheflush.h (original)
+++ linux-libc-headers/trunk/include/asm-ia64/cacheflush.h Tue Jul 5 22:58:33 2005
@@ -19,7 +19,7 @@
#define flush_cache_all() do { } while (0)
#define flush_cache_mm(mm) do { } while (0)
#define flush_cache_range(vma, start, end) do { } while (0)
-#define flush_cache_page(vma, vmaddr) do { } while (0)
+#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
#define flush_icache_page(vma,page) do { } while (0)
#define flush_cache_vmap(start, end) do { } while (0)
#define flush_cache_vunmap(start, end) do { } while (0)
Modified: linux-libc-headers/trunk/include/asm-ia64/gcc_intrin.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ia64/gcc_intrin.h (original)
+++ linux-libc-headers/trunk/include/asm-ia64/gcc_intrin.h Tue Jul 5 22:58:33 2005
@@ -131,13 +131,17 @@
ia64_intri_res; \
})
-#define ia64_popcnt(x) \
-({ \
+#if __GNUC__ >= 4 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
+# define ia64_popcnt(x) __builtin_popcountl(x)
+#else
+# define ia64_popcnt(x) \
+ ({ \
__u64 ia64_intri_res; \
asm ("popcnt %0=%1" : "=r" (ia64_intri_res) : "r" (x)); \
\
ia64_intri_res; \
-})
+ })
+#endif
#define ia64_getf_exp(x) \
({ \
Modified: linux-libc-headers/trunk/include/asm-ia64/hw_irq.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ia64/hw_irq.h (original)
+++ linux-libc-headers/trunk/include/asm-ia64/hw_irq.h Tue Jul 5 22:58:33 2005
@@ -81,6 +81,7 @@
extern struct hw_interrupt_type irq_type_ia64_lsapic; /* CPU-internal interrupt controller */
+extern int assign_irq_vector_nopanic (int irq); /* allocate a free vector without panic */
extern int assign_irq_vector (int irq); /* allocate a free vector */
extern void free_irq_vector (int vector);
extern void ia64_send_ipi (int cpu, int vector, int delivery_mode, int redirect);
Modified: linux-libc-headers/trunk/include/asm-ia64/pal.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ia64/pal.h (original)
+++ linux-libc-headers/trunk/include/asm-ia64/pal.h Tue Jul 5 22:58:33 2005
@@ -67,6 +67,7 @@
#define PAL_REGISTER_INFO 39 /* return AR and CR register information*/
#define PAL_SHUTDOWN 40 /* enter processor shutdown state */
#define PAL_PREFETCH_VISIBILITY 41 /* Make Processor Prefetches Visible */
+#define PAL_LOGICAL_TO_PHYSICAL 42 /* returns information on logical to physical processor mapping */
#define PAL_COPY_PAL 256 /* relocate PAL procedures and PAL PMI */
#define PAL_HALT_INFO 257 /* return the low power capabilities of processor */
@@ -853,7 +854,7 @@
extern void pal_bus_features_print (__u64);
/* Provide information about configurable processor bus features */
-static inline s64
+static inline __s64
ia64_pal_bus_get_features (pal_bus_features_u_t *features_avail,
pal_bus_features_u_t *features_status,
pal_bus_features_u_t *features_control)
@@ -870,7 +871,7 @@
}
/* Enables/disables specific processor bus features */
-static inline s64
+static inline __s64
ia64_pal_bus_set_features (pal_bus_features_u_t feature_select)
{
struct ia64_pal_retval iprv;
@@ -879,7 +880,7 @@
}
/* Get detailed cache information */
-static inline s64
+static inline __s64
ia64_pal_cache_config_info (__u64 cache_level, __u64 cache_type, pal_cache_config_info_t *conf)
{
struct ia64_pal_retval iprv;
@@ -897,7 +898,7 @@
}
/* Get detailed cche protection information */
-static inline s64
+static inline __s64
ia64_pal_cache_prot_info (__u64 cache_level, __u64 cache_type, pal_cache_protection_info_t *prot)
{
struct ia64_pal_retval iprv;
@@ -920,7 +921,7 @@
* Flush the processor instruction or data caches. *PROGRESS must be
* initialized to zero before calling this for the first time..
*/
-static inline s64
+static inline __s64
ia64_pal_cache_flush (__u64 cache_type, __u64 invalidate, __u64 *progress, __u64 *vector)
{
struct ia64_pal_retval iprv;
@@ -933,7 +934,7 @@
/* Initialize the processor controlled caches */
-static inline s64
+static inline __s64
ia64_pal_cache_init (__u64 level, __u64 cache_type, __u64 rest)
{
struct ia64_pal_retval iprv;
@@ -945,7 +946,7 @@
* processor controlled cache to known values without the availability
* of backing memory.
*/
-static inline s64
+static inline __s64
ia64_pal_cache_line_init (__u64 physical_addr, __u64 data_value)
{
struct ia64_pal_retval iprv;
@@ -955,7 +956,7 @@
/* Read the data and tag of a processor controlled cache line for diags */
-static inline s64
+static inline __s64
ia64_pal_cache_read (pal_cache_line_id_u_t line_id, __u64 physical_addr)
{
struct ia64_pal_retval iprv;
@@ -964,7 +965,7 @@
}
/* Return summary information about the heirarchy of caches controlled by the processor */
-static inline s64
+static inline __s64
ia64_pal_cache_summary (__u64 *cache_levels, __u64 *unique_caches)
{
struct ia64_pal_retval iprv;
@@ -977,7 +978,7 @@
}
/* Write the data and tag of a processor-controlled cache line for diags */
-static inline s64
+static inline __s64
ia64_pal_cache_write (pal_cache_line_id_u_t line_id, __u64 physical_addr, __u64 data)
{
struct ia64_pal_retval iprv;
@@ -987,7 +988,7 @@
/* Return the parameters needed to copy relocatable PAL procedures from ROM to memory */
-static inline s64
+static inline __s64
ia64_pal_copy_info (__u64 copy_type, __u64 num_procs, __u64 num_iopics,
__u64 *buffer_size, __u64 *buffer_align)
{
@@ -1001,7 +1002,7 @@
}
/* Copy relocatable PAL procedures from ROM to memory */
-static inline s64
+static inline __s64
ia64_pal_copy_pal (__u64 target_addr, __u64 alloc_size, __u64 processor, __u64 *pal_proc_offset)
{
struct ia64_pal_retval iprv;
@@ -1012,7 +1013,7 @@
}
/* Return the number of instruction and data debug register pairs */
-static inline s64
+static inline __s64
ia64_pal_debug_info (__u64 *inst_regs, __u64 *data_regs)
{
struct ia64_pal_retval iprv;
@@ -1027,7 +1028,7 @@
#ifdef TBD
/* Switch from IA64-system environment to IA-32 system environment */
-static inline s64
+static inline __s64
ia64_pal_enter_ia32_env (ia32_env1, ia32_env2, ia32_env3)
{
struct ia64_pal_retval iprv;
@@ -1037,7 +1038,7 @@
#endif
/* Get unique geographical address of this processor on its bus */
-static inline s64
+static inline __s64
ia64_pal_fixed_addr (__u64 *global_unique_addr)
{
struct ia64_pal_retval iprv;
@@ -1048,7 +1049,7 @@
}
/* Get base frequency of the platform if generated by the processor */
-static inline s64
+static inline __s64
ia64_pal_freq_base (__u64 *platform_base_freq)
{
struct ia64_pal_retval iprv;
@@ -1062,7 +1063,7 @@
* Get the ratios for processor frequency, bus frequency and interval timer to
* to base frequency of the platform
*/
-static inline s64
+static inline __s64
ia64_pal_freq_ratios (struct pal_freq_ratio *proc_ratio, struct pal_freq_ratio *bus_ratio,
struct pal_freq_ratio *itc_ratio)
{
@@ -1081,7 +1082,7 @@
* power states where prefetching and execution are suspended and cache and
* TLB coherency is not maintained.
*/
-static inline s64
+static inline __s64
ia64_pal_halt (__u64 halt_state)
{
struct ia64_pal_retval iprv;
@@ -1102,7 +1103,7 @@
} pal_power_mgmt_info_u_t;
/* Return information about processor's optional power management capabilities. */
-static inline s64
+static inline __s64
ia64_pal_halt_info (pal_power_mgmt_info_u_t *power_buf)
{
struct ia64_pal_retval iprv;
@@ -1113,7 +1114,7 @@
/* Cause the processor to enter LIGHT HALT state, where prefetching and execution are
* suspended, but cache and TLB coherency is maintained.
*/
-static inline s64
+static inline __s64
ia64_pal_halt_light (void)
{
struct ia64_pal_retval iprv;
@@ -1125,7 +1126,7 @@
* the error logging registers to be written. This procedure also checks the pending
* machine check bit and pending INIT bit and reports their states.
*/
-static inline s64
+static inline __s64
ia64_pal_mc_clear_log (__u64 *pending_vector)
{
struct ia64_pal_retval iprv;
@@ -1138,7 +1139,7 @@
/* Ensure that all outstanding transactions in a processor are completed or that any
* MCA due to thes outstanding transaction is taken.
*/
-static inline s64
+static inline __s64
ia64_pal_mc_drain (void)
{
struct ia64_pal_retval iprv;
@@ -1147,7 +1148,7 @@
}
/* Return the machine check dynamic processor state */
-static inline s64
+static inline __s64
ia64_pal_mc_dynamic_state (__u64 offset, __u64 *size, __u64 *pds)
{
struct ia64_pal_retval iprv;
@@ -1160,7 +1161,7 @@
}
/* Return processor machine check information */
-static inline s64
+static inline __s64
ia64_pal_mc_error_info (__u64 info_index, __u64 type_index, __u64 *size, __u64 *error_info)
{
struct ia64_pal_retval iprv;
@@ -1175,7 +1176,7 @@
/* Inform PALE_CHECK whether a machine check is expected so that PALE_CHECK willnot
* attempt to correct any expected machine checks.
*/
-static inline s64
+static inline __s64
ia64_pal_mc_expected (__u64 expected, __u64 *previous)
{
struct ia64_pal_retval iprv;
@@ -1189,7 +1190,7 @@
* minimal processor state in the event of a machine check or initialization
* event.
*/
-static inline s64
+static inline __s64
ia64_pal_mc_register_mem (__u64 physical_addr)
{
struct ia64_pal_retval iprv;
@@ -1200,7 +1201,7 @@
/* Restore minimal architectural processor state, set CMC interrupt if necessary
* and resume execution
*/
-static inline s64
+static inline __s64
ia64_pal_mc_resume (__u64 set_cmci, __u64 save_ptr)
{
struct ia64_pal_retval iprv;
@@ -1209,7 +1210,7 @@
}
/* Return the memory attributes implemented by the processor */
-static inline s64
+static inline __s64
ia64_pal_mem_attrib (__u64 *mem_attrib)
{
struct ia64_pal_retval iprv;
@@ -1222,7 +1223,7 @@
/* Return the amount of memory needed for second phase of processor
* self-test and the required alignment of memory.
*/
-static inline s64
+static inline __s64
ia64_pal_mem_for_test (__u64 *bytes_needed, __u64 *alignment)
{
struct ia64_pal_retval iprv;
@@ -1248,7 +1249,7 @@
/* Return the performance monitor information about what can be counted
* and how to configure the monitors to count the desired events.
*/
-static inline s64
+static inline __s64
ia64_pal_perf_mon_info (__u64 *pm_buffer, pal_perf_mon_info_u_t *pm_info)
{
struct ia64_pal_retval iprv;
@@ -1261,7 +1262,7 @@
/* Specifies the physical address of the processor interrupt block
* and I/O port space.
*/
-static inline s64
+static inline __s64
ia64_pal_platform_addr (__u64 type, __u64 physical_addr)
{
struct ia64_pal_retval iprv;
@@ -1270,7 +1271,7 @@
}
/* Set the SAL PMI entrypoint in memory */
-static inline s64
+static inline __s64
ia64_pal_pmi_entrypoint (__u64 sal_pmi_entry_addr)
{
struct ia64_pal_retval iprv;
@@ -1280,7 +1281,7 @@
struct pal_features_s;
/* Provide information about configurable processor features */
-static inline s64
+static inline __s64
ia64_pal_proc_get_features (__u64 *features_avail,
__u64 *features_status,
__u64 *features_control)
@@ -1296,7 +1297,7 @@
}
/* Enable/disable processor dependent features */
-static inline s64
+static inline __s64
ia64_pal_proc_set_features (__u64 feature_select)
{
struct ia64_pal_retval iprv;
@@ -1317,7 +1318,7 @@
/* Return the information required for the architected loop used to purge
* (initialize) the entire TC
*/
-static inline s64
+static inline __s64
ia64_get_ptce (ia64_ptce_info_t *ptce)
{
struct ia64_pal_retval iprv;
@@ -1337,7 +1338,7 @@
}
/* Return info about implemented application and control registers. */
-static inline s64
+static inline __s64
ia64_pal_register_info (__u64 info_request, __u64 *reg_info_1, __u64 *reg_info_2)
{
struct ia64_pal_retval iprv;
@@ -1361,7 +1362,7 @@
/* Return information about the register stack and RSE for this processor
* implementation.
*/
-static inline s64
+static inline __s64
ia64_pal_rse_info (__u64 *num_phys_stacked, pal_hints_u_t *hints)
{
struct ia64_pal_retval iprv;
@@ -1377,7 +1378,7 @@
* suspended, but cause cache and TLB coherency to be maintained.
* This is usually called in IA-32 mode.
*/
-static inline s64
+static inline __s64
ia64_pal_shutdown (void)
{
struct ia64_pal_retval iprv;
@@ -1386,7 +1387,7 @@
}
/* Perform the second phase of processor self-test. */
-static inline s64
+static inline __s64
ia64_pal_test_proc (__u64 test_addr, __u64 test_size, __u64 attributes, __u64 *self_test_state)
{
struct ia64_pal_retval iprv;
@@ -1411,7 +1412,7 @@
/* Return PAL version information */
-static inline s64
+static inline __s64
ia64_pal_version (pal_version_u_t *pal_min_version, pal_version_u_t *pal_cur_version)
{
struct ia64_pal_retval iprv;
@@ -1449,7 +1450,7 @@
/* Return information about the virtual memory characteristics of the processor
* implementation.
*/
-static inline s64
+static inline __s64
ia64_pal_vm_info (__u64 tc_level, __u64 tc_type, pal_tc_info_u_t *tc_info, __u64 *tc_pages)
{
struct ia64_pal_retval iprv;
@@ -1464,7 +1465,7 @@
/* Get page size information about the virtual memory characteristics of the processor
* implementation.
*/
-static inline s64
+static inline __s64
ia64_pal_vm_page_size (__u64 *tr_pages, __u64 *vw_pages)
{
struct ia64_pal_retval iprv;
@@ -1503,7 +1504,7 @@
/* Get summary information about the virtual memory characteristics of the processor
* implementation.
*/
-static inline s64
+static inline __s64
ia64_pal_vm_summary (pal_vm_info_1_u_t *vm_info_1, pal_vm_info_2_u_t *vm_info_2)
{
struct ia64_pal_retval iprv;
@@ -1527,7 +1528,7 @@
} pal_tr_valid_u_t;
/* Read a translation register */
-static inline s64
+static inline __s64
ia64_pal_tr_read (__u64 reg_num, __u64 tr_type, __u64 *tr_buffer, pal_tr_valid_u_t *tr_valid)
{
struct ia64_pal_retval iprv;
@@ -1551,7 +1552,7 @@
#define PAL_VISIBILITY_INVAL_ARG -2
#define PAL_VISIBILITY_ERROR -3
-static inline s64
+static inline __s64
ia64_pal_prefetch_visibility (__s64 trans_type)
{
struct ia64_pal_retval iprv;
@@ -1559,6 +1560,73 @@
return iprv.status;
}
+/* data structure for getting information on logical to physical mappings */
+typedef union pal_log_overview_u {
+ struct {
+ __u64 num_log :16, /* Total number of logical
+ * processors on this die
+ */
+ tpc :8, /* Threads per core */
+ reserved3 :8, /* Reserved */
+ cpp :8, /* Cores per processor */
+ reserved2 :8, /* Reserved */
+ ppid :8, /* Physical processor ID */
+ reserved1 :8; /* Reserved */
+ } overview_bits;
+ __u64 overview_data;
+} pal_log_overview_t;
+
+typedef union pal_proc_n_log_info1_u{
+ struct {
+ __u64 tid :16, /* Thread id */
+ reserved2 :16, /* Reserved */
+ cid :16, /* Core id */
+ reserved1 :16; /* Reserved */
+ } ppli1_bits;
+ __u64 ppli1_data;
+} pal_proc_n_log_info1_t;
+
+typedef union pal_proc_n_log_info2_u {
+ struct {
+ __u64 la :16, /* Logical address */
+ reserved :48; /* Reserved */
+ } ppli2_bits;
+ __u64 ppli2_data;
+} pal_proc_n_log_info2_t;
+
+typedef struct pal_logical_to_physical_s
+{
+ pal_log_overview_t overview;
+ pal_proc_n_log_info1_t ppli1;
+ pal_proc_n_log_info2_t ppli2;
+} pal_logical_to_physical_t;
+
+#define overview_num_log overview.overview_bits.num_log
+#define overview_tpc overview.overview_bits.tpc
+#define overview_cpp overview.overview_bits.cpp
+#define overview_ppid overview.overview_bits.ppid
+#define log1_tid ppli1.ppli1_bits.tid
+#define log1_cid ppli1.ppli1_bits.cid
+#define log2_la ppli2.ppli2_bits.la
+
+/* Get information on logical to physical processor mappings. */
+static inline __s64
+ia64_pal_logical_to_phys(__u64 proc_number, pal_logical_to_physical_t *mapping)
+{
+ struct ia64_pal_retval iprv;
+
+ PAL_CALL(iprv, PAL_LOGICAL_TO_PHYSICAL, proc_number, 0, 0);
+
+ if (iprv.status == PAL_STATUS_SUCCESS)
+ {
+ if (proc_number == 0)
+ mapping->overview.overview_data = iprv.v0;
+ mapping->ppli1.ppli1_data = iprv.v1;
+ mapping->ppli2.ppli2_data = iprv.v2;
+ }
+
+ return iprv.status;
+}
#endif /* __ASSEMBLY__ */
#endif /* _ASM_IA64_PAL_H */
Modified: linux-libc-headers/trunk/include/asm-ia64/pgalloc.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ia64/pgalloc.h (original)
+++ linux-libc-headers/trunk/include/asm-ia64/pgalloc.h Tue Jul 5 22:58:33 2005
@@ -18,148 +18,125 @@
#include <linux/threads.h>
#include <asm/mmu_context.h>
-#include <asm/processor.h>
-/*
- * Very stupidly, we used to get new pgd's and pmd's, init their contents
- * to point to the NULL versions of the next level page table, later on
- * completely re-init them the same way, then free them up. This wasted
- * a lot of work and caused unnecessary memory traffic. How broken...
- * We fix this by caching them.
- */
-#define pgd_quicklist (local_cpu_data->pgd_quick)
-#define pmd_quicklist (local_cpu_data->pmd_quick)
-#define pgtable_cache_size (local_cpu_data->pgtable_cache_sz)
+DECLARE_PER_CPU(unsigned long *, __pgtable_quicklist);
+#define pgtable_quicklist __ia64_per_cpu_var(__pgtable_quicklist)
+DECLARE_PER_CPU(long, __pgtable_quicklist_size);
+#define pgtable_quicklist_size __ia64_per_cpu_var(__pgtable_quicklist_size)
-static inline pgd_t*
-pgd_alloc_one_fast (struct mm_struct *mm)
+static inline long pgtable_quicklist_total_size(void)
+{
+ long ql_size = 0;
+ int cpuid;
+
+ for_each_online_cpu(cpuid) {
+ ql_size += per_cpu(__pgtable_quicklist_size, cpuid);
+ }
+ return ql_size;
+}
+
+static inline void *pgtable_quicklist_alloc(void)
{
unsigned long *ret = NULL;
preempt_disable();
- ret = pgd_quicklist;
+ ret = pgtable_quicklist;
if (likely(ret != NULL)) {
- pgd_quicklist = (unsigned long *)(*ret);
+ pgtable_quicklist = (unsigned long *)(*ret);
ret[0] = 0;
- --pgtable_cache_size;
- } else
- ret = NULL;
-
- preempt_enable();
+ --pgtable_quicklist_size;
+ preempt_enable();
+ } else {
+ preempt_enable();
+ ret = (unsigned long *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
+ }
- return (pgd_t *) ret;
+ return ret;
}
-static inline pgd_t*
-pgd_alloc (struct mm_struct *mm)
+static inline void pgtable_quicklist_free(void *pgtable_entry)
{
- /* the VM system never calls pgd_alloc_one_fast(), so we do it here. */
- pgd_t *pgd = pgd_alloc_one_fast(mm);
+#ifdef CONFIG_NUMA
+ unsigned long nid = page_to_nid(virt_to_page(pgtable_entry));
- if (unlikely(pgd == NULL)) {
- pgd = (pgd_t *)__get_free_page(GFP_KERNEL|__GFP_ZERO);
+ if (unlikely(nid != numa_node_id())) {
+ free_page((unsigned long)pgtable_entry);
+ return;
}
- return pgd;
-}
+#endif
-static inline void
-pgd_free (pgd_t *pgd)
-{
preempt_disable();
- *(unsigned long *)pgd = (unsigned long) pgd_quicklist;
- pgd_quicklist = (unsigned long *) pgd;
- ++pgtable_cache_size;
+ *(unsigned long *)pgtable_entry = (unsigned long)pgtable_quicklist;
+ pgtable_quicklist = (unsigned long *)pgtable_entry;
+ ++pgtable_quicklist_size;
preempt_enable();
}
-static inline void
-pud_populate (struct mm_struct *mm, pud_t *pud_entry, pmd_t *pmd)
+static inline pgd_t *pgd_alloc(struct mm_struct *mm)
{
- pud_val(*pud_entry) = __pa(pmd);
+ return pgtable_quicklist_alloc();
}
-static inline pmd_t*
-pmd_alloc_one_fast (struct mm_struct *mm, unsigned long addr)
+static inline void pgd_free(pgd_t * pgd)
{
- unsigned long *ret = NULL;
-
- preempt_disable();
-
- ret = (unsigned long *)pmd_quicklist;
- if (likely(ret != NULL)) {
- pmd_quicklist = (unsigned long *)(*ret);
- ret[0] = 0;
- --pgtable_cache_size;
- }
-
- preempt_enable();
-
- return (pmd_t *)ret;
+ pgtable_quicklist_free(pgd);
}
-static inline pmd_t*
-pmd_alloc_one (struct mm_struct *mm, unsigned long addr)
+static inline void
+pud_populate(struct mm_struct *mm, pud_t * pud_entry, pmd_t * pmd)
{
- pmd_t *pmd = (pmd_t *)__get_free_page(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO);
+ pud_val(*pud_entry) = __pa(pmd);
+}
- return pmd;
+static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr)
+{
+ return pgtable_quicklist_alloc();
}
-static inline void
-pmd_free (pmd_t *pmd)
+static inline void pmd_free(pmd_t * pmd)
{
- preempt_disable();
- *(unsigned long *)pmd = (unsigned long) pmd_quicklist;
- pmd_quicklist = (unsigned long *) pmd;
- ++pgtable_cache_size;
- preempt_enable();
+ pgtable_quicklist_free(pmd);
}
#define __pmd_free_tlb(tlb, pmd) pmd_free(pmd)
static inline void
-pmd_populate (struct mm_struct *mm, pmd_t *pmd_entry, struct page *pte)
+pmd_populate(struct mm_struct *mm, pmd_t * pmd_entry, struct page *pte)
{
pmd_val(*pmd_entry) = page_to_phys(pte);
}
static inline void
-pmd_populate_kernel (struct mm_struct *mm, pmd_t *pmd_entry, pte_t *pte)
+pmd_populate_kernel(struct mm_struct *mm, pmd_t * pmd_entry, pte_t * pte)
{
pmd_val(*pmd_entry) = __pa(pte);
}
-static inline struct page *
-pte_alloc_one (struct mm_struct *mm, unsigned long addr)
+static inline struct page *pte_alloc_one(struct mm_struct *mm,
+ unsigned long addr)
{
- struct page *pte = alloc_pages(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO, 0);
-
- return pte;
+ return virt_to_page(pgtable_quicklist_alloc());
}
-static inline pte_t *
-pte_alloc_one_kernel (struct mm_struct *mm, unsigned long addr)
+static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
+ unsigned long addr)
{
- pte_t *pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO);
-
- return pte;
+ return pgtable_quicklist_alloc();
}
-static inline void
-pte_free (struct page *pte)
+static inline void pte_free(struct page *pte)
{
- __free_page(pte);
+ pgtable_quicklist_free(page_address(pte));
}
-static inline void
-pte_free_kernel (pte_t *pte)
+static inline void pte_free_kernel(pte_t * pte)
{
- free_page((unsigned long) pte);
+ pgtable_quicklist_free(pte);
}
-#define __pte_free_tlb(tlb, pte) tlb_remove_page((tlb), (pte))
+#define __pte_free_tlb(tlb, pte) pte_free(pte)
-extern void check_pgt_cache (void);
+extern void check_pgt_cache(void);
-#endif /* _ASM_IA64_PGALLOC_H */
+#endif /* _ASM_IA64_PGALLOC_H */
Modified: linux-libc-headers/trunk/include/asm-ia64/processor.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ia64/processor.h (original)
+++ linux-libc-headers/trunk/include/asm-ia64/processor.h Tue Jul 5 22:58:33 2005
@@ -42,14 +42,6 @@
#define TASK_SIZE (current->thread.task_size)
/*
- * MM_VM_SIZE(mm) gives the maximum address (plus 1) which may contain a mapping for
- * address-space MM. Note that with 32-bit tasks, this is still DEFAULT_TASK_SIZE,
- * because the kernel may have installed helper-mappings above TASK_SIZE. For example,
- * for x86 emulation, the LDT and GDT are mapped above TASK_SIZE.
- */
-#define MM_VM_SIZE(mm) DEFAULT_TASK_SIZE
-
-/*
* This decides where the kernel will search for a free chunk of vm
* space during mmap's.
*/
@@ -143,9 +135,6 @@
__u64 nsec_per_cyc; /* (1000000000<<IA64_NSEC_PER_CYC_SHIFT)/itc_freq */
__u64 unimpl_va_mask; /* mask of unimplemented virtual address bits (from PAL) */
__u64 unimpl_pa_mask; /* mask of unimplemented physical address bits (from PAL) */
- __u64 *pgd_quick;
- __u64 *pmd_quick;
- __u64 pgtable_cache_sz;
__u64 itc_freq; /* frequency of ITC counter */
__u64 proc_freq; /* frequency of processor */
__u64 cyc_per_usec; /* itc_freq/1000000 */
@@ -157,6 +146,13 @@
#ifdef CONFIG_SMP
__u64 loops_per_jiffy;
int cpu;
+ __u32 socket_id; /* physical processor socket id */
+ __u16 core_id; /* core id */
+ __u16 thread_id; /* thread id */
+ __u16 num_log; /* Total number of logical processors on
+ * this socket that were successfully booted */
+ __u8 cores_per_socket; /* Cores per processor socket */
+ __u8 threads_per_core; /* Threads per core */
#endif
/* CPUID-derived information: */
@@ -405,7 +401,10 @@
* task_struct at this point.
*/
-/* Return TRUE if task T owns the fph partition of the CPU we're running on. */
+/*
+ * Return TRUE if task T owns the fph partition of the CPU we're running on.
+ * Must be called from code that has preemption disabled.
+ */
#define ia64_is_local_fpu_owner(t) \
({ \
struct task_struct *__ia64_islfo_task = (t); \
@@ -413,7 +412,10 @@
&& __ia64_islfo_task == (struct task_struct *) ia64_get_kr(IA64_KR_FPU_OWNER)); \
})
-/* Mark task T as owning the fph partition of the CPU we're running on. */
+/*
+ * Mark task T as owning the fph partition of the CPU we're running on.
+ * Must be called from code that has preemption disabled.
+ */
#define ia64_set_local_fpu_owner(t) do { \
struct task_struct *__ia64_slfo_task = (t); \
__ia64_slfo_task->thread.last_fph_cpu = smp_processor_id(); \
Modified: linux-libc-headers/trunk/include/asm-ia64/sal.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ia64/sal.h (original)
+++ linux-libc-headers/trunk/include/asm-ia64/sal.h Tue Jul 5 22:58:33 2005
@@ -90,6 +90,7 @@
#define SAL_PCI_CONFIG_READ 0x01000010
#define SAL_PCI_CONFIG_WRITE 0x01000011
#define SAL_FREQ_BASE 0x01000012
+#define SAL_PHYSICAL_ID_INFO 0x01000013
#define SAL_UPDATE_PAL 0x01000020
@@ -656,7 +657,7 @@
}
/* Flush all the processor and platform level instruction and/or data caches */
-static inline s64
+static inline __s64
ia64_sal_cache_flush (__u64 cache_type)
{
struct ia64_sal_retval isrv;
@@ -666,7 +667,7 @@
/* Initialize all the processor and platform level instruction and data caches */
-static inline s64
+static inline __s64
ia64_sal_cache_init (void)
{
struct ia64_sal_retval isrv;
@@ -678,7 +679,7 @@
* Clear the processor and platform information logged by SAL with respect to the machine
* state at the time of MCA's, INITs, CMCs, or CPEs.
*/
-static inline s64
+static inline __s64
ia64_sal_clear_state_info (__u64 sal_info_type)
{
struct ia64_sal_retval isrv;
@@ -691,7 +692,7 @@
/* Get the processor and platform information logged by SAL with respect to the machine
* state at the time of the MCAs, INITs, CMCs, or CPEs.
*/
-static inline u64
+static inline __u64
ia64_sal_get_state_info (__u64 sal_info_type, __u64 *sal_info)
{
struct ia64_sal_retval isrv;
@@ -707,7 +708,7 @@
* Get the maximum size of the information logged by SAL with respect to the machine state
* at the time of MCAs, INITs, CMCs, or CPEs.
*/
-static inline u64
+static inline __u64
ia64_sal_get_state_info_size (__u64 sal_info_type)
{
struct ia64_sal_retval isrv;
@@ -723,7 +724,7 @@
* the monarch processor. Must not lock, because it will not return on any cpu until the
* monarch processor sends a wake up.
*/
-static inline s64
+static inline __s64
ia64_sal_mc_rendez (void)
{
struct ia64_sal_retval isrv;
@@ -748,7 +749,7 @@
}
/* Read from PCI configuration space */
-static inline s64
+static inline __s64
ia64_sal_pci_config_read (__u64 pci_config_addr, int type, __u64 size, __u64 *value)
{
struct ia64_sal_retval isrv;
@@ -759,7 +760,7 @@
}
/* Write to PCI configuration space */
-static inline s64
+static inline __s64
ia64_sal_pci_config_write (__u64 pci_config_addr, int type, __u64 size, __u64 value)
{
struct ia64_sal_retval isrv;
@@ -772,7 +773,7 @@
* Register physical addresses of locations needed by SAL when SAL procedures are invoked
* in virtual mode.
*/
-static inline s64
+static inline __s64
ia64_sal_register_physical_addr (__u64 phys_entry, __u64 phys_addr)
{
struct ia64_sal_retval isrv;
@@ -786,7 +787,7 @@
* entry points where SAL will pass control for the specified event. These event handlers
* are for the bott rendezvous, MCAs and INIT scenarios.
*/
-static inline s64
+static inline __s64
ia64_sal_set_vectors (__u64 vector_type,
__u64 handler_addr1, __u64 gp1, __u64 handler_len1,
__u64 handler_addr2, __u64 gp2, __u64 handler_len2)
@@ -800,7 +801,7 @@
}
/* Update the contents of PAL block in the non-volatile storage device */
-static inline s64
+static inline __s64
ia64_sal_update_pal (__u64 param_buf, __u64 scratch_buf, __u64 scratch_buf_size,
__u64 *error_code, __u64 *scratch_buf_size_needed)
{
@@ -814,6 +815,17 @@
return isrv.status;
}
+/* Get physical processor die mapping in the platform. */
+static inline __s64
+ia64_sal_physical_id_info(__u16 *splid)
+{
+ struct ia64_sal_retval isrv;
+ SAL_CALL(isrv, SAL_PHYSICAL_ID_INFO, 0, 0, 0, 0, 0, 0, 0);
+ if (splid)
+ *splid = isrv.v0;
+ return isrv.status;
+}
+
extern unsigned long sal_platform_features;
extern int (*salinfo_platform_oemdata)(const __u8 *, __u8 **, __u64 *);
@@ -831,6 +843,44 @@
__u64, __u64, __u64, __u64, __u64);
extern int ia64_sal_oemcall_reentrant(struct ia64_sal_retval *, __u64, __u64, __u64,
__u64, __u64, __u64, __u64, __u64);
+#ifdef CONFIG_HOTPLUG_CPU
+/*
+ * System Abstraction Layer Specification
+ * Section 3.2.5.1: OS_BOOT_RENDEZ to SAL return State.
+ * Note: region regs are stored first in head.S _start. Hence they must
+ * stay up front.
+ */
+struct sal_to_os_boot {
+ __u64 rr[8]; /* Region Registers */
+ __u64 br[6]; /* br0: return addr into SAL boot rendez routine */
+ __u64 gr1; /* SAL:GP */
+ __u64 gr12; /* SAL:SP */
+ __u64 gr13; /* SAL: Task Pointer */
+ __u64 fpsr;
+ __u64 pfs;
+ __u64 rnat;
+ __u64 unat;
+ __u64 bspstore;
+ __u64 dcr; /* Default Control Register */
+ __u64 iva;
+ __u64 pta;
+ __u64 itv;
+ __u64 pmv;
+ __u64 cmcv;
+ __u64 lrr[2];
+ __u64 gr[4];
+ __u64 pr; /* Predicate registers */
+ __u64 lc; /* Loop Count */
+ struct ia64_fpreg fp[20];
+};
+
+/*
+ * Global array allocated for NR_CPUS at boot time
+ */
+extern struct sal_to_os_boot sal_boot_rendez_state[NR_CPUS];
+
+extern void ia64_jump_to_sal(struct sal_to_os_boot *);
+#endif
extern void ia64_sal_handler_init(void *entry_point, void *gpval);
Modified: linux-libc-headers/trunk/include/asm-ia64/sn/addrs.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ia64/sn/addrs.h (original)
+++ linux-libc-headers/trunk/include/asm-ia64/sn/addrs.h Tue Jul 5 22:58:33 2005
@@ -11,6 +11,7 @@
#include <asm/percpu.h>
#include <asm/sn/types.h>
+#include <asm/sn/arch.h>
#include <asm/sn/pda.h>
/*
@@ -57,9 +58,9 @@
/*
* Define basic shift & mask constants for manipulating NASIDs and AS values.
*/
-#define NASID_BITMASK (pda->nasid_bitmask)
-#define NASID_SHIFT (pda->nasid_shift)
-#define AS_SHIFT (pda->as_shift)
+#define NASID_BITMASK (sn_hub_info->nasid_bitmask)
+#define NASID_SHIFT (sn_hub_info->nasid_shift)
+#define AS_SHIFT (sn_hub_info->as_shift)
#define AS_BITMASK 0x3UL
#define NASID_MASK ((__u64)NASID_BITMASK << NASID_SHIFT)
@@ -135,6 +136,7 @@
*/
#define CAC_BASE (CACHED | AS_CAC_SPACE)
#define AMO_BASE (UNCACHED | AS_AMO_SPACE)
+#define AMO_PHYS_BASE (UNCACHED_PHYS | AS_AMO_SPACE)
#define GET_BASE (CACHED | AS_GET_SPACE)
/*
@@ -153,12 +155,20 @@
* the chiplet id is zero. If we implement TIO-TIO dma, we might need
* to insert a chiplet id into this macro. However, it is our belief
* right now that this chiplet id will be ICE, which is also zero.
+ * Nasid starts on bit 40.
*/
-#define PHYS_TO_TIODMA(x) ( (((__u64)(x) & NASID_MASK) << 2) | NODE_OFFSET(x))
+#define PHYS_TO_TIODMA(x) ( (((__u64)(NASID_GET(x))) << 40) | NODE_OFFSET(x))
#define PHYS_TO_DMA(x) ( (((__u64)(x) & NASID_MASK) >> 2) | NODE_OFFSET(x))
/*
+ * Macros to test for address type.
+ */
+#define IS_AMO_ADDRESS(x) (((__u64)(x) & (REGION_BITS | AS_MASK)) == AMO_BASE)
+#define IS_AMO_PHYS_ADDRESS(x) (((__u64)(x) & (REGION_BITS | AS_MASK)) == AMO_PHYS_BASE)
+
+
+/*
* The following definitions pertain to the IO special address
* space. They define the location of the big and little windows
* of any given node.
@@ -167,7 +177,10 @@
#define TIO_BWIN_SIZE_BITS 30 /* big window size: 1G */
#define NODE_SWIN_BASE(n, w) ((w == 0) ? NODE_BWIN_BASE((n), SWIN0_BIGWIN) \
: RAW_NODE_SWIN_BASE(n, w))
+#define TIO_SWIN_BASE(n, w) (TIO_IO_BASE(n) + \
+ ((__u64) (w) << TIO_SWIN_SIZE_BITS))
#define NODE_IO_BASE(n) (GLOBAL_MMR_SPACE | NASID_SPACE(n))
+#define TIO_IO_BASE(n) (UNCACHED | NASID_SPACE(n))
#define BWIN_SIZE (1UL << BWIN_SIZE_BITS)
#define NODE_BWIN_BASE0(n) (NODE_IO_BASE(n) + BWIN_SIZE)
#define NODE_BWIN_BASE(n, w) (NODE_BWIN_BASE0(n) + ((__u64) (w) << BWIN_SIZE_BITS))
Modified: linux-libc-headers/trunk/include/asm-ia64/sn/arch.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ia64/sn/arch.h (original)
+++ linux-libc-headers/trunk/include/asm-ia64/sn/arch.h Tue Jul 5 22:58:33 2005
@@ -5,18 +5,41 @@
*
* SGI specific setup.
*
- * Copyright (C) 1995-1997,1999,2001-2004 Silicon Graphics, Inc. All rights reserved.
+ * Copyright (C) 1995-1997,1999,2001-2005 Silicon Graphics, Inc. All rights reserved.
* Copyright (C) 1999 Ralf Baechle (ralf at gnu.org)
*/
#ifndef _ASM_IA64_SN_ARCH_H
#define _ASM_IA64_SN_ARCH_H
#include <asm/types.h>
+#include <asm/percpu.h>
#include <asm/sn/types.h>
-
#include <asm/sn/sn_cpuid.h>
/*
+ * The following defines attributes of the HUB chip. These attributes are
+ * frequently referenced. They are kept in the per-cpu data areas of each cpu.
+ * They are kept together in a struct to minimize cache misses.
+ */
+struct sn_hub_info_s {
+ __u8 shub2;
+ __u8 nasid_shift;
+ __u8 as_shift;
+ __u8 shub_1_1_found;
+ __u16 nasid_bitmask;
+};
+DECLARE_PER_CPU(struct sn_hub_info_s, __sn_hub_info);
+#define sn_hub_info (&__get_cpu_var(__sn_hub_info))
+#define is_shub2() (sn_hub_info->shub2)
+#define is_shub1() (sn_hub_info->shub2 == 0)
+
+/*
+ * Use this macro to test if shub 1.1 wars should be enabled
+ */
+#define enable_shub_wars_1_1() (sn_hub_info->shub_1_1_found)
+
+
+/*
* This is the maximum number of nodes that can be part of a kernel.
* Effectively, it's the maximum number of compact node ids (cnodeid_t).
* This is not necessarily the same as MAX_NASIDS.
@@ -24,6 +47,21 @@
#define MAX_COMPACT_NODES 2048
#define CPUS_PER_NODE 4
+
+/*
+ * Compact node ID to nasid mappings kept in the per-cpu data areas of each
+ * cpu.
+ */
+DECLARE_PER_CPU(short, __sn_cnodeid_to_nasid[MAX_NUMNODES]);
+#define sn_cnodeid_to_nasid (&__get_cpu_var(__sn_cnodeid_to_nasid[0]))
+
+
+
+extern __u8 sn_partition_id;
+extern __u8 sn_system_size;
+extern __u8 sn_sharing_domain_size;
+extern __u8 sn_region_size;
+
extern void sn_flush_all_caches(long addr, long bytes);
#endif /* _ASM_IA64_SN_ARCH_H */
Modified: linux-libc-headers/trunk/include/asm-ia64/sn/bte.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ia64/sn/bte.h (original)
+++ linux-libc-headers/trunk/include/asm-ia64/sn/bte.h Tue Jul 5 22:58:33 2005
@@ -3,7 +3,7 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (c) 2000-2004 Silicon Graphics, Inc. All Rights Reserved.
+ * Copyright (c) 2000-2005 Silicon Graphics, Inc. All Rights Reserved.
*/
@@ -12,8 +12,12 @@
#include <linux/timer.h>
#include <linux/cache.h>
+#include <asm/sn/pda.h>
#include <asm/sn/types.h>
+#include <asm/sn/shub_mmr.h>
+#define IBCT_NOTIFY (0x1UL << 4)
+#define IBCT_ZFIL_MODE (0x1UL << 0)
/* #define BTE_DEBUG */
/* #define BTE_DEBUG_VERBOSE */
@@ -38,8 +42,36 @@
/* Define hardware */
-#define BTES_PER_NODE 2
+#define BTES_PER_NODE (is_shub2() ? 4 : 2)
+#define MAX_BTES_PER_NODE 4
+#define BTE2OFF_CTRL (0)
+#define BTE2OFF_SRC (SH2_BT_ENG_SRC_ADDR_0 - SH2_BT_ENG_CSR_0)
+#define BTE2OFF_DEST (SH2_BT_ENG_DEST_ADDR_0 - SH2_BT_ENG_CSR_0)
+#define BTE2OFF_NOTIFY (SH2_BT_ENG_NOTIF_ADDR_0 - SH2_BT_ENG_CSR_0)
+
+#define BTE_BASE_ADDR(interface) \
+ (is_shub2() ? (interface == 0) ? SH2_BT_ENG_CSR_0 : \
+ (interface == 1) ? SH2_BT_ENG_CSR_1 : \
+ (interface == 2) ? SH2_BT_ENG_CSR_2 : \
+ SH2_BT_ENG_CSR_3 \
+ : (interface == 0) ? IIO_IBLS0 : IIO_IBLS1)
+
+#define BTE_SOURCE_ADDR(base) \
+ (is_shub2() ? base + (BTE2OFF_SRC/8) \
+ : base + (BTEOFF_SRC/8))
+
+#define BTE_DEST_ADDR(base) \
+ (is_shub2() ? base + (BTE2OFF_DEST/8) \
+ : base + (BTEOFF_DEST/8))
+
+#define BTE_CTRL_ADDR(base) \
+ (is_shub2() ? base + (BTE2OFF_CTRL/8) \
+ : base + (BTEOFF_CTRL/8))
+
+#define BTE_NOTIF_ADDR(base) \
+ (is_shub2() ? base + (BTE2OFF_NOTIFY/8) \
+ : base + (BTEOFF_NOTIFY/8))
/* Define hardware modes */
#define BTE_NOTIFY (IBCT_NOTIFY)
@@ -67,14 +99,18 @@
#define BTE_LNSTAT_STORE(_bte, _x) \
HUB_S(_bte->bte_base_addr, (_x))
#define BTE_SRC_STORE(_bte, _x) \
- HUB_S(_bte->bte_base_addr + (BTEOFF_SRC/8), (_x))
+ HUB_S(_bte->bte_source_addr, (_x))
#define BTE_DEST_STORE(_bte, _x) \
- HUB_S(_bte->bte_base_addr + (BTEOFF_DEST/8), (_x))
+ HUB_S(_bte->bte_destination_addr, (_x))
#define BTE_CTRL_STORE(_bte, _x) \
- HUB_S(_bte->bte_base_addr + (BTEOFF_CTRL/8), (_x))
+ HUB_S(_bte->bte_control_addr, (_x))
#define BTE_NOTIF_STORE(_bte, _x) \
- HUB_S(_bte->bte_base_addr + (BTEOFF_NOTIFY/8), (_x))
+ HUB_S(_bte->bte_notify_addr, (_x))
+#define BTE_START_TRANSFER(_bte, _len, _mode) \
+ is_shub2() ? BTE_CTRL_STORE(_bte, IBLS_BUSY | (_mode << 24) | _len) \
+ : BTE_LNSTAT_STORE(_bte, _len); \
+ BTE_CTRL_STORE(_bte, _mode)
/* Possible results from bte_copy and bte_unaligned_copy */
/* The following error codes map into the BTE hardware codes
@@ -109,6 +145,10 @@
struct bteinfo_s {
volatile __u64 notify ____cacheline_aligned;
__u64 *bte_base_addr ____cacheline_aligned;
+ __u64 *bte_source_addr;
+ __u64 *bte_destination_addr;
+ __u64 *bte_control_addr;
+ __u64 *bte_notify_addr;
spinlock_t spinlock;
cnodeid_t bte_cnode; /* cnode */
int bte_error_count; /* Number of errors encountered */
@@ -116,6 +156,7 @@
int cleanup_active; /* Interface is locked for cleanup */
volatile bte_result_t bh_error; /* error while processing */
volatile __u64 *most_rcnt_na;
+ struct bteinfo_s *btes_to_try[MAX_BTES_PER_NODE];
};
Modified: linux-libc-headers/trunk/include/asm-ia64/sn/geo.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ia64/sn/geo.h (original)
+++ linux-libc-headers/trunk/include/asm-ia64/sn/geo.h Tue Jul 5 22:58:33 2005
@@ -18,32 +18,34 @@
#define GEOID_SIZE 8 /* Would 16 be better? The size can
be different on different platforms. */
-#define MAX_SLABS 0xe /* slabs per module */
+#define MAX_SLOTS 0xf /* slots per module */
+#define MAX_SLABS 0xf /* slabs per slot */
typedef unsigned char geo_type_t;
/* Fields common to all substructures */
-typedef struct geo_any_s {
+typedef struct geo_common_s {
moduleid_t module; /* The module (box) this h/w lives in */
geo_type_t type; /* What type of h/w is named by this geoid_t */
- slabid_t slab; /* The logical assembly within the module */
-} geo_any_t;
+ slabid_t slab:4; /* slab (ASIC), 0 .. 15 within slot */
+ slotid_t slot:4; /* slot (Blade), 0 .. 15 within module */
+} geo_common_t;
/* Additional fields for particular types of hardware */
typedef struct geo_node_s {
- geo_any_t any; /* No additional fields needed */
+ geo_common_t common; /* No additional fields needed */
} geo_node_t;
typedef struct geo_rtr_s {
- geo_any_t any; /* No additional fields needed */
+ geo_common_t common; /* No additional fields needed */
} geo_rtr_t;
typedef struct geo_iocntl_s {
- geo_any_t any; /* No additional fields needed */
+ geo_common_t common; /* No additional fields needed */
} geo_iocntl_t;
typedef struct geo_pcicard_s {
- geo_iocntl_t any;
+ geo_iocntl_t common;
char bus; /* Bus/widget number */
char slot; /* PCI slot number */
} geo_pcicard_t;
@@ -62,14 +64,14 @@
typedef union geoid_u {
- geo_any_t any;
- geo_node_t node;
+ geo_common_t common;
+ geo_node_t node;
geo_iocntl_t iocntl;
geo_pcicard_t pcicard;
- geo_rtr_t rtr;
- geo_cpu_t cpu;
- geo_mem_t mem;
- char padsize[GEOID_SIZE];
+ geo_rtr_t rtr;
+ geo_cpu_t cpu;
+ geo_mem_t mem;
+ char padsize[GEOID_SIZE];
} geoid_t;
@@ -104,19 +106,26 @@
#define INVALID_CNODEID ((cnodeid_t)-1)
#define INVALID_PNODEID ((pnodeid_t)-1)
#define INVALID_SLAB (slabid_t)-1
+#define INVALID_SLOT (slotid_t)-1
#define INVALID_MODULE ((moduleid_t)-1)
#define INVALID_PARTID ((partid_t)-1)
static inline slabid_t geo_slab(geoid_t g)
{
- return (g.any.type == GEO_TYPE_INVALID) ?
- INVALID_SLAB : g.any.slab;
+ return (g.common.type == GEO_TYPE_INVALID) ?
+ INVALID_SLAB : g.common.slab;
+}
+
+static inline slotid_t geo_slot(geoid_t g)
+{
+ return (g.common.type == GEO_TYPE_INVALID) ?
+ INVALID_SLOT : g.common.slot;
}
static inline moduleid_t geo_module(geoid_t g)
{
- return (g.any.type == GEO_TYPE_INVALID) ?
- INVALID_MODULE : g.any.module;
+ return (g.common.type == GEO_TYPE_INVALID) ?
+ INVALID_MODULE : g.common.module;
}
extern geoid_t cnodeid_get_geoid(cnodeid_t cnode);
Modified: linux-libc-headers/trunk/include/asm-ia64/sn/nodepda.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ia64/sn/nodepda.h (original)
+++ linux-libc-headers/trunk/include/asm-ia64/sn/nodepda.h Tue Jul 5 22:58:33 2005
@@ -3,7 +3,7 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1992 - 1997, 2000-2004 Silicon Graphics, Inc. All rights reserved.
+ * Copyright (C) 1992 - 1997, 2000-2005 Silicon Graphics, Inc. All rights reserved.
*/
#ifndef _ASM_IA64_SN_NODEPDA_H
#define _ASM_IA64_SN_NODEPDA_H
@@ -13,7 +13,6 @@
#include <asm/irq.h>
#include <asm/sn/arch.h>
#include <asm/sn/intr.h>
-#include <asm/sn/pda.h>
#include <asm/sn/bte.h>
/*
@@ -43,7 +42,7 @@
/*
* The BTEs on this node are shared by the local cpus
*/
- struct bteinfo_s bte_if[BTES_PER_NODE]; /* Virtual Interface */
+ struct bteinfo_s bte_if[MAX_BTES_PER_NODE]; /* Virtual Interface */
struct timer_list bte_recovery_timer;
spinlock_t bte_recovery_lock;
@@ -67,20 +66,18 @@
* The next set of definitions provides this.
* Routines are expected to use
*
- * nodepda -> to access node PDA for the node on which code is running
- * subnodepda -> to access subnode PDA for the subnode on which code is running
- *
- * NODEPDA(cnode) -> to access node PDA for cnodeid
- * SUBNODEPDA(cnode,sn) -> to access subnode PDA for cnodeid/subnode
+ * sn_nodepda - to access node PDA for the node on which code is running
+ * NODEPDA(cnodeid) - to access node PDA for cnodeid
*/
-#define nodepda pda->p_nodepda /* Ptr to this node's PDA */
-#define NODEPDA(cnode) (nodepda->pernode_pdaindr[cnode])
+DECLARE_PER_CPU(struct nodepda_s *, __sn_nodepda);
+#define sn_nodepda (__get_cpu_var(__sn_nodepda))
+#define NODEPDA(cnodeid) (sn_nodepda->pernode_pdaindr[cnodeid])
/*
* Check if given a compact node id the corresponding node has all the
* cpus disabled.
*/
-#define is_headless_node(cnode) (nr_cpus_node(cnode) == 0)
+#define is_headless_node(cnodeid) (nr_cpus_node(cnodeid) == 0)
#endif /* _ASM_IA64_SN_NODEPDA_H */
Added: linux-libc-headers/trunk/include/asm-ia64/sn/pcibus_provider_defs.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/asm-ia64/sn/pcibus_provider_defs.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,52 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1992 - 1997, 2000-2004 Silicon Graphics, Inc. All rights reserved.
+ */
+#ifndef _ASM_IA64_SN_PCI_PCIBUS_PROVIDER_H
+#define _ASM_IA64_SN_PCI_PCIBUS_PROVIDER_H
+
+/*
+ * SN pci asic types. Do not ever renumber these or reuse values. The
+ * values must agree with what prom thinks they are.
+ */
+
+#define PCIIO_ASIC_TYPE_UNKNOWN 0
+#define PCIIO_ASIC_TYPE_PPB 1
+#define PCIIO_ASIC_TYPE_PIC 2
+#define PCIIO_ASIC_TYPE_TIOCP 3
+#define PCIIO_ASIC_TYPE_TIOCA 4
+
+#define PCIIO_ASIC_MAX_TYPES 5
+
+/*
+ * Common pciio bus provider data. There should be one of these as the
+ * first field in any pciio based provider soft structure (e.g. pcibr_soft
+ * tioca_soft, etc).
+ */
+
+struct pcibus_bussoft {
+ uint32_t bs_asic_type; /* chipset type */
+ uint32_t bs_xid; /* xwidget id */
+ uint64_t bs_persist_busnum; /* Persistent Bus Number */
+ uint64_t bs_legacy_io; /* legacy io pio addr */
+ uint64_t bs_legacy_mem; /* legacy mem pio addr */
+ uint64_t bs_base; /* widget base */
+ struct xwidget_info *bs_xwidget_info;
+};
+
+/*
+ * SN pci bus indirection
+ */
+
+struct sn_pcibus_provider {
+ dma_addr_t (*dma_map)(struct pci_dev *, unsigned long, size_t);
+ dma_addr_t (*dma_map_consistent)(struct pci_dev *, unsigned long, size_t);
+ void (*dma_unmap)(struct pci_dev *, dma_addr_t, int);
+ void * (*bus_fixup)(struct pcibus_bussoft *);
+};
+
+extern struct sn_pcibus_provider *sn_pci_provider[];
+#endif /* _ASM_IA64_SN_PCI_PCIBUS_PROVIDER_H */
Added: linux-libc-headers/trunk/include/asm-ia64/sn/pcidev.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/asm-ia64/sn/pcidev.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,58 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1992 - 1997, 2000-2004 Silicon Graphics, Inc. All rights reserved.
+ */
+#ifndef _ASM_IA64_SN_PCI_PCIDEV_H
+#define _ASM_IA64_SN_PCI_PCIDEV_H
+
+#include <linux/pci.h>
+
+extern struct sn_irq_info **sn_irq;
+
+#define SN_PCIDEV_INFO(pci_dev) \
+ ((struct pcidev_info *)(pci_dev)->sysdata)
+
+/*
+ * Given a pci_bus, return the sn pcibus_bussoft struct. Note that
+ * this only works for root busses, not for busses represented by PPB's.
+ */
+
+#define SN_PCIBUS_BUSSOFT(pci_bus) \
+ ((struct pcibus_bussoft *)(PCI_CONTROLLER((pci_bus))->platform_data))
+
+/*
+ * Given a struct pci_dev, return the sn pcibus_bussoft struct. Note
+ * that this is not equivalent to SN_PCIBUS_BUSSOFT(pci_dev->bus) due
+ * due to possible PPB's in the path.
+ */
+
+#define SN_PCIDEV_BUSSOFT(pci_dev) \
+ (SN_PCIDEV_INFO(pci_dev)->pdi_host_pcidev_info->pdi_pcibus_info)
+
+#define SN_PCIDEV_BUSPROVIDER(pci_dev) \
+ (SN_PCIDEV_INFO(pci_dev)->pdi_provider)
+
+#define PCIIO_BUS_NONE 255 /* bus 255 reserved */
+#define PCIIO_SLOT_NONE 255
+#define PCIIO_FUNC_NONE 255
+#define PCIIO_VENDOR_ID_NONE (-1)
+
+struct pcidev_info {
+ uint64_t pdi_pio_mapped_addr[7]; /* 6 BARs PLUS 1 ROM */
+ uint64_t pdi_slot_host_handle; /* Bus and devfn Host pci_dev */
+
+ struct pcibus_bussoft *pdi_pcibus_info; /* Kernel common bus soft */
+ struct pcidev_info *pdi_host_pcidev_info; /* Kernel Host pci_dev */
+ struct pci_dev *pdi_linux_pcidev; /* Kernel pci_dev */
+
+ struct sn_irq_info *pdi_sn_irq_info;
+ struct sn_pcibus_provider *pdi_provider; /* sn pci ops */
+};
+
+extern void sn_irq_fixup(struct pci_dev *pci_dev,
+ struct sn_irq_info *sn_irq_info);
+
+#endif /* _ASM_IA64_SN_PCI_PCIDEV_H */
Modified: linux-libc-headers/trunk/include/asm-ia64/sn/pda.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ia64/sn/pda.h (original)
+++ linux-libc-headers/trunk/include/asm-ia64/sn/pda.h Tue Jul 5 22:58:33 2005
@@ -3,7 +3,7 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1992 - 1997, 2000-2004 Silicon Graphics, Inc. All rights reserved.
+ * Copyright (C) 1992 - 1997, 2000-2005 Silicon Graphics, Inc. All rights reserved.
*/
#ifndef _ASM_IA64_SN_PDA_H
#define _ASM_IA64_SN_PDA_H
@@ -11,7 +11,6 @@
#include <linux/cache.h>
#include <asm/percpu.h>
#include <asm/system.h>
-#include <asm/sn/bte.h>
/*
@@ -25,23 +24,10 @@
typedef struct pda_s {
- /* Having a pointer in the begining of PDA tends to increase
- * the chance of having this pointer in cache. (Yes something
- * else gets pushed out). Doing this reduces the number of memory
- * access to all nodepda variables to be one
- */
- struct nodepda_s *p_nodepda; /* Pointer to Per node PDA */
- struct subnodepda_s *p_subnodepda; /* Pointer to CPU subnode PDA */
-
/*
* Support for SN LEDs
*/
volatile short *led_address;
- __u16 nasid_bitmask;
- __u8 shub2;
- __u8 nasid_shift;
- __u8 as_shift;
- __u8 shub_1_1_found;
__u8 led_state;
__u8 hb_state; /* supports blinking heartbeat leds */
unsigned int hb_count;
@@ -53,11 +39,8 @@
unsigned long pio_write_status_val;
volatile unsigned long *pio_shub_war_cam_addr;
- struct bteinfo_s *cpu_bte_if[BTES_PER_NODE]; /* cpu interface order */
-
unsigned long sn_soft_irr[4];
unsigned long sn_in_service_ivecs[4];
- short cnodeid_to_nasid_table[MAX_NUMNODES];
int sn_lb_int_war_ticks;
int sn_last_irq;
int sn_first_irq;
@@ -84,12 +67,4 @@
#define pdacpu(cpu) (&per_cpu(pda_percpu, cpu))
-/*
- * Use this macro to test if shub 1.1 wars should be enabled
- */
-#define enable_shub_wars_1_1() (pda->shub_1_1_found)
-
-#define is_shub2() (pda->shub2)
-#define is_shub1() (pda->shub2 == 0)
-
#endif /* _ASM_IA64_SN_PDA_H */
Modified: linux-libc-headers/trunk/include/asm-ia64/sn/shubio.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ia64/sn/shubio.h (original)
+++ linux-libc-headers/trunk/include/asm-ia64/sn/shubio.h Tue Jul 5 22:58:33 2005
@@ -3,292 +3,287 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1992 - 1997, 2000-2004 Silicon Graphics, Inc. All rights reserved.
+ * Copyright (C) 1992 - 1997, 2000-2005 Silicon Graphics, Inc. All rights reserved.
*/
#ifndef _ASM_IA64_SN_SHUBIO_H
#define _ASM_IA64_SN_SHUBIO_H
-#define HUB_WIDGET_ID_MAX 0xf
-#define IIO_NUM_ITTES 7
-#define HUB_NUM_BIG_WINDOW (IIO_NUM_ITTES - 1)
-
-#define IIO_WID 0x00400000 /* Crosstalk Widget Identification */
- /* This register is also accessible from
- * Crosstalk at address 0x0. */
-#define IIO_WSTAT 0x00400008 /* Crosstalk Widget Status */
-#define IIO_WCR 0x00400020 /* Crosstalk Widget Control Register */
-#define IIO_ILAPR 0x00400100 /* IO Local Access Protection Register */
-#define IIO_ILAPO 0x00400108 /* IO Local Access Protection Override */
-#define IIO_IOWA 0x00400110 /* IO Outbound Widget Access */
-#define IIO_IIWA 0x00400118 /* IO Inbound Widget Access */
-#define IIO_IIDEM 0x00400120 /* IO Inbound Device Error Mask */
-#define IIO_ILCSR 0x00400128 /* IO LLP Control and Status Register */
-#define IIO_ILLR 0x00400130 /* IO LLP Log Register */
-#define IIO_IIDSR 0x00400138 /* IO Interrupt Destination */
-
-#define IIO_IGFX0 0x00400140 /* IO Graphics Node-Widget Map 0 */
-#define IIO_IGFX1 0x00400148 /* IO Graphics Node-Widget Map 1 */
-
-#define IIO_ISCR0 0x00400150 /* IO Scratch Register 0 */
-#define IIO_ISCR1 0x00400158 /* IO Scratch Register 1 */
-
-#define IIO_ITTE1 0x00400160 /* IO Translation Table Entry 1 */
-#define IIO_ITTE2 0x00400168 /* IO Translation Table Entry 2 */
-#define IIO_ITTE3 0x00400170 /* IO Translation Table Entry 3 */
-#define IIO_ITTE4 0x00400178 /* IO Translation Table Entry 4 */
-#define IIO_ITTE5 0x00400180 /* IO Translation Table Entry 5 */
-#define IIO_ITTE6 0x00400188 /* IO Translation Table Entry 6 */
-#define IIO_ITTE7 0x00400190 /* IO Translation Table Entry 7 */
-
-#define IIO_IPRB0 0x00400198 /* IO PRB Entry 0 */
-#define IIO_IPRB8 0x004001A0 /* IO PRB Entry 8 */
-#define IIO_IPRB9 0x004001A8 /* IO PRB Entry 9 */
-#define IIO_IPRBA 0x004001B0 /* IO PRB Entry A */
-#define IIO_IPRBB 0x004001B8 /* IO PRB Entry B */
-#define IIO_IPRBC 0x004001C0 /* IO PRB Entry C */
-#define IIO_IPRBD 0x004001C8 /* IO PRB Entry D */
-#define IIO_IPRBE 0x004001D0 /* IO PRB Entry E */
-#define IIO_IPRBF 0x004001D8 /* IO PRB Entry F */
-
-#define IIO_IXCC 0x004001E0 /* IO Crosstalk Credit Count Timeout */
-#define IIO_IMEM 0x004001E8 /* IO Miscellaneous Error Mask */
-#define IIO_IXTT 0x004001F0 /* IO Crosstalk Timeout Threshold */
-#define IIO_IECLR 0x004001F8 /* IO Error Clear Register */
-#define IIO_IBCR 0x00400200 /* IO BTE Control Register */
-
-#define IIO_IXSM 0x00400208 /* IO Crosstalk Spurious Message */
-#define IIO_IXSS 0x00400210 /* IO Crosstalk Spurious Sideband */
-
-#define IIO_ILCT 0x00400218 /* IO LLP Channel Test */
-
-#define IIO_IIEPH1 0x00400220 /* IO Incoming Error Packet Header, Part 1 */
-#define IIO_IIEPH2 0x00400228 /* IO Incoming Error Packet Header, Part 2 */
-
-
-#define IIO_ISLAPR 0x00400230 /* IO SXB Local Access Protection Regster */
-#define IIO_ISLAPO 0x00400238 /* IO SXB Local Access Protection Override */
-
-#define IIO_IWI 0x00400240 /* IO Wrapper Interrupt Register */
-#define IIO_IWEL 0x00400248 /* IO Wrapper Error Log Register */
-#define IIO_IWC 0x00400250 /* IO Wrapper Control Register */
-#define IIO_IWS 0x00400258 /* IO Wrapper Status Register */
-#define IIO_IWEIM 0x00400260 /* IO Wrapper Error Interrupt Masking Register */
-
-#define IIO_IPCA 0x00400300 /* IO PRB Counter Adjust */
-
-#define IIO_IPRTE0_A 0x00400308 /* IO PIO Read Address Table Entry 0, Part A */
-#define IIO_IPRTE1_A 0x00400310 /* IO PIO Read Address Table Entry 1, Part A */
-#define IIO_IPRTE2_A 0x00400318 /* IO PIO Read Address Table Entry 2, Part A */
-#define IIO_IPRTE3_A 0x00400320 /* IO PIO Read Address Table Entry 3, Part A */
-#define IIO_IPRTE4_A 0x00400328 /* IO PIO Read Address Table Entry 4, Part A */
-#define IIO_IPRTE5_A 0x00400330 /* IO PIO Read Address Table Entry 5, Part A */
-#define IIO_IPRTE6_A 0x00400338 /* IO PIO Read Address Table Entry 6, Part A */
-#define IIO_IPRTE7_A 0x00400340 /* IO PIO Read Address Table Entry 7, Part A */
-
-#define IIO_IPRTE0_B 0x00400348 /* IO PIO Read Address Table Entry 0, Part B */
-#define IIO_IPRTE1_B 0x00400350 /* IO PIO Read Address Table Entry 1, Part B */
-#define IIO_IPRTE2_B 0x00400358 /* IO PIO Read Address Table Entry 2, Part B */
-#define IIO_IPRTE3_B 0x00400360 /* IO PIO Read Address Table Entry 3, Part B */
-#define IIO_IPRTE4_B 0x00400368 /* IO PIO Read Address Table Entry 4, Part B */
-#define IIO_IPRTE5_B 0x00400370 /* IO PIO Read Address Table Entry 5, Part B */
-#define IIO_IPRTE6_B 0x00400378 /* IO PIO Read Address Table Entry 6, Part B */
-#define IIO_IPRTE7_B 0x00400380 /* IO PIO Read Address Table Entry 7, Part B */
-
-#define IIO_IPDR 0x00400388 /* IO PIO Deallocation Register */
-#define IIO_ICDR 0x00400390 /* IO CRB Entry Deallocation Register */
-#define IIO_IFDR 0x00400398 /* IO IOQ FIFO Depth Register */
-#define IIO_IIAP 0x004003A0 /* IO IIQ Arbitration Parameters */
-#define IIO_ICMR 0x004003A8 /* IO CRB Management Register */
-#define IIO_ICCR 0x004003B0 /* IO CRB Control Register */
-#define IIO_ICTO 0x004003B8 /* IO CRB Timeout */
-#define IIO_ICTP 0x004003C0 /* IO CRB Timeout Prescalar */
-
-#define IIO_ICRB0_A 0x00400400 /* IO CRB Entry 0_A */
-#define IIO_ICRB0_B 0x00400408 /* IO CRB Entry 0_B */
-#define IIO_ICRB0_C 0x00400410 /* IO CRB Entry 0_C */
-#define IIO_ICRB0_D 0x00400418 /* IO CRB Entry 0_D */
-#define IIO_ICRB0_E 0x00400420 /* IO CRB Entry 0_E */
-
-#define IIO_ICRB1_A 0x00400430 /* IO CRB Entry 1_A */
-#define IIO_ICRB1_B 0x00400438 /* IO CRB Entry 1_B */
-#define IIO_ICRB1_C 0x00400440 /* IO CRB Entry 1_C */
-#define IIO_ICRB1_D 0x00400448 /* IO CRB Entry 1_D */
-#define IIO_ICRB1_E 0x00400450 /* IO CRB Entry 1_E */
-
-#define IIO_ICRB2_A 0x00400460 /* IO CRB Entry 2_A */
-#define IIO_ICRB2_B 0x00400468 /* IO CRB Entry 2_B */
-#define IIO_ICRB2_C 0x00400470 /* IO CRB Entry 2_C */
-#define IIO_ICRB2_D 0x00400478 /* IO CRB Entry 2_D */
-#define IIO_ICRB2_E 0x00400480 /* IO CRB Entry 2_E */
-
-#define IIO_ICRB3_A 0x00400490 /* IO CRB Entry 3_A */
-#define IIO_ICRB3_B 0x00400498 /* IO CRB Entry 3_B */
-#define IIO_ICRB3_C 0x004004a0 /* IO CRB Entry 3_C */
-#define IIO_ICRB3_D 0x004004a8 /* IO CRB Entry 3_D */
-#define IIO_ICRB3_E 0x004004b0 /* IO CRB Entry 3_E */
-
-#define IIO_ICRB4_A 0x004004c0 /* IO CRB Entry 4_A */
-#define IIO_ICRB4_B 0x004004c8 /* IO CRB Entry 4_B */
-#define IIO_ICRB4_C 0x004004d0 /* IO CRB Entry 4_C */
-#define IIO_ICRB4_D 0x004004d8 /* IO CRB Entry 4_D */
-#define IIO_ICRB4_E 0x004004e0 /* IO CRB Entry 4_E */
-
-#define IIO_ICRB5_A 0x004004f0 /* IO CRB Entry 5_A */
-#define IIO_ICRB5_B 0x004004f8 /* IO CRB Entry 5_B */
-#define IIO_ICRB5_C 0x00400500 /* IO CRB Entry 5_C */
-#define IIO_ICRB5_D 0x00400508 /* IO CRB Entry 5_D */
-#define IIO_ICRB5_E 0x00400510 /* IO CRB Entry 5_E */
-
-#define IIO_ICRB6_A 0x00400520 /* IO CRB Entry 6_A */
-#define IIO_ICRB6_B 0x00400528 /* IO CRB Entry 6_B */
-#define IIO_ICRB6_C 0x00400530 /* IO CRB Entry 6_C */
-#define IIO_ICRB6_D 0x00400538 /* IO CRB Entry 6_D */
-#define IIO_ICRB6_E 0x00400540 /* IO CRB Entry 6_E */
-
-#define IIO_ICRB7_A 0x00400550 /* IO CRB Entry 7_A */
-#define IIO_ICRB7_B 0x00400558 /* IO CRB Entry 7_B */
-#define IIO_ICRB7_C 0x00400560 /* IO CRB Entry 7_C */
-#define IIO_ICRB7_D 0x00400568 /* IO CRB Entry 7_D */
-#define IIO_ICRB7_E 0x00400570 /* IO CRB Entry 7_E */
-
-#define IIO_ICRB8_A 0x00400580 /* IO CRB Entry 8_A */
-#define IIO_ICRB8_B 0x00400588 /* IO CRB Entry 8_B */
-#define IIO_ICRB8_C 0x00400590 /* IO CRB Entry 8_C */
-#define IIO_ICRB8_D 0x00400598 /* IO CRB Entry 8_D */
-#define IIO_ICRB8_E 0x004005a0 /* IO CRB Entry 8_E */
-
-#define IIO_ICRB9_A 0x004005b0 /* IO CRB Entry 9_A */
-#define IIO_ICRB9_B 0x004005b8 /* IO CRB Entry 9_B */
-#define IIO_ICRB9_C 0x004005c0 /* IO CRB Entry 9_C */
-#define IIO_ICRB9_D 0x004005c8 /* IO CRB Entry 9_D */
-#define IIO_ICRB9_E 0x004005d0 /* IO CRB Entry 9_E */
-
-#define IIO_ICRBA_A 0x004005e0 /* IO CRB Entry A_A */
-#define IIO_ICRBA_B 0x004005e8 /* IO CRB Entry A_B */
-#define IIO_ICRBA_C 0x004005f0 /* IO CRB Entry A_C */
-#define IIO_ICRBA_D 0x004005f8 /* IO CRB Entry A_D */
-#define IIO_ICRBA_E 0x00400600 /* IO CRB Entry A_E */
-
-#define IIO_ICRBB_A 0x00400610 /* IO CRB Entry B_A */
-#define IIO_ICRBB_B 0x00400618 /* IO CRB Entry B_B */
-#define IIO_ICRBB_C 0x00400620 /* IO CRB Entry B_C */
-#define IIO_ICRBB_D 0x00400628 /* IO CRB Entry B_D */
-#define IIO_ICRBB_E 0x00400630 /* IO CRB Entry B_E */
-
-#define IIO_ICRBC_A 0x00400640 /* IO CRB Entry C_A */
-#define IIO_ICRBC_B 0x00400648 /* IO CRB Entry C_B */
-#define IIO_ICRBC_C 0x00400650 /* IO CRB Entry C_C */
-#define IIO_ICRBC_D 0x00400658 /* IO CRB Entry C_D */
-#define IIO_ICRBC_E 0x00400660 /* IO CRB Entry C_E */
-
-#define IIO_ICRBD_A 0x00400670 /* IO CRB Entry D_A */
-#define IIO_ICRBD_B 0x00400678 /* IO CRB Entry D_B */
-#define IIO_ICRBD_C 0x00400680 /* IO CRB Entry D_C */
-#define IIO_ICRBD_D 0x00400688 /* IO CRB Entry D_D */
-#define IIO_ICRBD_E 0x00400690 /* IO CRB Entry D_E */
-
-#define IIO_ICRBE_A 0x004006a0 /* IO CRB Entry E_A */
-#define IIO_ICRBE_B 0x004006a8 /* IO CRB Entry E_B */
-#define IIO_ICRBE_C 0x004006b0 /* IO CRB Entry E_C */
-#define IIO_ICRBE_D 0x004006b8 /* IO CRB Entry E_D */
-#define IIO_ICRBE_E 0x004006c0 /* IO CRB Entry E_E */
-
-#define IIO_ICSML 0x00400700 /* IO CRB Spurious Message Low */
-#define IIO_ICSMM 0x00400708 /* IO CRB Spurious Message Middle */
-#define IIO_ICSMH 0x00400710 /* IO CRB Spurious Message High */
-
-#define IIO_IDBSS 0x00400718 /* IO Debug Submenu Select */
-
-#define IIO_IBLS0 0x00410000 /* IO BTE Length Status 0 */
-#define IIO_IBSA0 0x00410008 /* IO BTE Source Address 0 */
-#define IIO_IBDA0 0x00410010 /* IO BTE Destination Address 0 */
-#define IIO_IBCT0 0x00410018 /* IO BTE Control Terminate 0 */
-#define IIO_IBNA0 0x00410020 /* IO BTE Notification Address 0 */
-#define IIO_IBIA0 0x00410028 /* IO BTE Interrupt Address 0 */
-#define IIO_IBLS1 0x00420000 /* IO BTE Length Status 1 */
-#define IIO_IBSA1 0x00420008 /* IO BTE Source Address 1 */
-#define IIO_IBDA1 0x00420010 /* IO BTE Destination Address 1 */
-#define IIO_IBCT1 0x00420018 /* IO BTE Control Terminate 1 */
-#define IIO_IBNA1 0x00420020 /* IO BTE Notification Address 1 */
-#define IIO_IBIA1 0x00420028 /* IO BTE Interrupt Address 1 */
-
-#define IIO_IPCR 0x00430000 /* IO Performance Control */
-#define IIO_IPPR 0x00430008 /* IO Performance Profiling */
+#define HUB_WIDGET_ID_MAX 0xf
+#define IIO_NUM_ITTES 7
+#define HUB_NUM_BIG_WINDOW (IIO_NUM_ITTES - 1)
+
+#define IIO_WID 0x00400000 /* Crosstalk Widget Identification */
+ /* This register is also accessible from
+ * Crosstalk at address 0x0. */
+#define IIO_WSTAT 0x00400008 /* Crosstalk Widget Status */
+#define IIO_WCR 0x00400020 /* Crosstalk Widget Control Register */
+#define IIO_ILAPR 0x00400100 /* IO Local Access Protection Register */
+#define IIO_ILAPO 0x00400108 /* IO Local Access Protection Override */
+#define IIO_IOWA 0x00400110 /* IO Outbound Widget Access */
+#define IIO_IIWA 0x00400118 /* IO Inbound Widget Access */
+#define IIO_IIDEM 0x00400120 /* IO Inbound Device Error Mask */
+#define IIO_ILCSR 0x00400128 /* IO LLP Control and Status Register */
+#define IIO_ILLR 0x00400130 /* IO LLP Log Register */
+#define IIO_IIDSR 0x00400138 /* IO Interrupt Destination */
+
+#define IIO_IGFX0 0x00400140 /* IO Graphics Node-Widget Map 0 */
+#define IIO_IGFX1 0x00400148 /* IO Graphics Node-Widget Map 1 */
+
+#define IIO_ISCR0 0x00400150 /* IO Scratch Register 0 */
+#define IIO_ISCR1 0x00400158 /* IO Scratch Register 1 */
+
+#define IIO_ITTE1 0x00400160 /* IO Translation Table Entry 1 */
+#define IIO_ITTE2 0x00400168 /* IO Translation Table Entry 2 */
+#define IIO_ITTE3 0x00400170 /* IO Translation Table Entry 3 */
+#define IIO_ITTE4 0x00400178 /* IO Translation Table Entry 4 */
+#define IIO_ITTE5 0x00400180 /* IO Translation Table Entry 5 */
+#define IIO_ITTE6 0x00400188 /* IO Translation Table Entry 6 */
+#define IIO_ITTE7 0x00400190 /* IO Translation Table Entry 7 */
+
+#define IIO_IPRB0 0x00400198 /* IO PRB Entry 0 */
+#define IIO_IPRB8 0x004001A0 /* IO PRB Entry 8 */
+#define IIO_IPRB9 0x004001A8 /* IO PRB Entry 9 */
+#define IIO_IPRBA 0x004001B0 /* IO PRB Entry A */
+#define IIO_IPRBB 0x004001B8 /* IO PRB Entry B */
+#define IIO_IPRBC 0x004001C0 /* IO PRB Entry C */
+#define IIO_IPRBD 0x004001C8 /* IO PRB Entry D */
+#define IIO_IPRBE 0x004001D0 /* IO PRB Entry E */
+#define IIO_IPRBF 0x004001D8 /* IO PRB Entry F */
+
+#define IIO_IXCC 0x004001E0 /* IO Crosstalk Credit Count Timeout */
+#define IIO_IMEM 0x004001E8 /* IO Miscellaneous Error Mask */
+#define IIO_IXTT 0x004001F0 /* IO Crosstalk Timeout Threshold */
+#define IIO_IECLR 0x004001F8 /* IO Error Clear Register */
+#define IIO_IBCR 0x00400200 /* IO BTE Control Register */
+
+#define IIO_IXSM 0x00400208 /* IO Crosstalk Spurious Message */
+#define IIO_IXSS 0x00400210 /* IO Crosstalk Spurious Sideband */
+
+#define IIO_ILCT 0x00400218 /* IO LLP Channel Test */
+
+#define IIO_IIEPH1 0x00400220 /* IO Incoming Error Packet Header, Part 1 */
+#define IIO_IIEPH2 0x00400228 /* IO Incoming Error Packet Header, Part 2 */
+
+#define IIO_ISLAPR 0x00400230 /* IO SXB Local Access Protection Regster */
+#define IIO_ISLAPO 0x00400238 /* IO SXB Local Access Protection Override */
+
+#define IIO_IWI 0x00400240 /* IO Wrapper Interrupt Register */
+#define IIO_IWEL 0x00400248 /* IO Wrapper Error Log Register */
+#define IIO_IWC 0x00400250 /* IO Wrapper Control Register */
+#define IIO_IWS 0x00400258 /* IO Wrapper Status Register */
+#define IIO_IWEIM 0x00400260 /* IO Wrapper Error Interrupt Masking Register */
+
+#define IIO_IPCA 0x00400300 /* IO PRB Counter Adjust */
+
+#define IIO_IPRTE0_A 0x00400308 /* IO PIO Read Address Table Entry 0, Part A */
+#define IIO_IPRTE1_A 0x00400310 /* IO PIO Read Address Table Entry 1, Part A */
+#define IIO_IPRTE2_A 0x00400318 /* IO PIO Read Address Table Entry 2, Part A */
+#define IIO_IPRTE3_A 0x00400320 /* IO PIO Read Address Table Entry 3, Part A */
+#define IIO_IPRTE4_A 0x00400328 /* IO PIO Read Address Table Entry 4, Part A */
+#define IIO_IPRTE5_A 0x00400330 /* IO PIO Read Address Table Entry 5, Part A */
+#define IIO_IPRTE6_A 0x00400338 /* IO PIO Read Address Table Entry 6, Part A */
+#define IIO_IPRTE7_A 0x00400340 /* IO PIO Read Address Table Entry 7, Part A */
+
+#define IIO_IPRTE0_B 0x00400348 /* IO PIO Read Address Table Entry 0, Part B */
+#define IIO_IPRTE1_B 0x00400350 /* IO PIO Read Address Table Entry 1, Part B */
+#define IIO_IPRTE2_B 0x00400358 /* IO PIO Read Address Table Entry 2, Part B */
+#define IIO_IPRTE3_B 0x00400360 /* IO PIO Read Address Table Entry 3, Part B */
+#define IIO_IPRTE4_B 0x00400368 /* IO PIO Read Address Table Entry 4, Part B */
+#define IIO_IPRTE5_B 0x00400370 /* IO PIO Read Address Table Entry 5, Part B */
+#define IIO_IPRTE6_B 0x00400378 /* IO PIO Read Address Table Entry 6, Part B */
+#define IIO_IPRTE7_B 0x00400380 /* IO PIO Read Address Table Entry 7, Part B */
+
+#define IIO_IPDR 0x00400388 /* IO PIO Deallocation Register */
+#define IIO_ICDR 0x00400390 /* IO CRB Entry Deallocation Register */
+#define IIO_IFDR 0x00400398 /* IO IOQ FIFO Depth Register */
+#define IIO_IIAP 0x004003A0 /* IO IIQ Arbitration Parameters */
+#define IIO_ICMR 0x004003A8 /* IO CRB Management Register */
+#define IIO_ICCR 0x004003B0 /* IO CRB Control Register */
+#define IIO_ICTO 0x004003B8 /* IO CRB Timeout */
+#define IIO_ICTP 0x004003C0 /* IO CRB Timeout Prescalar */
+
+#define IIO_ICRB0_A 0x00400400 /* IO CRB Entry 0_A */
+#define IIO_ICRB0_B 0x00400408 /* IO CRB Entry 0_B */
+#define IIO_ICRB0_C 0x00400410 /* IO CRB Entry 0_C */
+#define IIO_ICRB0_D 0x00400418 /* IO CRB Entry 0_D */
+#define IIO_ICRB0_E 0x00400420 /* IO CRB Entry 0_E */
+
+#define IIO_ICRB1_A 0x00400430 /* IO CRB Entry 1_A */
+#define IIO_ICRB1_B 0x00400438 /* IO CRB Entry 1_B */
+#define IIO_ICRB1_C 0x00400440 /* IO CRB Entry 1_C */
+#define IIO_ICRB1_D 0x00400448 /* IO CRB Entry 1_D */
+#define IIO_ICRB1_E 0x00400450 /* IO CRB Entry 1_E */
+
+#define IIO_ICRB2_A 0x00400460 /* IO CRB Entry 2_A */
+#define IIO_ICRB2_B 0x00400468 /* IO CRB Entry 2_B */
+#define IIO_ICRB2_C 0x00400470 /* IO CRB Entry 2_C */
+#define IIO_ICRB2_D 0x00400478 /* IO CRB Entry 2_D */
+#define IIO_ICRB2_E 0x00400480 /* IO CRB Entry 2_E */
+
+#define IIO_ICRB3_A 0x00400490 /* IO CRB Entry 3_A */
+#define IIO_ICRB3_B 0x00400498 /* IO CRB Entry 3_B */
+#define IIO_ICRB3_C 0x004004a0 /* IO CRB Entry 3_C */
+#define IIO_ICRB3_D 0x004004a8 /* IO CRB Entry 3_D */
+#define IIO_ICRB3_E 0x004004b0 /* IO CRB Entry 3_E */
+
+#define IIO_ICRB4_A 0x004004c0 /* IO CRB Entry 4_A */
+#define IIO_ICRB4_B 0x004004c8 /* IO CRB Entry 4_B */
+#define IIO_ICRB4_C 0x004004d0 /* IO CRB Entry 4_C */
+#define IIO_ICRB4_D 0x004004d8 /* IO CRB Entry 4_D */
+#define IIO_ICRB4_E 0x004004e0 /* IO CRB Entry 4_E */
+
+#define IIO_ICRB5_A 0x004004f0 /* IO CRB Entry 5_A */
+#define IIO_ICRB5_B 0x004004f8 /* IO CRB Entry 5_B */
+#define IIO_ICRB5_C 0x00400500 /* IO CRB Entry 5_C */
+#define IIO_ICRB5_D 0x00400508 /* IO CRB Entry 5_D */
+#define IIO_ICRB5_E 0x00400510 /* IO CRB Entry 5_E */
+
+#define IIO_ICRB6_A 0x00400520 /* IO CRB Entry 6_A */
+#define IIO_ICRB6_B 0x00400528 /* IO CRB Entry 6_B */
+#define IIO_ICRB6_C 0x00400530 /* IO CRB Entry 6_C */
+#define IIO_ICRB6_D 0x00400538 /* IO CRB Entry 6_D */
+#define IIO_ICRB6_E 0x00400540 /* IO CRB Entry 6_E */
+
+#define IIO_ICRB7_A 0x00400550 /* IO CRB Entry 7_A */
+#define IIO_ICRB7_B 0x00400558 /* IO CRB Entry 7_B */
+#define IIO_ICRB7_C 0x00400560 /* IO CRB Entry 7_C */
+#define IIO_ICRB7_D 0x00400568 /* IO CRB Entry 7_D */
+#define IIO_ICRB7_E 0x00400570 /* IO CRB Entry 7_E */
+
+#define IIO_ICRB8_A 0x00400580 /* IO CRB Entry 8_A */
+#define IIO_ICRB8_B 0x00400588 /* IO CRB Entry 8_B */
+#define IIO_ICRB8_C 0x00400590 /* IO CRB Entry 8_C */
+#define IIO_ICRB8_D 0x00400598 /* IO CRB Entry 8_D */
+#define IIO_ICRB8_E 0x004005a0 /* IO CRB Entry 8_E */
+
+#define IIO_ICRB9_A 0x004005b0 /* IO CRB Entry 9_A */
+#define IIO_ICRB9_B 0x004005b8 /* IO CRB Entry 9_B */
+#define IIO_ICRB9_C 0x004005c0 /* IO CRB Entry 9_C */
+#define IIO_ICRB9_D 0x004005c8 /* IO CRB Entry 9_D */
+#define IIO_ICRB9_E 0x004005d0 /* IO CRB Entry 9_E */
+
+#define IIO_ICRBA_A 0x004005e0 /* IO CRB Entry A_A */
+#define IIO_ICRBA_B 0x004005e8 /* IO CRB Entry A_B */
+#define IIO_ICRBA_C 0x004005f0 /* IO CRB Entry A_C */
+#define IIO_ICRBA_D 0x004005f8 /* IO CRB Entry A_D */
+#define IIO_ICRBA_E 0x00400600 /* IO CRB Entry A_E */
+
+#define IIO_ICRBB_A 0x00400610 /* IO CRB Entry B_A */
+#define IIO_ICRBB_B 0x00400618 /* IO CRB Entry B_B */
+#define IIO_ICRBB_C 0x00400620 /* IO CRB Entry B_C */
+#define IIO_ICRBB_D 0x00400628 /* IO CRB Entry B_D */
+#define IIO_ICRBB_E 0x00400630 /* IO CRB Entry B_E */
+
+#define IIO_ICRBC_A 0x00400640 /* IO CRB Entry C_A */
+#define IIO_ICRBC_B 0x00400648 /* IO CRB Entry C_B */
+#define IIO_ICRBC_C 0x00400650 /* IO CRB Entry C_C */
+#define IIO_ICRBC_D 0x00400658 /* IO CRB Entry C_D */
+#define IIO_ICRBC_E 0x00400660 /* IO CRB Entry C_E */
+
+#define IIO_ICRBD_A 0x00400670 /* IO CRB Entry D_A */
+#define IIO_ICRBD_B 0x00400678 /* IO CRB Entry D_B */
+#define IIO_ICRBD_C 0x00400680 /* IO CRB Entry D_C */
+#define IIO_ICRBD_D 0x00400688 /* IO CRB Entry D_D */
+#define IIO_ICRBD_E 0x00400690 /* IO CRB Entry D_E */
+
+#define IIO_ICRBE_A 0x004006a0 /* IO CRB Entry E_A */
+#define IIO_ICRBE_B 0x004006a8 /* IO CRB Entry E_B */
+#define IIO_ICRBE_C 0x004006b0 /* IO CRB Entry E_C */
+#define IIO_ICRBE_D 0x004006b8 /* IO CRB Entry E_D */
+#define IIO_ICRBE_E 0x004006c0 /* IO CRB Entry E_E */
+
+#define IIO_ICSML 0x00400700 /* IO CRB Spurious Message Low */
+#define IIO_ICSMM 0x00400708 /* IO CRB Spurious Message Middle */
+#define IIO_ICSMH 0x00400710 /* IO CRB Spurious Message High */
+
+#define IIO_IDBSS 0x00400718 /* IO Debug Submenu Select */
+
+#define IIO_IBLS0 0x00410000 /* IO BTE Length Status 0 */
+#define IIO_IBSA0 0x00410008 /* IO BTE Source Address 0 */
+#define IIO_IBDA0 0x00410010 /* IO BTE Destination Address 0 */
+#define IIO_IBCT0 0x00410018 /* IO BTE Control Terminate 0 */
+#define IIO_IBNA0 0x00410020 /* IO BTE Notification Address 0 */
+#define IIO_IBIA0 0x00410028 /* IO BTE Interrupt Address 0 */
+#define IIO_IBLS1 0x00420000 /* IO BTE Length Status 1 */
+#define IIO_IBSA1 0x00420008 /* IO BTE Source Address 1 */
+#define IIO_IBDA1 0x00420010 /* IO BTE Destination Address 1 */
+#define IIO_IBCT1 0x00420018 /* IO BTE Control Terminate 1 */
+#define IIO_IBNA1 0x00420020 /* IO BTE Notification Address 1 */
+#define IIO_IBIA1 0x00420028 /* IO BTE Interrupt Address 1 */
+#define IIO_IPCR 0x00430000 /* IO Performance Control */
+#define IIO_IPPR 0x00430008 /* IO Performance Profiling */
/************************************************************************
- * *
+ * *
* Description: This register echoes some information from the *
* LB_REV_ID register. It is available through Crosstalk as described *
* above. The REV_NUM and MFG_NUM fields receive their values from *
* the REVISION and MANUFACTURER fields in the LB_REV_ID register. *
* The PART_NUM field's value is the Crosstalk device ID number that *
* Steve Miller assigned to the SHub chip. *
- * *
+ * *
************************************************************************/
typedef union ii_wid_u {
- uint64_t ii_wid_regval;
- struct {
- uint64_t w_rsvd_1 : 1;
- uint64_t w_mfg_num : 11;
- uint64_t w_part_num : 16;
- uint64_t w_rev_num : 4;
- uint64_t w_rsvd : 32;
+ uint64_t ii_wid_regval;
+ struct {
+ uint64_t w_rsvd_1:1;
+ uint64_t w_mfg_num:11;
+ uint64_t w_part_num:16;
+ uint64_t w_rev_num:4;
+ uint64_t w_rsvd:32;
} ii_wid_fld_s;
} ii_wid_u_t;
-
/************************************************************************
- * *
+ * *
* The fields in this register are set upon detection of an error *
* and cleared by various mechanisms, as explained in the *
* description. *
- * *
+ * *
************************************************************************/
typedef union ii_wstat_u {
- uint64_t ii_wstat_regval;
- struct {
- uint64_t w_pending : 4;
- uint64_t w_xt_crd_to : 1;
- uint64_t w_xt_tail_to : 1;
- uint64_t w_rsvd_3 : 3;
- uint64_t w_tx_mx_rty : 1;
- uint64_t w_rsvd_2 : 6;
- uint64_t w_llp_tx_cnt : 8;
- uint64_t w_rsvd_1 : 8;
- uint64_t w_crazy : 1;
- uint64_t w_rsvd : 31;
+ uint64_t ii_wstat_regval;
+ struct {
+ uint64_t w_pending:4;
+ uint64_t w_xt_crd_to:1;
+ uint64_t w_xt_tail_to:1;
+ uint64_t w_rsvd_3:3;
+ uint64_t w_tx_mx_rty:1;
+ uint64_t w_rsvd_2:6;
+ uint64_t w_llp_tx_cnt:8;
+ uint64_t w_rsvd_1:8;
+ uint64_t w_crazy:1;
+ uint64_t w_rsvd:31;
} ii_wstat_fld_s;
} ii_wstat_u_t;
-
/************************************************************************
- * *
+ * *
* Description: This is a read-write enabled register. It controls *
* various aspects of the Crosstalk flow control. *
- * *
+ * *
************************************************************************/
typedef union ii_wcr_u {
- uint64_t ii_wcr_regval;
- struct {
- uint64_t w_wid : 4;
- uint64_t w_tag : 1;
- uint64_t w_rsvd_1 : 8;
- uint64_t w_dst_crd : 3;
- uint64_t w_f_bad_pkt : 1;
- uint64_t w_dir_con : 1;
- uint64_t w_e_thresh : 5;
- uint64_t w_rsvd : 41;
+ uint64_t ii_wcr_regval;
+ struct {
+ uint64_t w_wid:4;
+ uint64_t w_tag:1;
+ uint64_t w_rsvd_1:8;
+ uint64_t w_dst_crd:3;
+ uint64_t w_f_bad_pkt:1;
+ uint64_t w_dir_con:1;
+ uint64_t w_e_thresh:5;
+ uint64_t w_rsvd:41;
} ii_wcr_fld_s;
} ii_wcr_u_t;
-
/************************************************************************
- * *
+ * *
* Description: This register's value is a bit vector that guards *
* access to local registers within the II as well as to external *
* Crosstalk widgets. Each bit in the register corresponds to a *
@@ -311,21 +306,18 @@
* region ID bits are enabled in this same register. It can also be *
* accessed through the IAlias space by the local processors. *
* The reset value of this register allows access by all nodes. *
- * *
+ * *
************************************************************************/
typedef union ii_ilapr_u {
- uint64_t ii_ilapr_regval;
- struct {
- uint64_t i_region : 64;
+ uint64_t ii_ilapr_regval;
+ struct {
+ uint64_t i_region:64;
} ii_ilapr_fld_s;
} ii_ilapr_u_t;
-
-
-
/************************************************************************
- * *
+ * *
* Description: A write to this register of the 64-bit value *
* "SGIrules" in ASCII, will cause the bit in the ILAPR register *
* corresponding to the region of the requestor to be set (allow *
@@ -334,59 +326,54 @@
* This register can also be accessed through the IAlias space. *
* However, this access will not change the access permissions in the *
* ILAPR. *
- * *
+ * *
************************************************************************/
typedef union ii_ilapo_u {
- uint64_t ii_ilapo_regval;
- struct {
- uint64_t i_io_ovrride : 64;
+ uint64_t ii_ilapo_regval;
+ struct {
+ uint64_t i_io_ovrride:64;
} ii_ilapo_fld_s;
} ii_ilapo_u_t;
-
-
/************************************************************************
- * *
+ * *
* This register qualifies all the PIO and Graphics writes launched *
* from the SHUB towards a widget. *
- * *
+ * *
************************************************************************/
typedef union ii_iowa_u {
- uint64_t ii_iowa_regval;
- struct {
- uint64_t i_w0_oac : 1;
- uint64_t i_rsvd_1 : 7;
- uint64_t i_wx_oac : 8;
- uint64_t i_rsvd : 48;
+ uint64_t ii_iowa_regval;
+ struct {
+ uint64_t i_w0_oac:1;
+ uint64_t i_rsvd_1:7;
+ uint64_t i_wx_oac:8;
+ uint64_t i_rsvd:48;
} ii_iowa_fld_s;
} ii_iowa_u_t;
-
/************************************************************************
- * *
+ * *
* Description: This register qualifies all the requests launched *
* from a widget towards the Shub. This register is intended to be *
* used by software in case of misbehaving widgets. *
- * *
- * *
+ * *
+ * *
************************************************************************/
typedef union ii_iiwa_u {
- uint64_t ii_iiwa_regval;
- struct {
- uint64_t i_w0_iac : 1;
- uint64_t i_rsvd_1 : 7;
- uint64_t i_wx_iac : 8;
- uint64_t i_rsvd : 48;
+ uint64_t ii_iiwa_regval;
+ struct {
+ uint64_t i_w0_iac:1;
+ uint64_t i_rsvd_1:7;
+ uint64_t i_wx_iac:8;
+ uint64_t i_rsvd:48;
} ii_iiwa_fld_s;
} ii_iiwa_u_t;
-
-
/************************************************************************
- * *
+ * *
* Description: This register qualifies all the operations launched *
* from a widget towards the SHub. It allows individual access *
* control for up to 8 devices per widget. A device refers to *
@@ -401,72 +388,69 @@
* The bits in this field are set by writing a 1 to them. Incoming *
* replies from Crosstalk are not subject to this access control *
* mechanism. *
- * *
+ * *
************************************************************************/
typedef union ii_iidem_u {
- uint64_t ii_iidem_regval;
- struct {
- uint64_t i_w8_dxs : 8;
- uint64_t i_w9_dxs : 8;
- uint64_t i_wa_dxs : 8;
- uint64_t i_wb_dxs : 8;
- uint64_t i_wc_dxs : 8;
- uint64_t i_wd_dxs : 8;
- uint64_t i_we_dxs : 8;
- uint64_t i_wf_dxs : 8;
+ uint64_t ii_iidem_regval;
+ struct {
+ uint64_t i_w8_dxs:8;
+ uint64_t i_w9_dxs:8;
+ uint64_t i_wa_dxs:8;
+ uint64_t i_wb_dxs:8;
+ uint64_t i_wc_dxs:8;
+ uint64_t i_wd_dxs:8;
+ uint64_t i_we_dxs:8;
+ uint64_t i_wf_dxs:8;
} ii_iidem_fld_s;
} ii_iidem_u_t;
-
/************************************************************************
- * *
+ * *
* This register contains the various programmable fields necessary *
* for controlling and observing the LLP signals. *
- * *
+ * *
************************************************************************/
typedef union ii_ilcsr_u {
- uint64_t ii_ilcsr_regval;
- struct {
- uint64_t i_nullto : 6;
- uint64_t i_rsvd_4 : 2;
- uint64_t i_wrmrst : 1;
- uint64_t i_rsvd_3 : 1;
- uint64_t i_llp_en : 1;
- uint64_t i_bm8 : 1;
- uint64_t i_llp_stat : 2;
- uint64_t i_remote_power : 1;
- uint64_t i_rsvd_2 : 1;
- uint64_t i_maxrtry : 10;
- uint64_t i_d_avail_sel : 2;
- uint64_t i_rsvd_1 : 4;
- uint64_t i_maxbrst : 10;
- uint64_t i_rsvd : 22;
+ uint64_t ii_ilcsr_regval;
+ struct {
+ uint64_t i_nullto:6;
+ uint64_t i_rsvd_4:2;
+ uint64_t i_wrmrst:1;
+ uint64_t i_rsvd_3:1;
+ uint64_t i_llp_en:1;
+ uint64_t i_bm8:1;
+ uint64_t i_llp_stat:2;
+ uint64_t i_remote_power:1;
+ uint64_t i_rsvd_2:1;
+ uint64_t i_maxrtry:10;
+ uint64_t i_d_avail_sel:2;
+ uint64_t i_rsvd_1:4;
+ uint64_t i_maxbrst:10;
+ uint64_t i_rsvd:22;
} ii_ilcsr_fld_s;
} ii_ilcsr_u_t;
-
/************************************************************************
- * *
+ * *
* This is simply a status registers that monitors the LLP error *
- * rate. *
- * *
+ * rate. *
+ * *
************************************************************************/
typedef union ii_illr_u {
- uint64_t ii_illr_regval;
- struct {
- uint64_t i_sn_cnt : 16;
- uint64_t i_cb_cnt : 16;
- uint64_t i_rsvd : 32;
+ uint64_t ii_illr_regval;
+ struct {
+ uint64_t i_sn_cnt:16;
+ uint64_t i_cb_cnt:16;
+ uint64_t i_rsvd:32;
} ii_illr_fld_s;
} ii_illr_u_t;
-
/************************************************************************
- * *
+ * *
* Description: All II-detected non-BTE error interrupts are *
* specified via this register. *
* NOTE: The PI interrupt register address is hardcoded in the II. If *
@@ -476,107 +460,100 @@
* PI_ID==1, then the II sends the interrupt request to address *
* offset 0x01A0_0090 within the local register address space of PI1 *
* on the node specified by the NODE field. *
- * *
+ * *
************************************************************************/
typedef union ii_iidsr_u {
- uint64_t ii_iidsr_regval;
- struct {
- uint64_t i_level : 8;
- uint64_t i_pi_id : 1;
- uint64_t i_node : 11;
- uint64_t i_rsvd_3 : 4;
- uint64_t i_enable : 1;
- uint64_t i_rsvd_2 : 3;
- uint64_t i_int_sent : 2;
- uint64_t i_rsvd_1 : 2;
- uint64_t i_pi0_forward_int : 1;
- uint64_t i_pi1_forward_int : 1;
- uint64_t i_rsvd : 30;
+ uint64_t ii_iidsr_regval;
+ struct {
+ uint64_t i_level:8;
+ uint64_t i_pi_id:1;
+ uint64_t i_node:11;
+ uint64_t i_rsvd_3:4;
+ uint64_t i_enable:1;
+ uint64_t i_rsvd_2:3;
+ uint64_t i_int_sent:2;
+ uint64_t i_rsvd_1:2;
+ uint64_t i_pi0_forward_int:1;
+ uint64_t i_pi1_forward_int:1;
+ uint64_t i_rsvd:30;
} ii_iidsr_fld_s;
} ii_iidsr_u_t;
-
-
/************************************************************************
- * *
+ * *
* There are two instances of this register. This register is used *
* for matching up the incoming responses from the graphics widget to *
* the processor that initiated the graphics operation. The *
* write-responses are converted to graphics credits and returned to *
* the processor so that the processor interface can manage the flow *
* control. *
- * *
+ * *
************************************************************************/
typedef union ii_igfx0_u {
- uint64_t ii_igfx0_regval;
- struct {
- uint64_t i_w_num : 4;
- uint64_t i_pi_id : 1;
- uint64_t i_n_num : 12;
- uint64_t i_p_num : 1;
- uint64_t i_rsvd : 46;
+ uint64_t ii_igfx0_regval;
+ struct {
+ uint64_t i_w_num:4;
+ uint64_t i_pi_id:1;
+ uint64_t i_n_num:12;
+ uint64_t i_p_num:1;
+ uint64_t i_rsvd:46;
} ii_igfx0_fld_s;
} ii_igfx0_u_t;
-
/************************************************************************
- * *
+ * *
* There are two instances of this register. This register is used *
* for matching up the incoming responses from the graphics widget to *
* the processor that initiated the graphics operation. The *
* write-responses are converted to graphics credits and returned to *
* the processor so that the processor interface can manage the flow *
* control. *
- * *
+ * *
************************************************************************/
typedef union ii_igfx1_u {
- uint64_t ii_igfx1_regval;
- struct {
- uint64_t i_w_num : 4;
- uint64_t i_pi_id : 1;
- uint64_t i_n_num : 12;
- uint64_t i_p_num : 1;
- uint64_t i_rsvd : 46;
+ uint64_t ii_igfx1_regval;
+ struct {
+ uint64_t i_w_num:4;
+ uint64_t i_pi_id:1;
+ uint64_t i_n_num:12;
+ uint64_t i_p_num:1;
+ uint64_t i_rsvd:46;
} ii_igfx1_fld_s;
} ii_igfx1_u_t;
-
/************************************************************************
- * *
+ * *
* There are two instances of this registers. These registers are *
* used as scratch registers for software use. *
- * *
+ * *
************************************************************************/
typedef union ii_iscr0_u {
- uint64_t ii_iscr0_regval;
- struct {
- uint64_t i_scratch : 64;
+ uint64_t ii_iscr0_regval;
+ struct {
+ uint64_t i_scratch:64;
} ii_iscr0_fld_s;
} ii_iscr0_u_t;
-
-
/************************************************************************
- * *
+ * *
* There are two instances of this registers. These registers are *
* used as scratch registers for software use. *
- * *
+ * *
************************************************************************/
typedef union ii_iscr1_u {
- uint64_t ii_iscr1_regval;
- struct {
- uint64_t i_scratch : 64;
+ uint64_t ii_iscr1_regval;
+ struct {
+ uint64_t i_scratch:64;
} ii_iscr1_fld_s;
} ii_iscr1_u_t;
-
/************************************************************************
- * *
+ * *
* Description: There are seven instances of translation table entry *
* registers. Each register maps a Shub Big Window to a 48-bit *
* address on Crosstalk. *
@@ -599,23 +576,22 @@
* Crosstalk space addressable by the Shub is thus the lower *
* 8-GBytes per widget (N-mode), only <SUP >7</SUP>/<SUB >32nds</SUB> *
* of this space can be accessed. *
- * *
+ * *
************************************************************************/
typedef union ii_itte1_u {
- uint64_t ii_itte1_regval;
- struct {
- uint64_t i_offset : 5;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_w_num : 4;
- uint64_t i_iosp : 1;
- uint64_t i_rsvd : 51;
+ uint64_t ii_itte1_regval;
+ struct {
+ uint64_t i_offset:5;
+ uint64_t i_rsvd_1:3;
+ uint64_t i_w_num:4;
+ uint64_t i_iosp:1;
+ uint64_t i_rsvd:51;
} ii_itte1_fld_s;
} ii_itte1_u_t;
-
/************************************************************************
- * *
+ * *
* Description: There are seven instances of translation table entry *
* registers. Each register maps a Shub Big Window to a 48-bit *
* address on Crosstalk. *
@@ -638,23 +614,22 @@
* Crosstalk space addressable by the Shub is thus the lower *
* 8-GBytes per widget (N-mode), only <SUP >7</SUP>/<SUB >32nds</SUB> *
* of this space can be accessed. *
- * *
+ * *
************************************************************************/
typedef union ii_itte2_u {
- uint64_t ii_itte2_regval;
- struct {
- uint64_t i_offset : 5;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_w_num : 4;
- uint64_t i_iosp : 1;
- uint64_t i_rsvd : 51;
+ uint64_t ii_itte2_regval;
+ struct {
+ uint64_t i_offset:5;
+ uint64_t i_rsvd_1:3;
+ uint64_t i_w_num:4;
+ uint64_t i_iosp:1;
+ uint64_t i_rsvd:51;
} ii_itte2_fld_s;
} ii_itte2_u_t;
-
/************************************************************************
- * *
+ * *
* Description: There are seven instances of translation table entry *
* registers. Each register maps a Shub Big Window to a 48-bit *
* address on Crosstalk. *
@@ -677,23 +652,22 @@
* Crosstalk space addressable by the SHub is thus the lower *
* 8-GBytes per widget (N-mode), only <SUP >7</SUP>/<SUB >32nds</SUB> *
* of this space can be accessed. *
- * *
+ * *
************************************************************************/
typedef union ii_itte3_u {
- uint64_t ii_itte3_regval;
- struct {
- uint64_t i_offset : 5;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_w_num : 4;
- uint64_t i_iosp : 1;
- uint64_t i_rsvd : 51;
+ uint64_t ii_itte3_regval;
+ struct {
+ uint64_t i_offset:5;
+ uint64_t i_rsvd_1:3;
+ uint64_t i_w_num:4;
+ uint64_t i_iosp:1;
+ uint64_t i_rsvd:51;
} ii_itte3_fld_s;
} ii_itte3_u_t;
-
/************************************************************************
- * *
+ * *
* Description: There are seven instances of translation table entry *
* registers. Each register maps a SHub Big Window to a 48-bit *
* address on Crosstalk. *
@@ -716,23 +690,22 @@
* Crosstalk space addressable by the SHub is thus the lower *
* 8-GBytes per widget (N-mode), only <SUP >7</SUP>/<SUB >32nds</SUB> *
* of this space can be accessed. *
- * *
+ * *
************************************************************************/
typedef union ii_itte4_u {
- uint64_t ii_itte4_regval;
- struct {
- uint64_t i_offset : 5;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_w_num : 4;
- uint64_t i_iosp : 1;
- uint64_t i_rsvd : 51;
+ uint64_t ii_itte4_regval;
+ struct {
+ uint64_t i_offset:5;
+ uint64_t i_rsvd_1:3;
+ uint64_t i_w_num:4;
+ uint64_t i_iosp:1;
+ uint64_t i_rsvd:51;
} ii_itte4_fld_s;
} ii_itte4_u_t;
-
/************************************************************************
- * *
+ * *
* Description: There are seven instances of translation table entry *
* registers. Each register maps a SHub Big Window to a 48-bit *
* address on Crosstalk. *
@@ -755,23 +728,22 @@
* Crosstalk space addressable by the Shub is thus the lower *
* 8-GBytes per widget (N-mode), only <SUP >7</SUP>/<SUB >32nds</SUB> *
* of this space can be accessed. *
- * *
+ * *
************************************************************************/
typedef union ii_itte5_u {
- uint64_t ii_itte5_regval;
- struct {
- uint64_t i_offset : 5;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_w_num : 4;
- uint64_t i_iosp : 1;
- uint64_t i_rsvd : 51;
+ uint64_t ii_itte5_regval;
+ struct {
+ uint64_t i_offset:5;
+ uint64_t i_rsvd_1:3;
+ uint64_t i_w_num:4;
+ uint64_t i_iosp:1;
+ uint64_t i_rsvd:51;
} ii_itte5_fld_s;
} ii_itte5_u_t;
-
/************************************************************************
- * *
+ * *
* Description: There are seven instances of translation table entry *
* registers. Each register maps a Shub Big Window to a 48-bit *
* address on Crosstalk. *
@@ -794,23 +766,22 @@
* Crosstalk space addressable by the Shub is thus the lower *
* 8-GBytes per widget (N-mode), only <SUP >7</SUP>/<SUB >32nds</SUB> *
* of this space can be accessed. *
- * *
+ * *
************************************************************************/
typedef union ii_itte6_u {
- uint64_t ii_itte6_regval;
- struct {
- uint64_t i_offset : 5;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_w_num : 4;
- uint64_t i_iosp : 1;
- uint64_t i_rsvd : 51;
+ uint64_t ii_itte6_regval;
+ struct {
+ uint64_t i_offset:5;
+ uint64_t i_rsvd_1:3;
+ uint64_t i_w_num:4;
+ uint64_t i_iosp:1;
+ uint64_t i_rsvd:51;
} ii_itte6_fld_s;
} ii_itte6_u_t;
-
/************************************************************************
- * *
+ * *
* Description: There are seven instances of translation table entry *
* registers. Each register maps a Shub Big Window to a 48-bit *
* address on Crosstalk. *
@@ -833,23 +804,22 @@
* Crosstalk space addressable by the SHub is thus the lower *
* 8-GBytes per widget (N-mode), only <SUP >7</SUP>/<SUB >32nds</SUB> *
* of this space can be accessed. *
- * *
+ * *
************************************************************************/
typedef union ii_itte7_u {
- uint64_t ii_itte7_regval;
- struct {
- uint64_t i_offset : 5;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_w_num : 4;
- uint64_t i_iosp : 1;
- uint64_t i_rsvd : 51;
+ uint64_t ii_itte7_regval;
+ struct {
+ uint64_t i_offset:5;
+ uint64_t i_rsvd_1:3;
+ uint64_t i_w_num:4;
+ uint64_t i_iosp:1;
+ uint64_t i_rsvd:51;
} ii_itte7_fld_s;
} ii_itte7_u_t;
-
/************************************************************************
- * *
+ * *
* Description: There are 9 instances of this register, one per *
* actual widget in this implementation of SHub and Crossbow. *
* Note: Crossbow only has ports for Widgets 8 through F, widget 0 *
@@ -868,33 +838,32 @@
* register; the write will correct the C field and capture its new *
* value in the internal register. Even if IECLR[E_PRB_x] is set, the *
* SPUR_WR bit will persist if IPRBx hasn't yet been written. *
- * . *
- * *
+ * . *
+ * *
************************************************************************/
typedef union ii_iprb0_u {
- uint64_t ii_iprb0_regval;
- struct {
- uint64_t i_c : 8;
- uint64_t i_na : 14;
- uint64_t i_rsvd_2 : 2;
- uint64_t i_nb : 14;
- uint64_t i_rsvd_1 : 2;
- uint64_t i_m : 2;
- uint64_t i_f : 1;
- uint64_t i_of_cnt : 5;
- uint64_t i_error : 1;
- uint64_t i_rd_to : 1;
- uint64_t i_spur_wr : 1;
- uint64_t i_spur_rd : 1;
- uint64_t i_rsvd : 11;
- uint64_t i_mult_err : 1;
+ uint64_t ii_iprb0_regval;
+ struct {
+ uint64_t i_c:8;
+ uint64_t i_na:14;
+ uint64_t i_rsvd_2:2;
+ uint64_t i_nb:14;
+ uint64_t i_rsvd_1:2;
+ uint64_t i_m:2;
+ uint64_t i_f:1;
+ uint64_t i_of_cnt:5;
+ uint64_t i_error:1;
+ uint64_t i_rd_to:1;
+ uint64_t i_spur_wr:1;
+ uint64_t i_spur_rd:1;
+ uint64_t i_rsvd:11;
+ uint64_t i_mult_err:1;
} ii_iprb0_fld_s;
} ii_iprb0_u_t;
-
/************************************************************************
- * *
+ * *
* Description: There are 9 instances of this register, one per *
* actual widget in this implementation of SHub and Crossbow. *
* Note: Crossbow only has ports for Widgets 8 through F, widget 0 *
@@ -913,33 +882,32 @@
* register; the write will correct the C field and capture its new *
* value in the internal register. Even if IECLR[E_PRB_x] is set, the *
* SPUR_WR bit will persist if IPRBx hasn't yet been written. *
- * . *
- * *
+ * . *
+ * *
************************************************************************/
typedef union ii_iprb8_u {
- uint64_t ii_iprb8_regval;
- struct {
- uint64_t i_c : 8;
- uint64_t i_na : 14;
- uint64_t i_rsvd_2 : 2;
- uint64_t i_nb : 14;
- uint64_t i_rsvd_1 : 2;
- uint64_t i_m : 2;
- uint64_t i_f : 1;
- uint64_t i_of_cnt : 5;
- uint64_t i_error : 1;
- uint64_t i_rd_to : 1;
- uint64_t i_spur_wr : 1;
- uint64_t i_spur_rd : 1;
- uint64_t i_rsvd : 11;
- uint64_t i_mult_err : 1;
+ uint64_t ii_iprb8_regval;
+ struct {
+ uint64_t i_c:8;
+ uint64_t i_na:14;
+ uint64_t i_rsvd_2:2;
+ uint64_t i_nb:14;
+ uint64_t i_rsvd_1:2;
+ uint64_t i_m:2;
+ uint64_t i_f:1;
+ uint64_t i_of_cnt:5;
+ uint64_t i_error:1;
+ uint64_t i_rd_to:1;
+ uint64_t i_spur_wr:1;
+ uint64_t i_spur_rd:1;
+ uint64_t i_rsvd:11;
+ uint64_t i_mult_err:1;
} ii_iprb8_fld_s;
} ii_iprb8_u_t;
-
/************************************************************************
- * *
+ * *
* Description: There are 9 instances of this register, one per *
* actual widget in this implementation of SHub and Crossbow. *
* Note: Crossbow only has ports for Widgets 8 through F, widget 0 *
@@ -958,33 +926,32 @@
* register; the write will correct the C field and capture its new *
* value in the internal register. Even if IECLR[E_PRB_x] is set, the *
* SPUR_WR bit will persist if IPRBx hasn't yet been written. *
- * . *
- * *
+ * . *
+ * *
************************************************************************/
typedef union ii_iprb9_u {
- uint64_t ii_iprb9_regval;
- struct {
- uint64_t i_c : 8;
- uint64_t i_na : 14;
- uint64_t i_rsvd_2 : 2;
- uint64_t i_nb : 14;
- uint64_t i_rsvd_1 : 2;
- uint64_t i_m : 2;
- uint64_t i_f : 1;
- uint64_t i_of_cnt : 5;
- uint64_t i_error : 1;
- uint64_t i_rd_to : 1;
- uint64_t i_spur_wr : 1;
- uint64_t i_spur_rd : 1;
- uint64_t i_rsvd : 11;
- uint64_t i_mult_err : 1;
+ uint64_t ii_iprb9_regval;
+ struct {
+ uint64_t i_c:8;
+ uint64_t i_na:14;
+ uint64_t i_rsvd_2:2;
+ uint64_t i_nb:14;
+ uint64_t i_rsvd_1:2;
+ uint64_t i_m:2;
+ uint64_t i_f:1;
+ uint64_t i_of_cnt:5;
+ uint64_t i_error:1;
+ uint64_t i_rd_to:1;
+ uint64_t i_spur_wr:1;
+ uint64_t i_spur_rd:1;
+ uint64_t i_rsvd:11;
+ uint64_t i_mult_err:1;
} ii_iprb9_fld_s;
} ii_iprb9_u_t;
-
/************************************************************************
- * *
+ * *
* Description: There are 9 instances of this register, one per *
* actual widget in this implementation of SHub and Crossbow. *
* Note: Crossbow only has ports for Widgets 8 through F, widget 0 *
@@ -1003,33 +970,32 @@
* register; the write will correct the C field and capture its new *
* value in the internal register. Even if IECLR[E_PRB_x] is set, the *
* SPUR_WR bit will persist if IPRBx hasn't yet been written. *
- * *
- * *
+ * *
+ * *
************************************************************************/
typedef union ii_iprba_u {
- uint64_t ii_iprba_regval;
- struct {
- uint64_t i_c : 8;
- uint64_t i_na : 14;
- uint64_t i_rsvd_2 : 2;
- uint64_t i_nb : 14;
- uint64_t i_rsvd_1 : 2;
- uint64_t i_m : 2;
- uint64_t i_f : 1;
- uint64_t i_of_cnt : 5;
- uint64_t i_error : 1;
- uint64_t i_rd_to : 1;
- uint64_t i_spur_wr : 1;
- uint64_t i_spur_rd : 1;
- uint64_t i_rsvd : 11;
- uint64_t i_mult_err : 1;
+ uint64_t ii_iprba_regval;
+ struct {
+ uint64_t i_c:8;
+ uint64_t i_na:14;
+ uint64_t i_rsvd_2:2;
+ uint64_t i_nb:14;
+ uint64_t i_rsvd_1:2;
+ uint64_t i_m:2;
+ uint64_t i_f:1;
+ uint64_t i_of_cnt:5;
+ uint64_t i_error:1;
+ uint64_t i_rd_to:1;
+ uint64_t i_spur_wr:1;
+ uint64_t i_spur_rd:1;
+ uint64_t i_rsvd:11;
+ uint64_t i_mult_err:1;
} ii_iprba_fld_s;
} ii_iprba_u_t;
-
/************************************************************************
- * *
+ * *
* Description: There are 9 instances of this register, one per *
* actual widget in this implementation of SHub and Crossbow. *
* Note: Crossbow only has ports for Widgets 8 through F, widget 0 *
@@ -1048,33 +1014,32 @@
* register; the write will correct the C field and capture its new *
* value in the internal register. Even if IECLR[E_PRB_x] is set, the *
* SPUR_WR bit will persist if IPRBx hasn't yet been written. *
- * . *
- * *
+ * . *
+ * *
************************************************************************/
typedef union ii_iprbb_u {
- uint64_t ii_iprbb_regval;
- struct {
- uint64_t i_c : 8;
- uint64_t i_na : 14;
- uint64_t i_rsvd_2 : 2;
- uint64_t i_nb : 14;
- uint64_t i_rsvd_1 : 2;
- uint64_t i_m : 2;
- uint64_t i_f : 1;
- uint64_t i_of_cnt : 5;
- uint64_t i_error : 1;
- uint64_t i_rd_to : 1;
- uint64_t i_spur_wr : 1;
- uint64_t i_spur_rd : 1;
- uint64_t i_rsvd : 11;
- uint64_t i_mult_err : 1;
+ uint64_t ii_iprbb_regval;
+ struct {
+ uint64_t i_c:8;
+ uint64_t i_na:14;
+ uint64_t i_rsvd_2:2;
+ uint64_t i_nb:14;
+ uint64_t i_rsvd_1:2;
+ uint64_t i_m:2;
+ uint64_t i_f:1;
+ uint64_t i_of_cnt:5;
+ uint64_t i_error:1;
+ uint64_t i_rd_to:1;
+ uint64_t i_spur_wr:1;
+ uint64_t i_spur_rd:1;
+ uint64_t i_rsvd:11;
+ uint64_t i_mult_err:1;
} ii_iprbb_fld_s;
} ii_iprbb_u_t;
-
/************************************************************************
- * *
+ * *
* Description: There are 9 instances of this register, one per *
* actual widget in this implementation of SHub and Crossbow. *
* Note: Crossbow only has ports for Widgets 8 through F, widget 0 *
@@ -1093,33 +1058,32 @@
* register; the write will correct the C field and capture its new *
* value in the internal register. Even if IECLR[E_PRB_x] is set, the *
* SPUR_WR bit will persist if IPRBx hasn't yet been written. *
- * . *
- * *
+ * . *
+ * *
************************************************************************/
typedef union ii_iprbc_u {
- uint64_t ii_iprbc_regval;
- struct {
- uint64_t i_c : 8;
- uint64_t i_na : 14;
- uint64_t i_rsvd_2 : 2;
- uint64_t i_nb : 14;
- uint64_t i_rsvd_1 : 2;
- uint64_t i_m : 2;
- uint64_t i_f : 1;
- uint64_t i_of_cnt : 5;
- uint64_t i_error : 1;
- uint64_t i_rd_to : 1;
- uint64_t i_spur_wr : 1;
- uint64_t i_spur_rd : 1;
- uint64_t i_rsvd : 11;
- uint64_t i_mult_err : 1;
+ uint64_t ii_iprbc_regval;
+ struct {
+ uint64_t i_c:8;
+ uint64_t i_na:14;
+ uint64_t i_rsvd_2:2;
+ uint64_t i_nb:14;
+ uint64_t i_rsvd_1:2;
+ uint64_t i_m:2;
+ uint64_t i_f:1;
+ uint64_t i_of_cnt:5;
+ uint64_t i_error:1;
+ uint64_t i_rd_to:1;
+ uint64_t i_spur_wr:1;
+ uint64_t i_spur_rd:1;
+ uint64_t i_rsvd:11;
+ uint64_t i_mult_err:1;
} ii_iprbc_fld_s;
} ii_iprbc_u_t;
-
/************************************************************************
- * *
+ * *
* Description: There are 9 instances of this register, one per *
* actual widget in this implementation of SHub and Crossbow. *
* Note: Crossbow only has ports for Widgets 8 through F, widget 0 *
@@ -1138,33 +1102,32 @@
* register; the write will correct the C field and capture its new *
* value in the internal register. Even if IECLR[E_PRB_x] is set, the *
* SPUR_WR bit will persist if IPRBx hasn't yet been written. *
- * . *
- * *
+ * . *
+ * *
************************************************************************/
typedef union ii_iprbd_u {
- uint64_t ii_iprbd_regval;
- struct {
- uint64_t i_c : 8;
- uint64_t i_na : 14;
- uint64_t i_rsvd_2 : 2;
- uint64_t i_nb : 14;
- uint64_t i_rsvd_1 : 2;
- uint64_t i_m : 2;
- uint64_t i_f : 1;
- uint64_t i_of_cnt : 5;
- uint64_t i_error : 1;
- uint64_t i_rd_to : 1;
- uint64_t i_spur_wr : 1;
- uint64_t i_spur_rd : 1;
- uint64_t i_rsvd : 11;
- uint64_t i_mult_err : 1;
+ uint64_t ii_iprbd_regval;
+ struct {
+ uint64_t i_c:8;
+ uint64_t i_na:14;
+ uint64_t i_rsvd_2:2;
+ uint64_t i_nb:14;
+ uint64_t i_rsvd_1:2;
+ uint64_t i_m:2;
+ uint64_t i_f:1;
+ uint64_t i_of_cnt:5;
+ uint64_t i_error:1;
+ uint64_t i_rd_to:1;
+ uint64_t i_spur_wr:1;
+ uint64_t i_spur_rd:1;
+ uint64_t i_rsvd:11;
+ uint64_t i_mult_err:1;
} ii_iprbd_fld_s;
} ii_iprbd_u_t;
-
/************************************************************************
- * *
+ * *
* Description: There are 9 instances of this register, one per *
* actual widget in this implementation of SHub and Crossbow. *
* Note: Crossbow only has ports for Widgets 8 through F, widget 0 *
@@ -1183,33 +1146,32 @@
* register; the write will correct the C field and capture its new *
* value in the internal register. Even if IECLR[E_PRB_x] is set, the *
* SPUR_WR bit will persist if IPRBx hasn't yet been written. *
- * . *
- * *
+ * . *
+ * *
************************************************************************/
typedef union ii_iprbe_u {
- uint64_t ii_iprbe_regval;
- struct {
- uint64_t i_c : 8;
- uint64_t i_na : 14;
- uint64_t i_rsvd_2 : 2;
- uint64_t i_nb : 14;
- uint64_t i_rsvd_1 : 2;
- uint64_t i_m : 2;
- uint64_t i_f : 1;
- uint64_t i_of_cnt : 5;
- uint64_t i_error : 1;
- uint64_t i_rd_to : 1;
- uint64_t i_spur_wr : 1;
- uint64_t i_spur_rd : 1;
- uint64_t i_rsvd : 11;
- uint64_t i_mult_err : 1;
+ uint64_t ii_iprbe_regval;
+ struct {
+ uint64_t i_c:8;
+ uint64_t i_na:14;
+ uint64_t i_rsvd_2:2;
+ uint64_t i_nb:14;
+ uint64_t i_rsvd_1:2;
+ uint64_t i_m:2;
+ uint64_t i_f:1;
+ uint64_t i_of_cnt:5;
+ uint64_t i_error:1;
+ uint64_t i_rd_to:1;
+ uint64_t i_spur_wr:1;
+ uint64_t i_spur_rd:1;
+ uint64_t i_rsvd:11;
+ uint64_t i_mult_err:1;
} ii_iprbe_fld_s;
} ii_iprbe_u_t;
-
/************************************************************************
- * *
+ * *
* Description: There are 9 instances of this register, one per *
* actual widget in this implementation of Shub and Crossbow. *
* Note: Crossbow only has ports for Widgets 8 through F, widget 0 *
@@ -1228,33 +1190,32 @@
* register; the write will correct the C field and capture its new *
* value in the internal register. Even if IECLR[E_PRB_x] is set, the *
* SPUR_WR bit will persist if IPRBx hasn't yet been written. *
- * . *
- * *
+ * . *
+ * *
************************************************************************/
typedef union ii_iprbf_u {
- uint64_t ii_iprbf_regval;
- struct {
- uint64_t i_c : 8;
- uint64_t i_na : 14;
- uint64_t i_rsvd_2 : 2;
- uint64_t i_nb : 14;
- uint64_t i_rsvd_1 : 2;
- uint64_t i_m : 2;
- uint64_t i_f : 1;
- uint64_t i_of_cnt : 5;
- uint64_t i_error : 1;
- uint64_t i_rd_to : 1;
- uint64_t i_spur_wr : 1;
- uint64_t i_spur_rd : 1;
- uint64_t i_rsvd : 11;
- uint64_t i_mult_err : 1;
- } ii_iprbe_fld_s;
+ uint64_t ii_iprbf_regval;
+ struct {
+ uint64_t i_c:8;
+ uint64_t i_na:14;
+ uint64_t i_rsvd_2:2;
+ uint64_t i_nb:14;
+ uint64_t i_rsvd_1:2;
+ uint64_t i_m:2;
+ uint64_t i_f:1;
+ uint64_t i_of_cnt:5;
+ uint64_t i_error:1;
+ uint64_t i_rd_to:1;
+ uint64_t i_spur_wr:1;
+ uint64_t i_spur_rd:1;
+ uint64_t i_rsvd:11;
+ uint64_t i_mult_err:1;
+ } ii_iprbe_fld_s;
} ii_iprbf_u_t;
-
/************************************************************************
- * *
+ * *
* This register specifies the timeout value to use for monitoring *
* Crosstalk credits which are used outbound to Crosstalk. An *
* internal counter called the Crosstalk Credit Timeout Counter *
@@ -1267,20 +1228,19 @@
* Crosstalk Credit Timeout has occurred. The internal counter is not *
* readable from software, and stops counting at its maximum value, *
* so it cannot cause more than one interrupt. *
- * *
+ * *
************************************************************************/
typedef union ii_ixcc_u {
- uint64_t ii_ixcc_regval;
- struct {
- uint64_t i_time_out : 26;
- uint64_t i_rsvd : 38;
+ uint64_t ii_ixcc_regval;
+ struct {
+ uint64_t i_time_out:26;
+ uint64_t i_rsvd:38;
} ii_ixcc_fld_s;
} ii_ixcc_u_t;
-
/************************************************************************
- * *
+ * *
* Description: This register qualifies all the PIO and DMA *
* operations launched from widget 0 towards the SHub. In *
* addition, it also qualifies accesses by the BTE streams. *
@@ -1292,27 +1252,25 @@
* the Wx_IAC field. The bits in this field are set by writing a 1 to *
* them. Incoming replies from Crosstalk are not subject to this *
* access control mechanism. *
- * *
+ * *
************************************************************************/
typedef union ii_imem_u {
- uint64_t ii_imem_regval;
- struct {
- uint64_t i_w0_esd : 1;
- uint64_t i_rsvd_3 : 3;
- uint64_t i_b0_esd : 1;
- uint64_t i_rsvd_2 : 3;
- uint64_t i_b1_esd : 1;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_clr_precise : 1;
- uint64_t i_rsvd : 51;
+ uint64_t ii_imem_regval;
+ struct {
+ uint64_t i_w0_esd:1;
+ uint64_t i_rsvd_3:3;
+ uint64_t i_b0_esd:1;
+ uint64_t i_rsvd_2:3;
+ uint64_t i_b1_esd:1;
+ uint64_t i_rsvd_1:3;
+ uint64_t i_clr_precise:1;
+ uint64_t i_rsvd:51;
} ii_imem_fld_s;
} ii_imem_u_t;
-
-
/************************************************************************
- * *
+ * *
* Description: This register specifies the timeout value to use for *
* monitoring Crosstalk tail flits coming into the Shub in the *
* TAIL_TO field. An internal counter associated with this register *
@@ -1332,90 +1290,87 @@
* the value in the RRSP_TO field, a Read Response Timeout has *
* occurred, and error handling occurs as described in the Error *
* Handling section of this document. *
- * *
+ * *
************************************************************************/
typedef union ii_ixtt_u {
- uint64_t ii_ixtt_regval;
- struct {
- uint64_t i_tail_to : 26;
- uint64_t i_rsvd_1 : 6;
- uint64_t i_rrsp_ps : 23;
- uint64_t i_rrsp_to : 5;
- uint64_t i_rsvd : 4;
+ uint64_t ii_ixtt_regval;
+ struct {
+ uint64_t i_tail_to:26;
+ uint64_t i_rsvd_1:6;
+ uint64_t i_rrsp_ps:23;
+ uint64_t i_rrsp_to:5;
+ uint64_t i_rsvd:4;
} ii_ixtt_fld_s;
} ii_ixtt_u_t;
-
/************************************************************************
- * *
+ * *
* Writing a 1 to the fields of this register clears the appropriate *
* error bits in other areas of SHub. Note that when the *
* E_PRB_x bits are used to clear error bits in PRB registers, *
* SPUR_RD and SPUR_WR may persist, because they require additional *
* action to clear them. See the IPRBx and IXSS Register *
* specifications. *
- * *
+ * *
************************************************************************/
typedef union ii_ieclr_u {
- uint64_t ii_ieclr_regval;
- struct {
- uint64_t i_e_prb_0 : 1;
- uint64_t i_rsvd : 7;
- uint64_t i_e_prb_8 : 1;
- uint64_t i_e_prb_9 : 1;
- uint64_t i_e_prb_a : 1;
- uint64_t i_e_prb_b : 1;
- uint64_t i_e_prb_c : 1;
- uint64_t i_e_prb_d : 1;
- uint64_t i_e_prb_e : 1;
- uint64_t i_e_prb_f : 1;
- uint64_t i_e_crazy : 1;
- uint64_t i_e_bte_0 : 1;
- uint64_t i_e_bte_1 : 1;
- uint64_t i_reserved_1 : 10;
- uint64_t i_spur_rd_hdr : 1;
- uint64_t i_cam_intr_to : 1;
- uint64_t i_cam_overflow : 1;
- uint64_t i_cam_read_miss : 1;
- uint64_t i_ioq_rep_underflow : 1;
- uint64_t i_ioq_req_underflow : 1;
- uint64_t i_ioq_rep_overflow : 1;
- uint64_t i_ioq_req_overflow : 1;
- uint64_t i_iiq_rep_overflow : 1;
- uint64_t i_iiq_req_overflow : 1;
- uint64_t i_ii_xn_rep_cred_overflow : 1;
- uint64_t i_ii_xn_req_cred_overflow : 1;
- uint64_t i_ii_xn_invalid_cmd : 1;
- uint64_t i_xn_ii_invalid_cmd : 1;
- uint64_t i_reserved_2 : 21;
+ uint64_t ii_ieclr_regval;
+ struct {
+ uint64_t i_e_prb_0:1;
+ uint64_t i_rsvd:7;
+ uint64_t i_e_prb_8:1;
+ uint64_t i_e_prb_9:1;
+ uint64_t i_e_prb_a:1;
+ uint64_t i_e_prb_b:1;
+ uint64_t i_e_prb_c:1;
+ uint64_t i_e_prb_d:1;
+ uint64_t i_e_prb_e:1;
+ uint64_t i_e_prb_f:1;
+ uint64_t i_e_crazy:1;
+ uint64_t i_e_bte_0:1;
+ uint64_t i_e_bte_1:1;
+ uint64_t i_reserved_1:10;
+ uint64_t i_spur_rd_hdr:1;
+ uint64_t i_cam_intr_to:1;
+ uint64_t i_cam_overflow:1;
+ uint64_t i_cam_read_miss:1;
+ uint64_t i_ioq_rep_underflow:1;
+ uint64_t i_ioq_req_underflow:1;
+ uint64_t i_ioq_rep_overflow:1;
+ uint64_t i_ioq_req_overflow:1;
+ uint64_t i_iiq_rep_overflow:1;
+ uint64_t i_iiq_req_overflow:1;
+ uint64_t i_ii_xn_rep_cred_overflow:1;
+ uint64_t i_ii_xn_req_cred_overflow:1;
+ uint64_t i_ii_xn_invalid_cmd:1;
+ uint64_t i_xn_ii_invalid_cmd:1;
+ uint64_t i_reserved_2:21;
} ii_ieclr_fld_s;
} ii_ieclr_u_t;
-
/************************************************************************
- * *
+ * *
* This register controls both BTEs. SOFT_RESET is intended for *
* recovery after an error. COUNT controls the total number of CRBs *
* that both BTEs (combined) can use, which affects total BTE *
* bandwidth. *
- * *
+ * *
************************************************************************/
typedef union ii_ibcr_u {
- uint64_t ii_ibcr_regval;
- struct {
- uint64_t i_count : 4;
- uint64_t i_rsvd_1 : 4;
- uint64_t i_soft_reset : 1;
- uint64_t i_rsvd : 55;
+ uint64_t ii_ibcr_regval;
+ struct {
+ uint64_t i_count:4;
+ uint64_t i_rsvd_1:4;
+ uint64_t i_soft_reset:1;
+ uint64_t i_rsvd:55;
} ii_ibcr_fld_s;
} ii_ibcr_u_t;
-
/************************************************************************
- * *
+ * *
* This register contains the header of a spurious read response *
* received from Crosstalk. A spurious read response is defined as a *
* read response received by II from a widget for which (1) the SIDN *
@@ -1440,49 +1395,47 @@
* will be set. Any SPUR_RD bits in any other PRB registers indicate *
* spurious messages from other widets which were detected after the *
* header was captured.. *
- * *
+ * *
************************************************************************/
typedef union ii_ixsm_u {
- uint64_t ii_ixsm_regval;
- struct {
- uint64_t i_byte_en : 32;
- uint64_t i_reserved : 1;
- uint64_t i_tag : 3;
- uint64_t i_alt_pactyp : 4;
- uint64_t i_bo : 1;
- uint64_t i_error : 1;
- uint64_t i_vbpm : 1;
- uint64_t i_gbr : 1;
- uint64_t i_ds : 2;
- uint64_t i_ct : 1;
- uint64_t i_tnum : 5;
- uint64_t i_pactyp : 4;
- uint64_t i_sidn : 4;
- uint64_t i_didn : 4;
+ uint64_t ii_ixsm_regval;
+ struct {
+ uint64_t i_byte_en:32;
+ uint64_t i_reserved:1;
+ uint64_t i_tag:3;
+ uint64_t i_alt_pactyp:4;
+ uint64_t i_bo:1;
+ uint64_t i_error:1;
+ uint64_t i_vbpm:1;
+ uint64_t i_gbr:1;
+ uint64_t i_ds:2;
+ uint64_t i_ct:1;
+ uint64_t i_tnum:5;
+ uint64_t i_pactyp:4;
+ uint64_t i_sidn:4;
+ uint64_t i_didn:4;
} ii_ixsm_fld_s;
} ii_ixsm_u_t;
-
/************************************************************************
- * *
+ * *
* This register contains the sideband bits of a spurious read *
* response received from Crosstalk. *
- * *
+ * *
************************************************************************/
typedef union ii_ixss_u {
- uint64_t ii_ixss_regval;
- struct {
- uint64_t i_sideband : 8;
- uint64_t i_rsvd : 55;
- uint64_t i_valid : 1;
+ uint64_t ii_ixss_regval;
+ struct {
+ uint64_t i_sideband:8;
+ uint64_t i_rsvd:55;
+ uint64_t i_valid:1;
} ii_ixss_fld_s;
} ii_ixss_u_t;
-
/************************************************************************
- * *
+ * *
* This register enables software to access the II LLP's test port. *
* Refer to the LLP 2.5 documentation for an explanation of the test *
* port. Software can write to this register to program the values *
@@ -1490,27 +1443,26 @@
* TestMask and TestSeed). Similarly, software can read from this *
* register to obtain the values of the test port's status outputs *
* (TestCBerr, TestValid and TestData). *
- * *
+ * *
************************************************************************/
typedef union ii_ilct_u {
- uint64_t ii_ilct_regval;
- struct {
- uint64_t i_test_seed : 20;
- uint64_t i_test_mask : 8;
- uint64_t i_test_data : 20;
- uint64_t i_test_valid : 1;
- uint64_t i_test_cberr : 1;
- uint64_t i_test_flit : 3;
- uint64_t i_test_clear : 1;
- uint64_t i_test_err_capture : 1;
- uint64_t i_rsvd : 9;
+ uint64_t ii_ilct_regval;
+ struct {
+ uint64_t i_test_seed:20;
+ uint64_t i_test_mask:8;
+ uint64_t i_test_data:20;
+ uint64_t i_test_valid:1;
+ uint64_t i_test_cberr:1;
+ uint64_t i_test_flit:3;
+ uint64_t i_test_clear:1;
+ uint64_t i_test_err_capture:1;
+ uint64_t i_rsvd:9;
} ii_ilct_fld_s;
} ii_ilct_u_t;
-
/************************************************************************
- * *
+ * *
* If the II detects an illegal incoming Duplonet packet (request or *
* reply) when VALID==0 in the IIEPH1 register, then it saves the *
* contents of the packet's header flit in the IIEPH1 and IIEPH2 *
@@ -1526,575 +1478,549 @@
* packet when VALID==1 in the IIEPH1 register, then it merely sets *
* the OVERRUN bit to indicate that a subsequent error has happened, *
* and does nothing further. *
- * *
+ * *
************************************************************************/
typedef union ii_iieph1_u {
- uint64_t ii_iieph1_regval;
- struct {
- uint64_t i_command : 7;
- uint64_t i_rsvd_5 : 1;
- uint64_t i_suppl : 14;
- uint64_t i_rsvd_4 : 1;
- uint64_t i_source : 14;
- uint64_t i_rsvd_3 : 1;
- uint64_t i_err_type : 4;
- uint64_t i_rsvd_2 : 4;
- uint64_t i_overrun : 1;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_valid : 1;
- uint64_t i_rsvd : 13;
+ uint64_t ii_iieph1_regval;
+ struct {
+ uint64_t i_command:7;
+ uint64_t i_rsvd_5:1;
+ uint64_t i_suppl:14;
+ uint64_t i_rsvd_4:1;
+ uint64_t i_source:14;
+ uint64_t i_rsvd_3:1;
+ uint64_t i_err_type:4;
+ uint64_t i_rsvd_2:4;
+ uint64_t i_overrun:1;
+ uint64_t i_rsvd_1:3;
+ uint64_t i_valid:1;
+ uint64_t i_rsvd:13;
} ii_iieph1_fld_s;
} ii_iieph1_u_t;
-
/************************************************************************
- * *
+ * *
* This register holds the Address field from the header flit of an *
* incoming erroneous Duplonet packet, along with the tail bit which *
* accompanied this header flit. This register is essentially an *
* extension of IIEPH1. Two registers were necessary because the 64 *
* bits available in only a single register were insufficient to *
* capture the entire header flit of an erroneous packet. *
- * *
+ * *
************************************************************************/
typedef union ii_iieph2_u {
- uint64_t ii_iieph2_regval;
- struct {
- uint64_t i_rsvd_0 : 3;
- uint64_t i_address : 47;
- uint64_t i_rsvd_1 : 10;
- uint64_t i_tail : 1;
- uint64_t i_rsvd : 3;
+ uint64_t ii_iieph2_regval;
+ struct {
+ uint64_t i_rsvd_0:3;
+ uint64_t i_address:47;
+ uint64_t i_rsvd_1:10;
+ uint64_t i_tail:1;
+ uint64_t i_rsvd:3;
} ii_iieph2_fld_s;
} ii_iieph2_u_t;
-
/******************************/
-
-
/************************************************************************
- * *
+ * *
* This register's value is a bit vector that guards access from SXBs *
* to local registers within the II as well as to external Crosstalk *
* widgets *
- * *
+ * *
************************************************************************/
typedef union ii_islapr_u {
- uint64_t ii_islapr_regval;
- struct {
- uint64_t i_region : 64;
+ uint64_t ii_islapr_regval;
+ struct {
+ uint64_t i_region:64;
} ii_islapr_fld_s;
} ii_islapr_u_t;
-
/************************************************************************
- * *
+ * *
* A write to this register of the 56-bit value "Pup+Bun" will cause *
* the bit in the ISLAPR register corresponding to the region of the *
* requestor to be set (access allowed). (
- * *
+ * *
************************************************************************/
typedef union ii_islapo_u {
- uint64_t ii_islapo_regval;
- struct {
- uint64_t i_io_sbx_ovrride : 56;
- uint64_t i_rsvd : 8;
+ uint64_t ii_islapo_regval;
+ struct {
+ uint64_t i_io_sbx_ovrride:56;
+ uint64_t i_rsvd:8;
} ii_islapo_fld_s;
} ii_islapo_u_t;
/************************************************************************
- * *
+ * *
* Determines how long the wrapper will wait aftr an interrupt is *
* initially issued from the II before it times out the outstanding *
* interrupt and drops it from the interrupt queue. *
- * *
+ * *
************************************************************************/
typedef union ii_iwi_u {
- uint64_t ii_iwi_regval;
- struct {
- uint64_t i_prescale : 24;
- uint64_t i_rsvd : 8;
- uint64_t i_timeout : 8;
- uint64_t i_rsvd1 : 8;
- uint64_t i_intrpt_retry_period : 8;
- uint64_t i_rsvd2 : 8;
+ uint64_t ii_iwi_regval;
+ struct {
+ uint64_t i_prescale:24;
+ uint64_t i_rsvd:8;
+ uint64_t i_timeout:8;
+ uint64_t i_rsvd1:8;
+ uint64_t i_intrpt_retry_period:8;
+ uint64_t i_rsvd2:8;
} ii_iwi_fld_s;
} ii_iwi_u_t;
/************************************************************************
- * *
+ * *
* Log errors which have occurred in the II wrapper. The errors are *
* cleared by writing to the IECLR register. *
- * *
+ * *
************************************************************************/
typedef union ii_iwel_u {
- uint64_t ii_iwel_regval;
- struct {
- uint64_t i_intr_timed_out : 1;
- uint64_t i_rsvd : 7;
- uint64_t i_cam_overflow : 1;
- uint64_t i_cam_read_miss : 1;
- uint64_t i_rsvd1 : 2;
- uint64_t i_ioq_rep_underflow : 1;
- uint64_t i_ioq_req_underflow : 1;
- uint64_t i_ioq_rep_overflow : 1;
- uint64_t i_ioq_req_overflow : 1;
- uint64_t i_iiq_rep_overflow : 1;
- uint64_t i_iiq_req_overflow : 1;
- uint64_t i_rsvd2 : 6;
- uint64_t i_ii_xn_rep_cred_over_under: 1;
- uint64_t i_ii_xn_req_cred_over_under: 1;
- uint64_t i_rsvd3 : 6;
- uint64_t i_ii_xn_invalid_cmd : 1;
- uint64_t i_xn_ii_invalid_cmd : 1;
- uint64_t i_rsvd4 : 30;
+ uint64_t ii_iwel_regval;
+ struct {
+ uint64_t i_intr_timed_out:1;
+ uint64_t i_rsvd:7;
+ uint64_t i_cam_overflow:1;
+ uint64_t i_cam_read_miss:1;
+ uint64_t i_rsvd1:2;
+ uint64_t i_ioq_rep_underflow:1;
+ uint64_t i_ioq_req_underflow:1;
+ uint64_t i_ioq_rep_overflow:1;
+ uint64_t i_ioq_req_overflow:1;
+ uint64_t i_iiq_rep_overflow:1;
+ uint64_t i_iiq_req_overflow:1;
+ uint64_t i_rsvd2:6;
+ uint64_t i_ii_xn_rep_cred_over_under:1;
+ uint64_t i_ii_xn_req_cred_over_under:1;
+ uint64_t i_rsvd3:6;
+ uint64_t i_ii_xn_invalid_cmd:1;
+ uint64_t i_xn_ii_invalid_cmd:1;
+ uint64_t i_rsvd4:30;
} ii_iwel_fld_s;
} ii_iwel_u_t;
/************************************************************************
- * *
+ * *
* Controls the II wrapper. *
- * *
+ * *
************************************************************************/
typedef union ii_iwc_u {
- uint64_t ii_iwc_regval;
- struct {
- uint64_t i_dma_byte_swap : 1;
- uint64_t i_rsvd : 3;
- uint64_t i_cam_read_lines_reset : 1;
- uint64_t i_rsvd1 : 3;
- uint64_t i_ii_xn_cred_over_under_log: 1;
- uint64_t i_rsvd2 : 19;
- uint64_t i_xn_rep_iq_depth : 5;
- uint64_t i_rsvd3 : 3;
- uint64_t i_xn_req_iq_depth : 5;
- uint64_t i_rsvd4 : 3;
- uint64_t i_iiq_depth : 6;
- uint64_t i_rsvd5 : 12;
- uint64_t i_force_rep_cred : 1;
- uint64_t i_force_req_cred : 1;
+ uint64_t ii_iwc_regval;
+ struct {
+ uint64_t i_dma_byte_swap:1;
+ uint64_t i_rsvd:3;
+ uint64_t i_cam_read_lines_reset:1;
+ uint64_t i_rsvd1:3;
+ uint64_t i_ii_xn_cred_over_under_log:1;
+ uint64_t i_rsvd2:19;
+ uint64_t i_xn_rep_iq_depth:5;
+ uint64_t i_rsvd3:3;
+ uint64_t i_xn_req_iq_depth:5;
+ uint64_t i_rsvd4:3;
+ uint64_t i_iiq_depth:6;
+ uint64_t i_rsvd5:12;
+ uint64_t i_force_rep_cred:1;
+ uint64_t i_force_req_cred:1;
} ii_iwc_fld_s;
} ii_iwc_u_t;
/************************************************************************
- * *
+ * *
* Status in the II wrapper. *
- * *
+ * *
************************************************************************/
typedef union ii_iws_u {
- uint64_t ii_iws_regval;
- struct {
- uint64_t i_xn_rep_iq_credits : 5;
- uint64_t i_rsvd : 3;
- uint64_t i_xn_req_iq_credits : 5;
- uint64_t i_rsvd1 : 51;
+ uint64_t ii_iws_regval;
+ struct {
+ uint64_t i_xn_rep_iq_credits:5;
+ uint64_t i_rsvd:3;
+ uint64_t i_xn_req_iq_credits:5;
+ uint64_t i_rsvd1:51;
} ii_iws_fld_s;
} ii_iws_u_t;
/************************************************************************
- * *
+ * *
* Masks errors in the IWEL register. *
- * *
+ * *
************************************************************************/
typedef union ii_iweim_u {
- uint64_t ii_iweim_regval;
- struct {
- uint64_t i_intr_timed_out : 1;
- uint64_t i_rsvd : 7;
- uint64_t i_cam_overflow : 1;
- uint64_t i_cam_read_miss : 1;
- uint64_t i_rsvd1 : 2;
- uint64_t i_ioq_rep_underflow : 1;
- uint64_t i_ioq_req_underflow : 1;
- uint64_t i_ioq_rep_overflow : 1;
- uint64_t i_ioq_req_overflow : 1;
- uint64_t i_iiq_rep_overflow : 1;
- uint64_t i_iiq_req_overflow : 1;
- uint64_t i_rsvd2 : 6;
- uint64_t i_ii_xn_rep_cred_overflow : 1;
- uint64_t i_ii_xn_req_cred_overflow : 1;
- uint64_t i_rsvd3 : 6;
- uint64_t i_ii_xn_invalid_cmd : 1;
- uint64_t i_xn_ii_invalid_cmd : 1;
- uint64_t i_rsvd4 : 30;
+ uint64_t ii_iweim_regval;
+ struct {
+ uint64_t i_intr_timed_out:1;
+ uint64_t i_rsvd:7;
+ uint64_t i_cam_overflow:1;
+ uint64_t i_cam_read_miss:1;
+ uint64_t i_rsvd1:2;
+ uint64_t i_ioq_rep_underflow:1;
+ uint64_t i_ioq_req_underflow:1;
+ uint64_t i_ioq_rep_overflow:1;
+ uint64_t i_ioq_req_overflow:1;
+ uint64_t i_iiq_rep_overflow:1;
+ uint64_t i_iiq_req_overflow:1;
+ uint64_t i_rsvd2:6;
+ uint64_t i_ii_xn_rep_cred_overflow:1;
+ uint64_t i_ii_xn_req_cred_overflow:1;
+ uint64_t i_rsvd3:6;
+ uint64_t i_ii_xn_invalid_cmd:1;
+ uint64_t i_xn_ii_invalid_cmd:1;
+ uint64_t i_rsvd4:30;
} ii_iweim_fld_s;
} ii_iweim_u_t;
-
/************************************************************************
- * *
+ * *
* A write to this register causes a particular field in the *
* corresponding widget's PRB entry to be adjusted up or down by 1. *
* This counter should be used when recovering from error and reset *
* conditions. Note that software would be capable of causing *
* inadvertent overflow or underflow of these counters. *
- * *
+ * *
************************************************************************/
typedef union ii_ipca_u {
- uint64_t ii_ipca_regval;
- struct {
- uint64_t i_wid : 4;
- uint64_t i_adjust : 1;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_field : 2;
- uint64_t i_rsvd : 54;
+ uint64_t ii_ipca_regval;
+ struct {
+ uint64_t i_wid:4;
+ uint64_t i_adjust:1;
+ uint64_t i_rsvd_1:3;
+ uint64_t i_field:2;
+ uint64_t i_rsvd:54;
} ii_ipca_fld_s;
} ii_ipca_u_t;
-
/************************************************************************
- * *
+ * *
* There are 8 instances of this register. This register contains *
* the information that the II has to remember once it has launched a *
* PIO Read operation. The contents are used to form the correct *
* Router Network packet and direct the Crosstalk reply to the *
* appropriate processor. *
- * *
+ * *
************************************************************************/
-
typedef union ii_iprte0a_u {
- uint64_t ii_iprte0a_regval;
- struct {
- uint64_t i_rsvd_1 : 54;
- uint64_t i_widget : 4;
- uint64_t i_to_cnt : 5;
- uint64_t i_vld : 1;
+ uint64_t ii_iprte0a_regval;
+ struct {
+ uint64_t i_rsvd_1:54;
+ uint64_t i_widget:4;
+ uint64_t i_to_cnt:5;
+ uint64_t i_vld:1;
} ii_iprte0a_fld_s;
} ii_iprte0a_u_t;
-
/************************************************************************
- * *
+ * *
* There are 8 instances of this register. This register contains *
* the information that the II has to remember once it has launched a *
* PIO Read operation. The contents are used to form the correct *
* Router Network packet and direct the Crosstalk reply to the *
* appropriate processor. *
- * *
+ * *
************************************************************************/
typedef union ii_iprte1a_u {
- uint64_t ii_iprte1a_regval;
- struct {
- uint64_t i_rsvd_1 : 54;
- uint64_t i_widget : 4;
- uint64_t i_to_cnt : 5;
- uint64_t i_vld : 1;
+ uint64_t ii_iprte1a_regval;
+ struct {
+ uint64_t i_rsvd_1:54;
+ uint64_t i_widget:4;
+ uint64_t i_to_cnt:5;
+ uint64_t i_vld:1;
} ii_iprte1a_fld_s;
} ii_iprte1a_u_t;
-
/************************************************************************
- * *
+ * *
* There are 8 instances of this register. This register contains *
* the information that the II has to remember once it has launched a *
* PIO Read operation. The contents are used to form the correct *
* Router Network packet and direct the Crosstalk reply to the *
* appropriate processor. *
- * *
+ * *
************************************************************************/
typedef union ii_iprte2a_u {
- uint64_t ii_iprte2a_regval;
- struct {
- uint64_t i_rsvd_1 : 54;
- uint64_t i_widget : 4;
- uint64_t i_to_cnt : 5;
- uint64_t i_vld : 1;
+ uint64_t ii_iprte2a_regval;
+ struct {
+ uint64_t i_rsvd_1:54;
+ uint64_t i_widget:4;
+ uint64_t i_to_cnt:5;
+ uint64_t i_vld:1;
} ii_iprte2a_fld_s;
} ii_iprte2a_u_t;
-
/************************************************************************
- * *
+ * *
* There are 8 instances of this register. This register contains *
* the information that the II has to remember once it has launched a *
* PIO Read operation. The contents are used to form the correct *
* Router Network packet and direct the Crosstalk reply to the *
* appropriate processor. *
- * *
+ * *
************************************************************************/
typedef union ii_iprte3a_u {
- uint64_t ii_iprte3a_regval;
- struct {
- uint64_t i_rsvd_1 : 54;
- uint64_t i_widget : 4;
- uint64_t i_to_cnt : 5;
- uint64_t i_vld : 1;
+ uint64_t ii_iprte3a_regval;
+ struct {
+ uint64_t i_rsvd_1:54;
+ uint64_t i_widget:4;
+ uint64_t i_to_cnt:5;
+ uint64_t i_vld:1;
} ii_iprte3a_fld_s;
} ii_iprte3a_u_t;
-
/************************************************************************
- * *
+ * *
* There are 8 instances of this register. This register contains *
* the information that the II has to remember once it has launched a *
* PIO Read operation. The contents are used to form the correct *
* Router Network packet and direct the Crosstalk reply to the *
* appropriate processor. *
- * *
+ * *
************************************************************************/
typedef union ii_iprte4a_u {
- uint64_t ii_iprte4a_regval;
- struct {
- uint64_t i_rsvd_1 : 54;
- uint64_t i_widget : 4;
- uint64_t i_to_cnt : 5;
- uint64_t i_vld : 1;
+ uint64_t ii_iprte4a_regval;
+ struct {
+ uint64_t i_rsvd_1:54;
+ uint64_t i_widget:4;
+ uint64_t i_to_cnt:5;
+ uint64_t i_vld:1;
} ii_iprte4a_fld_s;
} ii_iprte4a_u_t;
-
/************************************************************************
- * *
+ * *
* There are 8 instances of this register. This register contains *
* the information that the II has to remember once it has launched a *
* PIO Read operation. The contents are used to form the correct *
* Router Network packet and direct the Crosstalk reply to the *
* appropriate processor. *
- * *
+ * *
************************************************************************/
typedef union ii_iprte5a_u {
- uint64_t ii_iprte5a_regval;
- struct {
- uint64_t i_rsvd_1 : 54;
- uint64_t i_widget : 4;
- uint64_t i_to_cnt : 5;
- uint64_t i_vld : 1;
+ uint64_t ii_iprte5a_regval;
+ struct {
+ uint64_t i_rsvd_1:54;
+ uint64_t i_widget:4;
+ uint64_t i_to_cnt:5;
+ uint64_t i_vld:1;
} ii_iprte5a_fld_s;
} ii_iprte5a_u_t;
-
/************************************************************************
- * *
+ * *
* There are 8 instances of this register. This register contains *
* the information that the II has to remember once it has launched a *
* PIO Read operation. The contents are used to form the correct *
* Router Network packet and direct the Crosstalk reply to the *
* appropriate processor. *
- * *
+ * *
************************************************************************/
typedef union ii_iprte6a_u {
- uint64_t ii_iprte6a_regval;
- struct {
- uint64_t i_rsvd_1 : 54;
- uint64_t i_widget : 4;
- uint64_t i_to_cnt : 5;
- uint64_t i_vld : 1;
+ uint64_t ii_iprte6a_regval;
+ struct {
+ uint64_t i_rsvd_1:54;
+ uint64_t i_widget:4;
+ uint64_t i_to_cnt:5;
+ uint64_t i_vld:1;
} ii_iprte6a_fld_s;
} ii_iprte6a_u_t;
-
/************************************************************************
- * *
+ * *
* There are 8 instances of this register. This register contains *
* the information that the II has to remember once it has launched a *
* PIO Read operation. The contents are used to form the correct *
* Router Network packet and direct the Crosstalk reply to the *
* appropriate processor. *
- * *
+ * *
************************************************************************/
typedef union ii_iprte7a_u {
- uint64_t ii_iprte7a_regval;
- struct {
- uint64_t i_rsvd_1 : 54;
- uint64_t i_widget : 4;
- uint64_t i_to_cnt : 5;
- uint64_t i_vld : 1;
- } ii_iprtea7_fld_s;
+ uint64_t ii_iprte7a_regval;
+ struct {
+ uint64_t i_rsvd_1:54;
+ uint64_t i_widget:4;
+ uint64_t i_to_cnt:5;
+ uint64_t i_vld:1;
+ } ii_iprtea7_fld_s;
} ii_iprte7a_u_t;
-
-
/************************************************************************
- * *
+ * *
* There are 8 instances of this register. This register contains *
* the information that the II has to remember once it has launched a *
* PIO Read operation. The contents are used to form the correct *
* Router Network packet and direct the Crosstalk reply to the *
* appropriate processor. *
- * *
+ * *
************************************************************************/
-
typedef union ii_iprte0b_u {
- uint64_t ii_iprte0b_regval;
- struct {
- uint64_t i_rsvd_1 : 3;
- uint64_t i_address : 47;
- uint64_t i_init : 3;
- uint64_t i_source : 11;
+ uint64_t ii_iprte0b_regval;
+ struct {
+ uint64_t i_rsvd_1:3;
+ uint64_t i_address:47;
+ uint64_t i_init:3;
+ uint64_t i_source:11;
} ii_iprte0b_fld_s;
} ii_iprte0b_u_t;
-
/************************************************************************
- * *
+ * *
* There are 8 instances of this register. This register contains *
* the information that the II has to remember once it has launched a *
* PIO Read operation. The contents are used to form the correct *
* Router Network packet and direct the Crosstalk reply to the *
* appropriate processor. *
- * *
+ * *
************************************************************************/
typedef union ii_iprte1b_u {
- uint64_t ii_iprte1b_regval;
- struct {
- uint64_t i_rsvd_1 : 3;
- uint64_t i_address : 47;
- uint64_t i_init : 3;
- uint64_t i_source : 11;
+ uint64_t ii_iprte1b_regval;
+ struct {
+ uint64_t i_rsvd_1:3;
+ uint64_t i_address:47;
+ uint64_t i_init:3;
+ uint64_t i_source:11;
} ii_iprte1b_fld_s;
} ii_iprte1b_u_t;
-
/************************************************************************
- * *
+ * *
* There are 8 instances of this register. This register contains *
* the information that the II has to remember once it has launched a *
* PIO Read operation. The contents are used to form the correct *
* Router Network packet and direct the Crosstalk reply to the *
* appropriate processor. *
- * *
+ * *
************************************************************************/
typedef union ii_iprte2b_u {
- uint64_t ii_iprte2b_regval;
- struct {
- uint64_t i_rsvd_1 : 3;
- uint64_t i_address : 47;
- uint64_t i_init : 3;
- uint64_t i_source : 11;
+ uint64_t ii_iprte2b_regval;
+ struct {
+ uint64_t i_rsvd_1:3;
+ uint64_t i_address:47;
+ uint64_t i_init:3;
+ uint64_t i_source:11;
} ii_iprte2b_fld_s;
} ii_iprte2b_u_t;
-
/************************************************************************
- * *
+ * *
* There are 8 instances of this register. This register contains *
* the information that the II has to remember once it has launched a *
* PIO Read operation. The contents are used to form the correct *
* Router Network packet and direct the Crosstalk reply to the *
* appropriate processor. *
- * *
+ * *
************************************************************************/
typedef union ii_iprte3b_u {
- uint64_t ii_iprte3b_regval;
- struct {
- uint64_t i_rsvd_1 : 3;
- uint64_t i_address : 47;
- uint64_t i_init : 3;
- uint64_t i_source : 11;
+ uint64_t ii_iprte3b_regval;
+ struct {
+ uint64_t i_rsvd_1:3;
+ uint64_t i_address:47;
+ uint64_t i_init:3;
+ uint64_t i_source:11;
} ii_iprte3b_fld_s;
} ii_iprte3b_u_t;
-
/************************************************************************
- * *
+ * *
* There are 8 instances of this register. This register contains *
* the information that the II has to remember once it has launched a *
* PIO Read operation. The contents are used to form the correct *
* Router Network packet and direct the Crosstalk reply to the *
* appropriate processor. *
- * *
+ * *
************************************************************************/
typedef union ii_iprte4b_u {
- uint64_t ii_iprte4b_regval;
- struct {
- uint64_t i_rsvd_1 : 3;
- uint64_t i_address : 47;
- uint64_t i_init : 3;
- uint64_t i_source : 11;
+ uint64_t ii_iprte4b_regval;
+ struct {
+ uint64_t i_rsvd_1:3;
+ uint64_t i_address:47;
+ uint64_t i_init:3;
+ uint64_t i_source:11;
} ii_iprte4b_fld_s;
} ii_iprte4b_u_t;
-
/************************************************************************
- * *
+ * *
* There are 8 instances of this register. This register contains *
* the information that the II has to remember once it has launched a *
* PIO Read operation. The contents are used to form the correct *
* Router Network packet and direct the Crosstalk reply to the *
* appropriate processor. *
- * *
+ * *
************************************************************************/
typedef union ii_iprte5b_u {
- uint64_t ii_iprte5b_regval;
- struct {
- uint64_t i_rsvd_1 : 3;
- uint64_t i_address : 47;
- uint64_t i_init : 3;
- uint64_t i_source : 11;
+ uint64_t ii_iprte5b_regval;
+ struct {
+ uint64_t i_rsvd_1:3;
+ uint64_t i_address:47;
+ uint64_t i_init:3;
+ uint64_t i_source:11;
} ii_iprte5b_fld_s;
} ii_iprte5b_u_t;
-
/************************************************************************
- * *
+ * *
* There are 8 instances of this register. This register contains *
* the information that the II has to remember once it has launched a *
* PIO Read operation. The contents are used to form the correct *
* Router Network packet and direct the Crosstalk reply to the *
* appropriate processor. *
- * *
+ * *
************************************************************************/
typedef union ii_iprte6b_u {
- uint64_t ii_iprte6b_regval;
- struct {
- uint64_t i_rsvd_1 : 3;
- uint64_t i_address : 47;
- uint64_t i_init : 3;
- uint64_t i_source : 11;
+ uint64_t ii_iprte6b_regval;
+ struct {
+ uint64_t i_rsvd_1:3;
+ uint64_t i_address:47;
+ uint64_t i_init:3;
+ uint64_t i_source:11;
} ii_iprte6b_fld_s;
} ii_iprte6b_u_t;
-
/************************************************************************
- * *
+ * *
* There are 8 instances of this register. This register contains *
* the information that the II has to remember once it has launched a *
* PIO Read operation. The contents are used to form the correct *
* Router Network packet and direct the Crosstalk reply to the *
* appropriate processor. *
- * *
+ * *
************************************************************************/
typedef union ii_iprte7b_u {
- uint64_t ii_iprte7b_regval;
- struct {
- uint64_t i_rsvd_1 : 3;
- uint64_t i_address : 47;
- uint64_t i_init : 3;
- uint64_t i_source : 11;
- } ii_iprte7b_fld_s;
+ uint64_t ii_iprte7b_regval;
+ struct {
+ uint64_t i_rsvd_1:3;
+ uint64_t i_address:47;
+ uint64_t i_init:3;
+ uint64_t i_source:11;
+ } ii_iprte7b_fld_s;
} ii_iprte7b_u_t;
-
/************************************************************************
- * *
+ * *
* Description: SHub II contains a feature which did not exist in *
* the Hub which automatically cleans up after a Read Response *
* timeout, including deallocation of the IPRTE and recovery of IBuf *
@@ -2108,23 +2034,22 @@
* Note that this register does not affect the contents of the IPRTE *
* registers. The Valid bits in those registers have to be *
* specifically turned off by software. *
- * *
+ * *
************************************************************************/
typedef union ii_ipdr_u {
- uint64_t ii_ipdr_regval;
- struct {
- uint64_t i_te : 3;
- uint64_t i_rsvd_1 : 1;
- uint64_t i_pnd : 1;
- uint64_t i_init_rpcnt : 1;
- uint64_t i_rsvd : 58;
+ uint64_t ii_ipdr_regval;
+ struct {
+ uint64_t i_te:3;
+ uint64_t i_rsvd_1:1;
+ uint64_t i_pnd:1;
+ uint64_t i_init_rpcnt:1;
+ uint64_t i_rsvd:58;
} ii_ipdr_fld_s;
} ii_ipdr_u_t;
-
/************************************************************************
- * *
+ * *
* A write to this register causes a CRB entry to be returned to the *
* queue of free CRBs. The entry should have previously been cleared *
* (mark bit) via backdoor access to the pertinent CRB entry. This *
@@ -2137,21 +2062,20 @@
* software clears the mark bit, and finally 4) software writes to *
* the ICDR register to return the CRB entry to the list of free CRB *
* entries. *
- * *
+ * *
************************************************************************/
typedef union ii_icdr_u {
- uint64_t ii_icdr_regval;
- struct {
- uint64_t i_crb_num : 4;
- uint64_t i_pnd : 1;
- uint64_t i_rsvd : 59;
+ uint64_t ii_icdr_regval;
+ struct {
+ uint64_t i_crb_num:4;
+ uint64_t i_pnd:1;
+ uint64_t i_rsvd:59;
} ii_icdr_fld_s;
} ii_icdr_u_t;
-
/************************************************************************
- * *
+ * *
* This register provides debug access to two FIFOs inside of II. *
* Both IOQ_MAX* fields of this register contain the instantaneous *
* depth (in units of the number of available entries) of the *
@@ -2164,130 +2088,124 @@
* this register is written. If there are any active entries in any *
* of these FIFOs when this register is written, the results are *
* undefined. *
- * *
+ * *
************************************************************************/
typedef union ii_ifdr_u {
- uint64_t ii_ifdr_regval;
- struct {
- uint64_t i_ioq_max_rq : 7;
- uint64_t i_set_ioq_rq : 1;
- uint64_t i_ioq_max_rp : 7;
- uint64_t i_set_ioq_rp : 1;
- uint64_t i_rsvd : 48;
+ uint64_t ii_ifdr_regval;
+ struct {
+ uint64_t i_ioq_max_rq:7;
+ uint64_t i_set_ioq_rq:1;
+ uint64_t i_ioq_max_rp:7;
+ uint64_t i_set_ioq_rp:1;
+ uint64_t i_rsvd:48;
} ii_ifdr_fld_s;
} ii_ifdr_u_t;
-
/************************************************************************
- * *
+ * *
* This register allows the II to become sluggish in removing *
* messages from its inbound queue (IIQ). This will cause messages to *
* back up in either virtual channel. Disabling the "molasses" mode *
* subsequently allows the II to be tested under stress. In the *
* sluggish ("Molasses") mode, the localized effects of congestion *
* can be observed. *
- * *
+ * *
************************************************************************/
typedef union ii_iiap_u {
- uint64_t ii_iiap_regval;
- struct {
- uint64_t i_rq_mls : 6;
- uint64_t i_rsvd_1 : 2;
- uint64_t i_rp_mls : 6;
- uint64_t i_rsvd : 50;
- } ii_iiap_fld_s;
+ uint64_t ii_iiap_regval;
+ struct {
+ uint64_t i_rq_mls:6;
+ uint64_t i_rsvd_1:2;
+ uint64_t i_rp_mls:6;
+ uint64_t i_rsvd:50;
+ } ii_iiap_fld_s;
} ii_iiap_u_t;
-
/************************************************************************
- * *
+ * *
* This register allows several parameters of CRB operation to be *
* set. Note that writing to this register can have catastrophic side *
* effects, if the CRB is not quiescent, i.e. if the CRB is *
* processing protocol messages when the write occurs. *
- * *
+ * *
************************************************************************/
typedef union ii_icmr_u {
- uint64_t ii_icmr_regval;
- struct {
- uint64_t i_sp_msg : 1;
- uint64_t i_rd_hdr : 1;
- uint64_t i_rsvd_4 : 2;
- uint64_t i_c_cnt : 4;
- uint64_t i_rsvd_3 : 4;
- uint64_t i_clr_rqpd : 1;
- uint64_t i_clr_rppd : 1;
- uint64_t i_rsvd_2 : 2;
- uint64_t i_fc_cnt : 4;
- uint64_t i_crb_vld : 15;
- uint64_t i_crb_mark : 15;
- uint64_t i_rsvd_1 : 2;
- uint64_t i_precise : 1;
- uint64_t i_rsvd : 11;
+ uint64_t ii_icmr_regval;
+ struct {
+ uint64_t i_sp_msg:1;
+ uint64_t i_rd_hdr:1;
+ uint64_t i_rsvd_4:2;
+ uint64_t i_c_cnt:4;
+ uint64_t i_rsvd_3:4;
+ uint64_t i_clr_rqpd:1;
+ uint64_t i_clr_rppd:1;
+ uint64_t i_rsvd_2:2;
+ uint64_t i_fc_cnt:4;
+ uint64_t i_crb_vld:15;
+ uint64_t i_crb_mark:15;
+ uint64_t i_rsvd_1:2;
+ uint64_t i_precise:1;
+ uint64_t i_rsvd:11;
} ii_icmr_fld_s;
} ii_icmr_u_t;
-
/************************************************************************
- * *
+ * *
* This register allows control of the table portion of the CRB *
* logic via software. Control operations from this register have *
* priority over all incoming Crosstalk or BTE requests. *
- * *
+ * *
************************************************************************/
typedef union ii_iccr_u {
- uint64_t ii_iccr_regval;
- struct {
- uint64_t i_crb_num : 4;
- uint64_t i_rsvd_1 : 4;
- uint64_t i_cmd : 8;
- uint64_t i_pending : 1;
- uint64_t i_rsvd : 47;
+ uint64_t ii_iccr_regval;
+ struct {
+ uint64_t i_crb_num:4;
+ uint64_t i_rsvd_1:4;
+ uint64_t i_cmd:8;
+ uint64_t i_pending:1;
+ uint64_t i_rsvd:47;
} ii_iccr_fld_s;
} ii_iccr_u_t;
-
/************************************************************************
- * *
+ * *
* This register allows the maximum timeout value to be programmed. *
- * *
+ * *
************************************************************************/
typedef union ii_icto_u {
- uint64_t ii_icto_regval;
- struct {
- uint64_t i_timeout : 8;
- uint64_t i_rsvd : 56;
+ uint64_t ii_icto_regval;
+ struct {
+ uint64_t i_timeout:8;
+ uint64_t i_rsvd:56;
} ii_icto_fld_s;
} ii_icto_u_t;
-
/************************************************************************
- * *
+ * *
* This register allows the timeout prescalar to be programmed. An *
* internal counter is associated with this register. When the *
* internal counter reaches the value of the PRESCALE field, the *
* timer registers in all valid CRBs are incremented (CRBx_D[TIMEOUT] *
* field). The internal counter resets to zero, and then continues *
* counting. *
- * *
+ * *
************************************************************************/
typedef union ii_ictp_u {
- uint64_t ii_ictp_regval;
- struct {
- uint64_t i_prescale : 24;
- uint64_t i_rsvd : 40;
+ uint64_t ii_ictp_regval;
+ struct {
+ uint64_t i_prescale:24;
+ uint64_t i_rsvd:40;
} ii_ictp_fld_s;
} ii_ictp_u_t;
-
/************************************************************************
- * *
+ * *
* Description: There are 15 CRB Entries (ICRB0 to ICRBE) that are *
* used for Crosstalk operations (both cacheline and partial *
* operations) or BTE/IO. Because the CRB entries are very wide, five *
@@ -2306,243 +2224,234 @@
* recovering any potential error state from before the reset). *
* The following four tables summarize the format for the four *
* registers that are used for each ICRB# Entry. *
- * *
+ * *
************************************************************************/
typedef union ii_icrb0_a_u {
- uint64_t ii_icrb0_a_regval;
- struct {
- uint64_t ia_iow : 1;
- uint64_t ia_vld : 1;
- uint64_t ia_addr : 47;
- uint64_t ia_tnum : 5;
- uint64_t ia_sidn : 4;
- uint64_t ia_rsvd : 6;
+ uint64_t ii_icrb0_a_regval;
+ struct {
+ uint64_t ia_iow:1;
+ uint64_t ia_vld:1;
+ uint64_t ia_addr:47;
+ uint64_t ia_tnum:5;
+ uint64_t ia_sidn:4;
+ uint64_t ia_rsvd:6;
} ii_icrb0_a_fld_s;
} ii_icrb0_a_u_t;
-
/************************************************************************
- * *
+ * *
* Description: There are 15 CRB Entries (ICRB0 to ICRBE) that are *
* used for Crosstalk operations (both cacheline and partial *
* operations) or BTE/IO. Because the CRB entries are very wide, five *
* registers (_A to _E) are required to read and write each entry. *
- * *
+ * *
************************************************************************/
typedef union ii_icrb0_b_u {
- uint64_t ii_icrb0_b_regval;
- struct {
- uint64_t ib_xt_err : 1;
- uint64_t ib_mark : 1;
- uint64_t ib_ln_uce : 1;
- uint64_t ib_errcode : 3;
- uint64_t ib_error : 1;
- uint64_t ib_stall__bte_1 : 1;
- uint64_t ib_stall__bte_0 : 1;
- uint64_t ib_stall__intr : 1;
- uint64_t ib_stall_ib : 1;
- uint64_t ib_intvn : 1;
- uint64_t ib_wb : 1;
- uint64_t ib_hold : 1;
- uint64_t ib_ack : 1;
- uint64_t ib_resp : 1;
- uint64_t ib_ack_cnt : 11;
- uint64_t ib_rsvd : 7;
- uint64_t ib_exc : 5;
- uint64_t ib_init : 3;
- uint64_t ib_imsg : 8;
- uint64_t ib_imsgtype : 2;
- uint64_t ib_use_old : 1;
- uint64_t ib_rsvd_1 : 11;
+ uint64_t ii_icrb0_b_regval;
+ struct {
+ uint64_t ib_xt_err:1;
+ uint64_t ib_mark:1;
+ uint64_t ib_ln_uce:1;
+ uint64_t ib_errcode:3;
+ uint64_t ib_error:1;
+ uint64_t ib_stall__bte_1:1;
+ uint64_t ib_stall__bte_0:1;
+ uint64_t ib_stall__intr:1;
+ uint64_t ib_stall_ib:1;
+ uint64_t ib_intvn:1;
+ uint64_t ib_wb:1;
+ uint64_t ib_hold:1;
+ uint64_t ib_ack:1;
+ uint64_t ib_resp:1;
+ uint64_t ib_ack_cnt:11;
+ uint64_t ib_rsvd:7;
+ uint64_t ib_exc:5;
+ uint64_t ib_init:3;
+ uint64_t ib_imsg:8;
+ uint64_t ib_imsgtype:2;
+ uint64_t ib_use_old:1;
+ uint64_t ib_rsvd_1:11;
} ii_icrb0_b_fld_s;
} ii_icrb0_b_u_t;
-
/************************************************************************
- * *
+ * *
* Description: There are 15 CRB Entries (ICRB0 to ICRBE) that are *
* used for Crosstalk operations (both cacheline and partial *
* operations) or BTE/IO. Because the CRB entries are very wide, five *
* registers (_A to _E) are required to read and write each entry. *
- * *
+ * *
************************************************************************/
typedef union ii_icrb0_c_u {
- uint64_t ii_icrb0_c_regval;
- struct {
- uint64_t ic_source : 15;
- uint64_t ic_size : 2;
- uint64_t ic_ct : 1;
- uint64_t ic_bte_num : 1;
- uint64_t ic_gbr : 1;
- uint64_t ic_resprqd : 1;
- uint64_t ic_bo : 1;
- uint64_t ic_suppl : 15;
- uint64_t ic_rsvd : 27;
+ uint64_t ii_icrb0_c_regval;
+ struct {
+ uint64_t ic_source:15;
+ uint64_t ic_size:2;
+ uint64_t ic_ct:1;
+ uint64_t ic_bte_num:1;
+ uint64_t ic_gbr:1;
+ uint64_t ic_resprqd:1;
+ uint64_t ic_bo:1;
+ uint64_t ic_suppl:15;
+ uint64_t ic_rsvd:27;
} ii_icrb0_c_fld_s;
} ii_icrb0_c_u_t;
-
/************************************************************************
- * *
+ * *
* Description: There are 15 CRB Entries (ICRB0 to ICRBE) that are *
* used for Crosstalk operations (both cacheline and partial *
* operations) or BTE/IO. Because the CRB entries are very wide, five *
* registers (_A to _E) are required to read and write each entry. *
- * *
+ * *
************************************************************************/
typedef union ii_icrb0_d_u {
- uint64_t ii_icrb0_d_regval;
- struct {
- uint64_t id_pa_be : 43;
- uint64_t id_bte_op : 1;
- uint64_t id_pr_psc : 4;
- uint64_t id_pr_cnt : 4;
- uint64_t id_sleep : 1;
- uint64_t id_rsvd : 11;
+ uint64_t ii_icrb0_d_regval;
+ struct {
+ uint64_t id_pa_be:43;
+ uint64_t id_bte_op:1;
+ uint64_t id_pr_psc:4;
+ uint64_t id_pr_cnt:4;
+ uint64_t id_sleep:1;
+ uint64_t id_rsvd:11;
} ii_icrb0_d_fld_s;
} ii_icrb0_d_u_t;
-
/************************************************************************
- * *
+ * *
* Description: There are 15 CRB Entries (ICRB0 to ICRBE) that are *
* used for Crosstalk operations (both cacheline and partial *
* operations) or BTE/IO. Because the CRB entries are very wide, five *
* registers (_A to _E) are required to read and write each entry. *
- * *
+ * *
************************************************************************/
typedef union ii_icrb0_e_u {
- uint64_t ii_icrb0_e_regval;
- struct {
- uint64_t ie_timeout : 8;
- uint64_t ie_context : 15;
- uint64_t ie_rsvd : 1;
- uint64_t ie_tvld : 1;
- uint64_t ie_cvld : 1;
- uint64_t ie_rsvd_0 : 38;
+ uint64_t ii_icrb0_e_regval;
+ struct {
+ uint64_t ie_timeout:8;
+ uint64_t ie_context:15;
+ uint64_t ie_rsvd:1;
+ uint64_t ie_tvld:1;
+ uint64_t ie_cvld:1;
+ uint64_t ie_rsvd_0:38;
} ii_icrb0_e_fld_s;
} ii_icrb0_e_u_t;
-
/************************************************************************
- * *
+ * *
* This register contains the lower 64 bits of the header of the *
* spurious message captured by II. Valid when the SP_MSG bit in ICMR *
* register is set. *
- * *
+ * *
************************************************************************/
typedef union ii_icsml_u {
- uint64_t ii_icsml_regval;
- struct {
- uint64_t i_tt_addr : 47;
- uint64_t i_newsuppl_ex : 14;
- uint64_t i_reserved : 2;
- uint64_t i_overflow : 1;
+ uint64_t ii_icsml_regval;
+ struct {
+ uint64_t i_tt_addr:47;
+ uint64_t i_newsuppl_ex:14;
+ uint64_t i_reserved:2;
+ uint64_t i_overflow:1;
} ii_icsml_fld_s;
} ii_icsml_u_t;
-
/************************************************************************
- * *
+ * *
* This register contains the middle 64 bits of the header of the *
* spurious message captured by II. Valid when the SP_MSG bit in ICMR *
* register is set. *
- * *
+ * *
************************************************************************/
typedef union ii_icsmm_u {
- uint64_t ii_icsmm_regval;
- struct {
- uint64_t i_tt_ack_cnt : 11;
- uint64_t i_reserved : 53;
+ uint64_t ii_icsmm_regval;
+ struct {
+ uint64_t i_tt_ack_cnt:11;
+ uint64_t i_reserved:53;
} ii_icsmm_fld_s;
} ii_icsmm_u_t;
-
/************************************************************************
- * *
+ * *
* This register contains the microscopic state, all the inputs to *
* the protocol table, captured with the spurious message. Valid when *
* the SP_MSG bit in the ICMR register is set. *
- * *
+ * *
************************************************************************/
typedef union ii_icsmh_u {
- uint64_t ii_icsmh_regval;
- struct {
- uint64_t i_tt_vld : 1;
- uint64_t i_xerr : 1;
- uint64_t i_ft_cwact_o : 1;
- uint64_t i_ft_wact_o : 1;
- uint64_t i_ft_active_o : 1;
- uint64_t i_sync : 1;
- uint64_t i_mnusg : 1;
- uint64_t i_mnusz : 1;
- uint64_t i_plusz : 1;
- uint64_t i_plusg : 1;
- uint64_t i_tt_exc : 5;
- uint64_t i_tt_wb : 1;
- uint64_t i_tt_hold : 1;
- uint64_t i_tt_ack : 1;
- uint64_t i_tt_resp : 1;
- uint64_t i_tt_intvn : 1;
- uint64_t i_g_stall_bte1 : 1;
- uint64_t i_g_stall_bte0 : 1;
- uint64_t i_g_stall_il : 1;
- uint64_t i_g_stall_ib : 1;
- uint64_t i_tt_imsg : 8;
- uint64_t i_tt_imsgtype : 2;
- uint64_t i_tt_use_old : 1;
- uint64_t i_tt_respreqd : 1;
- uint64_t i_tt_bte_num : 1;
- uint64_t i_cbn : 1;
- uint64_t i_match : 1;
- uint64_t i_rpcnt_lt_34 : 1;
- uint64_t i_rpcnt_ge_34 : 1;
- uint64_t i_rpcnt_lt_18 : 1;
- uint64_t i_rpcnt_ge_18 : 1;
- uint64_t i_rpcnt_lt_2 : 1;
- uint64_t i_rpcnt_ge_2 : 1;
- uint64_t i_rqcnt_lt_18 : 1;
- uint64_t i_rqcnt_ge_18 : 1;
- uint64_t i_rqcnt_lt_2 : 1;
- uint64_t i_rqcnt_ge_2 : 1;
- uint64_t i_tt_device : 7;
- uint64_t i_tt_init : 3;
- uint64_t i_reserved : 5;
+ uint64_t ii_icsmh_regval;
+ struct {
+ uint64_t i_tt_vld:1;
+ uint64_t i_xerr:1;
+ uint64_t i_ft_cwact_o:1;
+ uint64_t i_ft_wact_o:1;
+ uint64_t i_ft_active_o:1;
+ uint64_t i_sync:1;
+ uint64_t i_mnusg:1;
+ uint64_t i_mnusz:1;
+ uint64_t i_plusz:1;
+ uint64_t i_plusg:1;
+ uint64_t i_tt_exc:5;
+ uint64_t i_tt_wb:1;
+ uint64_t i_tt_hold:1;
+ uint64_t i_tt_ack:1;
+ uint64_t i_tt_resp:1;
+ uint64_t i_tt_intvn:1;
+ uint64_t i_g_stall_bte1:1;
+ uint64_t i_g_stall_bte0:1;
+ uint64_t i_g_stall_il:1;
+ uint64_t i_g_stall_ib:1;
+ uint64_t i_tt_imsg:8;
+ uint64_t i_tt_imsgtype:2;
+ uint64_t i_tt_use_old:1;
+ uint64_t i_tt_respreqd:1;
+ uint64_t i_tt_bte_num:1;
+ uint64_t i_cbn:1;
+ uint64_t i_match:1;
+ uint64_t i_rpcnt_lt_34:1;
+ uint64_t i_rpcnt_ge_34:1;
+ uint64_t i_rpcnt_lt_18:1;
+ uint64_t i_rpcnt_ge_18:1;
+ uint64_t i_rpcnt_lt_2:1;
+ uint64_t i_rpcnt_ge_2:1;
+ uint64_t i_rqcnt_lt_18:1;
+ uint64_t i_rqcnt_ge_18:1;
+ uint64_t i_rqcnt_lt_2:1;
+ uint64_t i_rqcnt_ge_2:1;
+ uint64_t i_tt_device:7;
+ uint64_t i_tt_init:3;
+ uint64_t i_reserved:5;
} ii_icsmh_fld_s;
} ii_icsmh_u_t;
-
/************************************************************************
- * *
+ * *
* The Shub DEBUG unit provides a 3-bit selection signal to the *
* II core and a 3-bit selection signal to the fsbclk domain in the II *
* wrapper. *
- * *
+ * *
************************************************************************/
typedef union ii_idbss_u {
- uint64_t ii_idbss_regval;
- struct {
- uint64_t i_iioclk_core_submenu : 3;
- uint64_t i_rsvd : 5;
- uint64_t i_fsbclk_wrapper_submenu : 3;
- uint64_t i_rsvd_1 : 5;
- uint64_t i_iioclk_menu : 5;
- uint64_t i_rsvd_2 : 43;
+ uint64_t ii_idbss_regval;
+ struct {
+ uint64_t i_iioclk_core_submenu:3;
+ uint64_t i_rsvd:5;
+ uint64_t i_fsbclk_wrapper_submenu:3;
+ uint64_t i_rsvd_1:5;
+ uint64_t i_iioclk_menu:5;
+ uint64_t i_rsvd_2:43;
} ii_idbss_fld_s;
} ii_idbss_u_t;
-
/************************************************************************
- * *
+ * *
* Description: This register is used to set up the length for a *
* transfer and then to monitor the progress of that transfer. This *
* register needs to be initialized before a transfer is started. A *
@@ -2553,63 +2462,60 @@
* transfer completes, hardware will clear the Busy bit. The length *
* field will also contain the number of cache lines left to be *
* transferred. *
- * *
+ * *
************************************************************************/
typedef union ii_ibls0_u {
- uint64_t ii_ibls0_regval;
- struct {
- uint64_t i_length : 16;
- uint64_t i_error : 1;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_busy : 1;
- uint64_t i_rsvd : 43;
+ uint64_t ii_ibls0_regval;
+ struct {
+ uint64_t i_length:16;
+ uint64_t i_error:1;
+ uint64_t i_rsvd_1:3;
+ uint64_t i_busy:1;
+ uint64_t i_rsvd:43;
} ii_ibls0_fld_s;
} ii_ibls0_u_t;
-
/************************************************************************
- * *
+ * *
* This register should be loaded before a transfer is started. The *
* address to be loaded in bits 39:0 is the 40-bit TRex+ physical *
* address as described in Section 1.3, Figure2 and Figure3. Since *
* the bottom 7 bits of the address are always taken to be zero, BTE *
* transfers are always cacheline-aligned. *
- * *
+ * *
************************************************************************/
typedef union ii_ibsa0_u {
- uint64_t ii_ibsa0_regval;
- struct {
- uint64_t i_rsvd_1 : 7;
- uint64_t i_addr : 42;
- uint64_t i_rsvd : 15;
+ uint64_t ii_ibsa0_regval;
+ struct {
+ uint64_t i_rsvd_1:7;
+ uint64_t i_addr:42;
+ uint64_t i_rsvd:15;
} ii_ibsa0_fld_s;
} ii_ibsa0_u_t;
-
/************************************************************************
- * *
+ * *
* This register should be loaded before a transfer is started. The *
* address to be loaded in bits 39:0 is the 40-bit TRex+ physical *
* address as described in Section 1.3, Figure2 and Figure3. Since *
* the bottom 7 bits of the address are always taken to be zero, BTE *
* transfers are always cacheline-aligned. *
- * *
+ * *
************************************************************************/
typedef union ii_ibda0_u {
- uint64_t ii_ibda0_regval;
- struct {
- uint64_t i_rsvd_1 : 7;
- uint64_t i_addr : 42;
- uint64_t i_rsvd : 15;
+ uint64_t ii_ibda0_regval;
+ struct {
+ uint64_t i_rsvd_1:7;
+ uint64_t i_addr:42;
+ uint64_t i_rsvd:15;
} ii_ibda0_fld_s;
} ii_ibda0_u_t;
-
/************************************************************************
- * *
+ * *
* Writing to this register sets up the attributes of the transfer *
* and initiates the transfer operation. Reading this register has *
* the side effect of terminating any transfer in progress. Note: *
@@ -2617,61 +2523,58 @@
* other BTE. If a BTE stream has to be stopped (due to error *
* handling for example), both BTE streams should be stopped and *
* their transfers discarded. *
- * *
+ * *
************************************************************************/
typedef union ii_ibct0_u {
- uint64_t ii_ibct0_regval;
- struct {
- uint64_t i_zerofill : 1;
- uint64_t i_rsvd_2 : 3;
- uint64_t i_notify : 1;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_poison : 1;
- uint64_t i_rsvd : 55;
+ uint64_t ii_ibct0_regval;
+ struct {
+ uint64_t i_zerofill:1;
+ uint64_t i_rsvd_2:3;
+ uint64_t i_notify:1;
+ uint64_t i_rsvd_1:3;
+ uint64_t i_poison:1;
+ uint64_t i_rsvd:55;
} ii_ibct0_fld_s;
} ii_ibct0_u_t;
-
/************************************************************************
- * *
+ * *
* This register contains the address to which the WINV is sent. *
* This address has to be cache line aligned. *
- * *
+ * *
************************************************************************/
typedef union ii_ibna0_u {
- uint64_t ii_ibna0_regval;
- struct {
- uint64_t i_rsvd_1 : 7;
- uint64_t i_addr : 42;
- uint64_t i_rsvd : 15;
+ uint64_t ii_ibna0_regval;
+ struct {
+ uint64_t i_rsvd_1:7;
+ uint64_t i_addr:42;
+ uint64_t i_rsvd:15;
} ii_ibna0_fld_s;
} ii_ibna0_u_t;
-
/************************************************************************
- * *
+ * *
* This register contains the programmable level as well as the node *
* ID and PI unit of the processor to which the interrupt will be *
- * sent. *
- * *
+ * sent. *
+ * *
************************************************************************/
typedef union ii_ibia0_u {
- uint64_t ii_ibia0_regval;
- struct {
- uint64_t i_rsvd_2 : 1;
- uint64_t i_node_id : 11;
- uint64_t i_rsvd_1 : 4;
- uint64_t i_level : 7;
- uint64_t i_rsvd : 41;
+ uint64_t ii_ibia0_regval;
+ struct {
+ uint64_t i_rsvd_2:1;
+ uint64_t i_node_id:11;
+ uint64_t i_rsvd_1:4;
+ uint64_t i_level:7;
+ uint64_t i_rsvd:41;
} ii_ibia0_fld_s;
} ii_ibia0_u_t;
-
/************************************************************************
- * *
+ * *
* Description: This register is used to set up the length for a *
* transfer and then to monitor the progress of that transfer. This *
* register needs to be initialized before a transfer is started. A *
@@ -2682,63 +2585,60 @@
* transfer completes, hardware will clear the Busy bit. The length *
* field will also contain the number of cache lines left to be *
* transferred. *
- * *
+ * *
************************************************************************/
typedef union ii_ibls1_u {
- uint64_t ii_ibls1_regval;
- struct {
- uint64_t i_length : 16;
- uint64_t i_error : 1;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_busy : 1;
- uint64_t i_rsvd : 43;
+ uint64_t ii_ibls1_regval;
+ struct {
+ uint64_t i_length:16;
+ uint64_t i_error:1;
+ uint64_t i_rsvd_1:3;
+ uint64_t i_busy:1;
+ uint64_t i_rsvd:43;
} ii_ibls1_fld_s;
} ii_ibls1_u_t;
-
/************************************************************************
- * *
+ * *
* This register should be loaded before a transfer is started. The *
* address to be loaded in bits 39:0 is the 40-bit TRex+ physical *
* address as described in Section 1.3, Figure2 and Figure3. Since *
* the bottom 7 bits of the address are always taken to be zero, BTE *
* transfers are always cacheline-aligned. *
- * *
+ * *
************************************************************************/
typedef union ii_ibsa1_u {
- uint64_t ii_ibsa1_regval;
- struct {
- uint64_t i_rsvd_1 : 7;
- uint64_t i_addr : 33;
- uint64_t i_rsvd : 24;
+ uint64_t ii_ibsa1_regval;
+ struct {
+ uint64_t i_rsvd_1:7;
+ uint64_t i_addr:33;
+ uint64_t i_rsvd:24;
} ii_ibsa1_fld_s;
} ii_ibsa1_u_t;
-
/************************************************************************
- * *
+ * *
* This register should be loaded before a transfer is started. The *
* address to be loaded in bits 39:0 is the 40-bit TRex+ physical *
* address as described in Section 1.3, Figure2 and Figure3. Since *
* the bottom 7 bits of the address are always taken to be zero, BTE *
* transfers are always cacheline-aligned. *
- * *
+ * *
************************************************************************/
typedef union ii_ibda1_u {
- uint64_t ii_ibda1_regval;
- struct {
- uint64_t i_rsvd_1 : 7;
- uint64_t i_addr : 33;
- uint64_t i_rsvd : 24;
+ uint64_t ii_ibda1_regval;
+ struct {
+ uint64_t i_rsvd_1:7;
+ uint64_t i_addr:33;
+ uint64_t i_rsvd:24;
} ii_ibda1_fld_s;
} ii_ibda1_u_t;
-
/************************************************************************
- * *
+ * *
* Writing to this register sets up the attributes of the transfer *
* and initiates the transfer operation. Reading this register has *
* the side effect of terminating any transfer in progress. Note: *
@@ -2746,61 +2646,58 @@
* other BTE. If a BTE stream has to be stopped (due to error *
* handling for example), both BTE streams should be stopped and *
* their transfers discarded. *
- * *
+ * *
************************************************************************/
typedef union ii_ibct1_u {
- uint64_t ii_ibct1_regval;
- struct {
- uint64_t i_zerofill : 1;
- uint64_t i_rsvd_2 : 3;
- uint64_t i_notify : 1;
- uint64_t i_rsvd_1 : 3;
- uint64_t i_poison : 1;
- uint64_t i_rsvd : 55;
+ uint64_t ii_ibct1_regval;
+ struct {
+ uint64_t i_zerofill:1;
+ uint64_t i_rsvd_2:3;
+ uint64_t i_notify:1;
+ uint64_t i_rsvd_1:3;
+ uint64_t i_poison:1;
+ uint64_t i_rsvd:55;
} ii_ibct1_fld_s;
} ii_ibct1_u_t;
-
/************************************************************************
- * *
+ * *
* This register contains the address to which the WINV is sent. *
* This address has to be cache line aligned. *
- * *
+ * *
************************************************************************/
typedef union ii_ibna1_u {
- uint64_t ii_ibna1_regval;
- struct {
- uint64_t i_rsvd_1 : 7;
- uint64_t i_addr : 33;
- uint64_t i_rsvd : 24;
+ uint64_t ii_ibna1_regval;
+ struct {
+ uint64_t i_rsvd_1:7;
+ uint64_t i_addr:33;
+ uint64_t i_rsvd:24;
} ii_ibna1_fld_s;
} ii_ibna1_u_t;
-
/************************************************************************
- * *
+ * *
* This register contains the programmable level as well as the node *
* ID and PI unit of the processor to which the interrupt will be *
- * sent. *
- * *
+ * sent. *
+ * *
************************************************************************/
typedef union ii_ibia1_u {
- uint64_t ii_ibia1_regval;
- struct {
- uint64_t i_pi_id : 1;
- uint64_t i_node_id : 8;
- uint64_t i_rsvd_1 : 7;
- uint64_t i_level : 7;
- uint64_t i_rsvd : 41;
+ uint64_t ii_ibia1_regval;
+ struct {
+ uint64_t i_pi_id:1;
+ uint64_t i_node_id:8;
+ uint64_t i_rsvd_1:7;
+ uint64_t i_level:7;
+ uint64_t i_rsvd:41;
} ii_ibia1_fld_s;
} ii_ibia1_u_t;
-
/************************************************************************
- * *
+ * *
* This register defines the resources that feed information into *
* the two performance counters located in the IO Performance *
* Profiling Register. There are 17 different quantities that can be *
@@ -2811,133 +2708,129 @@
* other is available from the other performance counter. Hence, the *
* II supports all 17*16=272 possible combinations of quantities to *
* measure. *
- * *
+ * *
************************************************************************/
typedef union ii_ipcr_u {
- uint64_t ii_ipcr_regval;
- struct {
- uint64_t i_ippr0_c : 4;
- uint64_t i_ippr1_c : 4;
- uint64_t i_icct : 8;
- uint64_t i_rsvd : 48;
+ uint64_t ii_ipcr_regval;
+ struct {
+ uint64_t i_ippr0_c:4;
+ uint64_t i_ippr1_c:4;
+ uint64_t i_icct:8;
+ uint64_t i_rsvd:48;
} ii_ipcr_fld_s;
} ii_ipcr_u_t;
-
/************************************************************************
- * *
- * *
- * *
+ * *
+ * *
+ * *
************************************************************************/
typedef union ii_ippr_u {
- uint64_t ii_ippr_regval;
- struct {
- uint64_t i_ippr0 : 32;
- uint64_t i_ippr1 : 32;
+ uint64_t ii_ippr_regval;
+ struct {
+ uint64_t i_ippr0:32;
+ uint64_t i_ippr1:32;
} ii_ippr_fld_s;
} ii_ippr_u_t;
-
-
-/**************************************************************************
- * *
- * The following defines which were not formed into structures are *
- * probably indentical to another register, and the name of the *
- * register is provided against each of these registers. This *
- * information needs to be checked carefully *
- * *
- * IIO_ICRB1_A IIO_ICRB0_A *
- * IIO_ICRB1_B IIO_ICRB0_B *
- * IIO_ICRB1_C IIO_ICRB0_C *
- * IIO_ICRB1_D IIO_ICRB0_D *
- * IIO_ICRB1_E IIO_ICRB0_E *
- * IIO_ICRB2_A IIO_ICRB0_A *
- * IIO_ICRB2_B IIO_ICRB0_B *
- * IIO_ICRB2_C IIO_ICRB0_C *
- * IIO_ICRB2_D IIO_ICRB0_D *
- * IIO_ICRB2_E IIO_ICRB0_E *
- * IIO_ICRB3_A IIO_ICRB0_A *
- * IIO_ICRB3_B IIO_ICRB0_B *
- * IIO_ICRB3_C IIO_ICRB0_C *
- * IIO_ICRB3_D IIO_ICRB0_D *
- * IIO_ICRB3_E IIO_ICRB0_E *
- * IIO_ICRB4_A IIO_ICRB0_A *
- * IIO_ICRB4_B IIO_ICRB0_B *
- * IIO_ICRB4_C IIO_ICRB0_C *
- * IIO_ICRB4_D IIO_ICRB0_D *
- * IIO_ICRB4_E IIO_ICRB0_E *
- * IIO_ICRB5_A IIO_ICRB0_A *
- * IIO_ICRB5_B IIO_ICRB0_B *
- * IIO_ICRB5_C IIO_ICRB0_C *
- * IIO_ICRB5_D IIO_ICRB0_D *
- * IIO_ICRB5_E IIO_ICRB0_E *
- * IIO_ICRB6_A IIO_ICRB0_A *
- * IIO_ICRB6_B IIO_ICRB0_B *
- * IIO_ICRB6_C IIO_ICRB0_C *
- * IIO_ICRB6_D IIO_ICRB0_D *
- * IIO_ICRB6_E IIO_ICRB0_E *
- * IIO_ICRB7_A IIO_ICRB0_A *
- * IIO_ICRB7_B IIO_ICRB0_B *
- * IIO_ICRB7_C IIO_ICRB0_C *
- * IIO_ICRB7_D IIO_ICRB0_D *
- * IIO_ICRB7_E IIO_ICRB0_E *
- * IIO_ICRB8_A IIO_ICRB0_A *
- * IIO_ICRB8_B IIO_ICRB0_B *
- * IIO_ICRB8_C IIO_ICRB0_C *
- * IIO_ICRB8_D IIO_ICRB0_D *
- * IIO_ICRB8_E IIO_ICRB0_E *
- * IIO_ICRB9_A IIO_ICRB0_A *
- * IIO_ICRB9_B IIO_ICRB0_B *
- * IIO_ICRB9_C IIO_ICRB0_C *
- * IIO_ICRB9_D IIO_ICRB0_D *
- * IIO_ICRB9_E IIO_ICRB0_E *
- * IIO_ICRBA_A IIO_ICRB0_A *
- * IIO_ICRBA_B IIO_ICRB0_B *
- * IIO_ICRBA_C IIO_ICRB0_C *
- * IIO_ICRBA_D IIO_ICRB0_D *
- * IIO_ICRBA_E IIO_ICRB0_E *
- * IIO_ICRBB_A IIO_ICRB0_A *
- * IIO_ICRBB_B IIO_ICRB0_B *
- * IIO_ICRBB_C IIO_ICRB0_C *
- * IIO_ICRBB_D IIO_ICRB0_D *
- * IIO_ICRBB_E IIO_ICRB0_E *
- * IIO_ICRBC_A IIO_ICRB0_A *
- * IIO_ICRBC_B IIO_ICRB0_B *
- * IIO_ICRBC_C IIO_ICRB0_C *
- * IIO_ICRBC_D IIO_ICRB0_D *
- * IIO_ICRBC_E IIO_ICRB0_E *
- * IIO_ICRBD_A IIO_ICRB0_A *
- * IIO_ICRBD_B IIO_ICRB0_B *
- * IIO_ICRBD_C IIO_ICRB0_C *
- * IIO_ICRBD_D IIO_ICRB0_D *
- * IIO_ICRBD_E IIO_ICRB0_E *
- * IIO_ICRBE_A IIO_ICRB0_A *
- * IIO_ICRBE_B IIO_ICRB0_B *
- * IIO_ICRBE_C IIO_ICRB0_C *
- * IIO_ICRBE_D IIO_ICRB0_D *
- * IIO_ICRBE_E IIO_ICRB0_E *
- * *
- **************************************************************************/
-
+/************************************************************************
+ * *
+ * The following defines which were not formed into structures are *
+ * probably indentical to another register, and the name of the *
+ * register is provided against each of these registers. This *
+ * information needs to be checked carefully *
+ * *
+ * IIO_ICRB1_A IIO_ICRB0_A *
+ * IIO_ICRB1_B IIO_ICRB0_B *
+ * IIO_ICRB1_C IIO_ICRB0_C *
+ * IIO_ICRB1_D IIO_ICRB0_D *
+ * IIO_ICRB1_E IIO_ICRB0_E *
+ * IIO_ICRB2_A IIO_ICRB0_A *
+ * IIO_ICRB2_B IIO_ICRB0_B *
+ * IIO_ICRB2_C IIO_ICRB0_C *
+ * IIO_ICRB2_D IIO_ICRB0_D *
+ * IIO_ICRB2_E IIO_ICRB0_E *
+ * IIO_ICRB3_A IIO_ICRB0_A *
+ * IIO_ICRB3_B IIO_ICRB0_B *
+ * IIO_ICRB3_C IIO_ICRB0_C *
+ * IIO_ICRB3_D IIO_ICRB0_D *
+ * IIO_ICRB3_E IIO_ICRB0_E *
+ * IIO_ICRB4_A IIO_ICRB0_A *
+ * IIO_ICRB4_B IIO_ICRB0_B *
+ * IIO_ICRB4_C IIO_ICRB0_C *
+ * IIO_ICRB4_D IIO_ICRB0_D *
+ * IIO_ICRB4_E IIO_ICRB0_E *
+ * IIO_ICRB5_A IIO_ICRB0_A *
+ * IIO_ICRB5_B IIO_ICRB0_B *
+ * IIO_ICRB5_C IIO_ICRB0_C *
+ * IIO_ICRB5_D IIO_ICRB0_D *
+ * IIO_ICRB5_E IIO_ICRB0_E *
+ * IIO_ICRB6_A IIO_ICRB0_A *
+ * IIO_ICRB6_B IIO_ICRB0_B *
+ * IIO_ICRB6_C IIO_ICRB0_C *
+ * IIO_ICRB6_D IIO_ICRB0_D *
+ * IIO_ICRB6_E IIO_ICRB0_E *
+ * IIO_ICRB7_A IIO_ICRB0_A *
+ * IIO_ICRB7_B IIO_ICRB0_B *
+ * IIO_ICRB7_C IIO_ICRB0_C *
+ * IIO_ICRB7_D IIO_ICRB0_D *
+ * IIO_ICRB7_E IIO_ICRB0_E *
+ * IIO_ICRB8_A IIO_ICRB0_A *
+ * IIO_ICRB8_B IIO_ICRB0_B *
+ * IIO_ICRB8_C IIO_ICRB0_C *
+ * IIO_ICRB8_D IIO_ICRB0_D *
+ * IIO_ICRB8_E IIO_ICRB0_E *
+ * IIO_ICRB9_A IIO_ICRB0_A *
+ * IIO_ICRB9_B IIO_ICRB0_B *
+ * IIO_ICRB9_C IIO_ICRB0_C *
+ * IIO_ICRB9_D IIO_ICRB0_D *
+ * IIO_ICRB9_E IIO_ICRB0_E *
+ * IIO_ICRBA_A IIO_ICRB0_A *
+ * IIO_ICRBA_B IIO_ICRB0_B *
+ * IIO_ICRBA_C IIO_ICRB0_C *
+ * IIO_ICRBA_D IIO_ICRB0_D *
+ * IIO_ICRBA_E IIO_ICRB0_E *
+ * IIO_ICRBB_A IIO_ICRB0_A *
+ * IIO_ICRBB_B IIO_ICRB0_B *
+ * IIO_ICRBB_C IIO_ICRB0_C *
+ * IIO_ICRBB_D IIO_ICRB0_D *
+ * IIO_ICRBB_E IIO_ICRB0_E *
+ * IIO_ICRBC_A IIO_ICRB0_A *
+ * IIO_ICRBC_B IIO_ICRB0_B *
+ * IIO_ICRBC_C IIO_ICRB0_C *
+ * IIO_ICRBC_D IIO_ICRB0_D *
+ * IIO_ICRBC_E IIO_ICRB0_E *
+ * IIO_ICRBD_A IIO_ICRB0_A *
+ * IIO_ICRBD_B IIO_ICRB0_B *
+ * IIO_ICRBD_C IIO_ICRB0_C *
+ * IIO_ICRBD_D IIO_ICRB0_D *
+ * IIO_ICRBD_E IIO_ICRB0_E *
+ * IIO_ICRBE_A IIO_ICRB0_A *
+ * IIO_ICRBE_B IIO_ICRB0_B *
+ * IIO_ICRBE_C IIO_ICRB0_C *
+ * IIO_ICRBE_D IIO_ICRB0_D *
+ * IIO_ICRBE_E IIO_ICRB0_E *
+ * *
+ ************************************************************************/
/*
* Slightly friendlier names for some common registers.
*/
-#define IIO_WIDGET IIO_WID /* Widget identification */
-#define IIO_WIDGET_STAT IIO_WSTAT /* Widget status register */
-#define IIO_WIDGET_CTRL IIO_WCR /* Widget control register */
-#define IIO_PROTECT IIO_ILAPR /* IO interface protection */
-#define IIO_PROTECT_OVRRD IIO_ILAPO /* IO protect override */
-#define IIO_OUTWIDGET_ACCESS IIO_IOWA /* Outbound widget access */
-#define IIO_INWIDGET_ACCESS IIO_IIWA /* Inbound widget access */
-#define IIO_INDEV_ERR_MASK IIO_IIDEM /* Inbound device error mask */
-#define IIO_LLP_CSR IIO_ILCSR /* LLP control and status */
-#define IIO_LLP_LOG IIO_ILLR /* LLP log */
-#define IIO_XTALKCC_TOUT IIO_IXCC /* Xtalk credit count timeout*/
-#define IIO_XTALKTT_TOUT IIO_IXTT /* Xtalk tail timeout */
-#define IIO_IO_ERR_CLR IIO_IECLR /* IO error clear */
+#define IIO_WIDGET IIO_WID /* Widget identification */
+#define IIO_WIDGET_STAT IIO_WSTAT /* Widget status register */
+#define IIO_WIDGET_CTRL IIO_WCR /* Widget control register */
+#define IIO_PROTECT IIO_ILAPR /* IO interface protection */
+#define IIO_PROTECT_OVRRD IIO_ILAPO /* IO protect override */
+#define IIO_OUTWIDGET_ACCESS IIO_IOWA /* Outbound widget access */
+#define IIO_INWIDGET_ACCESS IIO_IIWA /* Inbound widget access */
+#define IIO_INDEV_ERR_MASK IIO_IIDEM /* Inbound device error mask */
+#define IIO_LLP_CSR IIO_ILCSR /* LLP control and status */
+#define IIO_LLP_LOG IIO_ILLR /* LLP log */
+#define IIO_XTALKCC_TOUT IIO_IXCC /* Xtalk credit count timeout */
+#define IIO_XTALKTT_TOUT IIO_IXTT /* Xtalk tail timeout */
+#define IIO_IO_ERR_CLR IIO_IECLR /* IO error clear */
#define IIO_IGFX_0 IIO_IGFX0
#define IIO_IGFX_1 IIO_IGFX1
#define IIO_IBCT_0 IIO_IBCT0
@@ -2957,12 +2850,12 @@
#define IIO_PRTE_A(_x) (IIO_IPRTE0_A + (8 * (_x)))
#define IIO_PRTE_B(_x) (IIO_IPRTE0_B + (8 * (_x)))
#define IIO_NUM_PRTES 8 /* Total number of PRB table entries */
-#define IIO_WIDPRTE_A(x) IIO_PRTE_A(((x) - 8)) /* widget ID to its PRTE num */
-#define IIO_WIDPRTE_B(x) IIO_PRTE_B(((x) - 8)) /* widget ID to its PRTE num */
+#define IIO_WIDPRTE_A(x) IIO_PRTE_A(((x) - 8)) /* widget ID to its PRTE num */
+#define IIO_WIDPRTE_B(x) IIO_PRTE_B(((x) - 8)) /* widget ID to its PRTE num */
-#define IIO_NUM_IPRBS (9)
+#define IIO_NUM_IPRBS 9
-#define IIO_LLP_CSR_IS_UP 0x00002000
+#define IIO_LLP_CSR_IS_UP 0x00002000
#define IIO_LLP_CSR_LLP_STAT_MASK 0x00003000
#define IIO_LLP_CSR_LLP_STAT_SHFT 12
@@ -2970,30 +2863,29 @@
#define IIO_LLP_SN_MAX 0xffff /* in ILLR SN_CNT, Max Sequence Number errors */
/* key to IIO_PROTECT_OVRRD */
-#define IIO_PROTECT_OVRRD_KEY 0x53474972756c6573ull /* "SGIrules" */
+#define IIO_PROTECT_OVRRD_KEY 0x53474972756c6573ull /* "SGIrules" */
/* BTE register names */
-#define IIO_BTE_STAT_0 IIO_IBLS_0 /* Also BTE length/status 0 */
-#define IIO_BTE_SRC_0 IIO_IBSA_0 /* Also BTE source address 0 */
-#define IIO_BTE_DEST_0 IIO_IBDA_0 /* Also BTE dest. address 0 */
-#define IIO_BTE_CTRL_0 IIO_IBCT_0 /* Also BTE control/terminate 0 */
-#define IIO_BTE_NOTIFY_0 IIO_IBNA_0 /* Also BTE notification 0 */
-#define IIO_BTE_INT_0 IIO_IBIA_0 /* Also BTE interrupt 0 */
-#define IIO_BTE_OFF_0 0 /* Base offset from BTE 0 regs. */
-#define IIO_BTE_OFF_1 (IIO_IBLS_1 - IIO_IBLS_0) /* Offset from base to BTE 1 */
+#define IIO_BTE_STAT_0 IIO_IBLS_0 /* Also BTE length/status 0 */
+#define IIO_BTE_SRC_0 IIO_IBSA_0 /* Also BTE source address 0 */
+#define IIO_BTE_DEST_0 IIO_IBDA_0 /* Also BTE dest. address 0 */
+#define IIO_BTE_CTRL_0 IIO_IBCT_0 /* Also BTE control/terminate 0 */
+#define IIO_BTE_NOTIFY_0 IIO_IBNA_0 /* Also BTE notification 0 */
+#define IIO_BTE_INT_0 IIO_IBIA_0 /* Also BTE interrupt 0 */
+#define IIO_BTE_OFF_0 0 /* Base offset from BTE 0 regs. */
+#define IIO_BTE_OFF_1 (IIO_IBLS_1 - IIO_IBLS_0) /* Offset from base to BTE 1 */
/* BTE register offsets from base */
#define BTEOFF_STAT 0
-#define BTEOFF_SRC (IIO_BTE_SRC_0 - IIO_BTE_STAT_0)
-#define BTEOFF_DEST (IIO_BTE_DEST_0 - IIO_BTE_STAT_0)
-#define BTEOFF_CTRL (IIO_BTE_CTRL_0 - IIO_BTE_STAT_0)
-#define BTEOFF_NOTIFY (IIO_BTE_NOTIFY_0 - IIO_BTE_STAT_0)
-#define BTEOFF_INT (IIO_BTE_INT_0 - IIO_BTE_STAT_0)
-
+#define BTEOFF_SRC (IIO_BTE_SRC_0 - IIO_BTE_STAT_0)
+#define BTEOFF_DEST (IIO_BTE_DEST_0 - IIO_BTE_STAT_0)
+#define BTEOFF_CTRL (IIO_BTE_CTRL_0 - IIO_BTE_STAT_0)
+#define BTEOFF_NOTIFY (IIO_BTE_NOTIFY_0 - IIO_BTE_STAT_0)
+#define BTEOFF_INT (IIO_BTE_INT_0 - IIO_BTE_STAT_0)
/* names used in shub diags */
-#define IIO_BASE_BTE0 IIO_IBLS_0
-#define IIO_BASE_BTE1 IIO_IBLS_1
+#define IIO_BASE_BTE0 IIO_IBLS_0
+#define IIO_BASE_BTE1 IIO_IBLS_1
/*
* Macro which takes the widget number, and returns the
@@ -3001,10 +2893,9 @@
* value _x is expected to be a widget number in the range
* 0, 8 - 0xF
*/
-#define IIO_IOPRB(_x) (IIO_IOPRB_0 + ( ( (_x) < HUB_WIDGET_ID_MIN ? \
- (_x) : \
- (_x) - (HUB_WIDGET_ID_MIN-1)) << 3) )
-
+#define IIO_IOPRB(_x) (IIO_IOPRB_0 + ( ( (_x) < HUB_WIDGET_ID_MIN ? \
+ (_x) : \
+ (_x) - (HUB_WIDGET_ID_MIN-1)) << 3) )
/* GFX Flow Control Node/Widget Register */
#define IIO_IGFX_W_NUM_BITS 4 /* size of widget num field */
@@ -3025,7 +2916,6 @@
(((node) & IIO_IGFX_N_NUM_MASK) << IIO_IGFX_N_NUM_SHIFT) | \
(((cpu) & IIO_IGFX_P_NUM_MASK) << IIO_IGFX_P_NUM_SHIFT))
-
/* Scratch registers (all bits available) */
#define IIO_SCRATCH_REG0 IIO_ISCR0
#define IIO_SCRATCH_REG1 IIO_ISCR1
@@ -3046,21 +2936,21 @@
#define IIO_SCRATCH_BIT1_0 0x0000000000000001UL
#define IIO_SCRATCH_BIT1_1 0x0000000000000002UL
/* IO Translation Table Entries */
-#define IIO_NUM_ITTES 7 /* ITTEs numbered 0..6 */
- /* Hw manuals number them 1..7! */
+#define IIO_NUM_ITTES 7 /* ITTEs numbered 0..6 */
+ /* Hw manuals number them 1..7! */
/*
* IIO_IMEM Register fields.
*/
-#define IIO_IMEM_W0ESD 0x1UL /* Widget 0 shut down due to error */
-#define IIO_IMEM_B0ESD (1UL << 4) /* BTE 0 shut down due to error */
-#define IIO_IMEM_B1ESD (1UL << 8) /* BTE 1 Shut down due to error */
+#define IIO_IMEM_W0ESD 0x1UL /* Widget 0 shut down due to error */
+#define IIO_IMEM_B0ESD (1UL << 4) /* BTE 0 shut down due to error */
+#define IIO_IMEM_B1ESD (1UL << 8) /* BTE 1 Shut down due to error */
/*
* As a permanent workaround for a bug in the PI side of the shub, we've
* redefined big window 7 as small window 0.
XXX does this still apply for SN1??
*/
-#define HUB_NUM_BIG_WINDOW (IIO_NUM_ITTES - 1)
+#define HUB_NUM_BIG_WINDOW (IIO_NUM_ITTES - 1)
/*
* Use the top big window as a surrogate for the first small window
@@ -3071,11 +2961,11 @@
/*
* CRB manipulation macros
- * The CRB macros are slightly complicated, since there are up to
- * four registers associated with each CRB entry.
+ * The CRB macros are slightly complicated, since there are up to
+ * four registers associated with each CRB entry.
*/
-#define IIO_NUM_CRBS 15 /* Number of CRBs */
-#define IIO_NUM_PC_CRBS 4 /* Number of partial cache CRBs */
+#define IIO_NUM_CRBS 15 /* Number of CRBs */
+#define IIO_NUM_PC_CRBS 4 /* Number of partial cache CRBs */
#define IIO_ICRB_OFFSET 8
#define IIO_ICRB_0 IIO_ICRB0_A
#define IIO_ICRB_ADDR_SHFT 2 /* Shift to get proper address */
@@ -3083,43 +2973,43 @@
#define IIO_FIRST_PC_ENTRY 12
*/
-#define IIO_ICRB_A(_x) ((__u64)(IIO_ICRB_0 + (6 * IIO_ICRB_OFFSET * (_x))))
-#define IIO_ICRB_B(_x) ((__u64)((char *)IIO_ICRB_A(_x) + 1*IIO_ICRB_OFFSET))
-#define IIO_ICRB_C(_x) ((__u64)((char *)IIO_ICRB_A(_x) + 2*IIO_ICRB_OFFSET))
-#define IIO_ICRB_D(_x) ((__u64)((char *)IIO_ICRB_A(_x) + 3*IIO_ICRB_OFFSET))
-#define IIO_ICRB_E(_x) ((__u64)((char *)IIO_ICRB_A(_x) + 4*IIO_ICRB_OFFSET))
+#define IIO_ICRB_A(_x) ((__u64)(IIO_ICRB_0 + (6 * IIO_ICRB_OFFSET * (_x))))
+#define IIO_ICRB_B(_x) ((__u64)((char *)IIO_ICRB_A(_x) + 1*IIO_ICRB_OFFSET))
+#define IIO_ICRB_C(_x) ((__u64)((char *)IIO_ICRB_A(_x) + 2*IIO_ICRB_OFFSET))
+#define IIO_ICRB_D(_x) ((__u64)((char *)IIO_ICRB_A(_x) + 3*IIO_ICRB_OFFSET))
+#define IIO_ICRB_E(_x) ((__u64)((char *)IIO_ICRB_A(_x) + 4*IIO_ICRB_OFFSET))
#define TNUM_TO_WIDGET_DEV(_tnum) (_tnum & 0x7)
/*
* values for "ecode" field
*/
-#define IIO_ICRB_ECODE_DERR 0 /* Directory error due to IIO access */
-#define IIO_ICRB_ECODE_PERR 1 /* Poison error on IO access */
-#define IIO_ICRB_ECODE_WERR 2 /* Write error by IIO access
- * e.g. WINV to a Read only line. */
-#define IIO_ICRB_ECODE_AERR 3 /* Access error caused by IIO access */
-#define IIO_ICRB_ECODE_PWERR 4 /* Error on partial write */
-#define IIO_ICRB_ECODE_PRERR 5 /* Error on partial read */
-#define IIO_ICRB_ECODE_TOUT 6 /* CRB timeout before deallocating */
-#define IIO_ICRB_ECODE_XTERR 7 /* Incoming xtalk pkt had error bit */
+#define IIO_ICRB_ECODE_DERR 0 /* Directory error due to IIO access */
+#define IIO_ICRB_ECODE_PERR 1 /* Poison error on IO access */
+#define IIO_ICRB_ECODE_WERR 2 /* Write error by IIO access
+ * e.g. WINV to a Read only line. */
+#define IIO_ICRB_ECODE_AERR 3 /* Access error caused by IIO access */
+#define IIO_ICRB_ECODE_PWERR 4 /* Error on partial write */
+#define IIO_ICRB_ECODE_PRERR 5 /* Error on partial read */
+#define IIO_ICRB_ECODE_TOUT 6 /* CRB timeout before deallocating */
+#define IIO_ICRB_ECODE_XTERR 7 /* Incoming xtalk pkt had error bit */
/*
* Values for field imsgtype
*/
-#define IIO_ICRB_IMSGT_XTALK 0 /* Incoming Meessage from Xtalk */
-#define IIO_ICRB_IMSGT_BTE 1 /* Incoming message from BTE */
-#define IIO_ICRB_IMSGT_SN1NET 2 /* Incoming message from SN1 net */
-#define IIO_ICRB_IMSGT_CRB 3 /* Incoming message from CRB ??? */
+#define IIO_ICRB_IMSGT_XTALK 0 /* Incoming Meessage from Xtalk */
+#define IIO_ICRB_IMSGT_BTE 1 /* Incoming message from BTE */
+#define IIO_ICRB_IMSGT_SN1NET 2 /* Incoming message from SN1 net */
+#define IIO_ICRB_IMSGT_CRB 3 /* Incoming message from CRB ??? */
/*
* values for field initiator.
*/
-#define IIO_ICRB_INIT_XTALK 0 /* Message originated in xtalk */
-#define IIO_ICRB_INIT_BTE0 0x1 /* Message originated in BTE 0 */
-#define IIO_ICRB_INIT_SN1NET 0x2 /* Message originated in SN1net */
-#define IIO_ICRB_INIT_CRB 0x3 /* Message originated in CRB ? */
-#define IIO_ICRB_INIT_BTE1 0x5 /* MEssage originated in BTE 1 */
+#define IIO_ICRB_INIT_XTALK 0 /* Message originated in xtalk */
+#define IIO_ICRB_INIT_BTE0 0x1 /* Message originated in BTE 0 */
+#define IIO_ICRB_INIT_SN1NET 0x2 /* Message originated in SN1net */
+#define IIO_ICRB_INIT_CRB 0x3 /* Message originated in CRB ? */
+#define IIO_ICRB_INIT_BTE1 0x5 /* MEssage originated in BTE 1 */
/*
* Number of credits Hub widget has while sending req/response to
@@ -3127,8 +3017,8 @@
* Value of 3 is required by Xbow 1.1
* We may be able to increase this to 4 with Xbow 1.2.
*/
-#define HUBII_XBOW_CREDIT 3
-#define HUBII_XBOW_REV2_CREDIT 4
+#define HUBII_XBOW_CREDIT 3
+#define HUBII_XBOW_REV2_CREDIT 4
/*
* Number of credits that xtalk devices should use when communicating
@@ -3159,28 +3049,28 @@
*/
#define IIO_ICMR_CRB_VLD_SHFT 20
-#define IIO_ICMR_CRB_VLD_MASK (0x7fffUL << IIO_ICMR_CRB_VLD_SHFT)
+#define IIO_ICMR_CRB_VLD_MASK (0x7fffUL << IIO_ICMR_CRB_VLD_SHFT)
#define IIO_ICMR_FC_CNT_SHFT 16
-#define IIO_ICMR_FC_CNT_MASK (0xf << IIO_ICMR_FC_CNT_SHFT)
+#define IIO_ICMR_FC_CNT_MASK (0xf << IIO_ICMR_FC_CNT_SHFT)
#define IIO_ICMR_C_CNT_SHFT 4
-#define IIO_ICMR_C_CNT_MASK (0xf << IIO_ICMR_C_CNT_SHFT)
+#define IIO_ICMR_C_CNT_MASK (0xf << IIO_ICMR_C_CNT_SHFT)
-#define IIO_ICMR_PRECISE (1UL << 52)
-#define IIO_ICMR_CLR_RPPD (1UL << 13)
-#define IIO_ICMR_CLR_RQPD (1UL << 12)
+#define IIO_ICMR_PRECISE (1UL << 52)
+#define IIO_ICMR_CLR_RPPD (1UL << 13)
+#define IIO_ICMR_CLR_RQPD (1UL << 12)
/*
* IIO PIO Deallocation register field masks : (IIO_IPDR)
XXX present but not needed in bedrock? See the manual.
*/
-#define IIO_IPDR_PND (1 << 4)
+#define IIO_IPDR_PND (1 << 4)
/*
* IIO CRB deallocation register field masks: (IIO_ICDR)
*/
-#define IIO_ICDR_PND (1 << 4)
+#define IIO_ICDR_PND (1 << 4)
/*
* IO BTE Length/Status (IIO_IBLS) register bit field definitions
@@ -3223,35 +3113,35 @@
/*
* IO Error Clear register bit field definitions
*/
-#define IECLR_PI1_FWD_INT (1UL << 31) /* clear PI1_FORWARD_INT in iidsr */
-#define IECLR_PI0_FWD_INT (1UL << 30) /* clear PI0_FORWARD_INT in iidsr */
-#define IECLR_SPUR_RD_HDR (1UL << 29) /* clear valid bit in ixss reg */
-#define IECLR_BTE1 (1UL << 18) /* clear bte error 1 */
-#define IECLR_BTE0 (1UL << 17) /* clear bte error 0 */
-#define IECLR_CRAZY (1UL << 16) /* clear crazy bit in wstat reg */
-#define IECLR_PRB_F (1UL << 15) /* clear err bit in PRB_F reg */
-#define IECLR_PRB_E (1UL << 14) /* clear err bit in PRB_E reg */
-#define IECLR_PRB_D (1UL << 13) /* clear err bit in PRB_D reg */
-#define IECLR_PRB_C (1UL << 12) /* clear err bit in PRB_C reg */
-#define IECLR_PRB_B (1UL << 11) /* clear err bit in PRB_B reg */
-#define IECLR_PRB_A (1UL << 10) /* clear err bit in PRB_A reg */
-#define IECLR_PRB_9 (1UL << 9) /* clear err bit in PRB_9 reg */
-#define IECLR_PRB_8 (1UL << 8) /* clear err bit in PRB_8 reg */
-#define IECLR_PRB_0 (1UL << 0) /* clear err bit in PRB_0 reg */
+#define IECLR_PI1_FWD_INT (1UL << 31) /* clear PI1_FORWARD_INT in iidsr */
+#define IECLR_PI0_FWD_INT (1UL << 30) /* clear PI0_FORWARD_INT in iidsr */
+#define IECLR_SPUR_RD_HDR (1UL << 29) /* clear valid bit in ixss reg */
+#define IECLR_BTE1 (1UL << 18) /* clear bte error 1 */
+#define IECLR_BTE0 (1UL << 17) /* clear bte error 0 */
+#define IECLR_CRAZY (1UL << 16) /* clear crazy bit in wstat reg */
+#define IECLR_PRB_F (1UL << 15) /* clear err bit in PRB_F reg */
+#define IECLR_PRB_E (1UL << 14) /* clear err bit in PRB_E reg */
+#define IECLR_PRB_D (1UL << 13) /* clear err bit in PRB_D reg */
+#define IECLR_PRB_C (1UL << 12) /* clear err bit in PRB_C reg */
+#define IECLR_PRB_B (1UL << 11) /* clear err bit in PRB_B reg */
+#define IECLR_PRB_A (1UL << 10) /* clear err bit in PRB_A reg */
+#define IECLR_PRB_9 (1UL << 9) /* clear err bit in PRB_9 reg */
+#define IECLR_PRB_8 (1UL << 8) /* clear err bit in PRB_8 reg */
+#define IECLR_PRB_0 (1UL << 0) /* clear err bit in PRB_0 reg */
/*
* IIO CRB control register Fields: IIO_ICCR
*/
-#define IIO_ICCR_PENDING (0x10000)
-#define IIO_ICCR_CMD_MASK (0xFF)
-#define IIO_ICCR_CMD_SHFT (7)
-#define IIO_ICCR_CMD_NOP (0x0) /* No Op */
-#define IIO_ICCR_CMD_WAKE (0x100) /* Reactivate CRB entry and process */
-#define IIO_ICCR_CMD_TIMEOUT (0x200) /* Make CRB timeout & mark invalid */
-#define IIO_ICCR_CMD_EJECT (0x400) /* Contents of entry written to memory
+#define IIO_ICCR_PENDING 0x10000
+#define IIO_ICCR_CMD_MASK 0xFF
+#define IIO_ICCR_CMD_SHFT 7
+#define IIO_ICCR_CMD_NOP 0x0 /* No Op */
+#define IIO_ICCR_CMD_WAKE 0x100 /* Reactivate CRB entry and process */
+#define IIO_ICCR_CMD_TIMEOUT 0x200 /* Make CRB timeout & mark invalid */
+#define IIO_ICCR_CMD_EJECT 0x400 /* Contents of entry written to memory
* via a WB
*/
-#define IIO_ICCR_CMD_FLUSH (0x800)
+#define IIO_ICCR_CMD_FLUSH 0x800
/*
*
@@ -3283,8 +3173,8 @@
* Easy access macros for CRBs, all 5 registers (A-E)
*/
typedef ii_icrb0_a_u_t icrba_t;
-#define a_sidn ii_icrb0_a_fld_s.ia_sidn
-#define a_tnum ii_icrb0_a_fld_s.ia_tnum
+#define a_sidn ii_icrb0_a_fld_s.ia_sidn
+#define a_tnum ii_icrb0_a_fld_s.ia_tnum
#define a_addr ii_icrb0_a_fld_s.ia_addr
#define a_valid ii_icrb0_a_fld_s.ia_vld
#define a_iow ii_icrb0_a_fld_s.ia_iow
@@ -3324,14 +3214,13 @@
#define c_source ii_icrb0_c_fld_s.ic_source
#define c_regvalue ii_icrb0_c_regval
-
typedef ii_icrb0_d_u_t icrbd_t;
#define d_sleep ii_icrb0_d_fld_s.id_sleep
#define d_pricnt ii_icrb0_d_fld_s.id_pr_cnt
#define d_pripsc ii_icrb0_d_fld_s.id_pr_psc
#define d_bteop ii_icrb0_d_fld_s.id_bte_op
-#define d_bteaddr ii_icrb0_d_fld_s.id_pa_be /* ic_pa_be fld has 2 names*/
-#define d_benable ii_icrb0_d_fld_s.id_pa_be /* ic_pa_be fld has 2 names*/
+#define d_bteaddr ii_icrb0_d_fld_s.id_pa_be /* ic_pa_be fld has 2 names */
+#define d_benable ii_icrb0_d_fld_s.id_pa_be /* ic_pa_be fld has 2 names */
#define d_regvalue ii_icrb0_d_regval
typedef ii_icrb0_e_u_t icrbe_t;
@@ -3341,7 +3230,6 @@
#define icrbe_timeout ii_icrb0_e_fld_s.ie_timeout
#define e_regvalue ii_icrb0_e_regval
-
/* Number of widgets supported by shub */
#define HUB_NUM_WIDGET 9
#define HUB_WIDGET_ID_MIN 0x8
@@ -3367,27 +3255,27 @@
#define LNK_STAT_WORKING 0x2 /* LLP is working */
-#define IIO_WSTAT_ECRAZY (1ULL << 32) /* Hub gone crazy */
-#define IIO_WSTAT_TXRETRY (1ULL << 9) /* Hub Tx Retry timeout */
-#define IIO_WSTAT_TXRETRY_MASK (0x7F) /* should be 0xFF?? */
-#define IIO_WSTAT_TXRETRY_SHFT (16)
-#define IIO_WSTAT_TXRETRY_CNT(w) (((w) >> IIO_WSTAT_TXRETRY_SHFT) & \
- IIO_WSTAT_TXRETRY_MASK)
+#define IIO_WSTAT_ECRAZY (1ULL << 32) /* Hub gone crazy */
+#define IIO_WSTAT_TXRETRY (1ULL << 9) /* Hub Tx Retry timeout */
+#define IIO_WSTAT_TXRETRY_MASK 0x7F /* should be 0xFF?? */
+#define IIO_WSTAT_TXRETRY_SHFT 16
+#define IIO_WSTAT_TXRETRY_CNT(w) (((w) >> IIO_WSTAT_TXRETRY_SHFT) & \
+ IIO_WSTAT_TXRETRY_MASK)
/* Number of II perf. counters we can multiplex at once */
#define IO_PERF_SETS 32
/* Bit for the widget in inbound access register */
-#define IIO_IIWA_WIDGET(_w) ((uint64_t)(1ULL << _w))
+#define IIO_IIWA_WIDGET(_w) ((uint64_t)(1ULL << _w))
/* Bit for the widget in outbound access register */
-#define IIO_IOWA_WIDGET(_w) ((uint64_t)(1ULL << _w))
+#define IIO_IOWA_WIDGET(_w) ((uint64_t)(1ULL << _w))
/* NOTE: The following define assumes that we are going to get
* widget numbers from 8 thru F and the device numbers within
* widget from 0 thru 7.
*/
-#define IIO_IIDEM_WIDGETDEV_MASK(w, d) ((uint64_t)(1ULL << (8 * ((w) - 8) + (d))))
+#define IIO_IIDEM_WIDGETDEV_MASK(w, d) ((uint64_t)(1ULL << (8 * ((w) - 8) + (d))))
/* IO Interrupt Destination Register */
#define IIO_IIDSR_SENT_SHIFT 28
@@ -3402,11 +3290,11 @@
#define IIO_IIDSR_LVL_MASK 0x000000ff
/* Xtalk timeout threshhold register (IIO_IXTT) */
-#define IXTT_RRSP_TO_SHFT 55 /* read response timeout */
+#define IXTT_RRSP_TO_SHFT 55 /* read response timeout */
#define IXTT_RRSP_TO_MASK (0x1FULL << IXTT_RRSP_TO_SHFT)
-#define IXTT_RRSP_PS_SHFT 32 /* read responsed TO prescalar */
+#define IXTT_RRSP_PS_SHFT 32 /* read responsed TO prescalar */
#define IXTT_RRSP_PS_MASK (0x7FFFFFULL << IXTT_RRSP_PS_SHFT)
-#define IXTT_TAIL_TO_SHFT 0 /* tail timeout counter threshold */
+#define IXTT_TAIL_TO_SHFT 0 /* tail timeout counter threshold */
#define IXTT_TAIL_TO_MASK (0x3FFFFFFULL << IXTT_TAIL_TO_SHFT)
/*
@@ -3414,17 +3302,17 @@
*/
typedef union hubii_wcr_u {
- uint64_t wcr_reg_value;
- struct {
- uint64_t wcr_widget_id: 4, /* LLP crossbar credit */
- wcr_tag_mode: 1, /* Tag mode */
- wcr_rsvd1: 8, /* Reserved */
- wcr_xbar_crd: 3, /* LLP crossbar credit */
- wcr_f_bad_pkt: 1, /* Force bad llp pkt enable */
- wcr_dir_con: 1, /* widget direct connect */
- wcr_e_thresh: 5, /* elasticity threshold */
- wcr_rsvd: 41; /* unused */
- } wcr_fields_s;
+ uint64_t wcr_reg_value;
+ struct {
+ uint64_t wcr_widget_id:4, /* LLP crossbar credit */
+ wcr_tag_mode:1, /* Tag mode */
+ wcr_rsvd1:8, /* Reserved */
+ wcr_xbar_crd:3, /* LLP crossbar credit */
+ wcr_f_bad_pkt:1, /* Force bad llp pkt enable */
+ wcr_dir_con:1, /* widget direct connect */
+ wcr_e_thresh:5, /* elasticity threshold */
+ wcr_rsvd:41; /* unused */
+ } wcr_fields_s;
} hubii_wcr_t;
#define iwcr_dir_con wcr_fields_s.wcr_dir_con
@@ -3436,41 +3324,35 @@
performed */
typedef union io_perf_sel {
- uint64_t perf_sel_reg;
- struct {
- uint64_t perf_ippr0 : 4,
- perf_ippr1 : 4,
- perf_icct : 8,
- perf_rsvd : 48;
- } perf_sel_bits;
+ uint64_t perf_sel_reg;
+ struct {
+ uint64_t perf_ippr0:4, perf_ippr1:4, perf_icct:8, perf_rsvd:48;
+ } perf_sel_bits;
} io_perf_sel_t;
/* io_perf_cnt is to extract the count from the shub registers. Due to
hardware problems there is only one counter, not two. */
typedef union io_perf_cnt {
- uint64_t perf_cnt;
- struct {
- uint64_t perf_cnt : 20,
- perf_rsvd2 : 12,
- perf_rsvd1 : 32;
- } perf_cnt_bits;
+ uint64_t perf_cnt;
+ struct {
+ uint64_t perf_cnt:20, perf_rsvd2:12, perf_rsvd1:32;
+ } perf_cnt_bits;
} io_perf_cnt_t;
typedef union iprte_a {
- uint64_t entry;
+ uint64_t entry;
struct {
- uint64_t i_rsvd_1 : 3;
- uint64_t i_addr : 38;
- uint64_t i_init : 3;
- uint64_t i_source : 8;
- uint64_t i_rsvd : 2;
- uint64_t i_widget : 4;
- uint64_t i_to_cnt : 5;
- uint64_t i_vld : 1;
+ uint64_t i_rsvd_1:3;
+ uint64_t i_addr:38;
+ uint64_t i_init:3;
+ uint64_t i_source:8;
+ uint64_t i_rsvd:2;
+ uint64_t i_widget:4;
+ uint64_t i_to_cnt:5;
+ uint64_t i_vld:1;
} iprte_fields;
} iprte_a_t;
-#endif /* _ASM_IA64_SN_SHUBIO_H */
-
+#endif /* _ASM_IA64_SN_SHUBIO_H */
Modified: linux-libc-headers/trunk/include/asm-ia64/sn/sn_cpuid.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ia64/sn/sn_cpuid.h (original)
+++ linux-libc-headers/trunk/include/asm-ia64/sn/sn_cpuid.h Tue Jul 5 22:58:33 2005
@@ -4,7 +4,7 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 2000-2004 Silicon Graphics, Inc. All rights reserved.
+ * Copyright (C) 2000-2005 Silicon Graphics, Inc. All rights reserved.
*/
@@ -91,24 +91,24 @@
* NOTE: on non-MP systems, only cpuid 0 exists
*/
-extern short physical_node_map[]; /* indexed by nasid to get cnode */
+extern short physical_node_map[]; /* indexed by nasid to get cnode */
/*
* Macros for retrieving info about current cpu
*/
-#define get_nasid() (nodepda->phys_cpuid[smp_processor_id()].nasid)
-#define get_subnode() (nodepda->phys_cpuid[smp_processor_id()].subnode)
-#define get_slice() (nodepda->phys_cpuid[smp_processor_id()].slice)
-#define get_cnode() (nodepda->phys_cpuid[smp_processor_id()].cnode)
-#define get_sapicid() ((ia64_getreg(_IA64_REG_CR_LID) >> 16) & 0xffff)
+#define get_nasid() (sn_nodepda->phys_cpuid[smp_processor_id()].nasid)
+#define get_subnode() (sn_nodepda->phys_cpuid[smp_processor_id()].subnode)
+#define get_slice() (sn_nodepda->phys_cpuid[smp_processor_id()].slice)
+#define get_cnode() (sn_nodepda->phys_cpuid[smp_processor_id()].cnode)
+#define get_sapicid() ((ia64_getreg(_IA64_REG_CR_LID) >> 16) & 0xffff)
/*
* Macros for retrieving info about an arbitrary cpu
* cpuid - logical cpu id
*/
-#define cpuid_to_nasid(cpuid) (nodepda->phys_cpuid[cpuid].nasid)
-#define cpuid_to_subnode(cpuid) (nodepda->phys_cpuid[cpuid].subnode)
-#define cpuid_to_slice(cpuid) (nodepda->phys_cpuid[cpuid].slice)
+#define cpuid_to_nasid(cpuid) (sn_nodepda->phys_cpuid[cpuid].nasid)
+#define cpuid_to_subnode(cpuid) (sn_nodepda->phys_cpuid[cpuid].subnode)
+#define cpuid_to_slice(cpuid) (sn_nodepda->phys_cpuid[cpuid].slice)
#define cpuid_to_cnodeid(cpuid) (physical_node_map[cpuid_to_nasid(cpuid)])
@@ -122,11 +122,8 @@
/*
* cnodeid_to_nasid - convert a cnodeid to a NASID
- * Macro relies on pg_data for a node being on the node itself.
- * Just extract the NASID from the pointer.
- *
*/
-#define cnodeid_to_nasid(cnodeid) pda->cnodeid_to_nasid_table[cnodeid]
+#define cnodeid_to_nasid(cnodeid) (sn_cnodeid_to_nasid[cnodeid])
/*
* nasid_to_cnodeid - convert a NASID to a cnodeid
@@ -134,9 +131,10 @@
#define nasid_to_cnodeid(nasid) (physical_node_map[nasid])
/*
- * partition_coherence_id - cget the coherence ID of the current partition
+ * partition_coherence_id - get the coherence ID of the current partition
*/
-#define partition_coherence_id() (get_nasid() >> 9)
+extern __u8 sn_coherency_id;
+#define partition_coherence_id() (sn_coherency_id)
#endif /* _ASM_IA64_SN_SN_CPUID_H */
Modified: linux-libc-headers/trunk/include/asm-ia64/sn/sn_sal.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ia64/sn/sn_sal.h (original)
+++ linux-libc-headers/trunk/include/asm-ia64/sn/sn_sal.h Tue Jul 5 22:58:33 2005
@@ -8,7 +8,7 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (c) 2000-2004 Silicon Graphics, Inc. All rights reserved.
+ * Copyright (c) 2000-2005 Silicon Graphics, Inc. All rights reserved.
*/
@@ -17,6 +17,7 @@
#include <asm/sn/arch.h>
#include <asm/sn/geo.h>
#include <asm/sn/nodepda.h>
+#include <asm/sn/shub_mmr.h>
// SGI Specific Calls
#define SN_SAL_POD_MODE 0x02000001
@@ -33,8 +34,8 @@
#define SN_SAL_PRINT_ERROR 0x02000012
#define SN_SAL_SET_ERROR_HANDLING_FEATURES 0x0200001a // reentrant
#define SN_SAL_GET_FIT_COMPT 0x0200001b // reentrant
-#define SN_SAL_GET_HUB_INFO 0x0200001c
#define SN_SAL_GET_SAPIC_INFO 0x0200001d
+#define SN_SAL_GET_SN_INFO 0x0200001e
#define SN_SAL_CONSOLE_PUTC 0x02000021
#define SN_SAL_CONSOLE_GETC 0x02000022
#define SN_SAL_CONSOLE_PUTS 0x02000023
@@ -62,6 +63,7 @@
#define SN_SAL_SYSCTL_IOBRICK_PCI_OP 0x02000042 // reentrant
#define SN_SAL_IROUTER_OP 0x02000043
+#define SN_SAL_SYSCTL_EVENT 0x02000044
#define SN_SAL_IOIF_INTERRUPT 0x0200004a
#define SN_SAL_HWPERF_OP 0x02000050 // lock
#define SN_SAL_IOIF_ERROR_INTERRUPT 0x02000051
@@ -74,7 +76,8 @@
#define SN_SAL_IOIF_GET_WIDGET_DMAFLUSH_LIST 0x02000058
#define SN_SAL_HUB_ERROR_INTERRUPT 0x02000060
-
+#define SN_SAL_BTE_RECOVER 0x02000061
+#define SN_SAL_IOIF_GET_PCI_TOPOLOGY 0x02000062
/*
* Service-specific constants
@@ -111,6 +114,13 @@
#define SAL_IROUTER_INTR_XMIT SAL_CONSOLE_INTR_XMIT
#define SAL_IROUTER_INTR_RECV SAL_CONSOLE_INTR_RECV
+/*
+ * Error Handling Features
+ */
+#define SAL_ERR_FEAT_MCA_SLV_TO_OS_INIT_SLV 0x1
+#define SAL_ERR_FEAT_LOG_SBES 0x2
+#define SAL_ERR_FEAT_MFR_OVERRIDE 0x4
+#define SAL_ERR_FEAT_SBE_THRESHOLD 0xffff0000
/*
* SAL Error Codes
@@ -163,7 +173,7 @@
* Returns the master console nasid, if the call fails, return an illegal
* value.
*/
-static inline u64
+static inline __u64
ia64_sn_get_console_nasid(void)
{
struct ia64_sal_retval ret_stuff;
@@ -185,7 +195,7 @@
* Returns the master baseio nasid, if the call fails, return an illegal
* value.
*/
-static inline u64
+static inline __u64
ia64_sn_get_master_baseio_nasid(void)
{
struct ia64_sal_retval ret_stuff;
@@ -229,7 +239,7 @@
/*
* Returns the next console character.
*/
-static inline u64
+static inline __u64
ia64_sn_console_getc(int *ch)
{
struct ia64_sal_retval ret_stuff;
@@ -251,7 +261,7 @@
* or poll operation has given us to know that a character is available
* to be read.
*/
-static inline u64
+static inline __u64
ia64_sn_console_readc(void)
{
struct ia64_sal_retval ret_stuff;
@@ -269,7 +279,7 @@
/*
* Sends the given character to the console.
*/
-static inline u64
+static inline __u64
ia64_sn_console_putc(char ch)
{
struct ia64_sal_retval ret_stuff;
@@ -286,7 +296,7 @@
/*
* Sends the given buffer to the console.
*/
-static inline u64
+static inline __u64
ia64_sn_console_putb(const char *buf, int len)
{
struct ia64_sal_retval ret_stuff;
@@ -306,7 +316,7 @@
/*
* Print a platform error record
*/
-static inline u64
+static inline __u64
ia64_sn_plat_specific_err_print(int (*hook)(const char*, ...), char *rec)
{
struct ia64_sal_retval ret_stuff;
@@ -323,7 +333,7 @@
/*
* Check for Platform errors
*/
-static inline u64
+static inline __u64
ia64_sn_plat_cpei_handler(void)
{
struct ia64_sal_retval ret_stuff;
@@ -338,9 +348,28 @@
}
/*
+ * Set Error Handling Features
+ */
+static inline __u64
+ia64_sn_plat_set_error_handling_features(void)
+{
+ struct ia64_sal_retval ret_stuff;
+
+ ret_stuff.status = 0;
+ ret_stuff.v0 = 0;
+ ret_stuff.v1 = 0;
+ ret_stuff.v2 = 0;
+ SAL_CALL_REENTRANT(ret_stuff, SN_SAL_SET_ERROR_HANDLING_FEATURES,
+ (SAL_ERR_FEAT_MCA_SLV_TO_OS_INIT_SLV | SAL_ERR_FEAT_LOG_SBES),
+ 0, 0, 0, 0, 0, 0);
+
+ return ret_stuff.status;
+}
+
+/*
* Checks for console input.
*/
-static inline u64
+static inline __u64
ia64_sn_console_check(int *result)
{
struct ia64_sal_retval ret_stuff;
@@ -360,7 +389,7 @@
/*
* Checks console interrupt status
*/
-static inline u64
+static inline __u64
ia64_sn_console_intr_status(void)
{
struct ia64_sal_retval ret_stuff;
@@ -417,7 +446,7 @@
/*
* Sends a character buffer to the console asynchronously.
*/
-static inline u64
+static inline __u64
ia64_sn_console_xmit_chars(char *buf, int len)
{
struct ia64_sal_retval ret_stuff;
@@ -440,7 +469,7 @@
/*
* Returns the iobrick module Id
*/
-static inline u64
+static inline __u64
ia64_sn_sysctl_iobrick_module_get(nasid_t nasid, int *result)
{
struct ia64_sal_retval ret_stuff;
@@ -464,11 +493,11 @@
* 0 when we call it from the kernel, so we don't have to expose
* it to the caller.
*/
-static inline u64
+static inline __u64
ia64_sn_pod_mode(void)
{
struct ia64_sal_retval isrv;
- SAL_CALL(isrv, SN_SAL_POD_MODE, 0, 0, 0, 0, 0, 0, 0);
+ SAL_CALL_REENTRANT(isrv, SN_SAL_POD_MODE, 0, 0, 0, 0, 0, 0, 0);
if (isrv.status)
return 0;
return isrv.v0;
@@ -492,7 +521,7 @@
* 2 - Bad arg
* <0 - PAL error
*/
-static inline u64
+static inline __u64
ia64_sn_probe_mem(long addr, long size, void *data_ptr)
{
struct ia64_sal_retval isrv;
@@ -502,16 +531,16 @@
if (data_ptr) {
switch (size) {
case 1:
- *((u8*)data_ptr) = (__u8)isrv.v0;
+ *((__u8*)data_ptr) = (__u8)isrv.v0;
break;
case 2:
- *((u16*)data_ptr) = (__u16)isrv.v0;
+ *((__u16*)data_ptr) = (__u16)isrv.v0;
break;
case 4:
- *((u32*)data_ptr) = (__u32)isrv.v0;
+ *((__u32*)data_ptr) = (__u32)isrv.v0;
break;
case 8:
- *((u64*)data_ptr) = (__u64)isrv.v0;
+ *((__u64*)data_ptr) = (__u64)isrv.v0;
break;
default:
isrv.status = 2;
@@ -523,7 +552,7 @@
/*
* Retrieve the system serial number as an ASCII string.
*/
-static inline u64
+static inline __u64
ia64_sn_sys_serial_get(char *buf)
{
struct ia64_sal_retval ret_stuff;
@@ -549,23 +578,23 @@
* Returns a unique id number for this system and partition (suitable for
* use with license managers), based in part on the system serial number.
*/
-static inline u64
+static inline __u64
ia64_sn_partition_serial_get(void)
{
struct ia64_sal_retval ret_stuff;
- SAL_CALL(ret_stuff, SN_SAL_PARTITION_SERIAL_GET, 0, 0, 0, 0, 0, 0, 0);
+ ia64_sal_oemcall_reentrant(&ret_stuff, SN_SAL_PARTITION_SERIAL_GET, 0,
+ 0, 0, 0, 0, 0, 0);
if (ret_stuff.status != 0)
return 0;
return ret_stuff.v0;
}
-static inline u64
+static inline __u64
sn_partition_serial_number_val(void) {
- if (sn_partition_serial_number) {
- return(sn_partition_serial_number);
- } else {
- return(sn_partition_serial_number = ia64_sn_partition_serial_get());
+ if (unlikely(sn_partition_serial_number == 0)) {
+ sn_partition_serial_number = ia64_sn_partition_serial_get();
}
+ return sn_partition_serial_number;
}
/*
@@ -576,8 +605,8 @@
ia64_sn_sysctl_partition_get(nasid_t nasid)
{
struct ia64_sal_retval ret_stuff;
- SAL_CALL(ret_stuff, SN_SAL_SYSCTL_PARTITION_GET, nasid,
- 0, 0, 0, 0, 0, 0);
+ ia64_sal_oemcall_nolock(&ret_stuff, SN_SAL_SYSCTL_PARTITION_GET, nasid,
+ 0, 0, 0, 0, 0, 0);
if (ret_stuff.status != 0)
return INVALID_PARTID;
return ((partid_t)ret_stuff.v0);
@@ -591,11 +620,38 @@
static inline partid_t
sn_local_partid(void) {
- if (sn_partid < 0) {
- return (sn_partid = ia64_sn_sysctl_partition_get(cpuid_to_nasid(smp_processor_id())));
- } else {
- return sn_partid;
+ if (unlikely(sn_partid < 0)) {
+ sn_partid = ia64_sn_sysctl_partition_get(cpuid_to_nasid(smp_processor_id()));
}
+ return sn_partid;
+}
+
+/*
+ * Returns the physical address of the partition's reserved page through
+ * an iterative number of calls.
+ *
+ * On first call, 'cookie' and 'len' should be set to 0, and 'addr'
+ * set to the nasid of the partition whose reserved page's address is
+ * being sought.
+ * On subsequent calls, pass the values, that were passed back on the
+ * previous call.
+ *
+ * While the return status equals SALRET_MORE_PASSES, keep calling
+ * this function after first copying 'len' bytes starting at 'addr'
+ * into 'buf'. Once the return status equals SALRET_OK, 'addr' will
+ * be the physical address of the partition's reserved page. If the
+ * return status equals neither of these, an error as occurred.
+ */
+static inline __s64
+sn_partition_reserved_page_pa(__u64 buf, __u64 *cookie, __u64 *addr, __u64 *len)
+{
+ struct ia64_sal_retval rv;
+ ia64_sal_oemcall_reentrant(&rv, SN_SAL_GET_PARTITION_ADDR, *cookie,
+ *addr, buf, *len, 0, 0, 0);
+ *cookie = rv.v0;
+ *addr = rv.v1;
+ *len = rv.v2;
+ return rv.status;
}
/*
@@ -617,8 +673,8 @@
sn_register_xp_addr_region(__u64 paddr, __u64 len, int operation)
{
struct ia64_sal_retval ret_stuff;
- SAL_CALL(ret_stuff, SN_SAL_XP_ADDR_REGION, paddr, len, (__u64)operation,
- 0, 0, 0, 0);
+ ia64_sal_oemcall(&ret_stuff, SN_SAL_XP_ADDR_REGION, paddr, len,
+ (__u64)operation, 0, 0, 0, 0);
return ret_stuff.status;
}
@@ -642,8 +698,8 @@
} else {
call = SN_SAL_NO_FAULT_ZONE_PHYSICAL;
}
- SAL_CALL(ret_stuff, call, start_addr, end_addr, return_addr, (__u64)1,
- 0, 0, 0);
+ ia64_sal_oemcall(&ret_stuff, call, start_addr, end_addr, return_addr,
+ (__u64)1, 0, 0, 0);
return ret_stuff.status;
}
@@ -664,8 +720,8 @@
sn_change_coherence(__u64 *new_domain, __u64 *old_domain)
{
struct ia64_sal_retval ret_stuff;
- SAL_CALL(ret_stuff, SN_SAL_COHERENCE, new_domain, old_domain, 0, 0,
- 0, 0, 0);
+ ia64_sal_oemcall(&ret_stuff, SN_SAL_COHERENCE, (__u64)new_domain,
+ (__u64)old_domain, 0, 0, 0, 0, 0);
return ret_stuff.status;
}
@@ -684,8 +740,8 @@
cnodeid = nasid_to_cnodeid(get_node_number(paddr));
// spin_lock(&NODEPDA(cnodeid)->bist_lock);
local_irq_save(irq_flags);
- SAL_CALL_NOLOCK(ret_stuff, SN_SAL_MEMPROTECT, paddr, len, nasid_array,
- perms, 0, 0, 0);
+ ia64_sal_oemcall_nolock(&ret_stuff, SN_SAL_MEMPROTECT, paddr, len,
+ (__u64)nasid_array, perms, 0, 0, 0);
local_irq_restore(irq_flags);
// spin_unlock(&NODEPDA(cnodeid)->bist_lock);
return ret_stuff.status;
@@ -715,7 +771,7 @@
* This routine will call the SAL which will tell the system controller(s)
* to capture hw mmr information from each SHub in the system.
*/
-static inline u64
+static inline __u64
ia64_sn_fru_capture(void)
{
struct ia64_sal_retval isrv;
@@ -729,7 +785,7 @@
* Performs an operation on a PCI bus or slot -- power up, power down
* or reset.
*/
-static inline u64
+static inline __u64
ia64_sn_sysctl_iobrick_pci_op(nasid_t n, __u64 connection_type,
__u64 bus, char slot,
__u64 action)
@@ -847,6 +903,19 @@
return (int) rv.v0;
}
+/*
+ * Set up a node as the point of contact for system controller
+ * environmental event delivery.
+ */
+static inline int
+ia64_sn_sysctl_event_init(nasid_t nasid)
+{
+ struct ia64_sal_retval rv;
+ SAL_CALL_REENTRANT(rv, SN_SAL_SYSCTL_EVENT, (__u64) nasid,
+ 0, 0, 0, 0, 0, 0);
+ return (int) rv.v0;
+}
+
/**
* ia64_sn_get_fit_compt - read a FIT entry from the PROM header
* @nasid: NASID of node to read
@@ -902,7 +971,7 @@
* v1 - subnode
* v2 - slice
*/
-static inline u64
+static inline __u64
ia64_sn_get_sapic_info(int sapicid, int *nasid, int *subnode, int *slice)
{
struct ia64_sal_retval ret_stuff;
@@ -934,15 +1003,24 @@
/*
* Returns information about the HUB/SHUB.
* In:
- * arg0 - SN_SAL_GET_HUB_INFO
+ * arg0 - SN_SAL_GET_SN_INFO
* arg1 - 0 (other values reserved for future use)
* Out:
- * v0 - shub type (0=shub1, 1=shub2)
- * v1 - masid mask (ex., 0x7ff for 11 bit nasid)
- * v2 - bit position of low nasid bit
- */
-static inline u64
-ia64_sn_get_hub_info(int fc, __u64 *arg1, __u64 *arg2, __u64 *arg3)
+ * v0
+ * [7:0] - shub type (0=shub1, 1=shub2)
+ * [15:8] - Log2 max number of nodes in entire system (includes
+ * C-bricks, I-bricks, etc)
+ * [23:16] - Log2 of nodes per sharing domain
+ * [31:24] - partition ID
+ * [39:32] - coherency_id
+ * [47:40] - regionsize
+ * v1
+ * [15:0] - nasid mask (ex., 0x7ff for 11 bit nasid)
+ * [23:15] - bit position of low nasid bit
+ */
+static inline __u64
+ia64_sn_get_sn_info(int fc, __u8 *shubtype, __u16 *nasid_bitmask, __u8 *nasid_shift,
+ __u8 *systemsize, __u8 *sharing_domain_size, __u8 *partid, __u8 *coher, __u8 *reg)
{
struct ia64_sal_retval ret_stuff;
@@ -950,13 +1028,22 @@
ret_stuff.v0 = 0;
ret_stuff.v1 = 0;
ret_stuff.v2 = 0;
- SAL_CALL_NOLOCK(ret_stuff, SN_SAL_GET_HUB_INFO, fc, 0, 0, 0, 0, 0, 0);
+ SAL_CALL_NOLOCK(ret_stuff, SN_SAL_GET_SN_INFO, fc, 0, 0, 0, 0, 0, 0);
/***** BEGIN HACK - temp til old proms no longer supported ********/
if (ret_stuff.status == SALRET_NOT_IMPLEMENTED) {
- if (arg1) *arg1 = 0;
- if (arg2) *arg2 = 0x7ff;
- if (arg3) *arg3 = 38;
+ int nasid = get_sapicid() & 0xfff;;
+#define SH_SHUB_ID_NODES_PER_BIT_MASK 0x001f000000000000UL
+#define SH_SHUB_ID_NODES_PER_BIT_SHFT 48
+ if (shubtype) *shubtype = 0;
+ if (nasid_bitmask) *nasid_bitmask = 0x7ff;
+ if (nasid_shift) *nasid_shift = 38;
+ if (systemsize) *systemsize = 11;
+ if (sharing_domain_size) *sharing_domain_size = 9;
+ if (partid) *partid = ia64_sn_sysctl_partition_get(nasid);
+ if (coher) *coher = nasid >> 9;
+ if (reg) *reg = (HUB_L((__u64 *) LOCAL_MMR_ADDR(SH1_SHUB_ID)) & SH_SHUB_ID_NODES_PER_BIT_MASK) >>
+ SH_SHUB_ID_NODES_PER_BIT_SHFT;
return 0;
}
/***** END HACK *******/
@@ -964,9 +1051,14 @@
if (ret_stuff.status < 0)
return ret_stuff.status;
- if (arg1) *arg1 = ret_stuff.v0;
- if (arg2) *arg2 = ret_stuff.v1;
- if (arg3) *arg3 = ret_stuff.v2;
+ if (shubtype) *shubtype = ret_stuff.v0 & 0xff;
+ if (systemsize) *systemsize = (ret_stuff.v0 >> 8) & 0xff;
+ if (sharing_domain_size) *sharing_domain_size = (ret_stuff.v0 >> 16) & 0xff;
+ if (partid) *partid = (ret_stuff.v0 >> 24) & 0xff;
+ if (coher) *coher = (ret_stuff.v0 >> 32) & 0xff;
+ if (reg) *reg = (ret_stuff.v0 >> 40) & 0xff;
+ if (nasid_bitmask) *nasid_bitmask = (ret_stuff.v1 & 0xffff);
+ if (nasid_shift) *nasid_shift = (ret_stuff.v1 >> 16) & 0xff;
return 0;
}
@@ -987,4 +1079,29 @@
return (int) rv.status;
}
+static inline int
+ia64_sn_ioif_get_pci_topology(__u64 rack, __u64 bay, __u64 slot, __u64 slab,
+ __u64 buf, __u64 len)
+{
+ struct ia64_sal_retval rv;
+ SAL_CALL_NOLOCK(rv, SN_SAL_IOIF_GET_PCI_TOPOLOGY,
+ rack, bay, slot, slab, buf, len, 0);
+ return (int) rv.status;
+}
+
+/*
+ * BTE error recovery is implemented in SAL
+ */
+static inline int
+ia64_sn_bte_recovery(nasid_t nasid)
+{
+ struct ia64_sal_retval rv;
+
+ rv.status = 0;
+ SAL_CALL_NOLOCK(rv, SN_SAL_BTE_RECOVER, 0, 0, 0, 0, 0, 0, 0);
+ if (rv.status == SALRET_NOT_IMPLEMENTED)
+ return 0;
+ return (int) rv.status;
+}
+
#endif /* _ASM_IA64_SN_SN_SAL_H */
Added: linux-libc-headers/trunk/include/asm-ia64/sn/tioca.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/asm-ia64/sn/tioca.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,596 @@
+#ifndef _ASM_IA64_SN_TIO_TIOCA_H
+#define _ASM_IA64_SN_TIO_TIOCA_H
+
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (c) 2003-2005 Silicon Graphics, Inc. All rights reserved.
+ */
+
+
+#define TIOCA_PART_NUM 0xE020
+#define TIOCA_MFGR_NUM 0x24
+#define TIOCA_REV_A 0x1
+
+/*
+ * Register layout for TIO:CA. See below for bitmasks for each register.
+ */
+
+struct tioca {
+ uint64_t ca_id; /* 0x000000 */
+ uint64_t ca_control1; /* 0x000008 */
+ uint64_t ca_control2; /* 0x000010 */
+ uint64_t ca_status1; /* 0x000018 */
+ uint64_t ca_status2; /* 0x000020 */
+ uint64_t ca_gart_aperature; /* 0x000028 */
+ uint64_t ca_gfx_detach; /* 0x000030 */
+ uint64_t ca_inta_dest_addr; /* 0x000038 */
+ uint64_t ca_intb_dest_addr; /* 0x000040 */
+ uint64_t ca_err_int_dest_addr; /* 0x000048 */
+ uint64_t ca_int_status; /* 0x000050 */
+ uint64_t ca_int_status_alias; /* 0x000058 */
+ uint64_t ca_mult_error; /* 0x000060 */
+ uint64_t ca_mult_error_alias; /* 0x000068 */
+ uint64_t ca_first_error; /* 0x000070 */
+ uint64_t ca_int_mask; /* 0x000078 */
+ uint64_t ca_crm_pkterr_type; /* 0x000080 */
+ uint64_t ca_crm_pkterr_type_alias; /* 0x000088 */
+ uint64_t ca_crm_ct_error_detail_1; /* 0x000090 */
+ uint64_t ca_crm_ct_error_detail_2; /* 0x000098 */
+ uint64_t ca_crm_tnumto; /* 0x0000A0 */
+ uint64_t ca_gart_err; /* 0x0000A8 */
+ uint64_t ca_pcierr_type; /* 0x0000B0 */
+ uint64_t ca_pcierr_addr; /* 0x0000B8 */
+
+ uint64_t ca_pad_0000C0[3]; /* 0x0000{C0..D0} */
+
+ uint64_t ca_pci_rd_buf_flush; /* 0x0000D8 */
+ uint64_t ca_pci_dma_addr_extn; /* 0x0000E0 */
+ uint64_t ca_agp_dma_addr_extn; /* 0x0000E8 */
+ uint64_t ca_force_inta; /* 0x0000F0 */
+ uint64_t ca_force_intb; /* 0x0000F8 */
+ uint64_t ca_debug_vector_sel; /* 0x000100 */
+ uint64_t ca_debug_mux_core_sel; /* 0x000108 */
+ uint64_t ca_debug_mux_pci_sel; /* 0x000110 */
+ uint64_t ca_debug_domain_sel; /* 0x000118 */
+
+ uint64_t ca_pad_000120[28]; /* 0x0001{20..F8} */
+
+ uint64_t ca_gart_ptr_table; /* 0x200 */
+ uint64_t ca_gart_tlb_addr[8]; /* 0x2{08..40} */
+};
+
+/*
+ * Mask/shift definitions for TIO:CA registers. The convention here is
+ * to mainly use the names as they appear in the "TIO AEGIS Programmers'
+ * Reference" with a CA_ prefix added. Some exceptions were made to fix
+ * duplicate field names or to generalize fields that are common to
+ * different registers (ca_debug_mux_core_sel and ca_debug_mux_pci_sel for
+ * example).
+ *
+ * Fields consisting of a single bit have a single #define have a single
+ * macro declaration to mask the bit. Fields consisting of multiple bits
+ * have two declarations: one to mask the proper bits in a register, and
+ * a second with the suffix "_SHFT" to identify how far the mask needs to
+ * be shifted right to get its base value.
+ */
+
+/* ==== ca_control1 */
+#define CA_SYS_BIG_END (1ull << 0)
+#define CA_DMA_AGP_SWAP (1ull << 1)
+#define CA_DMA_PCI_SWAP (1ull << 2)
+#define CA_PIO_IO_SWAP (1ull << 3)
+#define CA_PIO_MEM_SWAP (1ull << 4)
+#define CA_GFX_WR_SWAP (1ull << 5)
+#define CA_AGP_FW_ENABLE (1ull << 6)
+#define CA_AGP_CAL_CYCLE (0x7ull << 7)
+#define CA_AGP_CAL_CYCLE_SHFT 7
+#define CA_AGP_CAL_PRSCL_BYP (1ull << 10)
+#define CA_AGP_INIT_CAL_ENB (1ull << 11)
+#define CA_INJ_ADDR_PERR (1ull << 12)
+#define CA_INJ_DATA_PERR (1ull << 13)
+ /* bits 15:14 unused */
+#define CA_PCIM_IO_NBE_AD (0x7ull << 16)
+#define CA_PCIM_IO_NBE_AD_SHFT 16
+#define CA_PCIM_FAST_BTB_ENB (1ull << 19)
+ /* bits 23:20 unused */
+#define CA_PIO_ADDR_OFFSET (0xffull << 24)
+#define CA_PIO_ADDR_OFFSET_SHFT 24
+ /* bits 35:32 unused */
+#define CA_AGPDMA_OP_COMBDELAY (0x1full << 36)
+#define CA_AGPDMA_OP_COMBDELAY_SHFT 36
+ /* bit 41 unused */
+#define CA_AGPDMA_OP_ENB_COMBDELAY (1ull << 42)
+#define CA_PCI_INT_LPCNT (0xffull << 44)
+#define CA_PCI_INT_LPCNT_SHFT 44
+ /* bits 63:52 unused */
+
+/* ==== ca_control2 */
+#define CA_AGP_LATENCY_TO (0xffull << 0)
+#define CA_AGP_LATENCY_TO_SHFT 0
+#define CA_PCI_LATENCY_TO (0xffull << 8)
+#define CA_PCI_LATENCY_TO_SHFT 8
+#define CA_PCI_MAX_RETRY (0x3ffull << 16)
+#define CA_PCI_MAX_RETRY_SHFT 16
+ /* bits 27:26 unused */
+#define CA_RT_INT_EN (0x3ull << 28)
+#define CA_RT_INT_EN_SHFT 28
+#define CA_MSI_INT_ENB (1ull << 30)
+#define CA_PCI_ARB_ERR_ENB (1ull << 31)
+#define CA_GART_MEM_PARAM (0x3ull << 32)
+#define CA_GART_MEM_PARAM_SHFT 32
+#define CA_GART_RD_PREFETCH_ENB (1ull << 34)
+#define CA_GART_WR_PREFETCH_ENB (1ull << 35)
+#define CA_GART_FLUSH_TLB (1ull << 36)
+ /* bits 39:37 unused */
+#define CA_CRM_TNUMTO_PERIOD (0x1fffull << 40)
+#define CA_CRM_TNUMTO_PERIOD_SHFT 40
+ /* bits 55:53 unused */
+#define CA_CRM_TNUMTO_ENB (1ull << 56)
+#define CA_CRM_PRESCALER_BYP (1ull << 57)
+ /* bits 59:58 unused */
+#define CA_CRM_MAX_CREDIT (0x7ull << 60)
+#define CA_CRM_MAX_CREDIT_SHFT 60
+ /* bit 63 unused */
+
+/* ==== ca_status1 */
+#define CA_CORELET_ID (0x3ull << 0)
+#define CA_CORELET_ID_SHFT 0
+#define CA_INTA_N (1ull << 2)
+#define CA_INTB_N (1ull << 3)
+#define CA_CRM_CREDIT_AVAIL (0x7ull << 4)
+#define CA_CRM_CREDIT_AVAIL_SHFT 4
+ /* bit 7 unused */
+#define CA_CRM_SPACE_AVAIL (0x7full << 8)
+#define CA_CRM_SPACE_AVAIL_SHFT 8
+ /* bit 15 unused */
+#define CA_GART_TLB_VAL (0xffull << 16)
+#define CA_GART_TLB_VAL_SHFT 16
+ /* bits 63:24 unused */
+
+/* ==== ca_status2 */
+#define CA_GFX_CREDIT_AVAIL (0xffull << 0)
+#define CA_GFX_CREDIT_AVAIL_SHFT 0
+#define CA_GFX_OPQ_AVAIL (0xffull << 8)
+#define CA_GFX_OPQ_AVAIL_SHFT 8
+#define CA_GFX_WRBUFF_AVAIL (0xffull << 16)
+#define CA_GFX_WRBUFF_AVAIL_SHFT 16
+#define CA_ADMA_OPQ_AVAIL (0xffull << 24)
+#define CA_ADMA_OPQ_AVAIL_SHFT 24
+#define CA_ADMA_WRBUFF_AVAIL (0xffull << 32)
+#define CA_ADMA_WRBUFF_AVAIL_SHFT 32
+#define CA_ADMA_RDBUFF_AVAIL (0x7full << 40)
+#define CA_ADMA_RDBUFF_AVAIL_SHFT 40
+#define CA_PCI_PIO_OP_STAT (1ull << 47)
+#define CA_PDMA_OPQ_AVAIL (0xfull << 48)
+#define CA_PDMA_OPQ_AVAIL_SHFT 48
+#define CA_PDMA_WRBUFF_AVAIL (0xfull << 52)
+#define CA_PDMA_WRBUFF_AVAIL_SHFT 52
+#define CA_PDMA_RDBUFF_AVAIL (0x3ull << 56)
+#define CA_PDMA_RDBUFF_AVAIL_SHFT 56
+ /* bits 63:58 unused */
+
+/* ==== ca_gart_aperature */
+#define CA_GART_AP_ENB_AGP (1ull << 0)
+#define CA_GART_PAGE_SIZE (1ull << 1)
+#define CA_GART_AP_ENB_PCI (1ull << 2)
+ /* bits 11:3 unused */
+#define CA_GART_AP_SIZE (0x3ffull << 12)
+#define CA_GART_AP_SIZE_SHFT 12
+#define CA_GART_AP_BASE (0x3ffffffffffull << 22)
+#define CA_GART_AP_BASE_SHFT 22
+
+/* ==== ca_inta_dest_addr
+ ==== ca_intb_dest_addr
+ ==== ca_err_int_dest_addr */
+ /* bits 2:0 unused */
+#define CA_INT_DEST_ADDR (0x7ffffffffffffull << 3)
+#define CA_INT_DEST_ADDR_SHFT 3
+ /* bits 55:54 unused */
+#define CA_INT_DEST_VECT (0xffull << 56)
+#define CA_INT_DEST_VECT_SHFT 56
+
+/* ==== ca_int_status */
+/* ==== ca_int_status_alias */
+/* ==== ca_mult_error */
+/* ==== ca_mult_error_alias */
+/* ==== ca_first_error */
+/* ==== ca_int_mask */
+#define CA_PCI_ERR (1ull << 0)
+ /* bits 3:1 unused */
+#define CA_GART_FETCH_ERR (1ull << 4)
+#define CA_GFX_WR_OVFLW (1ull << 5)
+#define CA_PIO_REQ_OVFLW (1ull << 6)
+#define CA_CRM_PKTERR (1ull << 7)
+#define CA_CRM_DVERR (1ull << 8)
+#define CA_TNUMTO (1ull << 9)
+#define CA_CXM_RSP_CRED_OVFLW (1ull << 10)
+#define CA_CXM_REQ_CRED_OVFLW (1ull << 11)
+#define CA_PIO_INVALID_ADDR (1ull << 12)
+#define CA_PCI_ARB_TO (1ull << 13)
+#define CA_AGP_REQ_OFLOW (1ull << 14)
+#define CA_SBA_TYPE1_ERR (1ull << 15)
+ /* bit 16 unused */
+#define CA_INTA (1ull << 17)
+#define CA_INTB (1ull << 18)
+#define CA_MULT_INTA (1ull << 19)
+#define CA_MULT_INTB (1ull << 20)
+#define CA_GFX_CREDIT_OVFLW (1ull << 21)
+ /* bits 63:22 unused */
+
+/* ==== ca_crm_pkterr_type */
+/* ==== ca_crm_pkterr_type_alias */
+#define CA_CRM_PKTERR_SBERR_HDR (1ull << 0)
+#define CA_CRM_PKTERR_DIDN (1ull << 1)
+#define CA_CRM_PKTERR_PACTYPE (1ull << 2)
+#define CA_CRM_PKTERR_INV_TNUM (1ull << 3)
+#define CA_CRM_PKTERR_ADDR_RNG (1ull << 4)
+#define CA_CRM_PKTERR_ADDR_ALGN (1ull << 5)
+#define CA_CRM_PKTERR_HDR_PARAM (1ull << 6)
+#define CA_CRM_PKTERR_CW_ERR (1ull << 7)
+#define CA_CRM_PKTERR_SBERR_NH (1ull << 8)
+#define CA_CRM_PKTERR_EARLY_TERM (1ull << 9)
+#define CA_CRM_PKTERR_EARLY_TAIL (1ull << 10)
+#define CA_CRM_PKTERR_MSSNG_TAIL (1ull << 11)
+#define CA_CRM_PKTERR_MSSNG_HDR (1ull << 12)
+ /* bits 15:13 unused */
+#define CA_FIRST_CRM_PKTERR_SBERR_HDR (1ull << 16)
+#define CA_FIRST_CRM_PKTERR_DIDN (1ull << 17)
+#define CA_FIRST_CRM_PKTERR_PACTYPE (1ull << 18)
+#define CA_FIRST_CRM_PKTERR_INV_TNUM (1ull << 19)
+#define CA_FIRST_CRM_PKTERR_ADDR_RNG (1ull << 20)
+#define CA_FIRST_CRM_PKTERR_ADDR_ALGN (1ull << 21)
+#define CA_FIRST_CRM_PKTERR_HDR_PARAM (1ull << 22)
+#define CA_FIRST_CRM_PKTERR_CW_ERR (1ull << 23)
+#define CA_FIRST_CRM_PKTERR_SBERR_NH (1ull << 24)
+#define CA_FIRST_CRM_PKTERR_EARLY_TERM (1ull << 25)
+#define CA_FIRST_CRM_PKTERR_EARLY_TAIL (1ull << 26)
+#define CA_FIRST_CRM_PKTERR_MSSNG_TAIL (1ull << 27)
+#define CA_FIRST_CRM_PKTERR_MSSNG_HDR (1ull << 28)
+ /* bits 63:29 unused */
+
+/* ==== ca_crm_ct_error_detail_1 */
+#define CA_PKT_TYPE (0xfull << 0)
+#define CA_PKT_TYPE_SHFT 0
+#define CA_SRC_ID (0x3ull << 4)
+#define CA_SRC_ID_SHFT 4
+#define CA_DATA_SZ (0x3ull << 6)
+#define CA_DATA_SZ_SHFT 6
+#define CA_TNUM (0xffull << 8)
+#define CA_TNUM_SHFT 8
+#define CA_DW_DATA_EN (0xffull << 16)
+#define CA_DW_DATA_EN_SHFT 16
+#define CA_GFX_CRED (0xffull << 24)
+#define CA_GFX_CRED_SHFT 24
+#define CA_MEM_RD_PARAM (0x3ull << 32)
+#define CA_MEM_RD_PARAM_SHFT 32
+#define CA_PIO_OP (1ull << 34)
+#define CA_CW_ERR (1ull << 35)
+ /* bits 62:36 unused */
+#define CA_VALID (1ull << 63)
+
+/* ==== ca_crm_ct_error_detail_2 */
+ /* bits 2:0 unused */
+#define CA_PKT_ADDR (0x1fffffffffffffull << 3)
+#define CA_PKT_ADDR_SHFT 3
+ /* bits 63:56 unused */
+
+/* ==== ca_crm_tnumto */
+#define CA_CRM_TNUMTO_VAL (0xffull << 0)
+#define CA_CRM_TNUMTO_VAL_SHFT 0
+#define CA_CRM_TNUMTO_WR (1ull << 8)
+ /* bits 63:9 unused */
+
+/* ==== ca_gart_err */
+#define CA_GART_ERR_SOURCE (0x3ull << 0)
+#define CA_GART_ERR_SOURCE_SHFT 0
+ /* bits 3:2 unused */
+#define CA_GART_ERR_ADDR (0xfffffffffull << 4)
+#define CA_GART_ERR_ADDR_SHFT 4
+ /* bits 63:40 unused */
+
+/* ==== ca_pcierr_type */
+#define CA_PCIERR_DATA (0xffffffffull << 0)
+#define CA_PCIERR_DATA_SHFT 0
+#define CA_PCIERR_ENB (0xfull << 32)
+#define CA_PCIERR_ENB_SHFT 32
+#define CA_PCIERR_CMD (0xfull << 36)
+#define CA_PCIERR_CMD_SHFT 36
+#define CA_PCIERR_A64 (1ull << 40)
+#define CA_PCIERR_SLV_SERR (1ull << 41)
+#define CA_PCIERR_SLV_WR_PERR (1ull << 42)
+#define CA_PCIERR_SLV_RD_PERR (1ull << 43)
+#define CA_PCIERR_MST_SERR (1ull << 44)
+#define CA_PCIERR_MST_WR_PERR (1ull << 45)
+#define CA_PCIERR_MST_RD_PERR (1ull << 46)
+#define CA_PCIERR_MST_MABT (1ull << 47)
+#define CA_PCIERR_MST_TABT (1ull << 48)
+#define CA_PCIERR_MST_RETRY_TOUT (1ull << 49)
+
+#define CA_PCIERR_TYPES \
+ (CA_PCIERR_A64|CA_PCIERR_SLV_SERR| \
+ CA_PCIERR_SLV_WR_PERR|CA_PCIERR_SLV_RD_PERR| \
+ CA_PCIERR_MST_SERR|CA_PCIERR_MST_WR_PERR|CA_PCIERR_MST_RD_PERR| \
+ CA_PCIERR_MST_MABT|CA_PCIERR_MST_TABT|CA_PCIERR_MST_RETRY_TOUT)
+
+ /* bits 63:50 unused */
+
+/* ==== ca_pci_dma_addr_extn */
+#define CA_UPPER_NODE_OFFSET (0x3full << 0)
+#define CA_UPPER_NODE_OFFSET_SHFT 0
+ /* bits 7:6 unused */
+#define CA_CHIPLET_ID (0x3ull << 8)
+#define CA_CHIPLET_ID_SHFT 8
+ /* bits 11:10 unused */
+#define CA_PCI_DMA_NODE_ID (0xffffull << 12)
+#define CA_PCI_DMA_NODE_ID_SHFT 12
+ /* bits 27:26 unused */
+#define CA_PCI_DMA_PIO_MEM_TYPE (1ull << 28)
+ /* bits 63:29 unused */
+
+
+/* ==== ca_agp_dma_addr_extn */
+ /* bits 19:0 unused */
+#define CA_AGP_DMA_NODE_ID (0xffffull << 20)
+#define CA_AGP_DMA_NODE_ID_SHFT 20
+ /* bits 27:26 unused */
+#define CA_AGP_DMA_PIO_MEM_TYPE (1ull << 28)
+ /* bits 63:29 unused */
+
+/* ==== ca_debug_vector_sel */
+#define CA_DEBUG_MN_VSEL (0xfull << 0)
+#define CA_DEBUG_MN_VSEL_SHFT 0
+#define CA_DEBUG_PP_VSEL (0xfull << 4)
+#define CA_DEBUG_PP_VSEL_SHFT 4
+#define CA_DEBUG_GW_VSEL (0xfull << 8)
+#define CA_DEBUG_GW_VSEL_SHFT 8
+#define CA_DEBUG_GT_VSEL (0xfull << 12)
+#define CA_DEBUG_GT_VSEL_SHFT 12
+#define CA_DEBUG_PD_VSEL (0xfull << 16)
+#define CA_DEBUG_PD_VSEL_SHFT 16
+#define CA_DEBUG_AD_VSEL (0xfull << 20)
+#define CA_DEBUG_AD_VSEL_SHFT 20
+#define CA_DEBUG_CX_VSEL (0xfull << 24)
+#define CA_DEBUG_CX_VSEL_SHFT 24
+#define CA_DEBUG_CR_VSEL (0xfull << 28)
+#define CA_DEBUG_CR_VSEL_SHFT 28
+#define CA_DEBUG_BA_VSEL (0xfull << 32)
+#define CA_DEBUG_BA_VSEL_SHFT 32
+#define CA_DEBUG_PE_VSEL (0xfull << 36)
+#define CA_DEBUG_PE_VSEL_SHFT 36
+#define CA_DEBUG_BO_VSEL (0xfull << 40)
+#define CA_DEBUG_BO_VSEL_SHFT 40
+#define CA_DEBUG_BI_VSEL (0xfull << 44)
+#define CA_DEBUG_BI_VSEL_SHFT 44
+#define CA_DEBUG_AS_VSEL (0xfull << 48)
+#define CA_DEBUG_AS_VSEL_SHFT 48
+#define CA_DEBUG_PS_VSEL (0xfull << 52)
+#define CA_DEBUG_PS_VSEL_SHFT 52
+#define CA_DEBUG_PM_VSEL (0xfull << 56)
+#define CA_DEBUG_PM_VSEL_SHFT 56
+ /* bits 63:60 unused */
+
+/* ==== ca_debug_mux_core_sel */
+/* ==== ca_debug_mux_pci_sel */
+#define CA_DEBUG_MSEL0 (0x7ull << 0)
+#define CA_DEBUG_MSEL0_SHFT 0
+ /* bit 3 unused */
+#define CA_DEBUG_NSEL0 (0x7ull << 4)
+#define CA_DEBUG_NSEL0_SHFT 4
+ /* bit 7 unused */
+#define CA_DEBUG_MSEL1 (0x7ull << 8)
+#define CA_DEBUG_MSEL1_SHFT 8
+ /* bit 11 unused */
+#define CA_DEBUG_NSEL1 (0x7ull << 12)
+#define CA_DEBUG_NSEL1_SHFT 12
+ /* bit 15 unused */
+#define CA_DEBUG_MSEL2 (0x7ull << 16)
+#define CA_DEBUG_MSEL2_SHFT 16
+ /* bit 19 unused */
+#define CA_DEBUG_NSEL2 (0x7ull << 20)
+#define CA_DEBUG_NSEL2_SHFT 20
+ /* bit 23 unused */
+#define CA_DEBUG_MSEL3 (0x7ull << 24)
+#define CA_DEBUG_MSEL3_SHFT 24
+ /* bit 27 unused */
+#define CA_DEBUG_NSEL3 (0x7ull << 28)
+#define CA_DEBUG_NSEL3_SHFT 28
+ /* bit 31 unused */
+#define CA_DEBUG_MSEL4 (0x7ull << 32)
+#define CA_DEBUG_MSEL4_SHFT 32
+ /* bit 35 unused */
+#define CA_DEBUG_NSEL4 (0x7ull << 36)
+#define CA_DEBUG_NSEL4_SHFT 36
+ /* bit 39 unused */
+#define CA_DEBUG_MSEL5 (0x7ull << 40)
+#define CA_DEBUG_MSEL5_SHFT 40
+ /* bit 43 unused */
+#define CA_DEBUG_NSEL5 (0x7ull << 44)
+#define CA_DEBUG_NSEL5_SHFT 44
+ /* bit 47 unused */
+#define CA_DEBUG_MSEL6 (0x7ull << 48)
+#define CA_DEBUG_MSEL6_SHFT 48
+ /* bit 51 unused */
+#define CA_DEBUG_NSEL6 (0x7ull << 52)
+#define CA_DEBUG_NSEL6_SHFT 52
+ /* bit 55 unused */
+#define CA_DEBUG_MSEL7 (0x7ull << 56)
+#define CA_DEBUG_MSEL7_SHFT 56
+ /* bit 59 unused */
+#define CA_DEBUG_NSEL7 (0x7ull << 60)
+#define CA_DEBUG_NSEL7_SHFT 60
+ /* bit 63 unused */
+
+
+/* ==== ca_debug_domain_sel */
+#define CA_DEBUG_DOMAIN_L (1ull << 0)
+#define CA_DEBUG_DOMAIN_H (1ull << 1)
+ /* bits 63:2 unused */
+
+/* ==== ca_gart_ptr_table */
+#define CA_GART_PTR_VAL (1ull << 0)
+ /* bits 11:1 unused */
+#define CA_GART_PTR_ADDR (0xfffffffffffull << 12)
+#define CA_GART_PTR_ADDR_SHFT 12
+ /* bits 63:56 unused */
+
+/* ==== ca_gart_tlb_addr[0-7] */
+#define CA_GART_TLB_ADDR (0xffffffffffffffull << 0)
+#define CA_GART_TLB_ADDR_SHFT 0
+ /* bits 62:56 unused */
+#define CA_GART_TLB_ENTRY_VAL (1ull << 63)
+
+/*
+ * PIO address space ranges for TIO:CA
+ */
+
+/* CA internal registers */
+#define CA_PIO_ADMIN 0x00000000
+#define CA_PIO_ADMIN_LEN 0x00010000
+
+/* GFX Write Buffer - Diagnostics */
+#define CA_PIO_GFX 0x00010000
+#define CA_PIO_GFX_LEN 0x00010000
+
+/* AGP DMA Write Buffer - Diagnostics */
+#define CA_PIO_AGP_DMAWRITE 0x00020000
+#define CA_PIO_AGP_DMAWRITE_LEN 0x00010000
+
+/* AGP DMA READ Buffer - Diagnostics */
+#define CA_PIO_AGP_DMAREAD 0x00030000
+#define CA_PIO_AGP_DMAREAD_LEN 0x00010000
+
+/* PCI Config Type 0 */
+#define CA_PIO_PCI_TYPE0_CONFIG 0x01000000
+#define CA_PIO_PCI_TYPE0_CONFIG_LEN 0x01000000
+
+/* PCI Config Type 1 */
+#define CA_PIO_PCI_TYPE1_CONFIG 0x02000000
+#define CA_PIO_PCI_TYPE1_CONFIG_LEN 0x01000000
+
+/* PCI I/O Cycles - mapped to PCI Address 0x00000000-0x04ffffff */
+#define CA_PIO_PCI_IO 0x03000000
+#define CA_PIO_PCI_IO_LEN 0x05000000
+
+/* PCI MEM Cycles - mapped to PCI with CA_PIO_ADDR_OFFSET of ca_control1 */
+/* use Fast Write if enabled and coretalk packet type is a GFX request */
+#define CA_PIO_PCI_MEM_OFFSET 0x08000000
+#define CA_PIO_PCI_MEM_OFFSET_LEN 0x08000000
+
+/* PCI MEM Cycles - mapped to PCI Address 0x00000000-0xbfffffff */
+/* use Fast Write if enabled and coretalk packet type is a GFX request */
+#define CA_PIO_PCI_MEM 0x40000000
+#define CA_PIO_PCI_MEM_LEN 0xc0000000
+
+/*
+ * DMA space
+ *
+ * The CA aperature (ie. bus address range) mapped by the GART is segmented into
+ * two parts. The lower portion of the aperature is used for mapping 32 bit
+ * PCI addresses which are managed by the dma interfaces in this file. The
+ * upper poprtion of the aperature is used for mapping 48 bit AGP addresses.
+ * The AGP portion of the aperature is managed by the agpgart_be.c driver
+ * in drivers/linux/agp. There are ca-specific hooks in that driver to
+ * manipulate the gart, but management of the AGP portion of the aperature
+ * is the responsibility of that driver.
+ *
+ * CA allows three main types of DMA mapping:
+ *
+ * PCI 64-bit Managed by this driver
+ * PCI 32-bit Managed by this driver
+ * AGP 48-bit Managed by hooks in the /dev/agpgart driver
+ *
+ * All of the above can optionally be remapped through the GART. The following
+ * table lists the combinations of addressing types and GART remapping that
+ * is currently supported by the driver (h/w supports all, s/w limits this):
+ *
+ * PCI64 PCI32 AGP48
+ * GART no yes yes
+ * Direct yes yes no
+ *
+ * GART remapping of PCI64 is not done because there is no need to. The
+ * 64 bit PCI address holds all of the information necessary to target any
+ * memory in the system.
+ *
+ * AGP48 is always mapped through the GART. Management of the AGP48 portion
+ * of the aperature is the responsibility of code in the agpgart_be driver.
+ *
+ * The non-64 bit bus address space will currently be partitioned like this:
+ *
+ * 0xffff_ffff_ffff +--------
+ * | AGP48 direct
+ * | Space managed by this driver
+ * CA_AGP_DIRECT_BASE +--------
+ * | AGP GART mapped (gfx aperature)
+ * | Space managed by /dev/agpgart driver
+ * | This range is exposed to the agpgart
+ * | driver as the "graphics aperature"
+ * CA_AGP_MAPPED_BASE +-----
+ * | PCI GART mapped
+ * | Space managed by this driver
+ * CA_PCI32_MAPPED_BASE +----
+ * | PCI32 direct
+ * | Space managed by this driver
+ * 0xC000_0000 +--------
+ * (CA_PCI32_DIRECT_BASE)
+ *
+ * The bus address range CA_PCI32_MAPPED_BASE through CA_AGP_DIRECT_BASE
+ * is what we call the CA aperature. Addresses falling in this range will
+ * be remapped using the GART.
+ *
+ * The bus address range CA_AGP_MAPPED_BASE through CA_AGP_DIRECT_BASE
+ * is what we call the graphics aperature. This is a subset of the CA
+ * aperature and is under the control of the agpgart_be driver.
+ *
+ * CA_PCI32_MAPPED_BASE, CA_AGP_MAPPED_BASE, and CA_AGP_DIRECT_BASE are
+ * somewhat arbitrary values. The known constraints on choosing these is:
+ *
+ * 1) CA_AGP_DIRECT_BASE-CA_PCI32_MAPPED_BASE+1 (the CA aperature size)
+ * must be one of the values supported by the ca_gart_aperature register.
+ * Currently valid values are: 4MB through 4096MB in powers of 2 increments
+ *
+ * 2) CA_AGP_DIRECT_BASE-CA_AGP_MAPPED_BASE+1 (the gfx aperature size)
+ * must be in MB units since that's what the agpgart driver assumes.
+ */
+
+/*
+ * Define Bus DMA ranges. These are configurable (see constraints above)
+ * and will probably need tuning based on experience.
+ */
+
+
+/*
+ * 11/24/03
+ * CA has an addressing glitch w.r.t. PCI direct 32 bit DMA that makes it
+ * generally unusable. The problem is that for PCI direct 32
+ * DMA's, all 32 bits of the bus address are used to form the lower 32 bits
+ * of the coretalk address, and coretalk bits 38:32 come from a register.
+ * Since only PCI bus addresses 0xC0000000-0xFFFFFFFF (1GB) are available
+ * for DMA (the rest is allocated to PIO), host node addresses need to be
+ * such that their lower 32 bits fall in the 0xC0000000-0xffffffff range
+ * as well. So there can be no PCI32 direct DMA below 3GB!! For this
+ * reason we set the CA_PCI32_DIRECT_SIZE to 0 which essentially makes
+ * tioca_dma_direct32() a noop but preserves the code flow should this issue
+ * be fixed in a respin.
+ *
+ * For now, all PCI32 DMA's must be mapped through the GART.
+ */
+
+#define CA_PCI32_DIRECT_BASE 0xC0000000UL /* BASE not configurable */
+#define CA_PCI32_DIRECT_SIZE 0x00000000UL /* 0 MB */
+
+#define CA_PCI32_MAPPED_BASE 0xC0000000UL
+#define CA_PCI32_MAPPED_SIZE 0x40000000UL /* 2GB */
+
+#define CA_AGP_MAPPED_BASE 0x80000000UL
+#define CA_AGP_MAPPED_SIZE 0x40000000UL /* 2GB */
+
+#define CA_AGP_DIRECT_BASE 0x40000000UL /* 2GB */
+#define CA_AGP_DIRECT_SIZE 0x40000000UL
+
+#define CA_APERATURE_BASE (CA_AGP_MAPPED_BASE)
+#define CA_APERATURE_SIZE (CA_AGP_MAPPED_SIZE+CA_PCI32_MAPPED_SIZE)
+
+#endif /* _ASM_IA64_SN_TIO_TIOCA_H */
Added: linux-libc-headers/trunk/include/asm-ia64/sn/tioca_provider.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/asm-ia64/sn/tioca_provider.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,206 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (c) 2003-2005 Silicon Graphics, Inc. All rights reserved.
+ */
+
+#ifndef _ASM_IA64_SN_TIO_CA_AGP_PROVIDER_H
+#define _ASM_IA64_SN_TIO_CA_AGP_PROVIDER_H
+
+#include <asm/sn/tioca.h>
+
+/*
+ * WAR enables
+ * Defines for individual WARs. Each is a bitmask of applicable
+ * part revision numbers. (1 << 1) == rev A, (1 << 2) == rev B,
+ * (3 << 1) == (rev A or rev B), etc
+ */
+
+#define TIOCA_WAR_ENABLED(pv, tioca_common) \
+ ((1 << tioca_common->ca_rev) & pv)
+
+ /* TIO:ICE:FRZ:Freezer loses a PIO data ucred on PIO RD RSP with CW error */
+#define PV907908 (1 << 1)
+ /* ATI config space problems after BIOS execution starts */
+#define PV908234 (1 << 1)
+ /* CA:AGPDMA write request data mismatch with ABC1CL merge */
+#define PV895469 (1 << 1)
+ /* TIO:CA TLB invalidate of written GART entries possibly not occuring in CA*/
+#define PV910244 (1 << 1)
+
+struct tioca_dmamap{
+ struct list_head cad_list; /* headed by ca_list */
+
+ dma_addr_t cad_dma_addr; /* Linux dma handle */
+ uint cad_gart_entry; /* start entry in ca_gart_pagemap */
+ uint cad_gart_size; /* #entries for this map */
+};
+
+/*
+ * Kernel only fields. Prom may look at this stuff for debugging only.
+ * Access this structure through the ca_kernel_private ptr.
+ */
+
+struct tioca_common ;
+
+struct tioca_kernel {
+ struct tioca_common *ca_common; /* tioca this belongs to */
+ struct list_head ca_list; /* list of all ca's */
+ struct list_head ca_dmamaps;
+ spinlock_t ca_lock; /* Kernel lock */
+ cnodeid_t ca_closest_node;
+ struct list_head *ca_devices; /* bus->devices */
+
+ /*
+ * General GART stuff
+ */
+ uint64_t ca_ap_size; /* size of aperature in bytes */
+ uint32_t ca_gart_entries; /* # uint64_t entries in gart */
+ uint32_t ca_ap_pagesize; /* aperature page size in bytes */
+ uint64_t ca_ap_bus_base; /* bus address of CA aperature */
+ uint64_t ca_gart_size; /* gart size in bytes */
+ uint64_t *ca_gart; /* gart table vaddr */
+ uint64_t ca_gart_coretalk_addr; /* gart coretalk addr */
+ uint8_t ca_gart_iscoherent; /* used in tioca_tlbflush */
+
+ /* PCI GART convenience values */
+ uint64_t ca_pciap_base; /* pci aperature bus base address */
+ uint64_t ca_pciap_size; /* pci aperature size (bytes) */
+ uint64_t ca_pcigart_base; /* gfx GART bus base address */
+ uint64_t *ca_pcigart; /* gfx GART vm address */
+ uint32_t ca_pcigart_entries;
+ uint32_t ca_pcigart_start; /* PCI start index in ca_gart */
+ void *ca_pcigart_pagemap;
+
+ /* AGP GART convenience values */
+ uint64_t ca_gfxap_base; /* gfx aperature bus base address */
+ uint64_t ca_gfxap_size; /* gfx aperature size (bytes) */
+ uint64_t ca_gfxgart_base; /* gfx GART bus base address */
+ uint64_t *ca_gfxgart; /* gfx GART vm address */
+ uint32_t ca_gfxgart_entries;
+ uint32_t ca_gfxgart_start; /* agpgart start index in ca_gart */
+};
+
+/*
+ * Common tioca info shared between kernel and prom
+ *
+ * DO NOT CHANGE THIS STRUCT WITHOUT MAKING CORRESPONDING CHANGES
+ * TO THE PROM VERSION.
+ */
+
+struct tioca_common {
+ struct pcibus_bussoft ca_common; /* common pciio header */
+
+ uint32_t ca_rev;
+ uint32_t ca_closest_nasid;
+
+ uint64_t ca_prom_private;
+ uint64_t ca_kernel_private;
+};
+
+/**
+ * tioca_paddr_to_gart - Convert an SGI coretalk address to a CA GART entry
+ * @paddr: page address to convert
+ *
+ * Convert a system [coretalk] address to a GART entry. GART entries are
+ * formed using the following:
+ *
+ * data = ( (1<<63) | ( (REMAP_NODE_ID << 40) | (MD_CHIPLET_ID << 38) |
+ * (REMAP_SYS_ADDR) ) >> 12 )
+ *
+ * DATA written to 1 GART TABLE Entry in system memory is remapped system
+ * addr for 1 page
+ *
+ * The data is for coretalk address format right shifted 12 bits with a
+ * valid bit.
+ *
+ * GART_TABLE_ENTRY [ 25:0 ] -- REMAP_SYS_ADDRESS[37:12].
+ * GART_TABLE_ENTRY [ 27:26 ] -- SHUB MD chiplet id.
+ * GART_TABLE_ENTRY [ 41:28 ] -- REMAP_NODE_ID.
+ * GART_TABLE_ENTRY [ 63 ] -- Valid Bit
+ */
+static inline __u64
+tioca_paddr_to_gart(unsigned long paddr)
+{
+ /*
+ * We are assuming right now that paddr already has the correct
+ * format since the address from xtalk_dmaXXX should already have
+ * NODE_ID, CHIPLET_ID, and SYS_ADDR in the correct locations.
+ */
+
+ return ((paddr) >> 12) | (1UL << 63);
+}
+
+/**
+ * tioca_physpage_to_gart - Map a host physical page for SGI CA based DMA
+ * @page_addr: system page address to map
+ */
+
+static inline unsigned long
+tioca_physpage_to_gart(uint64_t page_addr)
+{
+ uint64_t coretalk_addr;
+
+ coretalk_addr = PHYS_TO_TIODMA(page_addr);
+ if (!coretalk_addr) {
+ return 0;
+ }
+
+ return tioca_paddr_to_gart(coretalk_addr);
+}
+
+/**
+ * tioca_tlbflush - invalidate cached SGI CA GART TLB entries
+ * @tioca_kernel: CA context
+ *
+ * Invalidate tlb entries for a given CA GART. Main complexity is to account
+ * for revA bug.
+ */
+static inline void
+tioca_tlbflush(struct tioca_kernel *tioca_kernel)
+{
+ volatile uint64_t tmp;
+ volatile struct tioca *ca_base;
+ struct tioca_common *tioca_common;
+
+ tioca_common = tioca_kernel->ca_common;
+ ca_base = (struct tioca *)tioca_common->ca_common.bs_base;
+
+ /*
+ * Explicit flushes not needed if GART is in cached mode
+ */
+ if (tioca_kernel->ca_gart_iscoherent) {
+ if (TIOCA_WAR_ENABLED(PV910244, tioca_common)) {
+ /*
+ * PV910244: RevA CA needs explicit flushes.
+ * Need to put GART into uncached mode before
+ * flushing otherwise the explicit flush is ignored.
+ *
+ * Alternate WAR would be to leave GART cached and
+ * touch every CL aligned GART entry.
+ */
+
+ ca_base->ca_control2 &= ~(CA_GART_MEM_PARAM);
+ ca_base->ca_control2 |= CA_GART_FLUSH_TLB;
+ ca_base->ca_control2 |=
+ (0x2ull << CA_GART_MEM_PARAM_SHFT);
+ tmp = ca_base->ca_control2;
+ }
+
+ return;
+ }
+
+ /*
+ * Gart in uncached mode ... need an explicit flush.
+ */
+
+ ca_base->ca_control2 |= CA_GART_FLUSH_TLB;
+ tmp = ca_base->ca_control2;
+}
+
+extern uint32_t tioca_gart_found;
+extern int tioca_init_provider(void);
+extern void tioca_fastwrite_enable(struct tioca_kernel *tioca_kern);
+#endif /* _ASM_IA64_SN_TIO_CA_AGP_PROVIDER_H */
Modified: linux-libc-headers/trunk/include/asm-ia64/sn/types.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ia64/sn/types.h (original)
+++ linux-libc-headers/trunk/include/asm-ia64/sn/types.h Tue Jul 5 22:58:33 2005
@@ -16,7 +16,8 @@
typedef signed char partid_t; /* partition ID type */
typedef unsigned int moduleid_t; /* user-visible module number type */
typedef unsigned int cmoduleid_t; /* kernel compact module id type */
-typedef signed char slabid_t;
+typedef unsigned char slotid_t; /* slot (blade) within module */
+typedef unsigned char slabid_t; /* slab (asic) within slot */
typedef __u64 nic_t;
typedef unsigned long iopaddr_t;
typedef unsigned long paddr_t;
Added: linux-libc-headers/trunk/include/asm-ia64/sn/xp.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/asm-ia64/sn/xp.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,436 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2004-2005 Silicon Graphics, Inc. All rights reserved.
+ */
+
+
+/*
+ * External Cross Partition (XP) structures and defines.
+ */
+
+
+#ifndef _ASM_IA64_SN_XP_H
+#define _ASM_IA64_SN_XP_H
+
+
+#include <linux/version.h>
+#include <linux/cache.h>
+#include <linux/hardirq.h>
+#include <asm/sn/types.h>
+#include <asm/sn/bte.h>
+
+
+#ifdef USE_DBUG_ON
+#define DBUG_ON(condition) BUG_ON(condition)
+#else
+#define DBUG_ON(condition)
+#endif
+
+
+/*
+ * Define the maximum number of logically defined partitions the system
+ * can support. It is constrained by the maximum number of hardware
+ * partitionable regions. The term 'region' in this context refers to the
+ * minimum number of nodes that can comprise an access protection grouping.
+ * The access protection is in regards to memory, IPI and IOI.
+ *
+ * The maximum number of hardware partitionable regions is equal to the
+ * maximum number of nodes in the entire system divided by the minimum number
+ * of nodes that comprise an access protection grouping.
+ */
+#define XP_MAX_PARTITIONS 64
+
+
+/*
+ * Define the number of __u64s required to represent all the C-brick nasids
+ * as a bitmap. The cross-partition kernel modules deal only with
+ * C-brick nasids, thus the need for bitmaps which don't account for
+ * odd-numbered (non C-brick) nasids.
+ */
+#define XP_MAX_PHYSNODE_ID (MAX_PHYSNODE_ID / 2)
+#define XP_NASID_MASK_BYTES ((XP_MAX_PHYSNODE_ID + 7) / 8)
+#define XP_NASID_MASK_WORDS ((XP_MAX_PHYSNODE_ID + 63) / 64)
+
+
+/*
+ * Wrapper for bte_copy() that should it return a failure status will retry
+ * the bte_copy() once in the hope that the failure was due to a temporary
+ * aberration (i.e., the link going down temporarily).
+ *
+ * See bte_copy for definition of the input parameters.
+ *
+ * Note: xp_bte_copy() should never be called while holding a spinlock.
+ */
+static inline bte_result_t
+xp_bte_copy(__u64 src, __u64 dest, __u64 len, __u64 mode, void *notification)
+{
+ bte_result_t ret;
+
+
+ ret = bte_copy(src, dest, len, mode, notification);
+
+ if (ret != BTE_SUCCESS) {
+ if (!in_interrupt()) {
+ cond_resched();
+ }
+ ret = bte_copy(src, dest, len, mode, notification);
+ }
+
+ return ret;
+}
+
+
+/*
+ * XPC establishes channel connections between the local partition and any
+ * other partition that is currently up. Over these channels, kernel-level
+ * `users' can communicate with their counterparts on the other partitions.
+ *
+ * The maxinum number of channels is limited to eight. For performance reasons,
+ * the internal cross partition structures require sixteen bytes per channel,
+ * and eight allows all of this interface-shared info to fit in one cache line.
+ *
+ * XPC_NCHANNELS reflects the total number of channels currently defined.
+ * If the need for additional channels arises, one can simply increase
+ * XPC_NCHANNELS accordingly. If the day should come where that number
+ * exceeds the MAXIMUM number of channels allowed (eight), then one will need
+ * to make changes to the XPC code to allow for this.
+ */
+#define XPC_MEM_CHANNEL 0 /* memory channel number */
+#define XPC_NET_CHANNEL 1 /* network channel number */
+
+#define XPC_NCHANNELS 2 /* #of defined channels */
+#define XPC_MAX_NCHANNELS 8 /* max #of channels allowed */
+
+#if XPC_NCHANNELS > XPC_MAX_NCHANNELS
+#error XPC_NCHANNELS exceeds MAXIMUM allowed.
+#endif
+
+
+/*
+ * The format of an XPC message is as follows:
+ *
+ * +-------+--------------------------------+
+ * | flags |////////////////////////////////|
+ * +-------+--------------------------------+
+ * | message # |
+ * +----------------------------------------+
+ * | payload (user-defined message) |
+ * | |
+ * :
+ * | |
+ * +----------------------------------------+
+ *
+ * The size of the payload is defined by the user via xpc_connect(). A user-
+ * defined message resides in the payload area.
+ *
+ * The user should have no dealings with the message header, but only the
+ * message's payload. When a message entry is allocated (via xpc_allocate())
+ * a pointer to the payload area is returned and not the actual beginning of
+ * the XPC message. The user then constructs a message in the payload area
+ * and passes that pointer as an argument on xpc_send() or xpc_send_notify().
+ *
+ * The size of a message entry (within a message queue) must be a cacheline
+ * sized multiple in order to facilitate the BTE transfer of messages from one
+ * message queue to another. A macro, XPC_MSG_SIZE(), is provided for the user
+ * that wants to fit as many msg entries as possible in a given memory size
+ * (e.g. a memory page).
+ */
+struct xpc_msg {
+ __u8 flags; /* FOR XPC INTERNAL USE ONLY */
+ __u8 reserved[7]; /* FOR XPC INTERNAL USE ONLY */
+ __s64 number; /* FOR XPC INTERNAL USE ONLY */
+
+ __u64 payload; /* user defined portion of message */
+};
+
+
+#define XPC_MSG_PAYLOAD_OFFSET (__u64) (&((struct xpc_msg *)0)->payload)
+#define XPC_MSG_SIZE(_payload_size) \
+ L1_CACHE_ALIGN(XPC_MSG_PAYLOAD_OFFSET + (_payload_size))
+
+
+/*
+ * Define the return values and values passed to user's callout functions.
+ * (It is important to add new value codes at the end just preceding
+ * xpcUnknownReason, which must have the highest numerical value.)
+ */
+enum xpc_retval {
+ xpcSuccess = 0,
+
+ xpcNotConnected, /* 1: channel is not connected */
+ xpcConnected, /* 2: channel connected (opened) */
+ xpcRETIRED1, /* 3: (formerly xpcDisconnected) */
+
+ xpcMsgReceived, /* 4: message received */
+ xpcMsgDelivered, /* 5: message delivered and acknowledged */
+
+ xpcRETIRED2, /* 6: (formerly xpcTransferFailed) */
+
+ xpcNoWait, /* 7: operation would require wait */
+ xpcRetry, /* 8: retry operation */
+ xpcTimeout, /* 9: timeout in xpc_allocate_msg_wait() */
+ xpcInterrupted, /* 10: interrupted wait */
+
+ xpcUnequalMsgSizes, /* 11: message size disparity between sides */
+ xpcInvalidAddress, /* 12: invalid address */
+
+ xpcNoMemory, /* 13: no memory available for XPC structures */
+ xpcLackOfResources, /* 14: insufficient resources for operation */
+ xpcUnregistered, /* 15: channel is not registered */
+ xpcAlreadyRegistered, /* 16: channel is already registered */
+
+ xpcPartitionDown, /* 17: remote partition is down */
+ xpcNotLoaded, /* 18: XPC module is not loaded */
+ xpcUnloading, /* 19: this side is unloading XPC module */
+
+ xpcBadMagic, /* 20: XPC MAGIC string not found */
+
+ xpcReactivating, /* 21: remote partition was reactivated */
+
+ xpcUnregistering, /* 22: this side is unregistering channel */
+ xpcOtherUnregistering, /* 23: other side is unregistering channel */
+
+ xpcCloneKThread, /* 24: cloning kernel thread */
+ xpcCloneKThreadFailed, /* 25: cloning kernel thread failed */
+
+ xpcNoHeartbeat, /* 26: remote partition has no heartbeat */
+
+ xpcPioReadError, /* 27: PIO read error */
+ xpcPhysAddrRegFailed, /* 28: registration of phys addr range failed */
+
+ xpcBteDirectoryError, /* 29: maps to BTEFAIL_DIR */
+ xpcBtePoisonError, /* 30: maps to BTEFAIL_POISON */
+ xpcBteWriteError, /* 31: maps to BTEFAIL_WERR */
+ xpcBteAccessError, /* 32: maps to BTEFAIL_ACCESS */
+ xpcBtePWriteError, /* 33: maps to BTEFAIL_PWERR */
+ xpcBtePReadError, /* 34: maps to BTEFAIL_PRERR */
+ xpcBteTimeOutError, /* 35: maps to BTEFAIL_TOUT */
+ xpcBteXtalkError, /* 36: maps to BTEFAIL_XTERR */
+ xpcBteNotAvailable, /* 37: maps to BTEFAIL_NOTAVAIL */
+ xpcBteUnmappedError, /* 38: unmapped BTEFAIL_ error */
+
+ xpcBadVersion, /* 39: bad version number */
+ xpcVarsNotSet, /* 40: the XPC variables are not set up */
+ xpcNoRsvdPageAddr, /* 41: unable to get rsvd page's phys addr */
+ xpcInvalidPartid, /* 42: invalid partition ID */
+ xpcLocalPartid, /* 43: local partition ID */
+
+ xpcUnknownReason /* 44: unknown reason -- must be last in list */
+};
+
+
+/*
+ * Define the callout function types used by XPC to update the user on
+ * connection activity and state changes (via the user function registered by
+ * xpc_connect()) and to notify them of messages received and delivered (via
+ * the user function registered by xpc_send_notify()).
+ *
+ * The two function types are xpc_channel_func and xpc_notify_func and
+ * both share the following arguments, with the exception of "data", which
+ * only xpc_channel_func has.
+ *
+ * Arguments:
+ *
+ * reason - reason code. (See following table.)
+ * partid - partition ID associated with condition.
+ * ch_number - channel # associated with condition.
+ * data - pointer to optional data. (See following table.)
+ * key - pointer to optional user-defined value provided as the "key"
+ * argument to xpc_connect() or xpc_send_notify().
+ *
+ * In the following table the "Optional Data" column applies to callouts made
+ * to functions registered by xpc_connect(). A "NA" in that column indicates
+ * that this reason code can be passed to functions registered by
+ * xpc_send_notify() (i.e. they don't have data arguments).
+ *
+ * Also, the first three reason codes in the following table indicate
+ * success, whereas the others indicate failure. When a failure reason code
+ * is received, one can assume that the channel is not connected.
+ *
+ *
+ * Reason Code | Cause | Optional Data
+ * =====================+================================+=====================
+ * xpcConnected | connection has been established| max #of entries
+ * | to the specified partition on | allowed in message
+ * | the specified channel | queue
+ * ---------------------+--------------------------------+---------------------
+ * xpcMsgReceived | an XPC message arrived from | address of payload
+ * | the specified partition on the |
+ * | specified channel | [the user must call
+ * | | xpc_received() when
+ * | | finished with the
+ * | | payload]
+ * ---------------------+--------------------------------+---------------------
+ * xpcMsgDelivered | notification that the message | NA
+ * | was delivered to the intended |
+ * | recipient and that they have |
+ * | acknowledged its receipt by |
+ * | calling xpc_received() |
+ * =====================+================================+=====================
+ * xpcUnequalMsgSizes | can't connect to the specified | NULL
+ * | partition on the specified |
+ * | channel because of mismatched |
+ * | message sizes |
+ * ---------------------+--------------------------------+---------------------
+ * xpcNoMemory | insufficient memory avaiable | NULL
+ * | to allocate message queue |
+ * ---------------------+--------------------------------+---------------------
+ * xpcLackOfResources | lack of resources to create | NULL
+ * | the necessary kthreads to |
+ * | support the channel |
+ * ---------------------+--------------------------------+---------------------
+ * xpcUnregistering | this side's user has | NULL or NA
+ * | unregistered by calling |
+ * | xpc_disconnect() |
+ * ---------------------+--------------------------------+---------------------
+ * xpcOtherUnregistering| the other side's user has | NULL or NA
+ * | unregistered by calling |
+ * | xpc_disconnect() |
+ * ---------------------+--------------------------------+---------------------
+ * xpcNoHeartbeat | the other side's XPC is no | NULL or NA
+ * | longer heartbeating |
+ * | |
+ * ---------------------+--------------------------------+---------------------
+ * xpcUnloading | this side's XPC module is | NULL or NA
+ * | being unloaded |
+ * | |
+ * ---------------------+--------------------------------+---------------------
+ * xpcOtherUnloading | the other side's XPC module is | NULL or NA
+ * | is being unloaded |
+ * | |
+ * ---------------------+--------------------------------+---------------------
+ * xpcPioReadError | xp_nofault_PIOR() returned an | NULL or NA
+ * | error while sending an IPI |
+ * | |
+ * ---------------------+--------------------------------+---------------------
+ * xpcInvalidAddress | the address either received or | NULL or NA
+ * | sent by the specified partition|
+ * | is invalid |
+ * ---------------------+--------------------------------+---------------------
+ * xpcBteNotAvailable | attempt to pull data from the | NULL or NA
+ * xpcBtePoisonError | specified partition over the |
+ * xpcBteWriteError | specified channel via a |
+ * xpcBteAccessError | bte_copy() failed |
+ * xpcBteTimeOutError | |
+ * xpcBteXtalkError | |
+ * xpcBteDirectoryError | |
+ * xpcBteGenericError | |
+ * xpcBteUnmappedError | |
+ * ---------------------+--------------------------------+---------------------
+ * xpcUnknownReason | the specified channel to the | NULL or NA
+ * | specified partition was |
+ * | unavailable for unknown reasons|
+ * =====================+================================+=====================
+ */
+
+typedef void (*xpc_channel_func)(enum xpc_retval reason, partid_t partid,
+ int ch_number, void *data, void *key);
+
+typedef void (*xpc_notify_func)(enum xpc_retval reason, partid_t partid,
+ int ch_number, void *key);
+
+
+/*
+ * The following is a registration entry. There is a global array of these,
+ * one per channel. It is used to record the connection registration made
+ * by the users of XPC. As long as a registration entry exists, for any
+ * partition that comes up, XPC will attempt to establish a connection on
+ * that channel. Notification that a connection has been made will occur via
+ * the xpc_channel_func function.
+ *
+ * The 'func' field points to the function to call when aynchronous
+ * notification is required for such events as: a connection established/lost,
+ * or an incomming message received, or an error condition encountered. A
+ * non-NULL 'func' field indicates that there is an active registration for
+ * the channel.
+ */
+struct xpc_registration {
+ struct semaphore sema;
+ xpc_channel_func func; /* function to call */
+ void *key; /* pointer to user's key */
+ __u16 nentries; /* #of msg entries in local msg queue */
+ __u16 msg_size; /* message queue's message size */
+ __u32 assigned_limit; /* limit on #of assigned kthreads */
+ __u32 idle_limit; /* limit on #of idle kthreads */
+} ____cacheline_aligned;
+
+
+#define XPC_CHANNEL_REGISTERED(_c) (xpc_registrations[_c].func != NULL)
+
+
+/* the following are valid xpc_allocate() flags */
+#define XPC_WAIT 0 /* wait flag */
+#define XPC_NOWAIT 1 /* no wait flag */
+
+
+struct xpc_interface {
+ void (*connect)(int);
+ void (*disconnect)(int);
+ enum xpc_retval (*allocate)(partid_t, int, __u32, void **);
+ enum xpc_retval (*send)(partid_t, int, void *);
+ enum xpc_retval (*send_notify)(partid_t, int, void *,
+ xpc_notify_func, void *);
+ void (*received)(partid_t, int, void *);
+ enum xpc_retval (*partid_to_nasids)(partid_t, void *);
+};
+
+
+extern struct xpc_interface xpc_interface;
+
+extern void xpc_set_interface(void (*)(int),
+ void (*)(int),
+ enum xpc_retval (*)(partid_t, int, __u32, void **),
+ enum xpc_retval (*)(partid_t, int, void *),
+ enum xpc_retval (*)(partid_t, int, void *, xpc_notify_func,
+ void *),
+ void (*)(partid_t, int, void *),
+ enum xpc_retval (*)(partid_t, void *));
+extern void xpc_clear_interface(void);
+
+
+extern enum xpc_retval xpc_connect(int, xpc_channel_func, void *, __u16,
+ __u16, __u32, __u32);
+extern void xpc_disconnect(int);
+
+static inline enum xpc_retval
+xpc_allocate(partid_t partid, int ch_number, __u32 flags, void **payload)
+{
+ return xpc_interface.allocate(partid, ch_number, flags, payload);
+}
+
+static inline enum xpc_retval
+xpc_send(partid_t partid, int ch_number, void *payload)
+{
+ return xpc_interface.send(partid, ch_number, payload);
+}
+
+static inline enum xpc_retval
+xpc_send_notify(partid_t partid, int ch_number, void *payload,
+ xpc_notify_func func, void *key)
+{
+ return xpc_interface.send_notify(partid, ch_number, payload, func, key);
+}
+
+static inline void
+xpc_received(partid_t partid, int ch_number, void *payload)
+{
+ return xpc_interface.received(partid, ch_number, payload);
+}
+
+static inline enum xpc_retval
+xpc_partid_to_nasids(partid_t partid, void *nasids)
+{
+ return xpc_interface.partid_to_nasids(partid, nasids);
+}
+
+
+extern __u64 xp_nofault_PIOR_target;
+extern int xp_nofault_PIOR(void *);
+extern int xp_error_PIOR(void);
+
+
+#endif /* _ASM_IA64_SN_XP_H */
+
Modified: linux-libc-headers/trunk/include/asm-m32r/cacheflush.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-m32r/cacheflush.h (original)
+++ linux-libc-headers/trunk/include/asm-m32r/cacheflush.h Tue Jul 5 22:58:33 2005
@@ -10,7 +10,7 @@
#define flush_cache_all() do { } while (0)
#define flush_cache_mm(mm) do { } while (0)
#define flush_cache_range(vma, start, end) do { } while (0)
-#define flush_cache_page(vma, vmaddr) do { } while (0)
+#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
#define flush_dcache_page(page) do { } while (0)
#define flush_dcache_mmap_lock(mapping) do { } while (0)
#define flush_dcache_mmap_unlock(mapping) do { } while (0)
@@ -30,7 +30,7 @@
#define flush_cache_all() do { } while (0)
#define flush_cache_mm(mm) do { } while (0)
#define flush_cache_range(vma, start, end) do { } while (0)
-#define flush_cache_page(vma, vmaddr) do { } while (0)
+#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
#define flush_dcache_page(page) do { } while (0)
#define flush_dcache_mmap_lock(mapping) do { } while (0)
#define flush_dcache_mmap_unlock(mapping) do { } while (0)
@@ -42,7 +42,7 @@
#define flush_cache_all() do { } while (0)
#define flush_cache_mm(mm) do { } while (0)
#define flush_cache_range(vma, start, end) do { } while (0)
-#define flush_cache_page(vma, vmaddr) do { } while (0)
+#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
#define flush_dcache_page(page) do { } while (0)
#define flush_dcache_mmap_lock(mapping) do { } while (0)
#define flush_dcache_mmap_unlock(mapping) do { } while (0)
Modified: linux-libc-headers/trunk/include/asm-m32r/mmu.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-m32r/mmu.h (original)
+++ linux-libc-headers/trunk/include/asm-m32r/mmu.h Tue Jul 5 22:58:33 2005
@@ -1,24 +1,11 @@
#ifndef _ASM_M32R_MMU_H
#define _ASM_M32R_MMU_H
-/* $Id$ */
-
#if !defined(CONFIG_MMU)
-struct mm_rblock_struct {
- int size;
- int refcount;
- void *kblock;
-};
-
-struct mm_tblock_struct {
- struct mm_rblock_struct *rblock;
- struct mm_tblock_struct *next;
-};
-
typedef struct {
- struct mm_tblock_struct tblock;
- unsigned long end_brk;
+ struct vm_list_struct *vmlist;
+ unsigned long end_brk;
} mm_context_t;
#else
@@ -31,4 +18,3 @@
#endif /* CONFIG_MMU */
#endif /* _ASM_M32R_MMU_H */
-
Modified: linux-libc-headers/trunk/include/asm-m32r/pgalloc.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-m32r/pgalloc.h (original)
+++ linux-libc-headers/trunk/include/asm-m32r/pgalloc.h Tue Jul 5 22:58:33 2005
@@ -6,7 +6,6 @@
#include <linux/mm.h>
#include <asm/io.h>
-#include <asm/pgtable.h>
#define pmd_populate_kernel(mm, pmd, pte) \
set_pmd(pmd, __pmd(_PAGE_TABLE + __pa(pte)))
Modified: linux-libc-headers/trunk/include/asm-m32r/serial.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-m32r/serial.h (original)
+++ linux-libc-headers/trunk/include/asm-m32r/serial.h Tue Jul 5 22:58:33 2005
@@ -1,150 +1,8 @@
#ifndef _ASM_M32R_SERIAL_H
#define _ASM_M32R_SERIAL_H
-/* $Id$ */
+/* include/asm-m32r/serial.h */
-/* orig : i386 2.4.18 */
-
-/*
- * include/asm-m32r/serial.h
- */
-
-#include <asm/m32r.h>
-
-/*
- * This assumes you have a 1.8432 MHz clock for your UART.
- *
- * It'd be nice if someone built a serial card with a 24.576 MHz
- * clock, since the 16550A is capable of handling a top speed of 1.5
- * megabits/second; but this requires the faster clock.
- */
-#define BASE_BAUD ( 1843200 / 16 )
-
-/* Standard COM flags (except for COM4, because of the 8514 problem) */
-#ifdef CONFIG_SERIAL_DETECT_IRQ
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ)
-#define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_AUTO_IRQ)
-#else
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
-#define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF
-#endif
-
-#ifdef CONFIG_SERIAL_MANY_PORTS
-#define FOURPORT_FLAGS ASYNC_FOURPORT
-#define ACCENT_FLAGS 0
-#define BOCA_FLAGS 0
-#define HUB6_FLAGS 0
-#define RS_TABLE_SIZE 64
-#else
-#define RS_TABLE_SIZE
-#endif
-
-#define MCA_COM_FLAGS (STD_COM_FLAGS|ASYNC_BOOT_ONLYMCA)
-
-/*
- * The following define the access methods for the HUB6 card. All
- * access is through two ports for all 24 possible chips. The card is
- * selected through the high 2 bits, the port on that card with the
- * "middle" 3 bits, and the register on that port with the bottom
- * 3 bits.
- *
- * While the access port and interrupt is configurable, the default
- * port locations are 0x302 for the port control register, and 0x303
- * for the data read/write register. Normally, the interrupt is at irq3
- * but can be anything from 3 to 7 inclusive. Note that using 3 will
- * require disabling com2.
- */
-
-#define C_P(card,port) (((card)<<6|(port)<<3) + 1)
-
-#define STD_SERIAL_PORT_DEFNS \
- /* UART CLK PORT IRQ FLAGS */ \
- { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \
- { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS }, /* ttyS1 */ \
- { 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS }, /* ttyS2 */ \
- { 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */
-
-
-#ifdef CONFIG_SERIAL_MANY_PORTS
-#define EXTRA_SERIAL_PORT_DEFNS \
- { 0, BASE_BAUD, 0x1A0, 9, FOURPORT_FLAGS }, /* ttyS4 */ \
- { 0, BASE_BAUD, 0x1A8, 9, FOURPORT_FLAGS }, /* ttyS5 */ \
- { 0, BASE_BAUD, 0x1B0, 9, FOURPORT_FLAGS }, /* ttyS6 */ \
- { 0, BASE_BAUD, 0x1B8, 9, FOURPORT_FLAGS }, /* ttyS7 */ \
- { 0, BASE_BAUD, 0x2A0, 5, FOURPORT_FLAGS }, /* ttyS8 */ \
- { 0, BASE_BAUD, 0x2A8, 5, FOURPORT_FLAGS }, /* ttyS9 */ \
- { 0, BASE_BAUD, 0x2B0, 5, FOURPORT_FLAGS }, /* ttyS10 */ \
- { 0, BASE_BAUD, 0x2B8, 5, FOURPORT_FLAGS }, /* ttyS11 */ \
- { 0, BASE_BAUD, 0x330, 4, ACCENT_FLAGS }, /* ttyS12 */ \
- { 0, BASE_BAUD, 0x338, 4, ACCENT_FLAGS }, /* ttyS13 */ \
- { 0, BASE_BAUD, 0x000, 0, 0 }, /* ttyS14 (spare) */ \
- { 0, BASE_BAUD, 0x000, 0, 0 }, /* ttyS15 (spare) */ \
- { 0, BASE_BAUD, 0x100, 12, BOCA_FLAGS }, /* ttyS16 */ \
- { 0, BASE_BAUD, 0x108, 12, BOCA_FLAGS }, /* ttyS17 */ \
- { 0, BASE_BAUD, 0x110, 12, BOCA_FLAGS }, /* ttyS18 */ \
- { 0, BASE_BAUD, 0x118, 12, BOCA_FLAGS }, /* ttyS19 */ \
- { 0, BASE_BAUD, 0x120, 12, BOCA_FLAGS }, /* ttyS20 */ \
- { 0, BASE_BAUD, 0x128, 12, BOCA_FLAGS }, /* ttyS21 */ \
- { 0, BASE_BAUD, 0x130, 12, BOCA_FLAGS }, /* ttyS22 */ \
- { 0, BASE_BAUD, 0x138, 12, BOCA_FLAGS }, /* ttyS23 */ \
- { 0, BASE_BAUD, 0x140, 12, BOCA_FLAGS }, /* ttyS24 */ \
- { 0, BASE_BAUD, 0x148, 12, BOCA_FLAGS }, /* ttyS25 */ \
- { 0, BASE_BAUD, 0x150, 12, BOCA_FLAGS }, /* ttyS26 */ \
- { 0, BASE_BAUD, 0x158, 12, BOCA_FLAGS }, /* ttyS27 */ \
- { 0, BASE_BAUD, 0x160, 12, BOCA_FLAGS }, /* ttyS28 */ \
- { 0, BASE_BAUD, 0x168, 12, BOCA_FLAGS }, /* ttyS29 */ \
- { 0, BASE_BAUD, 0x170, 12, BOCA_FLAGS }, /* ttyS30 */ \
- { 0, BASE_BAUD, 0x178, 12, BOCA_FLAGS }, /* ttyS31 */
-#else
-#define EXTRA_SERIAL_PORT_DEFNS
-#endif
-
-/* You can have up to four HUB6's in the system, but I've only
- * included two cards here for a total of twelve ports.
- */
-#if (defined(CONFIG_HUB6) && defined(CONFIG_SERIAL_MANY_PORTS))
-#define HUB6_SERIAL_PORT_DFNS \
- { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,0) }, /* ttyS32 */ \
- { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,1) }, /* ttyS33 */ \
- { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,2) }, /* ttyS34 */ \
- { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,3) }, /* ttyS35 */ \
- { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,4) }, /* ttyS36 */ \
- { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,5) }, /* ttyS37 */ \
- { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,0) }, /* ttyS38 */ \
- { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,1) }, /* ttyS39 */ \
- { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,2) }, /* ttyS40 */ \
- { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,3) }, /* ttyS41 */ \
- { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,4) }, /* ttyS42 */ \
- { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,5) }, /* ttyS43 */
-#else
-#define HUB6_SERIAL_PORT_DFNS
-#endif
-
-#ifdef CONFIG_MCA
-#define MCA_SERIAL_PORT_DFNS \
- { 0, BASE_BAUD, 0x3220, 3, MCA_COM_FLAGS }, \
- { 0, BASE_BAUD, 0x3228, 3, MCA_COM_FLAGS }, \
- { 0, BASE_BAUD, 0x4220, 3, MCA_COM_FLAGS }, \
- { 0, BASE_BAUD, 0x4228, 3, MCA_COM_FLAGS }, \
- { 0, BASE_BAUD, 0x5220, 3, MCA_COM_FLAGS }, \
- { 0, BASE_BAUD, 0x5228, 3, MCA_COM_FLAGS },
-#else
-#define MCA_SERIAL_PORT_DFNS
-#endif
-
-#ifndef CONFIG_PLAT_USRV
-#define SERIAL_PORT_DFNS \
- STD_SERIAL_PORT_DEFNS \
- EXTRA_SERIAL_PORT_DEFNS \
- HUB6_SERIAL_PORT_DFNS \
- MCA_SERIAL_PORT_DFNS
-
-#else /* CONFIG_PLAT_USRV */
-
-#define SERIAL_PORT_DFNS \
- /* UART CLK PORT IRQ FLAGS */ \
- { 0, BASE_BAUD, 0x3F8, PLD_IRQ_UART0, STD_COM_FLAGS }, /* ttyS0 */ \
- { 0, BASE_BAUD, 0x2F8, PLD_IRQ_UART1, STD_COM_FLAGS }, /* ttyS1 */
-#endif /* CONFIG_PLAT_USRV */
+#define BASE_BAUD 115200
#endif /* _ASM_M32R_SERIAL_H */
Modified: linux-libc-headers/trunk/include/asm-m32r/spinlock.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-m32r/spinlock.h (original)
+++ linux-libc-headers/trunk/include/asm-m32r/spinlock.h Tue Jul 5 22:58:33 2005
@@ -101,10 +101,8 @@
unsigned long tmp0, tmp1;
#ifdef CONFIG_DEBUG_SPINLOCK
- __label__ here;
-here:
- if (lock->magic != SPINLOCK_MAGIC) {
- printk("pc: %p\n", &&here);
+ if (unlikely(lock->magic != SPINLOCK_MAGIC)) {
+ printk("pc: %p\n", __builtin_return_address(0));
BUG();
}
#endif
Modified: linux-libc-headers/trunk/include/asm-m32r/system.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-m32r/system.h (original)
+++ linux-libc-headers/trunk/include/asm-m32r/system.h Tue Jul 5 22:58:33 2005
@@ -170,4 +170,6 @@
#define set_mb(var, value) do { xchg(&var, value); } while (0)
#define set_wmb(var, value) do { var = value; wmb(); } while (0)
+#define arch_align_stack(x) (x)
+
#endif /* _ASM_M32R_SYSTEM_H */
Modified: linux-libc-headers/trunk/include/asm-m32r/unistd.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-m32r/unistd.h (original)
+++ linux-libc-headers/trunk/include/asm-m32r/unistd.h Tue Jul 5 22:58:33 2005
@@ -452,7 +452,7 @@
* but it doesn't work on all toolchains, so we just do it by hand
*/
#ifndef cond_syscall
-#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall");
+#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
#endif
#endif /* _ASM_M32R_UNISTD_H */
Modified: linux-libc-headers/trunk/include/asm-m68k/cacheflush.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-m68k/cacheflush.h (original)
+++ linux-libc-headers/trunk/include/asm-m68k/cacheflush.h Tue Jul 5 22:58:33 2005
@@ -98,8 +98,7 @@
__flush_cache_030();
}
-static inline void flush_cache_page(struct vm_area_struct *vma,
- unsigned long vmaddr)
+static inline void flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long pfn)
{
if (vma->vm_mm == current->mm)
__flush_cache_030();
@@ -133,15 +132,15 @@
#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
- do { \
- flush_cache_page(vma, vaddr); \
- memcpy(dst, src, len); \
+ do { \
+ flush_cache_page(vma, vaddr, page_to_pfn(page));\
+ memcpy(dst, src, len); \
} while (0)
#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
- do { \
- flush_cache_page(vma, vaddr); \
- memcpy(dst, src, len); \
+ do { \
+ flush_cache_page(vma, vaddr, page_to_pfn(page));\
+ memcpy(dst, src, len); \
} while (0)
extern void flush_icache_range(unsigned long address, unsigned long endaddr);
Modified: linux-libc-headers/trunk/include/asm-m68k/checksum.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-m68k/checksum.h (original)
+++ linux-libc-headers/trunk/include/asm-m68k/checksum.h Tue Jul 5 22:58:33 2005
@@ -43,20 +43,21 @@
ip_fast_csum(unsigned char *iph, unsigned int ihl)
{
unsigned int sum = 0;
+ unsigned long tmp;
__asm__ ("subqw #1,%2\n"
"1:\t"
- "movel %1 at +,%/d0\n\t"
- "addxl %/d0,%0\n\t"
+ "movel %1 at +,%3\n\t"
+ "addxl %3,%0\n\t"
"dbra %2,1b\n\t"
- "movel %0,%/d0\n\t"
- "swap %/d0\n\t"
- "addxw %/d0,%0\n\t"
- "clrw %/d0\n\t"
- "addxw %/d0,%0\n\t"
- : "=d" (sum), "=a" (iph), "=d" (ihl)
+ "movel %0,%3\n\t"
+ "swap %3\n\t"
+ "addxw %3,%0\n\t"
+ "clrw %3\n\t"
+ "addxw %3,%0\n\t"
+ : "=d" (sum), "=&a" (iph), "=&d" (ihl), "=&d" (tmp)
: "0" (sum), "1" (iph), "2" (ihl)
- : "d0");
+ : "memory");
return ~sum;
}
@@ -72,31 +73,31 @@
"clrw %1\n\t"
"addxw %1, %0"
: "=&d" (sum), "=&d" (tmp)
- : "0" (sum), "1" (sum));
+ : "0" (sum), "1" (tmp));
return ~sum;
}
-/*
- * computes the checksum of the TCP/UDP pseudo-header
- * returns a 16-bit checksum, already complemented
- */
-
static inline unsigned int
csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, unsigned short len,
unsigned short proto, unsigned int sum)
{
- __asm__ ("addl %1,%0\n\t"
+ __asm__ ("addl %2,%0\n\t"
+ "addxl %3,%0\n\t"
"addxl %4,%0\n\t"
- "addxl %5,%0\n\t"
"clrl %1\n\t"
"addxl %1,%0"
- : "=&d" (sum), "=&d" (saddr)
- : "0" (daddr), "1" (saddr), "d" (len + proto),
- "d"(sum));
+ : "=&d" (sum), "=d" (saddr)
+ : "g" (daddr), "1" (saddr), "d" (len + proto),
+ "0" (sum));
return sum;
}
+
+/*
+ * computes the checksum of the TCP/UDP pseudo-header
+ * returns a 16-bit checksum, already complemented
+ */
static inline unsigned short int
csum_tcpudp_magic(unsigned long saddr, unsigned long daddr, unsigned short len,
unsigned short proto, unsigned int sum)
Modified: linux-libc-headers/trunk/include/asm-m68k/io.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-m68k/io.h (original)
+++ linux-libc-headers/trunk/include/asm-m68k/io.h Tue Jul 5 22:58:33 2005
@@ -22,3 +22,17 @@
#define _IO_H
#endif /* _IO_H */
+
+#define __ARCH_HAS_NO_PAGE_ZERO_MAPPED 1
+
+/*
+ * Convert a physical pointer to a virtual kernel pointer for /dev/mem
+ * access
+ */
+#define xlate_dev_mem_ptr(p) __va(p)
+
+/*
+ * Convert a virtual cached pointer to an uncached pointer
+ */
+#define xlate_dev_kmem_ptr(p) p
+
Modified: linux-libc-headers/trunk/include/asm-m68k/processor.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-m68k/processor.h (original)
+++ linux-libc-headers/trunk/include/asm-m68k/processor.h Tue Jul 5 22:58:33 2005
@@ -61,7 +61,8 @@
char need_resched;
unsigned char delayed_trace; /* single step a syscall */
unsigned char syscall_trace; /* count of syscall interceptors */
- unsigned char pad[3];
+ unsigned char memdie; /* task was selected to be killed */
+ unsigned char pad[2];
};
struct thread_struct {
Modified: linux-libc-headers/trunk/include/asm-m68k/unistd.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-m68k/unistd.h (original)
+++ linux-libc-headers/trunk/include/asm-m68k/unistd.h Tue Jul 5 22:58:33 2005
@@ -434,6 +434,6 @@
* What we want is __attribute__((weak,alias("sys_ni_syscall"))),
* but it doesn't work on all toolchains, so we just do it by hand
*/
-#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall");
+#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
#endif /* _ASM_M68K_UNISTD_H_ */
Modified: linux-libc-headers/trunk/include/asm-m68knommu/MC68328.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-m68knommu/MC68328.h (original)
+++ linux-libc-headers/trunk/include/asm-m68knommu/MC68328.h Tue Jul 5 22:58:33 2005
@@ -993,7 +993,7 @@
volatile unsigned short int pad1;
volatile unsigned short int pad2;
volatile unsigned short int pad3;
-} m68328_uart __attribute__((packed));
+} __attribute__((packed)) m68328_uart;
/**********
Modified: linux-libc-headers/trunk/include/asm-m68knommu/MC68EZ328.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-m68knommu/MC68EZ328.h (original)
+++ linux-libc-headers/trunk/include/asm-m68knommu/MC68EZ328.h Tue Jul 5 22:58:33 2005
@@ -815,7 +815,7 @@
volatile unsigned short int nipr;
volatile unsigned short int pad1;
volatile unsigned short int pad2;
-} m68328_uart __attribute__((packed));
+} __attribute__((packed)) m68328_uart;
/**********
Modified: linux-libc-headers/trunk/include/asm-m68knommu/MC68VZ328.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-m68knommu/MC68VZ328.h (original)
+++ linux-libc-headers/trunk/include/asm-m68knommu/MC68VZ328.h Tue Jul 5 22:58:33 2005
@@ -909,7 +909,7 @@
volatile unsigned short int nipr;
volatile unsigned short int hmark;
volatile unsigned short int unused;
-} m68328_uart __attribute__((packed));
+} __attribute__((packed)) m68328_uart;
Modified: linux-libc-headers/trunk/include/asm-m68knommu/cacheflush.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-m68knommu/cacheflush.h (original)
+++ linux-libc-headers/trunk/include/asm-m68knommu/cacheflush.h Tue Jul 5 22:58:33 2005
@@ -8,7 +8,7 @@
#define flush_cache_all() __flush_cache_all()
#define flush_cache_mm(mm) do { } while (0)
#define flush_cache_range(vma, start, end) do { } while (0)
-#define flush_cache_page(vma, vmaddr) do { } while (0)
+#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
#define flush_dcache_range(start,len) do { } while (0)
#define flush_dcache_page(page) do { } while (0)
#define flush_dcache_mmap_lock(mapping) do { } while (0)
Modified: linux-libc-headers/trunk/include/asm-m68knommu/entry.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-m68knommu/entry.h (original)
+++ linux-libc-headers/trunk/include/asm-m68knommu/entry.h Tue Jul 5 22:58:33 2005
@@ -20,8 +20,9 @@
* 24(sp) - orig_d0
* 28(sp) - stack adjustment
* 2C(sp) - [ sr ] [ format & vector ]
- * 2E(sp) - [ pc ] [ sr ]
- * 30(sp) - [ format & vector ] [ pc ]
+ * 2E(sp) - [ pc-hiword ] [ sr ]
+ * 30(sp) - [ pc-loword ] [ pc-hiword ]
+ * 32(sp) - [ format & vector ] [ pc-loword ]
* ^^^^^^^^^^^^^^^^^ ^^^^^^^^^^^^^^^^^
* M68K COLDFIRE
*/
@@ -40,12 +41,6 @@
LENOSYS = 38
-LD0 = 0x20
-LORIG_D0 = 0x24
-LFORMATVEC = 0x2c
-LSR = 0x2e
-LPC = 0x30
-
#define SWITCH_STACK_SIZE (6*4+4) /* Includes return address */
/*
@@ -70,36 +65,36 @@
addql #8,sw_usp /* remove exception */
movel sw_ksp,%sp /* kernel sp */
subql #8,%sp /* room for exception */
- clrl %sp at - /* stk_adj */
+ clrl %sp at - /* stkadj */
movel %d0,%sp at - /* orig d0 */
movel %d0,%sp at - /* d0 */
- subl #32,%sp /* space for 8 regs */
+ lea %sp@(-32),%sp /* space for 8 regs */
moveml %d1-%d5/%a0-%a2,%sp@
movel sw_usp,%a0 /* get usp */
- moveml %a0@(-8),%d1-%d2 /* get exception */
- moveml %d1-%d2,%sp@(LFORMATVEC) /* copy exception */
+ movel %a0 at -,%sp@(PT_PC) /* copy exception program counter */
+ movel %a0 at -,%sp@(PT_FORMATVEC)/* copy exception format/vector/sr */
bra 7f
6:
- clrl %sp at - /* stk_adj */
+ clrl %sp at - /* stkadj */
movel %d0,%sp at - /* orig d0 */
movel %d0,%sp at - /* d0 */
- subl #32,%sp /* space for 7 regs */
+ lea %sp@(-32),%sp /* space for 8 regs */
moveml %d1-%d5/%a0-%a2,%sp@
7:
.endm
.macro RESTORE_ALL
- btst #5,%sp@(LSR) /* going user? */
+ btst #5,%sp@(PT_SR) /* going user? */
bnes 8f /* no, skip */
move #0x2700,%sr /* disable intrs */
movel sw_usp,%a0 /* get usp */
- moveml %sp@(LFORMATVEC),%d1-%d2 /* copy exception */
- moveml %d1-%d2,%a0@(-8)
+ movel %sp@(PT_PC),%a0 at - /* copy exception program counter */
+ movel %sp@(PT_FORMATVEC),%a0 at -/* copy exception format/vector/sr */
moveml %sp@,%d1-%d5/%a0-%a2
- addl #32,%sp /* space for 8 regs */
+ lea %sp@(32),%sp /* space for 8 regs */
movel %sp at +,%d0
addql #4,%sp /* orig d0 */
- addl %sp at +,%sp /* stk adj */
+ addl %sp at +,%sp /* stkadj */
addql #8,%sp /* remove exception */
movel %sp,sw_ksp /* save ksp */
subql #8,sw_usp /* set exception */
@@ -107,10 +102,10 @@
rte
8:
moveml %sp@,%d1-%d5/%a0-%a2
- addl #32,%sp /* space for 8 regs */
+ lea %sp@(32),%sp /* space for 8 regs */
movel %sp at +,%d0
addql #4,%sp /* orig d0 */
- addl %sp at +,%sp /* stk adj */
+ addl %sp at +,%sp /* stkadj */
rte
.endm
@@ -119,30 +114,30 @@
*/
.macro SAVE_LOCAL
move #0x2700,%sr /* disable intrs */
- clrl %sp at - /* stk_adj */
+ clrl %sp at - /* stkadj */
movel %d0,%sp at - /* orig d0 */
movel %d0,%sp at - /* d0 */
- subl #32,%sp /* space for 8 regs */
+ lea %sp@(-32),%sp /* space for 8 regs */
moveml %d1-%d5/%a0-%a2,%sp@
.endm
.macro RESTORE_LOCAL
moveml %sp@,%d1-%d5/%a0-%a2
- addl #32,%sp /* space for 8 regs */
+ lea %sp@(32),%sp /* space for 8 regs */
movel %sp at +,%d0
addql #4,%sp /* orig d0 */
- addl %sp at +,%sp /* stk adj */
+ addl %sp at +,%sp /* stkadj */
rte
.endm
.macro SAVE_SWITCH_STACK
- subl #24,%sp /* 6 regs */
+ lea %sp@(-24),%sp /* 6 regs */
moveml %a3-%a6/%d6-%d7,%sp@
.endm
.macro RESTORE_SWITCH_STACK
moveml %sp@,%a3-%a6/%d6-%d7
- addl #24,%sp /* 6 regs */
+ lea %sp@(24),%sp /* 6 regs */
.endm
/*
@@ -159,7 +154,7 @@
* Standard 68k interrupt entry and exit macros.
*/
.macro SAVE_ALL
- clrl %sp at - /* stk_adj */
+ clrl %sp at - /* stkadj */
movel %d0,%sp at - /* orig d0 */
movel %d0,%sp at - /* d0 */
moveml %d1-%d5/%a0-%a2,%sp at -
@@ -169,7 +164,7 @@
moveml %sp at +,%a0-%a2/%d1-%d5
movel %sp at +,%d0
addql #4,%sp /* orig d0 */
- addl %sp at +,%sp /* stk adj */
+ addl %sp at +,%sp /* stkadj */
rte
.endm
Modified: linux-libc-headers/trunk/include/asm-m68knommu/mmu.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-m68knommu/mmu.h (original)
+++ linux-libc-headers/trunk/include/asm-m68knommu/mmu.h Tue Jul 5 22:58:33 2005
@@ -3,19 +3,8 @@
/* Copyright (C) 2002, David McCullough <davidm at snapgear.com> */
-struct mm_rblock_struct {
- int size;
- int refcount;
- void *kblock;
-};
-
-struct mm_tblock_struct {
- struct mm_rblock_struct *rblock;
- struct mm_tblock_struct *next;
-};
-
typedef struct {
- struct mm_tblock_struct tblock;
+ struct vm_list_struct *vmlist;
unsigned long end_brk;
} mm_context_t;
Modified: linux-libc-headers/trunk/include/asm-m68knommu/system.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-m68knommu/system.h (original)
+++ linux-libc-headers/trunk/include/asm-m68knommu/system.h Tue Jul 5 22:58:33 2005
@@ -280,5 +280,6 @@
})
#endif
#endif
+#define arch_align_stack(x) (x)
#endif /* _M68KNOMMU_SYSTEM_H */
Modified: linux-libc-headers/trunk/include/asm-m68knommu/unistd.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-m68knommu/unistd.h (original)
+++ linux-libc-headers/trunk/include/asm-m68knommu/unistd.h Tue Jul 5 22:58:33 2005
@@ -499,6 +499,6 @@
* What we want is __attribute__((weak,alias("sys_ni_syscall"))),
* but it doesn't work on all toolchains, so we just do it by hand
*/
-#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall");
+#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
#endif /* _ASM_M68K_UNISTD_H_ */
Modified: linux-libc-headers/trunk/include/asm-mips/cacheflush.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-mips/cacheflush.h (original)
+++ linux-libc-headers/trunk/include/asm-mips/cacheflush.h Tue Jul 5 22:58:33 2005
@@ -16,7 +16,7 @@
*
* - flush_cache_all() flushes entire cache
* - flush_cache_mm(mm) flushes the specified mm context's cache lines
- * - flush_cache_page(mm, vmaddr) flushes a single page
+ * - flush_cache_page(mm, vmaddr, pfn) flushes a single page
* - flush_cache_range(vma, start, end) flushes a range of pages
* - flush_icache_range(start, end) flush a range of instructions
* - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache
@@ -33,8 +33,7 @@
extern void (*flush_cache_mm)(struct mm_struct *mm);
extern void (*flush_cache_range)(struct vm_area_struct *vma,
unsigned long start, unsigned long end);
-extern void (*flush_cache_page)(struct vm_area_struct *vma,
- unsigned long page);
+extern void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page, unsigned long pfn);
extern void __flush_dcache_page(struct page *page);
static inline void flush_dcache_page(struct page *page)
Modified: linux-libc-headers/trunk/include/asm-mips/ddb5xxx/ddb5xxx.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-mips/ddb5xxx/ddb5xxx.h (original)
+++ linux-libc-headers/trunk/include/asm-mips/ddb5xxx/ddb5xxx.h Tue Jul 5 22:58:33 2005
@@ -226,7 +226,7 @@
* Physical Device Address Registers
*/
-extern u32
+extern __u32
ddb_calc_pdar(__u32 phys, __u32 size, int width, int on_memory_bus, int pci_visible);
extern void
ddb_set_pdar(__u32 pdar, __u32 phys, __u32 size, int width,
Modified: linux-libc-headers/trunk/include/asm-mips/errno.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-mips/errno.h (original)
+++ linux-libc-headers/trunk/include/asm-mips/errno.h Tue Jul 5 22:58:33 2005
@@ -108,6 +108,8 @@
#undef EKEYEXPIRED
#undef EKEYREVOKED
#undef EKEYREJECTED
+#undef EOWNERDEAD
+#undef ENOTRECOVERABLE
/*
* These error numbers are intended to be MIPS ABI compatible
@@ -215,6 +217,10 @@
#define EKEYREVOKED 163 /* Key has been revoked */
#define EKEYREJECTED 164 /* Key was rejected by service */
+/* for robust mutexes */
+#define EOWNERDEAD 165 /* Owner died */
+#define ENOTRECOVERABLE 166 /* State not recoverable */
+
#define EDQUOT 1133 /* Quota exceeded */
Modified: linux-libc-headers/trunk/include/asm-mips/io.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-mips/io.h (original)
+++ linux-libc-headers/trunk/include/asm-mips/io.h Tue Jul 5 22:58:33 2005
@@ -612,4 +612,15 @@
#define csr_out32(v,a) (*(volatile __u32 *)((unsigned long)(a) + __CSR_32_ADJUST) = (v))
#define csr_in32(a) (*(volatile __u32 *)((unsigned long)(a) + __CSR_32_ADJUST))
+/*
+ * Convert a physical pointer to a virtual kernel pointer for /dev/mem
+ * access
+ */
+#define xlate_dev_mem_ptr(p) __va(p)
+
+/*
+ * Convert a virtual cached pointer to an uncached pointer
+ */
+#define xlate_dev_kmem_ptr(p) p
+
#endif /* _ASM_IO_H */
Modified: linux-libc-headers/trunk/include/asm-mips/pgtable-32.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-mips/pgtable-32.h (original)
+++ linux-libc-headers/trunk/include/asm-mips/pgtable-32.h Tue Jul 5 22:58:33 2005
@@ -73,7 +73,7 @@
#define PTRS_PER_PTE ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t))
#define USER_PTRS_PER_PGD (0x80000000UL/PGDIR_SIZE)
-#define FIRST_USER_PGD_NR 0
+#define FIRST_USER_ADDRESS 0
#define VMALLOC_START KSEG2
Modified: linux-libc-headers/trunk/include/asm-mips/pgtable-64.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-mips/pgtable-64.h (original)
+++ linux-libc-headers/trunk/include/asm-mips/pgtable-64.h Tue Jul 5 22:58:33 2005
@@ -88,7 +88,7 @@
#define PTRS_PER_PTE ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t))
#define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE)
-#define FIRST_USER_PGD_NR 0
+#define FIRST_USER_ADDRESS 0
#define VMALLOC_START XKSEG
#define VMALLOC_END \
Modified: linux-libc-headers/trunk/include/asm-mips/serial.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-mips/serial.h (original)
+++ linux-libc-headers/trunk/include/asm-mips/serial.h Tue Jul 5 22:58:33 2005
@@ -402,10 +402,10 @@
#include <asm/ddb5xxx/ddb5477.h>
#define DDB5477_SERIAL_PORT_DEFNS \
{ .baud_base = BASE_BAUD, .irq = VRC5477_IRQ_UART0, \
- .flags = STD_COM_FLAGS, .iomem_base = (u8*)0xbfa04200, \
+ .flags = STD_COM_FLAGS, .iomem_base = (__u8*)0xbfa04200, \
.iomem_reg_shift = 3, .io_type = SERIAL_IO_MEM}, \
{ .baud_base = BASE_BAUD, .irq = VRC5477_IRQ_UART1, \
- .flags = STD_COM_FLAGS, .iomem_base = (u8*)0xbfa04240, \
+ .flags = STD_COM_FLAGS, .iomem_base = (__u8*)0xbfa04240, \
.iomem_reg_shift = 3, .io_type = SERIAL_IO_MEM},
#else
#define DDB5477_SERIAL_PORT_DEFNS
Modified: linux-libc-headers/trunk/include/asm-mips/siginfo.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-mips/siginfo.h (original)
+++ linux-libc-headers/trunk/include/asm-mips/siginfo.h Tue Jul 5 22:58:33 2005
@@ -10,8 +10,6 @@
#define _ASM_SIGINFO_H
-#define SIGEV_HEAD_SIZE (sizeof(long) + 2*sizeof(int))
-#define SIGEV_PAD_SIZE ((SIGEV_MAX_SIZE-SIGEV_HEAD_SIZE) / sizeof(int))
#undef __ARCH_SI_TRAPNO /* exception code needs to fill this ... */
#define HAVE_ARCH_SIGINFO_T
Modified: linux-libc-headers/trunk/include/asm-mips/system.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-mips/system.h (original)
+++ linux-libc-headers/trunk/include/asm-mips/system.h Tue Jul 5 22:58:33 2005
@@ -432,4 +432,6 @@
#define finish_arch_switch(rq, prev) spin_unlock_irq(&(prev)->switch_lock)
#define task_running(rq, p) ((rq)->curr == (p) || spin_is_locked(&(p)->switch_lock))
+#define arch_align_stack(x) (x)
+
#endif /* _ASM_SYSTEM_H */
Modified: linux-libc-headers/trunk/include/asm-mips/unaligned.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-mips/unaligned.h (original)
+++ linux-libc-headers/trunk/include/asm-mips/unaligned.h Tue Jul 5 22:58:33 2005
@@ -17,7 +17,7 @@
*
* This macro should be used for accessing values larger in size than
* single bytes at locations that are expected to be improperly aligned,
- * e.g. retrieving a __u16 value from a location not u16-aligned.
+ * e.g. retrieving a __u16 value from a location not __u16-aligned.
*
* Note that unaligned accesses can be very expensive on some architectures.
*/
@@ -31,7 +31,7 @@
*
* This macro should be used for placing values larger in size than
* single bytes at locations that are expected to be improperly aligned,
- * e.g. writing a __u16 value to a location not u16-aligned.
+ * e.g. writing a __u16 value to a location not __u16-aligned.
*
* Note that unaligned accesses can be very expensive on some architectures.
*/
Modified: linux-libc-headers/trunk/include/asm-mips/unistd.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-mips/unistd.h (original)
+++ linux-libc-headers/trunk/include/asm-mips/unistd.h Tue Jul 5 22:58:33 2005
@@ -1146,6 +1146,6 @@
* What we want is __attribute__((weak,alias("sys_ni_syscall"))),
* but it doesn't work on all toolchains, so we just do it by hand
*/
-#define cond_syscall(x) asm(".weak\t" #x "\n" #x "\t=\tsys_ni_syscall");
+#define cond_syscall(x) asm(".weak\t" #x "\n" #x "\t=\tsys_ni_syscall")
#endif /* _ASM_UNISTD_H */
Added: linux-libc-headers/trunk/include/asm-mips/vr41xx/pci.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/asm-mips/vr41xx/pci.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,90 @@
+/*
+ * Include file for NEC VR4100 series PCI Control Unit.
+ *
+ * Copyright (C) 2004-2005 Yoichi Yuasa <yuasa at hh.iij4u.or.jp>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#ifndef __NEC_VR41XX_PCI_H
+#define __NEC_VR41XX_PCI_H
+
+#define PCI_MASTER_ADDRESS_MASK 0x7fffffffU
+
+struct pci_master_address_conversion {
+ uint32_t bus_base_address;
+ uint32_t address_mask;
+ uint32_t pci_base_address;
+};
+
+struct pci_target_address_conversion {
+ uint32_t address_mask;
+ uint32_t bus_base_address;
+};
+
+typedef enum {
+ CANNOT_LOCK_FROM_DEVICE,
+ CAN_LOCK_FROM_DEVICE,
+} pci_exclusive_access_t;
+
+struct pci_mailbox_address {
+ uint32_t base_address;
+};
+
+struct pci_target_address_window {
+ uint32_t base_address;
+};
+
+typedef enum {
+ PCI_ARBITRATION_MODE_FAIR,
+ PCI_ARBITRATION_MODE_ALTERNATE_0,
+ PCI_ARBITRATION_MODE_ALTERNATE_B,
+} pci_arbiter_priority_control_t;
+
+typedef enum {
+ PCI_TAKE_AWAY_GNT_DISABLE,
+ PCI_TAKE_AWAY_GNT_ENABLE,
+} pci_take_away_gnt_mode_t;
+
+struct pci_controller_unit_setup {
+ struct pci_master_address_conversion *master_memory1;
+ struct pci_master_address_conversion *master_memory2;
+
+ struct pci_target_address_conversion *target_memory1;
+ struct pci_target_address_conversion *target_memory2;
+
+ struct pci_master_address_conversion *master_io;
+
+ pci_exclusive_access_t exclusive_access;
+
+ uint32_t pci_clock_max;
+ uint8_t wait_time_limit_from_irdy_to_trdy; /* Only VR4122 is supported */
+
+ struct pci_mailbox_address *mailbox;
+ struct pci_target_address_window *target_window1;
+ struct pci_target_address_window *target_window2;
+
+ uint8_t master_latency_timer;
+ uint8_t retry_limit;
+
+ pci_arbiter_priority_control_t arbiter_priority_control;
+ pci_take_away_gnt_mode_t take_away_gnt_mode;
+
+ struct resource *mem_resource;
+ struct resource *io_resource;
+};
+
+extern void vr41xx_pciu_setup(struct pci_controller_unit_setup *setup);
+
+#endif /* __NEC_VR41XX_PCI_H */
Added: linux-libc-headers/trunk/include/asm-mips/vr41xx/siu.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/asm-mips/vr41xx/siu.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,50 @@
+/*
+ * Include file for NEC VR4100 series Serial Interface Unit.
+ *
+ * Copyright (C) 2005 Yoichi Yuasa <yuasa at hh.iij4u.or.jp>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#ifndef __NEC_VR41XX_SIU_H
+#define __NEC_VR41XX_SIU_H
+
+typedef enum {
+ SIU_INTERFACE_RS232C,
+ SIU_INTERFACE_IRDA,
+} siu_interface_t;
+
+extern void vr41xx_select_siu_interface(siu_interface_t interface);
+
+typedef enum {
+ SIU_USE_IRDA,
+ FIR_USE_IRDA,
+} irda_use_t;
+
+extern void vr41xx_use_irda(irda_use_t use);
+
+typedef enum {
+ SHARP_IRDA,
+ TEMIC_IRDA,
+ HP_IRDA,
+} irda_module_t;
+
+typedef enum {
+ IRDA_TX_1_5MBPS,
+ IRDA_TX_4MBPS,
+} irda_speed_t;
+
+extern void vr41xx_select_irda_module(irda_module_t module, irda_speed_t speed);
+
+#endif /* __NEC_VR41XX_SIU_H */
Modified: linux-libc-headers/trunk/include/asm-mips/vr41xx/vr41xx.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-mips/vr41xx/vr41xx.h (original)
+++ linux-libc-headers/trunk/include/asm-mips/vr41xx/vr41xx.h Tue Jul 5 22:58:33 2005
@@ -45,6 +45,7 @@
/*
* Bus Control Uint
*/
+extern unsigned long vr41xx_calculate_clock_frequency(void);
extern unsigned long vr41xx_get_vtclock_frequency(void);
extern unsigned long vr41xx_get_tclock_frequency(void);
@@ -83,7 +84,7 @@
#define INT2_CASCADE_IRQ MIPS_CPU_IRQ(4)
#define INT3_CASCADE_IRQ MIPS_CPU_IRQ(5)
#define INT4_CASCADE_IRQ MIPS_CPU_IRQ(6)
-#define MIPS_COUNTER_IRQ MIPS_CPU_IRQ(7)
+#define TIMER_IRQ MIPS_CPU_IRQ(7)
/* SYINT1 Interrupt Numbers */
#define SYSINT1_IRQ_BASE 8
@@ -197,22 +198,6 @@
extern void vr41xx_disable_bcuint(void);
/*
- * Power Management Unit
- */
-
-/*
- * RTC
- */
-extern void vr41xx_set_rtclong1_cycle(uint32_t cycles);
-extern uint32_t vr41xx_read_rtclong1_counter(void);
-
-extern void vr41xx_set_rtclong2_cycle(uint32_t cycles);
-extern uint32_t vr41xx_read_rtclong2_counter(void);
-
-extern void vr41xx_set_tclock_cycle(uint32_t cycles);
-extern uint32_t vr41xx_read_tclock_counter(void);
-
-/*
* General-Purpose I/O Unit
*/
enum {
@@ -246,102 +231,4 @@
DATA_HIGH
};
-/*
- * Serial Interface Unit
- */
-extern void vr41xx_siu_init(void);
-extern int vr41xx_serial_ports;
-
-/* SIU interfaces */
-typedef enum {
- SIU_RS232C,
- SIU_IRDA
-} siu_interface_t;
-
-/* IrDA interfaces */
-typedef enum {
- IRDA_NONE,
- IRDA_SHARP,
- IRDA_TEMIC,
- IRDA_HP
-} irda_module_t;
-
-extern void vr41xx_select_siu_interface(siu_interface_t interface,
- irda_module_t module);
-
-/*
- * Debug Serial Interface Unit
- */
-extern void vr41xx_dsiu_init(void);
-
-/*
- * PCI Control Unit
- */
-#define PCI_MASTER_ADDRESS_MASK 0x7fffffffU
-
-struct pci_master_address_conversion {
- uint32_t bus_base_address;
- uint32_t address_mask;
- uint32_t pci_base_address;
-};
-
-struct pci_target_address_conversion {
- uint32_t address_mask;
- uint32_t bus_base_address;
-};
-
-typedef enum {
- CANNOT_LOCK_FROM_DEVICE,
- CAN_LOCK_FROM_DEVICE,
-} pci_exclusive_access_t;
-
-struct pci_mailbox_address {
- uint32_t base_address;
-};
-
-struct pci_target_address_window {
- uint32_t base_address;
-};
-
-typedef enum {
- PCI_ARBITRATION_MODE_FAIR,
- PCI_ARBITRATION_MODE_ALTERNATE_0,
- PCI_ARBITRATION_MODE_ALTERNATE_B,
-} pci_arbiter_priority_control_t;
-
-typedef enum {
- PCI_TAKE_AWAY_GNT_DISABLE,
- PCI_TAKE_AWAY_GNT_ENABLE,
-} pci_take_away_gnt_mode_t;
-
-struct pci_controller_unit_setup {
- struct pci_master_address_conversion *master_memory1;
- struct pci_master_address_conversion *master_memory2;
-
- struct pci_target_address_conversion *target_memory1;
- struct pci_target_address_conversion *target_memory2;
-
- struct pci_master_address_conversion *master_io;
-
- pci_exclusive_access_t exclusive_access;
-
- uint32_t pci_clock_max;
- uint8_t wait_time_limit_from_irdy_to_trdy; /* Only VR4122 is supported */
-
- struct pci_mailbox_address *mailbox;
- struct pci_target_address_window *target_window1;
- struct pci_target_address_window *target_window2;
-
- uint8_t master_latency_timer;
- uint8_t retry_limit;
-
- pci_arbiter_priority_control_t arbiter_priority_control;
- pci_take_away_gnt_mode_t take_away_gnt_mode;
-
- struct resource *mem_resource;
- struct resource *io_resource;
-};
-
-extern void vr41xx_pciu_setup(struct pci_controller_unit_setup *setup);
-
#endif /* __NEC_VR41XX_H */
Modified: linux-libc-headers/trunk/include/asm-parisc/assembly.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-parisc/assembly.h (original)
+++ linux-libc-headers/trunk/include/asm-parisc/assembly.h Tue Jul 5 22:58:33 2005
@@ -37,6 +37,7 @@
#define LDREGX ldwx,s
#define LDREGM ldwm
#define STREGM stwm
+#define SHRREG shr
#define RP_OFFSET 20
#define FRAME_SIZE 64
#define CALLEE_SAVE_FRAME_SIZE 128
@@ -44,7 +45,7 @@
#ifdef CONFIG_PA20
#define BL b,l
-# ifdef CONFIG_PARISC64
+# ifdef CONFIG_64BIT
# define LEVEL 2.0w
# else
# define LEVEL 2.0
Modified: linux-libc-headers/trunk/include/asm-parisc/cacheflush.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-parisc/cacheflush.h (original)
+++ linux-libc-headers/trunk/include/asm-parisc/cacheflush.h Tue Jul 5 22:58:33 2005
@@ -55,9 +55,9 @@
extern void flush_dcache_page(struct page *page);
#define flush_dcache_mmap_lock(mapping) \
- spin_lock_irq(&(mapping)->tree_lock)
+ write_lock_irq(&(mapping)->tree_lock)
#define flush_dcache_mmap_unlock(mapping) \
- spin_unlock_irq(&(mapping)->tree_lock)
+ write_unlock_irq(&(mapping)->tree_lock)
#define flush_icache_page(vma,page) do { flush_kernel_dcache_page(page_address(page)); flush_kernel_icache_page(page_address(page)); } while (0)
@@ -65,14 +65,14 @@
#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
do { \
- flush_cache_page(vma, vaddr); \
+ flush_cache_page(vma, vaddr, page_to_pfn(page)); \
memcpy(dst, src, len); \
flush_kernel_dcache_range_asm((unsigned long)dst, (unsigned long)dst + len); \
} while (0)
#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
do { \
- flush_cache_page(vma, vaddr); \
+ flush_cache_page(vma, vaddr, page_to_pfn(page)); \
memcpy(dst, src, len); \
} while (0)
@@ -168,7 +168,7 @@
}
static inline void
-flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr)
+flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long pfn)
{
BUG_ON(!vma->vm_mm->context);
Modified: linux-libc-headers/trunk/include/asm-parisc/dma.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-parisc/dma.h (original)
+++ linux-libc-headers/trunk/include/asm-parisc/dma.h Tue Jul 5 22:58:33 2005
@@ -37,9 +37,11 @@
** won't compile :-(
*/
#define MAX_DMA_CHANNELS 8
-#define DMA_MODE_READ 1
-#define DMA_MODE_WRITE 2
-#define DMA_AUTOINIT 0x10
+#define DMA_MODE_READ 0x44 /* I/O to memory, no autoinit, increment, single mode */
+#define DMA_MODE_WRITE 0x48 /* memory to I/O, no autoinit, increment, single mode */
+#define DMA_MODE_CASCADE 0xC0 /* pass thru DREQ->HRQ, DACK<-HLDA only */
+
+#define DMA_AUTOINIT 0x10
/* 8237 DMA controllers */
#define IO_DMA1_BASE 0x00 /* 8 bit slave DMA, channels 0..3 */
Modified: linux-libc-headers/trunk/include/asm-parisc/eisa_eeprom.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-parisc/eisa_eeprom.h (original)
+++ linux-libc-headers/trunk/include/asm-parisc/eisa_eeprom.h Tue Jul 5 22:58:33 2005
@@ -13,6 +13,8 @@
#ifndef ASM_EISA_EEPROM_H
#define ASM_EISA_EEPROM_H
+extern void *eisa_eeprom_addr;
+
#define HPEE_MAX_LENGTH 0x2000 /* maximum eeprom length */
#define HPEE_SLOT_INFO(slot) (20+(48*slot))
Modified: linux-libc-headers/trunk/include/asm-parisc/errno.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-parisc/errno.h (original)
+++ linux-libc-headers/trunk/include/asm-parisc/errno.h Tue Jul 5 22:58:33 2005
@@ -100,6 +100,8 @@
#undef EKEYEXPIRED
#undef EKEYREVOKED
#undef EKEYREJECTED
+#undef EOWNERDEAD
+#undef ENOTRECOVERABLE
#define ENOMSG 35 /* No message of desired type */
@@ -214,5 +216,8 @@
#define ENOTSUP 252 /* Function not implemented (POSIX.4 / HPUX) */
#define ECANCELLED 253 /* aio request was canceled before complete (POSIX.4 / HPUX) */
+/* for robust mutexes */
+#define EOWNERDEAD 254 /* Owner died */
+#define ENOTRECOVERABLE 255 /* State not recoverable */
#endif
Modified: linux-libc-headers/trunk/include/asm-parisc/floppy.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-parisc/floppy.h (original)
+++ linux-libc-headers/trunk/include/asm-parisc/floppy.h Tue Jul 5 22:58:33 2005
@@ -234,7 +234,7 @@
return 0;
}
-struct fd_routine_l {
+static struct fd_routine_l {
int (*_request_dma)(unsigned int dmanr, const char * device_id);
void (*_free_dma)(unsigned int dmanr);
int (*_get_dma_residue)(unsigned int dummy);
Modified: linux-libc-headers/trunk/include/asm-parisc/hardirq.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-parisc/hardirq.h (original)
+++ linux-libc-headers/trunk/include/asm-parisc/hardirq.h Tue Jul 5 22:58:33 2005
@@ -16,7 +16,6 @@
#define _PARISC_HARDIRQ_H
#include <linux/threads.h>
-#include <linux/cache.h>
#include <linux/irq.h>
typedef struct {
@@ -25,16 +24,6 @@
#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
-#define HARDIRQ_BITS 16
-
-/*
- * The hardirq mask has to be large enough to have space for potentially all
- * IRQ sources in the system nesting on a single CPU:
- */
-#if (1 << HARDIRQ_BITS) < NR_IRQS
-# error HARDIRQ_BITS is too low!
-#endif
-
void ack_bad_irq(unsigned int irq);
#endif /* _PARISC_HARDIRQ_H */
Modified: linux-libc-headers/trunk/include/asm-parisc/hardware.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-parisc/hardware.h (original)
+++ linux-libc-headers/trunk/include/asm-parisc/hardware.h Tue Jul 5 22:58:33 2005
@@ -122,6 +122,7 @@
extern void get_pci_node_path(struct pci_dev *dev, struct hardware_path *path);
extern void init_parisc_bus(void);
extern struct device *hwpath_to_device(struct hardware_path *modpath);
+extern void device_to_hwpath(struct device *dev, struct hardware_path *path);
/* inventory.c: */
Modified: linux-libc-headers/trunk/include/asm-parisc/io.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-parisc/io.h (original)
+++ linux-libc-headers/trunk/include/asm-parisc/io.h Tue Jul 5 22:58:33 2005
@@ -272,10 +272,11 @@
}
#endif /* !USE_HPPA_IOREMAP */
+/* readb can never be const, so use __fswab instead of le*_to_cpu */
#define readb(addr) __raw_readb(addr)
-#define readw(addr) le16_to_cpu(__raw_readw(addr))
-#define readl(addr) le32_to_cpu(__raw_readl(addr))
-#define readq(addr) le64_to_cpu(__raw_readq(addr))
+#define readw(addr) __fswab16(__raw_readw(addr))
+#define readl(addr) __fswab32(__raw_readl(addr))
+#define readq(addr) __fswab64(__raw_readq(addr))
#define writeb(b, addr) __raw_writeb(b, addr)
#define writew(b, addr) __raw_writew(cpu_to_le16(b), addr)
#define writel(b, addr) __raw_writel(cpu_to_le32(b), addr)
@@ -401,4 +402,15 @@
#define F_EXTEND(x) ((unsigned long)((x) | (0xffffffff00000000ULL)))
+/*
+ * Convert a physical pointer to a virtual kernel pointer for /dev/mem
+ * access
+ */
+#define xlate_dev_mem_ptr(p) __va(p)
+
+/*
+ * Convert a virtual cached pointer to an uncached pointer
+ */
+#define xlate_dev_kmem_ptr(p) p
+
#endif
Modified: linux-libc-headers/trunk/include/asm-parisc/irq.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-parisc/irq.h (original)
+++ linux-libc-headers/trunk/include/asm-parisc/irq.h Tue Jul 5 22:58:33 2005
@@ -86,10 +86,12 @@
extern struct irq_region *alloc_irq_region(int count, struct irq_region_ops *ops,
const char *name, void *dev);
-extern int txn_alloc_irq(void);
+extern int txn_alloc_irq(unsigned int nbits);
extern int txn_claim_irq(int);
-extern unsigned int txn_alloc_data(int, unsigned int);
-extern unsigned long txn_alloc_addr(int);
+extern unsigned int txn_alloc_data(unsigned int);
+extern unsigned long txn_alloc_addr(unsigned int);
+
+extern int cpu_claim_irq(unsigned int irq, struct hw_interrupt_type *, void *);
/* soft power switch support (power.c) */
extern struct tasklet_struct power_tasklet;
Modified: linux-libc-headers/trunk/include/asm-parisc/led.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-parisc/led.h (original)
+++ linux-libc-headers/trunk/include/asm-parisc/led.h Tue Jul 5 22:58:33 2005
@@ -21,19 +21,23 @@
#define DISPLAY_MODEL_LASI 2 /* LASI style 8 bit LED */
#define DISPLAY_MODEL_OLD_ASP 0x7F /* faked: ASP style 8 x 1 bit LED (only very old ASP versions) */
-#define LED_CMD_REG_NONE NULL /* NULL == no addr for the cmd register */
+#define LED_CMD_REG_NONE 0 /* NULL == no addr for the cmd register */
/* led tasklet struct */
extern struct tasklet_struct led_tasklet;
/* register_led_driver() */
-int __init register_led_driver( int model, char *cmd_reg, char *data_reg );
+int __init register_led_driver(int model, unsigned long cmd_reg, unsigned long data_reg);
/* registers the LED regions for procfs */
void __init register_led_regions(void);
+#ifdef CONFIG_CHASSIS_LCD_LED
/* writes a string to the LCD display (if possible on this h/w) */
int lcd_print(char *str);
+#else
+#define lcd_print(str)
+#endif
/* main LED initialization function (uses PDC) */
int __init led_init(void);
Modified: linux-libc-headers/trunk/include/asm-parisc/module.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-parisc/module.h (original)
+++ linux-libc-headers/trunk/include/asm-parisc/module.h Tue Jul 5 22:58:33 2005
@@ -17,12 +17,16 @@
#define Elf_Rela Elf32_Rela
#endif
+struct unwind_table;
+
struct mod_arch_specific
{
unsigned long got_offset, got_count, got_max;
unsigned long fdesc_offset, fdesc_count, fdesc_max;
unsigned long stub_offset, stub_count, stub_max;
unsigned long init_stub_offset, init_stub_count, init_stub_max;
+ int unwind_section;
+ struct unwind_table *unwind;
};
#endif /* _ASM_PARISC_MODULE_H */
Modified: linux-libc-headers/trunk/include/asm-parisc/parisc-device.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-parisc/parisc-device.h (original)
+++ linux-libc-headers/trunk/include/asm-parisc/parisc-device.h Tue Jul 5 22:58:33 2005
@@ -6,6 +6,7 @@
struct parisc_driver *driver; /* Driver for this device */
char name[80]; /* The hardware description */
int irq;
+ int aux_irq; /* Some devices have a second IRQ */
char hw_path; /* The module number on this bus */
unsigned int num_addrs; /* some devices have additional address ranges. */
Modified: linux-libc-headers/trunk/include/asm-parisc/pdc_chassis.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-parisc/pdc_chassis.h (original)
+++ linux-libc-headers/trunk/include/asm-parisc/pdc_chassis.h Tue Jul 5 22:58:33 2005
@@ -1,8 +1,8 @@
/*
- * include/asm-parisc/pdc_chassis.h
+ * include/asm-parisc/pdc_chassis.h
*
- * Copyright (C) 2002 Laurent Canet <canetl at esiee.fr>
- * Copyright (C) 2002 Thibaut Varene <varenet at esiee.fr>
+ * Copyright (C) 2002 Laurent Canet <canetl at esiee.fr>
+ * Copyright (C) 2002 Thibaut Varene <varenet at parisc-linux.org>
*
*
* This program is free software; you can redistribute it and/or modify
Modified: linux-libc-headers/trunk/include/asm-parisc/pdcpat.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-parisc/pdcpat.h (original)
+++ linux-libc-headers/trunk/include/asm-parisc/pdcpat.h Tue Jul 5 22:58:33 2005
@@ -190,16 +190,16 @@
#ifndef __ASSEMBLY__
#include <linux/types.h>
-#ifdef CONFIG_PARISC64
+#ifdef CONFIG_64BIT
#define is_pdc_pat() (PDC_TYPE_PAT == pdc_type)
extern int pdc_pat_get_irt_size(unsigned long *num_entries, unsigned long cell_num);
extern int pdc_pat_get_irt(void *r_addr, unsigned long cell_num);
-#else /* ! CONFIG_PARISC64 */
+#else /* ! CONFIG_64BIT */
/* No PAT support for 32-bit kernels...sorry */
#define is_pdc_pat() (0)
#define pdc_pat_get_irt_size(num_entries, cell_numn) PDC_BAD_PROC
#define pdc_pat_get_irt(r_addr, cell_num) PDC_BAD_PROC
-#endif /* ! CONFIG_PARISC64 */
+#endif /* ! CONFIG_64BIT */
struct pdc_pat_cell_num {
Modified: linux-libc-headers/trunk/include/asm-parisc/pgalloc.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-parisc/pgalloc.h (original)
+++ linux-libc-headers/trunk/include/asm-parisc/pgalloc.h Tue Jul 5 22:58:33 2005
@@ -6,7 +6,6 @@
#include <asm/processor.h>
#include <asm/fixmap.h>
-#include <asm/pgtable.h>
#include <asm/cache.h>
/* Allocate the top level pgd (page directory)
Modified: linux-libc-headers/trunk/include/asm-parisc/spinlock.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-parisc/spinlock.h (original)
+++ linux-libc-headers/trunk/include/asm-parisc/spinlock.h Tue Jul 5 22:58:33 2005
@@ -226,7 +226,7 @@
}
#ifdef CONFIG_DEBUG_RWLOCK
-extern void _dbg_write_trylock(rwlock_t * rw, const char *bfile, int bline);
+extern int _dbg_write_trylock(rwlock_t * rw, const char *bfile, int bline);
#define _raw_write_trylock(rw) _dbg_write_trylock(rw, __FILE__, __LINE__)
#else
static __inline__ int _raw_write_trylock(rwlock_t *rw)
Modified: linux-libc-headers/trunk/include/asm-parisc/system.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-parisc/system.h (original)
+++ linux-libc-headers/trunk/include/asm-parisc/system.h Tue Jul 5 22:58:33 2005
@@ -124,7 +124,7 @@
** The __asm__ op below simple prevents gcc/ld from reordering
** instructions across the mb() "call".
*/
-#define mb() __asm__ __volatile__("":::"memory"); /* barrier() */
+#define mb() __asm__ __volatile__("":::"memory") /* barrier() */
#define rmb() mb()
#define wmb() mb()
#define smp_mb() mb()
@@ -204,4 +204,6 @@
#endif
+#define arch_align_stack(x) (x)
+
#endif
Modified: linux-libc-headers/trunk/include/asm-parisc/unistd.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-parisc/unistd.h (original)
+++ linux-libc-headers/trunk/include/asm-parisc/unistd.h Tue Jul 5 22:58:33 2005
@@ -1001,6 +1001,6 @@
* What we want is __attribute__((weak,alias("sys_ni_syscall"))),
* but it doesn't work on all toolchains, so we just do it by hand
*/
-#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall");
+#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
#endif /* _ASM_PARISC_UNISTD_H_ */
Modified: linux-libc-headers/trunk/include/asm-parisc/unwind.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-parisc/unwind.h (original)
+++ linux-libc-headers/trunk/include/asm-parisc/unwind.h Tue Jul 5 22:58:33 2005
@@ -1,6 +1,8 @@
#ifndef _UNWIND_H_
#define _UNWIND_H_
+#include <linux/list.h>
+
/* From ABI specifications */
struct unwind_table_entry {
unsigned int region_start;
@@ -39,7 +41,7 @@
};
struct unwind_table {
- struct unwind_table *next;
+ struct list_head list;
const char *name;
unsigned long gp;
unsigned long base_addr;
@@ -55,15 +57,18 @@
available; but for now we only try to get the sp and ip for each
frame */
/* struct pt_regs regs; */
- unsigned long sp, ip, rp;
+ unsigned long sp, ip, rp, r31;
unsigned long prev_sp, prev_ip;
};
-void * unwind_table_add(const char *name, unsigned long base_addr,
- unsigned long gp,
- void *start, void *end);
+struct unwind_table *
+unwind_table_add(const char *name, unsigned long base_addr,
+ unsigned long gp, void *start, void *end);
+void
+unwind_table_remove(struct unwind_table *table);
+
void unwind_frame_init(struct unwind_frame_info *info, struct task_struct *t,
- unsigned long sp, unsigned long ip, unsigned long rp);
+ struct pt_regs *regs);
void unwind_frame_init_from_blocked_task(struct unwind_frame_info *info, struct task_struct *t);
void unwind_frame_init_running(struct unwind_frame_info *info, struct pt_regs *regs);
int unwind_once(struct unwind_frame_info *info);
Modified: linux-libc-headers/trunk/include/asm-ppc/agp.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ppc/agp.h (original)
+++ linux-libc-headers/trunk/include/asm-ppc/agp.h Tue Jul 5 22:58:33 2005
@@ -10,4 +10,14 @@
#define flush_agp_mappings()
#define flush_agp_cache() mb()
+/* Convert a physical address to an address suitable for the GART. */
+#define phys_to_gart(x) (x)
+#define gart_to_phys(x) (x)
+
+/* GATT allocation. Returns/accepts GATT kernel virtual address. */
+#define alloc_gatt_pages(order) \
+ ((char *)__get_free_pages(GFP_KERNEL, (order)))
+#define free_gatt_pages(table, order) \
+ free_pages((unsigned long)(table), (order))
+
#endif
Modified: linux-libc-headers/trunk/include/asm-ppc/keylargo.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ppc/keylargo.h (original)
+++ linux-libc-headers/trunk/include/asm-ppc/keylargo.h Tue Jul 5 22:58:33 2005
@@ -228,6 +228,11 @@
#define K2_FCR1_PCI1_BUS_RESET_N 0x00000010
#define K2_FCR1_PCI1_SLEEP_RESET_EN 0x00000020
+#define K2_FCR1_I2S0_CELL_ENABLE 0x00000400
+#define K2_FCR1_I2S0_RESET 0x00000800
+#define K2_FCR1_I2S0_CLK_ENABLE_BIT 0x00001000
+#define K2_FCR1_I2S0_ENABLE 0x00002000
+
#define K2_FCR1_PCI1_CLK_ENABLE 0x00004000
#define K2_FCR1_FW_CLK_ENABLE 0x00008000
#define K2_FCR1_FW_RESET_N 0x00010000
Modified: linux-libc-headers/trunk/include/asm-ppc/macio.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ppc/macio.h (original)
+++ linux-libc-headers/trunk/include/asm-ppc/macio.h Tue Jul 5 22:58:33 2005
@@ -126,7 +126,7 @@
int (*probe)(struct macio_dev* dev, const struct of_match *match);
int (*remove)(struct macio_dev* dev);
- int (*suspend)(struct macio_dev* dev, __u32 state);
+ int (*suspend)(struct macio_dev* dev, pm_message_t state);
int (*resume)(struct macio_dev* dev);
int (*shutdown)(struct macio_dev* dev);
Modified: linux-libc-headers/trunk/include/asm-ppc/of_device.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ppc/of_device.h (original)
+++ linux-libc-headers/trunk/include/asm-ppc/of_device.h Tue Jul 5 22:58:33 2005
@@ -54,7 +54,7 @@
int (*probe)(struct of_device* dev, const struct of_match *match);
int (*remove)(struct of_device* dev);
- int (*suspend)(struct of_device* dev, __u32 state);
+ int (*suspend)(struct of_device* dev, pm_message_t state);
int (*resume)(struct of_device* dev);
int (*shutdown)(struct of_device* dev);
Modified: linux-libc-headers/trunk/include/asm-ppc/open_pic.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ppc/open_pic.h (original)
+++ linux-libc-headers/trunk/include/asm-ppc/open_pic.h Tue Jul 5 22:58:33 2005
@@ -55,6 +55,7 @@
int wait);
extern void openpic_set_k2_cascade(int irq);
extern void openpic_set_priority(u_int pri);
+extern u_int openpic_get_priority(void);
extern inline int openpic_to_irq(int irq)
{
Modified: linux-libc-headers/trunk/include/asm-ppc/ppcboot.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ppc/ppcboot.h (original)
+++ linux-libc-headers/trunk/include/asm-ppc/ppcboot.h Tue Jul 5 22:58:33 2005
@@ -38,7 +38,8 @@
unsigned long bi_flashoffset; /* reserved area for startup monitor */
unsigned long bi_sramstart; /* start of SRAM memory */
unsigned long bi_sramsize; /* size of SRAM memory */
-#if defined(CONFIG_8xx) || defined(CONFIG_CPM2) || defined(CONFIG_85xx)
+#if defined(CONFIG_8xx) || defined(CONFIG_CPM2) || defined(CONFIG_85xx) ||\
+ defined(CONFIG_83xx)
unsigned long bi_immr_base; /* base of IMMR register */
#endif
#if defined(CONFIG_PPC_MPC52xx)
@@ -72,7 +73,8 @@
#if defined(CONFIG_HYMOD)
hymod_conf_t bi_hymod_conf; /* hymod configuration information */
#endif
-#if defined(CONFIG_EVB64260) || defined(CONFIG_44x) || defined(CONFIG_85xx)
+#if defined(CONFIG_EVB64260) || defined(CONFIG_44x) || defined(CONFIG_85xx) ||\
+ defined(CONFIG_83xx)
/* second onboard ethernet port */
unsigned char bi_enet1addr[6];
#endif
Added: linux-libc-headers/trunk/include/asm-ppc/suspend.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/asm-ppc/suspend.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,12 @@
+static inline int arch_prepare_suspend(void)
+{
+ return 0;
+}
+
+static inline void save_processor_state(void)
+{
+}
+
+static inline void restore_processor_state(void)
+{
+}
Modified: linux-libc-headers/trunk/include/asm-ppc/todc.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ppc/todc.h (original)
+++ linux-libc-headers/trunk/include/asm-ppc/todc.h Tue Jul 5 22:58:33 2005
@@ -98,6 +98,7 @@
#define TODC_TYPE_PC97307 10 /* PC97307 internal RTC */
#define TODC_TYPE_DS1557 11 /* Dallas DS1557 RTC */
#define TODC_TYPE_DS17285 12 /* Dallas DS17285 RTC */
+#define TODC_TYPE_DS1553 13 /* Dallas DS1553 RTC */
#define TODC_TYPE_MC146818 100 /* Leave room for m48txx's */
/*
@@ -208,6 +209,28 @@
#define TODC_TYPE_DS1501_NVRAM_ADDR_REG 0x10
#define TODC_TYPE_DS1501_NVRAM_DATA_REG 0x13
+#define TODC_TYPE_DS1553_NVRAM_SIZE 0x1ff0
+#define TODC_TYPE_DS1553_SW_FLAGS 0
+#define TODC_TYPE_DS1553_YEAR 0x1fff
+#define TODC_TYPE_DS1553_MONTH 0x1ffe
+#define TODC_TYPE_DS1553_DOM 0x1ffd /* Day of Month */
+#define TODC_TYPE_DS1553_DOW 0x1ffc /* Day of Week */
+#define TODC_TYPE_DS1553_HOURS 0x1ffb
+#define TODC_TYPE_DS1553_MINUTES 0x1ffa
+#define TODC_TYPE_DS1553_SECONDS 0x1ff9
+#define TODC_TYPE_DS1553_CNTL_B 0x1ff9
+#define TODC_TYPE_DS1553_CNTL_A 0x1ff8 /* control_a R/W regs */
+#define TODC_TYPE_DS1553_WATCHDOG 0x1ff7
+#define TODC_TYPE_DS1553_INTERRUPTS 0x1ff6
+#define TODC_TYPE_DS1553_ALARM_DATE 0x1ff5
+#define TODC_TYPE_DS1553_ALARM_HOUR 0x1ff4
+#define TODC_TYPE_DS1553_ALARM_MINUTES 0x1ff3
+#define TODC_TYPE_DS1553_ALARM_SECONDS 0x1ff2
+#define TODC_TYPE_DS1553_CENTURY 0x1ff8
+#define TODC_TYPE_DS1553_FLAGS 0x1ff0
+#define TODC_TYPE_DS1553_NVRAM_ADDR_REG 0
+#define TODC_TYPE_DS1553_NVRAM_DATA_REG 0
+
#define TODC_TYPE_DS1557_NVRAM_SIZE 0x7fff0
#define TODC_TYPE_DS1557_SW_FLAGS 0
#define TODC_TYPE_DS1557_YEAR 0x7ffff
Modified: linux-libc-headers/trunk/include/asm-ppc/unistd.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ppc/unistd.h (original)
+++ linux-libc-headers/trunk/include/asm-ppc/unistd.h Tue Jul 5 22:58:33 2005
@@ -276,8 +276,9 @@
#define __NR_add_key 269
#define __NR_request_key 270
#define __NR_keyctl 271
+#define __NR_waitid 272
-#define __NR_syscalls 272
+#define __NR_syscalls 273
#define __NR(n) #n
@@ -296,6 +297,7 @@
register unsigned long __sc_5 __asm__ ("r5"); \
register unsigned long __sc_6 __asm__ ("r6"); \
register unsigned long __sc_7 __asm__ ("r7"); \
+ register unsigned long __sc_8 __asm__ ("r8"); \
\
__sc_loadargs_##nr(name, args); \
__asm__ __volatile__ \
@@ -304,10 +306,10 @@
: "=&r" (__sc_0), \
"=&r" (__sc_3), "=&r" (__sc_4), \
"=&r" (__sc_5), "=&r" (__sc_6), \
- "=&r" (__sc_7) \
+ "=&r" (__sc_7), "=&r" (__sc_8) \
: __sc_asm_input_##nr \
: "cr0", "ctr", "memory", \
- "r8", "r9", "r10","r11", "r12"); \
+ "r9", "r10","r11", "r12"); \
__sc_ret = __sc_3; \
__sc_err = __sc_0; \
} \
@@ -335,6 +337,9 @@
#define __sc_loadargs_5(name, arg1, arg2, arg3, arg4, arg5) \
__sc_loadargs_4(name, arg1, arg2, arg3, arg4); \
__sc_7 = (unsigned long) (arg5)
+#define __sc_loadargs_6(name, arg1, arg2, arg3, arg4, arg5, arg6) \
+ __sc_loadargs_5(name, arg1, arg2, arg3, arg4, arg5); \
+ __sc_8 = (unsigned long) (arg6)
#define __sc_asm_input_0 "0" (__sc_0)
#define __sc_asm_input_1 __sc_asm_input_0, "1" (__sc_3)
@@ -342,6 +347,7 @@
#define __sc_asm_input_3 __sc_asm_input_2, "3" (__sc_5)
#define __sc_asm_input_4 __sc_asm_input_3, "4" (__sc_6)
#define __sc_asm_input_5 __sc_asm_input_4, "5" (__sc_7)
+#define __sc_asm_input_6 __sc_asm_input_5, "6" (__sc_8)
#define _syscall0(type,name) \
type name(void) \
@@ -379,5 +385,10 @@
__syscall_nr(5, type, name, arg1, arg2, arg3, arg4, arg5); \
}
+#define _syscall6(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5,type6,arg6) \
+type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6) \
+{ \
+ __syscall_nr(6, type, name, arg1, arg2, arg3, arg4, arg5, arg6); \
+}
#endif /* _ASM_PPC_UNISTD_H_ */
Modified: linux-libc-headers/trunk/include/asm-ppc64/a.out.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ppc64/a.out.h (original)
+++ linux-libc-headers/trunk/include/asm-ppc64/a.out.h Tue Jul 5 22:58:33 2005
@@ -1,8 +1,6 @@
#ifndef __PPC64_A_OUT_H__
#define __PPC64_A_OUT_H__
-#include <asm/ppcdebug.h>
-
/*
* c 2001 PPC 64 Team, IBM Corp
*
Added: linux-libc-headers/trunk/include/asm-ppc64/agp.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/asm-ppc64/agp.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,23 @@
+#ifndef AGP_H
+#define AGP_H 1
+
+#include <asm/io.h>
+
+/* nothing much needed here */
+
+#define map_page_into_agp(page)
+#define unmap_page_from_agp(page)
+#define flush_agp_mappings()
+#define flush_agp_cache() mb()
+
+/* Convert a physical address to an address suitable for the GART. */
+#define phys_to_gart(x) (x)
+#define gart_to_phys(x) (x)
+
+/* GATT allocation. Returns/accepts GATT kernel virtual address. */
+#define alloc_gatt_pages(order) \
+ ((char *)__get_free_pages(GFP_KERNEL, (order)))
+#define free_gatt_pages(table, order) \
+ free_pages((unsigned long)(table), (order))
+
+#endif
Modified: linux-libc-headers/trunk/include/asm-ppc64/cacheflush.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ppc64/cacheflush.h (original)
+++ linux-libc-headers/trunk/include/asm-ppc64/cacheflush.h Tue Jul 5 22:58:33 2005
@@ -11,7 +11,7 @@
#define flush_cache_all() do { } while (0)
#define flush_cache_mm(mm) do { } while (0)
#define flush_cache_range(vma, start, end) do { } while (0)
-#define flush_cache_page(vma, vmaddr) do { } while (0)
+#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
#define flush_icache_page(vma, page) do { } while (0)
#define flush_cache_vmap(start, end) do { } while (0)
#define flush_cache_vunmap(start, end) do { } while (0)
@@ -27,6 +27,7 @@
extern void flush_dcache_range(unsigned long start, unsigned long stop);
extern void flush_dcache_phys_range(unsigned long start, unsigned long stop);
+extern void flush_inval_dcache_range(unsigned long start, unsigned long stop);
#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
do { memcpy(dst, src, len); \
@@ -39,7 +40,7 @@
static inline void flush_icache_range(unsigned long start, unsigned long stop)
{
- if (!(cur_cpu_spec->cpu_features & CPU_FTR_COHERENT_ICACHE))
+ if (!cpu_has_feature(CPU_FTR_COHERENT_ICACHE))
__flush_icache_range(start, stop);
}
Modified: linux-libc-headers/trunk/include/asm-ppc64/eeh.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ppc64/eeh.h (original)
+++ linux-libc-headers/trunk/include/asm-ppc64/eeh.h Tue Jul 5 22:58:33 2005
@@ -101,17 +101,30 @@
*/
#define EEH_IO_ERROR_VALUE(size) (~0U >> ((4 - (size)) * 8))
-#else
-#define eeh_init()
-#define eeh_check_failure(token, val) (val)
-#define eeh_dn_check_failure(dn, dev) (0)
-#define pci_addr_cache_build()
-#define eeh_add_device_early(dn)
-#define eeh_add_device_late(dev)
-#define eeh_remove_device(dev)
+#else /* !CONFIG_EEH */
+static inline void eeh_init(void) { }
+
+static inline unsigned long eeh_check_failure(const volatile void *token, unsigned long val)
+{
+ return val;
+}
+
+static inline int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev)
+{
+ return 0;
+}
+
+static inline void pci_addr_cache_build(void) { }
+
+static inline void eeh_add_device_early(struct device_node *dn) { }
+
+static inline void eeh_add_device_late(struct pci_dev *dev) { }
+
+static inline void eeh_remove_device(struct pci_dev *dev) { }
+
#define EEH_POSSIBLE_ERROR(val, type) (0)
#define EEH_IO_ERROR_VALUE(size) (-1UL)
-#endif
+#endif /* CONFIG_EEH */
/*
* MMIO read/write operations with EEH support.
@@ -342,22 +355,22 @@
static inline void eeh_insb(unsigned long port, void * buf, int ns)
{
_insb((__u8 *)(port+pci_io_base), buf, ns);
- if (EEH_POSSIBLE_ERROR((*(((u8*)buf)+ns-1)), __u8))
- eeh_check_failure((void *)(port), *(u8*)buf);
+ if (EEH_POSSIBLE_ERROR((*(((__u8*)buf)+ns-1)), __u8))
+ eeh_check_failure((void *)(port), *(__u8*)buf);
}
static inline void eeh_insw_ns(unsigned long port, void * buf, int ns)
{
_insw_ns((__u16 *)(port+pci_io_base), buf, ns);
- if (EEH_POSSIBLE_ERROR((*(((u16*)buf)+ns-1)), __u16))
- eeh_check_failure((void *)(port), *(u16*)buf);
+ if (EEH_POSSIBLE_ERROR((*(((__u16*)buf)+ns-1)), __u16))
+ eeh_check_failure((void *)(port), *(__u16*)buf);
}
static inline void eeh_insl_ns(unsigned long port, void * buf, int nl)
{
_insl_ns((__u32 *)(port+pci_io_base), buf, nl);
- if (EEH_POSSIBLE_ERROR((*(((u32*)buf)+nl-1)), __u32))
- eeh_check_failure((void *)(port), *(u32*)buf);
+ if (EEH_POSSIBLE_ERROR((*(((__u32*)buf)+nl-1)), __u32))
+ eeh_check_failure((void *)(port), *(__u32*)buf);
}
#endif /* _PPC64_EEH_H */
Modified: linux-libc-headers/trunk/include/asm-ppc64/elf.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ppc64/elf.h (original)
+++ linux-libc-headers/trunk/include/asm-ppc64/elf.h Tue Jul 5 22:58:33 2005
@@ -111,7 +111,7 @@
/* Assumption: ELF_ARCH == EM_PPC and ELF_CLASS == ELFCLASS32 */
typedef elf_greg_t32 elf_greg_t;
typedef elf_gregset_t32 elf_gregset_t;
-# define elf_addr_t u32
+# define elf_addr_t __u32
#endif
typedef double elf_fpreg_t;
@@ -186,10 +186,20 @@
/* A special ignored type value for PPC, for glibc compatibility. */
#define AT_IGNOREPPC 22
+/* The vDSO location. We have to use the same value as x86 for glibc's
+ * sake :-)
+ */
+#define AT_SYSINFO_EHDR 33
+
extern int dcache_bsize;
extern int icache_bsize;
extern int ucache_bsize;
+/* We do have an arch_setup_additional_pages for vDSO matters */
+#define ARCH_HAS_SETUP_ADDITIONAL_PAGES
+struct linux_binprm;
+extern int arch_setup_additional_pages(struct linux_binprm *bprm, int executable_stack);
+
/*
* The requirements here are:
* - keep the final alignment of sp (sp & 0xf)
@@ -208,6 +218,8 @@
NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize); \
NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize); \
NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize); \
+ /* vDSO base */ \
+ NEW_AUX_ENT(AT_SYSINFO_EHDR, current->thread.vdso_base); \
} while (0)
/* PowerPC64 relocations defined by the ABIs */
Modified: linux-libc-headers/trunk/include/asm-ppc64/hvcall.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ppc64/hvcall.h (original)
+++ linux-libc-headers/trunk/include/asm-ppc64/hvcall.h Tue Jul 5 22:58:33 2005
@@ -1,6 +1,8 @@
#ifndef _PPC64_HVCALL_H
#define _PPC64_HVCALL_H
+#define HVSC .long 0x44000022
+
#define H_Success 0
#define H_Busy 1 /* Hardware busy -- retry later */
#define H_Constrained 4 /* Resource request constrained to max allowed */
@@ -41,7 +43,7 @@
/* Flags */
#define H_LARGE_PAGE (1UL<<(63-16))
-#define H_EXACT (1UL<<(63-24)) /* Use exact PTE or return H_PTEG_FULL */
+#define H_EXACT (1UL<<(63-24)) /* Use exact PTE or return H_PTEG_FULL */
#define H_R_XLATE (1UL<<(63-25)) /* include a valid logical page num in the pte if the valid bit is set */
#define H_READ_4 (1UL<<(63-26)) /* Return 4 PTEs */
#define H_AVPN (1UL<<(63-32)) /* An avpn is provided as a sanity test */
@@ -54,8 +56,6 @@
#define H_PP1 (1UL<<(63-62))
#define H_PP2 (1UL<<(63-63))
-
-
/* pSeries hypervisor opcodes */
#define H_REMOVE 0x04
#define H_ENTER 0x08
@@ -108,6 +108,8 @@
#define H_FREE_VTERM 0x158
#define H_POLL_PENDING 0x1D8
+#ifndef __ASSEMBLY__
+
/* plpar_hcall() -- Generic call interface using above opcodes
*
* The actual call interface is a hypervisor call instruction with
@@ -125,8 +127,6 @@
unsigned long *out2,
unsigned long *out3);
-#define HVSC ".long 0x44000022\n"
-
/* Same as plpar_hcall but for those opcodes that return no values
* other than status. Slightly more efficient.
*/
@@ -147,9 +147,6 @@
unsigned long arg7,
unsigned long arg8,
unsigned long *out1);
-
-
-
/* plpar_hcall_4out()
*
@@ -166,4 +163,5 @@
unsigned long *out3,
unsigned long *out4);
+#endif /* __ASSEMBLY__ */
#endif /* _PPC64_HVCALL_H */
Modified: linux-libc-headers/trunk/include/asm-ppc64/iSeries/HvCallPci.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ppc64/iSeries/HvCallPci.h (original)
+++ linux-libc-headers/trunk/include/asm-ppc64/iSeries/HvCallPci.h Tue Jul 5 22:58:33 2005
@@ -131,7 +131,7 @@
struct HvCallPci_DsaAddr dsa;
struct HvCallPci_LoadReturn retVal;
- *((u64*)&dsa) = 0;
+ *((__u64*)&dsa) = 0;
dsa.busNumber = busNumber;
dsa.subBusNumber = subBusNumber;
@@ -153,7 +153,7 @@
struct HvCallPci_DsaAddr dsa;
struct HvCallPci_LoadReturn retVal;
- *((u64*)&dsa) = 0;
+ *((__u64*)&dsa) = 0;
dsa.busNumber = busNumber;
dsa.subBusNumber = subBusNumber;
@@ -175,7 +175,7 @@
struct HvCallPci_DsaAddr dsa;
struct HvCallPci_LoadReturn retVal;
- *((u64*)&dsa) = 0;
+ *((__u64*)&dsa) = 0;
dsa.busNumber = busNumber;
dsa.subBusNumber = subBusNumber;
@@ -197,7 +197,7 @@
struct HvCallPci_DsaAddr dsa;
__u64 retVal;
- *((u64*)&dsa) = 0;
+ *((__u64*)&dsa) = 0;
dsa.busNumber = busNumber;
dsa.subBusNumber = subBusNumber;
@@ -217,7 +217,7 @@
struct HvCallPci_DsaAddr dsa;
__u64 retVal;
- *((u64*)&dsa) = 0;
+ *((__u64*)&dsa) = 0;
dsa.busNumber = busNumber;
dsa.subBusNumber = subBusNumber;
@@ -237,7 +237,7 @@
struct HvCallPci_DsaAddr dsa;
__u64 retVal;
- *((u64*)&dsa) = 0;
+ *((__u64*)&dsa) = 0;
dsa.busNumber = busNumber;
dsa.subBusNumber = subBusNumber;
@@ -255,12 +255,12 @@
__u8 deviceIdParm,
__u8 barNumberParm,
__u64 offsetParm,
- u8* valueParm)
+ __u8* valueParm)
{
struct HvCallPci_DsaAddr dsa;
struct HvCallPci_LoadReturn retVal;
- *((u64*)&dsa) = 0;
+ *((__u64*)&dsa) = 0;
dsa.busNumber = busNumberParm;
dsa.subBusNumber = subBusParm;
@@ -281,12 +281,12 @@
__u8 deviceIdParm,
__u8 barNumberParm,
__u64 offsetParm,
- u16* valueParm)
+ __u16* valueParm)
{
struct HvCallPci_DsaAddr dsa;
struct HvCallPci_LoadReturn retVal;
- *((u64*)&dsa) = 0;
+ *((__u64*)&dsa) = 0;
dsa.busNumber = busNumberParm;
dsa.subBusNumber = subBusParm;
@@ -307,12 +307,12 @@
__u8 deviceIdParm,
__u8 barNumberParm,
__u64 offsetParm,
- u32* valueParm)
+ __u32* valueParm)
{
struct HvCallPci_DsaAddr dsa;
struct HvCallPci_LoadReturn retVal;
- *((u64*)&dsa) = 0;
+ *((__u64*)&dsa) = 0;
dsa.busNumber = busNumberParm;
dsa.subBusNumber = subBusParm;
@@ -333,12 +333,12 @@
__u8 deviceIdParm,
__u8 barNumberParm,
__u64 offsetParm,
- u64* valueParm)
+ __u64* valueParm)
{
struct HvCallPci_DsaAddr dsa;
struct HvCallPci_LoadReturn retVal;
- *((u64*)&dsa) = 0;
+ *((__u64*)&dsa) = 0;
dsa.busNumber = busNumberParm;
dsa.subBusNumber = subBusParm;
@@ -364,7 +364,7 @@
struct HvCallPci_DsaAddr dsa;
__u64 retVal;
- *((u64*)&dsa) = 0;
+ *((__u64*)&dsa) = 0;
dsa.busNumber = busNumberParm;
dsa.subBusNumber = subBusParm;
@@ -388,7 +388,7 @@
struct HvCallPci_DsaAddr dsa;
__u64 retVal;
- *((u64*)&dsa) = 0;
+ *((__u64*)&dsa) = 0;
dsa.busNumber = busNumberParm;
dsa.subBusNumber = subBusParm;
@@ -412,7 +412,7 @@
struct HvCallPci_DsaAddr dsa;
__u64 retVal;
- *((u64*)&dsa) = 0;
+ *((__u64*)&dsa) = 0;
dsa.busNumber = busNumberParm;
dsa.subBusNumber = subBusParm;
@@ -436,7 +436,7 @@
struct HvCallPci_DsaAddr dsa;
__u64 retVal;
- *((u64*)&dsa) = 0;
+ *((__u64*)&dsa) = 0;
dsa.busNumber = busNumberParm;
dsa.subBusNumber = subBusParm;
@@ -457,13 +457,13 @@
struct HvCallPci_DsaAddr dsa;
struct HvCallPci_LoadReturn retVal;
- *((u64*)&dsa) = 0;
+ *((__u64*)&dsa) = 0;
dsa.busNumber = busNumberParm;
dsa.subBusNumber = subBusParm;
dsa.deviceId = deviceIdParm;
- HvCall1Ret16(HvCallPciEoi, &retVal, *(u64*)&dsa);
+ HvCall1Ret16(HvCallPciEoi, &retVal, *(__u64*)&dsa);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
@@ -480,14 +480,14 @@
struct HvCallPci_DsaAddr dsa;
__u64 retVal;
- *((u64*)&dsa) = 0;
+ *((__u64*)&dsa) = 0;
dsa.busNumber = busNumberParm;
dsa.subBusNumber = subBusParm;
dsa.deviceId = deviceIdParm;
dsa.barNumber = barNumberParm;
- retVal = HvCall3(HvCallPciGetBarParms, *(u64*)&dsa, parms, sizeofParms);
+ retVal = HvCall3(HvCallPciGetBarParms, *(__u64*)&dsa, parms, sizeofParms);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
@@ -502,13 +502,13 @@
struct HvCallPci_DsaAddr dsa;
__u64 retVal;
- *((u64*)&dsa) = 0;
+ *((__u64*)&dsa) = 0;
dsa.busNumber = busNumberParm;
dsa.subBusNumber = subBusParm;
dsa.deviceId = deviceIdParm;
- retVal = HvCall2(HvCallPciMaskFisr, *(u64*)&dsa, fisrMask);
+ retVal = HvCall2(HvCallPciMaskFisr, *(__u64*)&dsa, fisrMask);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
@@ -523,13 +523,13 @@
struct HvCallPci_DsaAddr dsa;
__u64 retVal;
- *((u64*)&dsa) = 0;
+ *((__u64*)&dsa) = 0;
dsa.busNumber = busNumberParm;
dsa.subBusNumber = subBusParm;
dsa.deviceId = deviceIdParm;
- retVal = HvCall2(HvCallPciUnmaskFisr, *(u64*)&dsa, fisrMask);
+ retVal = HvCall2(HvCallPciUnmaskFisr, *(__u64*)&dsa, fisrMask);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
@@ -544,13 +544,13 @@
struct HvCallPci_DsaAddr dsa;
__u64 retVal;
- *((u64*)&dsa) = 0;
+ *((__u64*)&dsa) = 0;
dsa.busNumber = busNumberParm;
dsa.subBusNumber = subBusParm;
dsa.deviceId = deviceIdParm;
- retVal = HvCall2(HvCallPciSetSlotReset, *(u64*)&dsa, onNotOff);
+ retVal = HvCall2(HvCallPciSetSlotReset, *(__u64*)&dsa, onNotOff);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
@@ -566,13 +566,13 @@
struct HvCallPci_DsaAddr dsa;
__u64 retVal;
- *((u64*)&dsa) = 0;
+ *((__u64*)&dsa) = 0;
dsa.busNumber = busNumberParm;
dsa.subBusNumber = subBusParm;
dsa.deviceId = deviceNumberParm << 4;
- retVal = HvCall3(HvCallPciGetDeviceInfo, *(u64*)&dsa, parms, sizeofParms);
+ retVal = HvCall3(HvCallPciGetDeviceInfo, *(__u64*)&dsa, parms, sizeofParms);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
@@ -587,13 +587,13 @@
struct HvCallPci_DsaAddr dsa;
__u64 retVal;
- *((u64*)&dsa) = 0;
+ *((__u64*)&dsa) = 0;
dsa.busNumber = busNumberParm;
dsa.subBusNumber = subBusParm;
dsa.deviceId = deviceIdParm;
- retVal = HvCall2(HvCallPciMaskInterrupts, *(u64*)&dsa, interruptMask);
+ retVal = HvCall2(HvCallPciMaskInterrupts, *(__u64*)&dsa, interruptMask);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
@@ -608,13 +608,13 @@
struct HvCallPci_DsaAddr dsa;
__u64 retVal;
- *((u64*)&dsa) = 0;
+ *((__u64*)&dsa) = 0;
dsa.busNumber = busNumberParm;
dsa.subBusNumber = subBusParm;
dsa.deviceId = deviceIdParm;
- retVal = HvCall2(HvCallPciUnmaskInterrupts, *(u64*)&dsa, interruptMask);
+ retVal = HvCall2(HvCallPciUnmaskInterrupts, *(__u64*)&dsa, interruptMask);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
@@ -631,13 +631,13 @@
struct HvCallPci_DsaAddr dsa;
__u64 retVal;
- *((u64*)&dsa) = 0;
+ *((__u64*)&dsa) = 0;
dsa.busNumber = busNumberParm;
dsa.subBusNumber = subBusParm;
dsa.deviceId = deviceIdParm;
- retVal = HvCall3(HvCallPciGetBusUnitInfo, *(u64*)&dsa, parms, sizeofParms);
+ retVal = HvCall3(HvCallPciGetBusUnitInfo, *(__u64*)&dsa, parms, sizeofParms);
// getPaca()->adjustHmtForNoOfSpinLocksHeld();
Modified: linux-libc-headers/trunk/include/asm-ppc64/iSeries/mf.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ppc64/iSeries/mf.h (original)
+++ linux-libc-headers/trunk/include/asm-ppc64/iSeries/mf.h Tue Jul 5 22:58:33 2005
@@ -52,6 +52,7 @@
extern void mf_init(void);
extern int mf_get_rtc(struct rtc_time *tm);
+extern int mf_get_boot_rtc(struct rtc_time *tm);
extern int mf_set_rtc(struct rtc_time *tm);
#endif /* _ASM_PPC64_ISERIES_MF_H */
Added: linux-libc-headers/trunk/include/asm-ppc64/imalloc.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/asm-ppc64/imalloc.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,24 @@
+#ifndef _PPC64_IMALLOC_H
+#define _PPC64_IMALLOC_H
+
+/*
+ * Define the address range of the imalloc VM area.
+ */
+#define PHBS_IO_BASE IOREGIONBASE
+#define IMALLOC_BASE (IOREGIONBASE + 0x80000000ul) /* Reserve 2 gigs for PHBs */
+#define IMALLOC_END (IOREGIONBASE + EADDR_MASK)
+
+
+/* imalloc region types */
+#define IM_REGION_UNUSED 0x1
+#define IM_REGION_SUBSET 0x2
+#define IM_REGION_EXISTS 0x4
+#define IM_REGION_OVERLAP 0x8
+#define IM_REGION_SUPERSET 0x10
+
+extern struct vm_struct * im_get_free_area(unsigned long size);
+extern struct vm_struct * im_get_area(unsigned long v_addr, unsigned long size,
+ int region_type);
+unsigned long im_free(void *addr);
+
+#endif /* _PPC64_IMALLOC_H */
Modified: linux-libc-headers/trunk/include/asm-ppc64/lmb.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ppc64/lmb.h (original)
+++ linux-libc-headers/trunk/include/asm-ppc64/lmb.h Tue Jul 5 22:58:33 2005
@@ -16,8 +16,6 @@
#include <linux/init.h>
#include <asm/prom.h>
-extern unsigned long reloc_offset(void);
-
#define MAX_LMB_REGIONS 128
#define LMB_ALLOC_ANYWHERE 0
@@ -53,6 +51,7 @@
extern unsigned long __init lmb_phys_mem_size(void);
extern unsigned long __init lmb_end_of_DRAM(void);
extern unsigned long __init lmb_abs_to_phys(unsigned long);
+extern void __init lmb_enforce_memory_limit(void);
extern void lmb_dump_all(void);
Modified: linux-libc-headers/trunk/include/asm-ppc64/mmu.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ppc64/mmu.h (original)
+++ linux-libc-headers/trunk/include/asm-ppc64/mmu.h Tue Jul 5 22:58:33 2005
@@ -14,19 +14,10 @@
#define _PPC64_MMU_H_
#include <asm/page.h>
-#include <linux/stringify.h>
-#ifndef __ASSEMBLY__
-
-/* Time to allow for more things here */
-typedef unsigned long mm_context_id_t;
-typedef struct {
- mm_context_id_t id;
-#ifdef CONFIG_HUGETLB_PAGE
- pgd_t *huge_pgdir;
- __u16 htlb_segs; /* bitmask */
-#endif
-} mm_context_t;
+/*
+ * Segment table
+ */
#define STE_ESID_V 0x80
#define STE_ESID_KS 0x20
@@ -35,15 +26,48 @@
#define STE_VSID_SHIFT 12
-struct stab_entry {
- unsigned long esid_data;
- unsigned long vsid_data;
-};
+/* Location of cpu0's segment table */
+#define STAB0_PAGE 0x9
+#define STAB0_PHYS_ADDR (STAB0_PAGE<<PAGE_SHIFT)
+#define STAB0_VIRT_ADDR (KERNELBASE+STAB0_PHYS_ADDR)
+
+/*
+ * SLB
+ */
-/* Hardware Page Table Entry */
+#define SLB_NUM_BOLTED 3
+#define SLB_CACHE_ENTRIES 8
+
+/* Bits in the SLB ESID word */
+#define SLB_ESID_V ASM_CONST(0x0000000008000000) /* valid */
+
+/* Bits in the SLB VSID word */
+#define SLB_VSID_SHIFT 12
+#define SLB_VSID_KS ASM_CONST(0x0000000000000800)
+#define SLB_VSID_KP ASM_CONST(0x0000000000000400)
+#define SLB_VSID_N ASM_CONST(0x0000000000000200) /* no-execute */
+#define SLB_VSID_L ASM_CONST(0x0000000000000100) /* largepage 16M */
+#define SLB_VSID_C ASM_CONST(0x0000000000000080) /* class */
+
+#define SLB_VSID_KERNEL (SLB_VSID_KP|SLB_VSID_C)
+#define SLB_VSID_USER (SLB_VSID_KP|SLB_VSID_KS)
+
+/*
+ * Hash table
+ */
#define HPTES_PER_GROUP 8
+/* Values for PP (assumes Ks=0, Kp=1) */
+/* pp0 will always be 0 for linux */
+#define PP_RWXX 0 /* Supervisor read/write, User none */
+#define PP_RWRX 1 /* Supervisor read/write, User read */
+#define PP_RWRW 2 /* Supervisor read/write, User read/write */
+#define PP_RXRX 3 /* Supervisor read, User read */
+
+#ifndef __ASSEMBLY__
+
+/* Hardware Page Table Entry */
typedef struct {
unsigned long avpn:57; /* vsid | api == avpn */
unsigned long : 2; /* Software use */
@@ -89,14 +113,6 @@
} dw1;
} HPTE;
-/* Values for PP (assumes Ks=0, Kp=1) */
-/* pp0 will always be 0 for linux */
-#define PP_RWXX 0 /* Supervisor read/write, User none */
-#define PP_RWRX 1 /* Supervisor read/write, User read */
-#define PP_RWRW 2 /* Supervisor read/write, User read/write */
-#define PP_RXRX 3 /* Supervisor read, User read */
-
-
extern HPTE * htab_address;
extern unsigned long htab_hash_mask;
@@ -173,31 +189,70 @@
extern void htab_finish_init(void);
+extern void hpte_init_native(void);
+extern void hpte_init_lpar(void);
+extern void hpte_init_iSeries(void);
+
+extern long pSeries_lpar_hpte_insert(unsigned long hpte_group,
+ unsigned long va, unsigned long prpn,
+ int secondary, unsigned long hpteflags,
+ int bolted, int large);
+extern long native_hpte_insert(unsigned long hpte_group, unsigned long va,
+ unsigned long prpn, int secondary,
+ unsigned long hpteflags, int bolted, int large);
+
#endif /* __ASSEMBLY__ */
/*
- * Location of cpu0's segment table
+ * VSID allocation
+ *
+ * We first generate a 36-bit "proto-VSID". For kernel addresses this
+ * is equal to the ESID, for user addresses it is:
+ * (context << 15) | (esid & 0x7fff)
+ *
+ * The two forms are distinguishable because the top bit is 0 for user
+ * addresses, whereas the top two bits are 1 for kernel addresses.
+ * Proto-VSIDs with the top two bits equal to 0b10 are reserved for
+ * now.
+ *
+ * The proto-VSIDs are then scrambled into real VSIDs with the
+ * multiplicative hash:
+ *
+ * VSID = (proto-VSID * VSID_MULTIPLIER) % VSID_MODULUS
+ * where VSID_MULTIPLIER = 268435399 = 0xFFFFFC7
+ * VSID_MODULUS = 2^36-1 = 0xFFFFFFFFF
+ *
+ * This scramble is only well defined for proto-VSIDs below
+ * 0xFFFFFFFFF, so both proto-VSID and actual VSID 0xFFFFFFFFF are
+ * reserved. VSID_MULTIPLIER is prime, so in particular it is
+ * co-prime to VSID_MODULUS, making this a 1:1 scrambling function.
+ * Because the modulus is 2^n-1 we can compute it efficiently without
+ * a divide or extra multiply (see below).
+ *
+ * This scheme has several advantages over older methods:
+ *
+ * - We have VSIDs allocated for every kernel address
+ * (i.e. everything above 0xC000000000000000), except the very top
+ * segment, which simplifies several things.
+ *
+ * - We allow for 15 significant bits of ESID and 20 bits of
+ * context for user addresses. i.e. 8T (43 bits) of address space for
+ * up to 1M contexts (although the page table structure and context
+ * allocation will need changes to take advantage of this).
+ *
+ * - The scramble function gives robust scattering in the hash
+ * table (at least based on some initial results). The previous
+ * method was more susceptible to pathological cases giving excessive
+ * hash collisions.
+ */
+/*
+ * WARNING - If you change these you must make sure the asm
+ * implementations in slb_allocate (slb_low.S), do_stab_bolted
+ * (head.S) and ASM_VSID_SCRAMBLE (below) are changed accordingly.
+ *
+ * You'll also need to change the precomputed VSID values in head.S
+ * which are used by the iSeries firmware.
*/
-#define STAB0_PAGE 0x9
-#define STAB0_PHYS_ADDR (STAB0_PAGE<<PAGE_SHIFT)
-#define STAB0_VIRT_ADDR (KERNELBASE+STAB0_PHYS_ADDR)
-
-#define SLB_NUM_BOLTED 3
-#define SLB_CACHE_ENTRIES 8
-
-/* Bits in the SLB ESID word */
-#define SLB_ESID_V 0x0000000008000000 /* entry is valid */
-
-/* Bits in the SLB VSID word */
-#define SLB_VSID_SHIFT 12
-#define SLB_VSID_KS 0x0000000000000800
-#define SLB_VSID_KP 0x0000000000000400
-#define SLB_VSID_N 0x0000000000000200 /* no-execute */
-#define SLB_VSID_L 0x0000000000000100 /* largepage (4M) */
-#define SLB_VSID_C 0x0000000000000080 /* class */
-
-#define SLB_VSID_KERNEL (SLB_VSID_KP|SLB_VSID_C)
-#define SLB_VSID_USER (SLB_VSID_KP|SLB_VSID_KS)
#define VSID_MULTIPLIER ASM_CONST(200730139) /* 28-bit prime */
#define VSID_BITS 36
@@ -238,4 +293,50 @@
srdi rx,rx,VSID_BITS; /* extract 2^36 bit */ \
add rt,rt,rx
+
+#ifndef __ASSEMBLY__
+
+typedef unsigned long mm_context_id_t;
+
+typedef struct {
+ mm_context_id_t id;
+#ifdef CONFIG_HUGETLB_PAGE
+ pgd_t *huge_pgdir;
+ __u16 htlb_segs; /* bitmask */
+#endif
+} mm_context_t;
+
+
+static inline unsigned long vsid_scramble(unsigned long protovsid)
+{
+#if 0
+ /* The code below is equivalent to this function for arguments
+ * < 2^VSID_BITS, which is all this should ever be called
+ * with. However gcc is not clever enough to compute the
+ * modulus (2^n-1) without a second multiply. */
+ return ((protovsid * VSID_MULTIPLIER) % VSID_MODULUS);
+#else /* 1 */
+ unsigned long x;
+
+ x = protovsid * VSID_MULTIPLIER;
+ x = (x >> VSID_BITS) + (x & VSID_MODULUS);
+ return (x + ((x+1) >> VSID_BITS)) & VSID_MODULUS;
+#endif /* 1 */
+}
+
+/* This is only valid for addresses >= KERNELBASE */
+static inline unsigned long get_kernel_vsid(unsigned long ea)
+{
+ return vsid_scramble(ea >> SID_SHIFT);
+}
+
+/* This is only valid for user addresses (which are below 2^41) */
+static inline unsigned long get_vsid(unsigned long context, unsigned long ea)
+{
+ return vsid_scramble((context << USER_ESID_BITS)
+ | (ea >> SID_SHIFT));
+}
+
+#endif /* __ASSEMBLY */
+
#endif /* _PPC64_MMU_H_ */
Modified: linux-libc-headers/trunk/include/asm-ppc64/mmu_context.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ppc64/mmu_context.h (original)
+++ linux-libc-headers/trunk/include/asm-ppc64/mmu_context.h Tue Jul 5 22:58:33 2005
@@ -57,11 +57,11 @@
return;
#ifdef CONFIG_ALTIVEC
- if (cur_cpu_spec->cpu_features & CPU_FTR_ALTIVEC)
+ if (cpu_has_feature(CPU_FTR_ALTIVEC))
asm volatile ("dssall");
#endif /* CONFIG_ALTIVEC */
- if (cur_cpu_spec->cpu_features & CPU_FTR_SLB)
+ if (cpu_has_feature(CPU_FTR_SLB))
switch_slb(tsk, next);
else
switch_stab(tsk, next);
@@ -82,86 +82,4 @@
local_irq_restore(flags);
}
-/* VSID allocation
- * ===============
- *
- * We first generate a 36-bit "proto-VSID". For kernel addresses this
- * is equal to the ESID, for user addresses it is:
- * (context << 15) | (esid & 0x7fff)
- *
- * The two forms are distinguishable because the top bit is 0 for user
- * addresses, whereas the top two bits are 1 for kernel addresses.
- * Proto-VSIDs with the top two bits equal to 0b10 are reserved for
- * now.
- *
- * The proto-VSIDs are then scrambled into real VSIDs with the
- * multiplicative hash:
- *
- * VSID = (proto-VSID * VSID_MULTIPLIER) % VSID_MODULUS
- * where VSID_MULTIPLIER = 268435399 = 0xFFFFFC7
- * VSID_MODULUS = 2^36-1 = 0xFFFFFFFFF
- *
- * This scramble is only well defined for proto-VSIDs below
- * 0xFFFFFFFFF, so both proto-VSID and actual VSID 0xFFFFFFFFF are
- * reserved. VSID_MULTIPLIER is prime, so in particular it is
- * co-prime to VSID_MODULUS, making this a 1:1 scrambling function.
- * Because the modulus is 2^n-1 we can compute it efficiently without
- * a divide or extra multiply (see below).
- *
- * This scheme has several advantages over older methods:
- *
- * - We have VSIDs allocated for every kernel address
- * (i.e. everything above 0xC000000000000000), except the very top
- * segment, which simplifies several things.
- *
- * - We allow for 15 significant bits of ESID and 20 bits of
- * context for user addresses. i.e. 8T (43 bits) of address space for
- * up to 1M contexts (although the page table structure and context
- * allocation will need changes to take advantage of this).
- *
- * - The scramble function gives robust scattering in the hash
- * table (at least based on some initial results). The previous
- * method was more susceptible to pathological cases giving excessive
- * hash collisions.
- */
-
-/*
- * WARNING - If you change these you must make sure the asm
- * implementations in slb_allocate(), do_stab_bolted and mmu.h
- * (ASM_VSID_SCRAMBLE macro) are changed accordingly.
- *
- * You'll also need to change the precomputed VSID values in head.S
- * which are used by the iSeries firmware.
- */
-
-static inline unsigned long vsid_scramble(unsigned long protovsid)
-{
-#if 0
- /* The code below is equivalent to this function for arguments
- * < 2^VSID_BITS, which is all this should ever be called
- * with. However gcc is not clever enough to compute the
- * modulus (2^n-1) without a second multiply. */
- return ((protovsid * VSID_MULTIPLIER) % VSID_MODULUS);
-#else /* 1 */
- unsigned long x;
-
- x = protovsid * VSID_MULTIPLIER;
- x = (x >> VSID_BITS) + (x & VSID_MODULUS);
- return (x + ((x+1) >> VSID_BITS)) & VSID_MODULUS;
-#endif /* 1 */
-}
-
-/* This is only valid for addresses >= KERNELBASE */
-static inline unsigned long get_kernel_vsid(unsigned long ea)
-{
- return vsid_scramble(ea >> SID_SHIFT);
-}
-
-/* This is only valid for user addresses (which are below 2^41) */
-static inline unsigned long get_vsid(unsigned long context, unsigned long ea)
-{
- return vsid_scramble((context << USER_ESID_BITS)
- | (ea >> SID_SHIFT));
-}
-
#endif /* __PPC64_MMU_CONTEXT_H */
Added: linux-libc-headers/trunk/include/asm-ppc64/pSeries_reconfig.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/asm-ppc64/pSeries_reconfig.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,25 @@
+#ifndef _PPC64_PSERIES_RECONFIG_H
+#define _PPC64_PSERIES_RECONFIG_H
+
+#include <linux/notifier.h>
+
+/*
+ * Use this API if your code needs to know about OF device nodes being
+ * added or removed on pSeries systems.
+ */
+
+#define PSERIES_RECONFIG_ADD 0x0001
+#define PSERIES_RECONFIG_REMOVE 0x0002
+
+#ifdef CONFIG_PPC_PSERIES
+extern int pSeries_reconfig_notifier_register(struct notifier_block *);
+extern void pSeries_reconfig_notifier_unregister(struct notifier_block *);
+#else /* !CONFIG_PPC_PSERIES */
+static inline int pSeries_reconfig_notifier_register(struct notifier_block *nb)
+{
+ return 0;
+}
+static inline void pSeries_reconfig_notifier_unregister(struct notifier_block *nb) { }
+#endif /* CONFIG_PPC_PSERIES */
+
+#endif /* _PPC64_PSERIES_RECONFIG_H */
Modified: linux-libc-headers/trunk/include/asm-ppc64/paca.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ppc64/paca.h (original)
+++ linux-libc-headers/trunk/include/asm-ppc64/paca.h Tue Jul 5 22:58:33 2005
@@ -21,7 +21,6 @@
#include <asm/iSeries/ItLpRegSave.h>
#include <asm/mmu.h>
-extern struct paca_struct paca[];
register struct paca_struct *local_paca asm("r13");
#define get_paca() local_paca
@@ -114,4 +113,6 @@
#endif
};
+extern struct paca_struct paca[];
+
#endif /* _PPC64_PACA_H */
Modified: linux-libc-headers/trunk/include/asm-ppc64/pgalloc.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ppc64/pgalloc.h (original)
+++ linux-libc-headers/trunk/include/asm-ppc64/pgalloc.h Tue Jul 5 22:58:33 2005
@@ -2,7 +2,6 @@
#define _PPC64_PGALLOC_H
#include <linux/slab.h>
-#include <asm/processor.h>
extern kmem_cache_t *zero_cache;
@@ -25,7 +24,7 @@
kmem_cache_free(zero_cache, pgd);
}
-#define pgd_populate(MM, PGD, PMD) pgd_set(PGD, PMD)
+#define pud_populate(MM, PUD, PMD) pud_set(PUD, PMD)
static inline pmd_t *
pmd_alloc_one(struct mm_struct *mm, unsigned long addr)
@@ -43,42 +42,26 @@
#define pmd_populate(mm, pmd, pte_page) \
pmd_populate_kernel(mm, pmd, page_address(pte_page))
-static inline pte_t *
-pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)
+static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)
{
- pte_t *pte;
- pte = kmem_cache_alloc(zero_cache, GFP_KERNEL|__GFP_REPEAT);
- if (pte) {
- struct page *ptepage = virt_to_page(pte);
- ptepage->mapping = (void *) mm;
- ptepage->index = address & PMD_MASK;
- }
- return pte;
-}
-
-static inline struct page *
-pte_alloc_one(struct mm_struct *mm, unsigned long address)
-{
- pte_t *pte;
- pte = kmem_cache_alloc(zero_cache, GFP_KERNEL|__GFP_REPEAT);
- if (pte) {
- struct page *ptepage = virt_to_page(pte);
- ptepage->mapping = (void *) mm;
- ptepage->index = address & PMD_MASK;
- return ptepage;
- }
+ return kmem_cache_alloc(zero_cache, GFP_KERNEL|__GFP_REPEAT);
+}
+
+static inline struct page *pte_alloc_one(struct mm_struct *mm, unsigned long address)
+{
+ pte_t *pte = kmem_cache_alloc(zero_cache, GFP_KERNEL|__GFP_REPEAT);
+ if (pte)
+ return virt_to_page(pte);
return NULL;
}
static inline void pte_free_kernel(pte_t *pte)
{
- virt_to_page(pte)->mapping = NULL;
kmem_cache_free(zero_cache, pte);
}
static inline void pte_free(struct page *ptepage)
{
- ptepage->mapping = NULL;
kmem_cache_free(zero_cache, page_address(ptepage));
}
Added: linux-libc-headers/trunk/include/asm-ppc64/pmc.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/asm-ppc64/pmc.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,29 @@
+/*
+ * pmc.h
+ * Copyright (C) 2004 David Gibson, IBM Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#ifndef _PPC64_PMC_H
+#define _PPC64_PMC_H
+
+#include <asm/ptrace.h>
+
+typedef void (*perf_irq_t)(struct pt_regs *);
+
+int reserve_pmc_hardware(perf_irq_t new_perf_irq);
+void release_pmc_hardware(void);
+
+#endif /* _PPC64_PMC_H */
Modified: linux-libc-headers/trunk/include/asm-ppc64/processor.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ppc64/processor.h (original)
+++ linux-libc-headers/trunk/include/asm-ppc64/processor.h Tue Jul 5 22:58:33 2005
@@ -119,98 +119,18 @@
/* Special Purpose Registers (SPRNs)*/
-#define SPRN_CDBCR 0x3D7 /* Cache Debug Control Register */
#define SPRN_CTR 0x009 /* Count Register */
#define SPRN_DABR 0x3F5 /* Data Address Breakpoint Register */
-#define SPRN_DAC1 0x3F6 /* Data Address Compare 1 */
-#define SPRN_DAC2 0x3F7 /* Data Address Compare 2 */
+#define DABR_TRANSLATION (1UL << 2)
#define SPRN_DAR 0x013 /* Data Address Register */
-#define SPRN_DBCR 0x3F2 /* Debug Control Regsiter */
-#define DBCR_EDM 0x80000000
-#define DBCR_IDM 0x40000000
-#define DBCR_RST(x) (((x) & 0x3) << 28)
-#define DBCR_RST_NONE 0
-#define DBCR_RST_CORE 1
-#define DBCR_RST_CHIP 2
-#define DBCR_RST_SYSTEM 3
-#define DBCR_IC 0x08000000 /* Instruction Completion Debug Evnt */
-#define DBCR_BT 0x04000000 /* Branch Taken Debug Event */
-#define DBCR_EDE 0x02000000 /* Exception Debug Event */
-#define DBCR_TDE 0x01000000 /* TRAP Debug Event */
-#define DBCR_FER 0x00F80000 /* First Events Remaining Mask */
-#define DBCR_FT 0x00040000 /* Freeze Timers on Debug Event */
-#define DBCR_IA1 0x00020000 /* Instr. Addr. Compare 1 Enable */
-#define DBCR_IA2 0x00010000 /* Instr. Addr. Compare 2 Enable */
-#define DBCR_D1R 0x00008000 /* Data Addr. Compare 1 Read Enable */
-#define DBCR_D1W 0x00004000 /* Data Addr. Compare 1 Write Enable */
-#define DBCR_D1S(x) (((x) & 0x3) << 12) /* Data Adrr. Compare 1 Size */
-#define DAC_BYTE 0
-#define DAC_HALF 1
-#define DAC_WORD 2
-#define DAC_QUAD 3
-#define DBCR_D2R 0x00000800 /* Data Addr. Compare 2 Read Enable */
-#define DBCR_D2W 0x00000400 /* Data Addr. Compare 2 Write Enable */
-#define DBCR_D2S(x) (((x) & 0x3) << 8) /* Data Addr. Compare 2 Size */
-#define DBCR_SBT 0x00000040 /* Second Branch Taken Debug Event */
-#define DBCR_SED 0x00000020 /* Second Exception Debug Event */
-#define DBCR_STD 0x00000010 /* Second Trap Debug Event */
-#define DBCR_SIA 0x00000008 /* Second IAC Enable */
-#define DBCR_SDA 0x00000004 /* Second DAC Enable */
-#define DBCR_JOI 0x00000002 /* JTAG Serial Outbound Int. Enable */
-#define DBCR_JII 0x00000001 /* JTAG Serial Inbound Int. Enable */
-#define SPRN_DBCR0 0x3F2 /* Debug Control Register 0 */
-#define SPRN_DBCR1 0x3BD /* Debug Control Register 1 */
-#define SPRN_DBSR 0x3F0 /* Debug Status Register */
-#define SPRN_DCCR 0x3FA /* Data Cache Cacheability Register */
-#define DCCR_NOCACHE 0 /* Noncacheable */
-#define DCCR_CACHE 1 /* Cacheable */
-#define SPRN_DCMP 0x3D1 /* Data TLB Compare Register */
-#define SPRN_DCWR 0x3BA /* Data Cache Write-thru Register */
-#define DCWR_COPY 0 /* Copy-back */
-#define DCWR_WRITE 1 /* Write-through */
-#define SPRN_DEAR 0x3D5 /* Data Error Address Register */
#define SPRN_DEC 0x016 /* Decrement Register */
-#define SPRN_DMISS 0x3D0 /* Data TLB Miss Register */
#define SPRN_DSISR 0x012 /* Data Storage Interrupt Status Register */
-#define SPRN_EAR 0x11A /* External Address Register */
-#define SPRN_ESR 0x3D4 /* Exception Syndrome Register */
-#define ESR_IMCP 0x80000000 /* Instr. Machine Check - Protection */
-#define ESR_IMCN 0x40000000 /* Instr. Machine Check - Non-config */
-#define ESR_IMCB 0x20000000 /* Instr. Machine Check - Bus error */
-#define ESR_IMCT 0x10000000 /* Instr. Machine Check - Timeout */
-#define ESR_PIL 0x08000000 /* Program Exception - Illegal */
-#define ESR_PPR 0x04000000 /* Program Exception - Priveleged */
-#define ESR_PTR 0x02000000 /* Program Exception - Trap */
-#define ESR_DST 0x00800000 /* Storage Exception - Data miss */
-#define ESR_DIZ 0x00400000 /* Storage Exception - Zone fault */
-#define SPRN_EVPR 0x3D6 /* Exception Vector Prefix Register */
-#define SPRN_HASH1 0x3D2 /* Primary Hash Address Register */
-#define SPRN_HASH2 0x3D3 /* Secondary Hash Address Resgister */
+#define DSISR_NOHPTE 0x40000000 /* no translation found */
+#define DSISR_PROTFAULT 0x08000000 /* protection fault */
+#define DSISR_ISSTORE 0x02000000 /* access was a store */
+#define DSISR_DABRMATCH 0x00400000 /* hit data breakpoint */
+#define DSISR_NOSEGMENT 0x00200000 /* STAB/SLB miss */
#define SPRN_HID0 0x3F0 /* Hardware Implementation Register 0 */
-#define HID0_EMCP (1<<31) /* Enable Machine Check pin */
-#define HID0_EBA (1<<29) /* Enable Bus Address Parity */
-#define HID0_EBD (1<<28) /* Enable Bus Data Parity */
-#define HID0_SBCLK (1<<27)
-#define HID0_EICE (1<<26)
-#define HID0_ECLK (1<<25)
-#define HID0_PAR (1<<24)
-#define HID0_DOZE (1<<23)
-#define HID0_NAP (1<<22)
-#define HID0_SLEEP (1<<21)
-#define HID0_DPM (1<<20)
-#define HID0_ICE (1<<15) /* Instruction Cache Enable */
-#define HID0_DCE (1<<14) /* Data Cache Enable */
-#define HID0_ILOCK (1<<13) /* Instruction Cache Lock */
-#define HID0_DLOCK (1<<12) /* Data Cache Lock */
-#define HID0_ICFI (1<<11) /* Instr. Cache Flash Invalidate */
-#define HID0_DCI (1<<10) /* Data Cache Invalidate */
-#define HID0_SPD (1<<9) /* Speculative disable */
-#define HID0_SGE (1<<7) /* Store Gathering Enable */
-#define HID0_SIED (1<<7) /* Serial Instr. Execution [Disable] */
-#define HID0_BTIC (1<<5) /* Branch Target Instruction Cache Enable */
-#define HID0_ABE (1<<3) /* Address Broadcast Enable */
-#define HID0_BHTE (1<<2) /* Branch History Table Enable */
-#define HID0_BTCD (1<<1) /* Branch target cache disable */
#define SPRN_MSRDORM 0x3F1 /* Hardware Implementation Register 1 */
#define SPRN_HID1 0x3F1 /* Hardware Implementation Register 1 */
#define SPRN_IABR 0x3F2 /* Instruction Address Breakpoint Register */
@@ -219,23 +139,8 @@
#define SPRN_HID5 0x3F6 /* 970 HID5 */
#define SPRN_TSC 0x3FD /* Thread switch control */
#define SPRN_TST 0x3FC /* Thread switch timeout */
-#define SPRN_IAC1 0x3F4 /* Instruction Address Compare 1 */
-#define SPRN_IAC2 0x3F5 /* Instruction Address Compare 2 */
-#define SPRN_ICCR 0x3FB /* Instruction Cache Cacheability Register */
-#define ICCR_NOCACHE 0 /* Noncacheable */
-#define ICCR_CACHE 1 /* Cacheable */
-#define SPRN_ICDBDR 0x3D3 /* Instruction Cache Debug Data Register */
-#define SPRN_ICMP 0x3D5 /* Instruction TLB Compare Register */
-#define SPRN_ICTC 0x3FB /* Instruction Cache Throttling Control Reg */
-#define SPRN_IMISS 0x3D4 /* Instruction TLB Miss Register */
-#define SPRN_IMMR 0x27E /* Internal Memory Map Register */
#define SPRN_L2CR 0x3F9 /* Level 2 Cache Control Regsiter */
#define SPRN_LR 0x008 /* Link Register */
-#define SPRN_PBL1 0x3FC /* Protection Bound Lower 1 */
-#define SPRN_PBL2 0x3FE /* Protection Bound Lower 2 */
-#define SPRN_PBU1 0x3FD /* Protection Bound Upper 1 */
-#define SPRN_PBU2 0x3FF /* Protection Bound Upper 2 */
-#define SPRN_PID 0x3B1 /* Process ID */
#define SPRN_PIR 0x3FF /* Processor Identification Register */
#define SPRN_PIT 0x3DB /* Programmable Interval Timer */
#define SPRN_PURR 0x135 /* Processor Utilization of Resources Register */
@@ -243,9 +148,6 @@
#define SPRN_RPA 0x3D6 /* Required Physical Address Register */
#define SPRN_SDA 0x3BF /* Sampled Data Address Register */
#define SPRN_SDR1 0x019 /* MMU Hash Base Register */
-#define SPRN_SGR 0x3B9 /* Storage Guarded Register */
-#define SGR_NORMAL 0
-#define SGR_GUARDED 1
#define SPRN_SIA 0x3BB /* Sampled Instruction Address Register */
#define SPRN_SPRG0 0x110 /* Special Purpose Register General 0 */
#define SPRN_SPRG1 0x111 /* Special Purpose Register General 1 */
@@ -258,50 +160,12 @@
#define SPRN_TBWL 0x11C /* Time Base Lower Register (super, W/O) */
#define SPRN_TBWU 0x11D /* Time Base Write Upper Register (super, W/O) */
#define SPRN_HIOR 0x137 /* 970 Hypervisor interrupt offset */
-#define SPRN_TCR 0x3DA /* Timer Control Register */
-#define TCR_WP(x) (((x)&0x3)<<30) /* WDT Period */
-#define WP_2_17 0 /* 2^17 clocks */
-#define WP_2_21 1 /* 2^21 clocks */
-#define WP_2_25 2 /* 2^25 clocks */
-#define WP_2_29 3 /* 2^29 clocks */
-#define TCR_WRC(x) (((x)&0x3)<<28) /* WDT Reset Control */
-#define WRC_NONE 0 /* No reset will occur */
-#define WRC_CORE 1 /* Core reset will occur */
-#define WRC_CHIP 2 /* Chip reset will occur */
-#define WRC_SYSTEM 3 /* System reset will occur */
-#define TCR_WIE 0x08000000 /* WDT Interrupt Enable */
-#define TCR_PIE 0x04000000 /* PIT Interrupt Enable */
-#define TCR_FP(x) (((x)&0x3)<<24) /* FIT Period */
-#define FP_2_9 0 /* 2^9 clocks */
-#define FP_2_13 1 /* 2^13 clocks */
-#define FP_2_17 2 /* 2^17 clocks */
-#define FP_2_21 3 /* 2^21 clocks */
-#define TCR_FIE 0x00800000 /* FIT Interrupt Enable */
-#define TCR_ARE 0x00400000 /* Auto Reload Enable */
-#define SPRN_THRM1 0x3FC /* Thermal Management Register 1 */
-#define THRM1_TIN (1<<0)
-#define THRM1_TIV (1<<1)
-#define THRM1_THRES (0x7f<<2)
-#define THRM1_TID (1<<29)
-#define THRM1_TIE (1<<30)
-#define THRM1_V (1<<31)
-#define SPRN_THRM2 0x3FD /* Thermal Management Register 2 */
-#define SPRN_THRM3 0x3FE /* Thermal Management Register 3 */
-#define THRM3_E (1<<31)
-#define SPRN_TSR 0x3D8 /* Timer Status Register */
-#define TSR_ENW 0x80000000 /* Enable Next Watchdog */
-#define TSR_WIS 0x40000000 /* WDT Interrupt Status */
-#define TSR_WRS(x) (((x)&0x3)<<28) /* WDT Reset Status */
-#define WRS_NONE 0 /* No WDT reset occurred */
-#define WRS_CORE 1 /* WDT forced core reset */
-#define WRS_CHIP 2 /* WDT forced chip reset */
-#define WRS_SYSTEM 3 /* WDT forced system reset */
-#define TSR_PIS 0x08000000 /* PIT Interrupt Status */
-#define TSR_FIS 0x04000000 /* FIT Interrupt Status */
#define SPRN_USIA 0x3AB /* User Sampled Instruction Address Register */
#define SPRN_XER 0x001 /* Fixed Point Exception Register */
-#define SPRN_ZPR 0x3B0 /* Zone Protection Register */
#define SPRN_VRSAVE 0x100 /* Vector save */
+#define SPRN_CTRLF 0x088
+#define SPRN_CTRLT 0x098
+#define CTRL_RUNLATCH 0x1
/* Performance monitor SPRs */
#define SPRN_SIAR 780
@@ -346,28 +210,19 @@
#define CTR SPRN_CTR /* Counter Register */
#define DAR SPRN_DAR /* Data Address Register */
#define DABR SPRN_DABR /* Data Address Breakpoint Register */
-#define DCMP SPRN_DCMP /* Data TLB Compare Register */
#define DEC SPRN_DEC /* Decrement Register */
-#define DMISS SPRN_DMISS /* Data TLB Miss Register */
#define DSISR SPRN_DSISR /* Data Storage Interrupt Status Register */
-#define EAR SPRN_EAR /* External Address Register */
-#define HASH1 SPRN_HASH1 /* Primary Hash Address Register */
-#define HASH2 SPRN_HASH2 /* Secondary Hash Address Register */
#define HID0 SPRN_HID0 /* Hardware Implementation Register 0 */
#define MSRDORM SPRN_MSRDORM /* MSR Dormant Register */
#define NIADORM SPRN_NIADORM /* NIA Dormant Register */
#define TSC SPRN_TSC /* Thread switch control */
#define TST SPRN_TST /* Thread switch timeout */
#define IABR SPRN_IABR /* Instruction Address Breakpoint Register */
-#define ICMP SPRN_ICMP /* Instruction TLB Compare Register */
-#define IMISS SPRN_IMISS /* Instruction TLB Miss Register */
-#define IMMR SPRN_IMMR /* PPC 860/821 Internal Memory Map Register */
#define L2CR SPRN_L2CR /* PPC 750 L2 control register */
#define __LR SPRN_LR
#define PVR SPRN_PVR /* Processor Version */
#define PIR SPRN_PIR /* Processor ID */
#define PURR SPRN_PURR /* Processor Utilization of Resource Register */
-//#define RPA SPRN_RPA /* Required Physical Address Register */
#define SDR1 SPRN_SDR1 /* MMU hash base register */
#define SPR0 SPRN_SPRG0 /* Supervisor Private Registers */
#define SPR1 SPRN_SPRG1
@@ -383,10 +238,6 @@
#define TBRU SPRN_TBRU /* Time Base Read Upper Register */
#define TBWL SPRN_TBWL /* Time Base Write Lower Register */
#define TBWU SPRN_TBWU /* Time Base Write Upper Register */
-#define ICTC 1019
-#define THRM1 SPRN_THRM1 /* Thermal Management Register 1 */
-#define THRM2 SPRN_THRM2 /* Thermal Management Register 2 */
-#define THRM3 SPRN_THRM3 /* Thermal Management Register 3 */
#define XER SPRN_XER
/* Processor Version Register (PVR) field extraction */
@@ -430,12 +281,6 @@
#define XGLUE(a,b) a##b
#define GLUE(a,b) XGLUE(a,b)
-/* iSeries CTRL register (for runlatch) */
-
-#define CTRLT 0x098
-#define CTRLF 0x088
-#define RUNLATCH 0x0001
-
#ifdef __ASSEMBLY__
#define _GLOBAL(name) \
Modified: linux-libc-headers/trunk/include/asm-ppc64/rtas.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ppc64/rtas.h (original)
+++ linux-libc-headers/trunk/include/asm-ppc64/rtas.h Tue Jul 5 22:58:33 2005
@@ -23,12 +23,9 @@
/* RTAS return status codes */
#define RTAS_BUSY -2 /* RTAS Busy */
-#define RTAS_NO_SUCH_INDICATOR -3 /* No such indicator implemented */
#define RTAS_EXTENDED_DELAY_MIN 9900
#define RTAS_EXTENDED_DELAY_MAX 9905
-#define RTAS_UNKNOWN_OP -1099 /* Unknown RTAS Token */
-
/*
* In general to call RTAS use rtas_token("string") to lookup
* an RTAS token for the given string (e.g. "event-scan").
Added: linux-libc-headers/trunk/include/asm-ppc64/smu.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/asm-ppc64/smu.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,22 @@
+/*
+ * Definitions for talking to the SMU chip in newer G5 PowerMacs
+ */
+
+#include <linux/config.h>
+
+/*
+ * Basic routines for use by architecture. To be extended as
+ * we understand more of the chip
+ */
+extern int smu_init(void);
+extern int smu_present(void);
+extern void smu_shutdown(void);
+extern void smu_restart(void);
+extern int smu_get_rtc_time(struct rtc_time *time);
+extern int smu_set_rtc_time(struct rtc_time *time);
+
+/*
+ * SMU command buffer absolute address, exported by pmac_setup,
+ * this is allocated very early during boot.
+ */
+extern unsigned long smu_cmdbuf_abs;
Modified: linux-libc-headers/trunk/include/asm-ppc64/systemcfg.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ppc64/systemcfg.h (original)
+++ linux-libc-headers/trunk/include/asm-ppc64/systemcfg.h Tue Jul 5 22:58:33 2005
@@ -20,10 +20,14 @@
* Minor version changes are a hint.
*/
#define SYSTEMCFG_MAJOR 1
-#define SYSTEMCFG_MINOR 0
+#define SYSTEMCFG_MINOR 1
#ifndef __ASSEMBLY__
+#include <linux/unistd.h>
+
+#define SYSCALL_MAP_SIZE ((__NR_syscalls + 31) / 32)
+
struct systemcfg {
__u8 eye_catcher[16]; /* Eyecatcher: SYSTEMCFG:PPC64 0x00 */
struct { /* Systemcfg version numbers */
@@ -47,13 +51,10 @@
__u32 dcache_line_size; /* L1 d-cache line size 0x64 */
__u32 icache_size; /* L1 i-cache size 0x68 */
__u32 icache_line_size; /* L1 i-cache line size 0x6C */
- __u8 reserved0[3984]; /* Reserve rest of page 0x70 */
+ __u32 syscall_map_64[SYSCALL_MAP_SIZE]; /* map of available syscalls 0x70 */
+ __u32 syscall_map_32[SYSCALL_MAP_SIZE]; /* map of available syscalls */
};
#endif /* __ASSEMBLY__ */
-#define SYSTEMCFG_PAGE 0x5
-#define SYSTEMCFG_PHYS_ADDR (SYSTEMCFG_PAGE<<PAGE_SHIFT)
-#define SYSTEMCFG_VIRT_ADDR (KERNELBASE+SYSTEMCFG_PHYS_ADDR)
-
#endif /* _SYSTEMCFG_H */
Modified: linux-libc-headers/trunk/include/asm-ppc64/unistd.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ppc64/unistd.h (original)
+++ linux-libc-headers/trunk/include/asm-ppc64/unistd.h Tue Jul 5 22:58:33 2005
@@ -282,8 +282,9 @@
#define __NR_add_key 269
#define __NR_request_key 270
#define __NR_keyctl 271
+#define __NR_waitid 272
-#define __NR_syscalls 272
+#define __NR_syscalls 273
#ifndef __ASSEMBLY__
Modified: linux-libc-headers/trunk/include/asm-ppc64/xics.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-ppc64/xics.h (original)
+++ linux-libc-headers/trunk/include/asm-ppc64/xics.h Tue Jul 5 22:58:33 2005
@@ -30,7 +30,4 @@
extern struct xics_ipi_struct xics_ipi_message[NR_CPUS] __cacheline_aligned;
-extern unsigned int default_distrib_server;
-extern unsigned int interrupt_server_size;
-
#endif /* _PPC64_KERNEL_XICS_H */
Modified: linux-libc-headers/trunk/include/asm-s390/cacheflush.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-s390/cacheflush.h (original)
+++ linux-libc-headers/trunk/include/asm-s390/cacheflush.h Tue Jul 5 22:58:33 2005
@@ -7,7 +7,7 @@
#define flush_cache_all() do { } while (0)
#define flush_cache_mm(mm) do { } while (0)
#define flush_cache_range(vma, start, end) do { } while (0)
-#define flush_cache_page(vma, vmaddr) do { } while (0)
+#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
#define flush_dcache_page(page) do { } while (0)
#define flush_dcache_mmap_lock(mapping) do { } while (0)
#define flush_dcache_mmap_unlock(mapping) do { } while (0)
Modified: linux-libc-headers/trunk/include/asm-s390/ccwdev.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-s390/ccwdev.h (original)
+++ linux-libc-headers/trunk/include/asm-s390/ccwdev.h Tue Jul 5 22:58:33 2005
@@ -164,6 +164,8 @@
extern int read_dev_chars(struct ccw_device *cdev, void **buffer, int length);
extern int read_conf_data(struct ccw_device *cdev, void **buffer, int *length);
+extern int read_conf_data_lpm(struct ccw_device *cdev, void **buffer,
+ int *length, __u8 lpm);
extern int ccw_device_set_online(struct ccw_device *cdev);
extern int ccw_device_set_offline(struct ccw_device *cdev);
@@ -186,4 +188,5 @@
extern struct device *s390_root_dev_register(const char *);
extern void s390_root_dev_unregister(struct device *);
+extern void *ccw_device_get_chp_desc(struct ccw_device *, int);
#endif /* _S390_CCWDEV_H_ */
Modified: linux-libc-headers/trunk/include/asm-s390/pgalloc.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-s390/pgalloc.h (original)
+++ linux-libc-headers/trunk/include/asm-s390/pgalloc.h Tue Jul 5 22:58:33 2005
@@ -13,7 +13,6 @@
#ifndef _S390_PGALLOC_H
#define _S390_PGALLOC_H
-#include <asm/processor.h>
#include <linux/threads.h>
#include <linux/gfp.h>
@@ -128,8 +127,10 @@
pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_REPEAT);
if (pte != NULL) {
- for (i=0; i < PTRS_PER_PTE; i++)
- pte_clear(pte+i);
+ for (i=0; i < PTRS_PER_PTE; i++) {
+ pte_clear(mm, vmaddr, pte+i);
+ vmaddr += PAGE_SIZE;
+ }
}
return pte;
}
Modified: linux-libc-headers/trunk/include/asm-s390/posix_types.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-s390/posix_types.h (original)
+++ linux-libc-headers/trunk/include/asm-s390/posix_types.h Tue Jul 5 22:58:33 2005
@@ -83,16 +83,16 @@
#endif
#undef __FD_SET
-#define __FD_SET(fd,fdsetp) set_bit(fd,fdsetp->fds_bits)
+#define __FD_SET(fd,fdsetp) set_bit((fd),(fdsetp)->fds_bits)
#undef __FD_CLR
-#define __FD_CLR(fd,fdsetp) clear_bit(fd,fdsetp->fds_bits)
+#define __FD_CLR(fd,fdsetp) clear_bit((fd),(fdsetp)->fds_bits)
#undef __FD_ISSET
-#define __FD_ISSET(fd,fdsetp) test_bit(fd,fdsetp->fds_bits)
+#define __FD_ISSET(fd,fdsetp) test_bit((fd),(fdsetp)->fds_bits)
#undef __FD_ZERO
-#define __FD_ZERO(fdsetp) (memset (fdsetp, 0, sizeof(*(fd_set *)fdsetp)))
+#define __FD_ZERO(fdsetp) (memset ((fdsetp), 0, sizeof(*(fd_set *)(fdsetp))))
#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2)*/
Modified: linux-libc-headers/trunk/include/asm-s390/ptrace.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-s390/ptrace.h (original)
+++ linux-libc-headers/trunk/include/asm-s390/ptrace.h Tue Jul 5 22:58:33 2005
@@ -183,6 +183,7 @@
#ifndef __ASSEMBLY__
#include <linux/stddef.h>
#include <linux/types.h>
+#include <asm/page.h>
typedef union
{
@@ -233,6 +234,7 @@
#define PSW_ADDR_INSN 0x7FFFFFFFUL
#define PSW_BASE_BITS 0x00080000UL
+#define PSW_DEFAULT_KEY (((unsigned long) PAGE_DEFAULT_ACC) << 20)
#define PSW_ASC_PRIMARY 0x00000000UL
#define PSW_ASC_ACCREG 0x00004000UL
@@ -258,6 +260,7 @@
#define PSW_BASE_BITS 0x0000000180000000UL
#define PSW_BASE32_BITS 0x0000000080000000UL
+#define PSW_DEFAULT_KEY (((unsigned long) PAGE_DEFAULT_ACC) << 52)
#define PSW_ASC_PRIMARY 0x0000000000000000UL
#define PSW_ASC_ACCREG 0x0000400000000000UL
@@ -266,14 +269,15 @@
#define PSW_USER32_BITS (PSW_BASE32_BITS | PSW_MASK_DAT | PSW_ASC_HOME | \
PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK | \
- PSW_MASK_PSTATE)
+ PSW_MASK_PSTATE | PSW_DEFAULT_KEY)
#endif /* __s390x__ */
-#define PSW_KERNEL_BITS (PSW_BASE_BITS | PSW_MASK_DAT | PSW_ASC_PRIMARY)
+#define PSW_KERNEL_BITS (PSW_BASE_BITS | PSW_MASK_DAT | PSW_ASC_PRIMARY | \
+ PSW_DEFAULT_KEY)
#define PSW_USER_BITS (PSW_BASE_BITS | PSW_MASK_DAT | PSW_ASC_HOME | \
PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK | \
- PSW_MASK_PSTATE)
+ PSW_MASK_PSTATE | PSW_DEFAULT_KEY)
/* This macro merges a NEW PSW mask specified by the user into
the currently active PSW mask CURRENT, modifying only those
@@ -447,6 +451,12 @@
};
+static inline void
+psw_set_key(unsigned int key)
+{
+ asm volatile ( "spka 0(%0)" : : "d" (key) );
+}
+
#endif /* __ASSEMBLY__ */
#endif /* _S390_PTRACE_H */
Modified: linux-libc-headers/trunk/include/asm-s390/unistd.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-s390/unistd.h (original)
+++ linux-libc-headers/trunk/include/asm-s390/unistd.h Tue Jul 5 22:58:33 2005
@@ -259,7 +259,7 @@
#define __NR_fadvise64_64 264
#define __NR_statfs64 265
#define __NR_fstatfs64 266
-/* Number 267 is reserved for new sys_remap_file_pages */
+#define __NR_remap_file_pages 267
/* Number 268 is reserved for new sys_mbind */
/* Number 269 is reserved for new sys_get_mempolicy */
/* Number 270 is reserved for new sys_set_mempolicy */
@@ -270,8 +270,12 @@
#define __NR_mq_notify 275
#define __NR_mq_getsetattr 276
/* Number 277 is reserved for new sys_kexec_load */
+#define __NR_add_key 278
+#define __NR_request_key 279
+#define __NR_keyctl 280
+#define __NR_waitid 281
-#define NR_syscalls 278
+#define NR_syscalls 282
/*
* There are some system calls that are not present on 64 bit, some
@@ -330,7 +334,6 @@
#undef __NR_setgid32
#undef __NR_setfsuid32
#undef __NR_setfsgid32
-#undef __NR_getdents64
#undef __NR_fcntl64
#undef __NR_sendfile64
#undef __NR_fadvise64_64
@@ -570,6 +573,6 @@
* What we want is __attribute__((weak,alias("sys_ni_syscall"))),
* but it doesn't work on all toolchains, so we just do it by hand
*/
-#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall");
+#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
#endif /* _ASM_S390_UNISTD_H_ */
Modified: linux-libc-headers/trunk/include/asm-s390/user.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-s390/user.h (original)
+++ linux-libc-headers/trunk/include/asm-s390/user.h Tue Jul 5 22:58:33 2005
@@ -10,7 +10,7 @@
#define _S390_USER_H
#include <asm/page.h>
-#include <linux/ptrace.h>
+#include <asm/ptrace.h>
/* Core file format: The core file is written in such a way that gdb
can understand it and provide useful information to the user (under
linux we use the 'trad-core' bfd). There are quite a number of
Modified: linux-libc-headers/trunk/include/asm-sh/cacheflush.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sh/cacheflush.h (original)
+++ linux-libc-headers/trunk/include/asm-sh/cacheflush.h Tue Jul 5 22:58:33 2005
@@ -1,5 +1,6 @@
#ifndef __ASM_SH_CACHEFLUSH_H
#define __ASM_SH_CACHEFLUSH_H
+#ifdef __KERNEL__
#include <asm/cpu/cacheflush.h>
@@ -15,15 +16,16 @@
#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
do { \
- flush_cache_page(vma, vaddr); \
+ flush_cache_page(vma, vaddr, page_to_pfn(page));\
memcpy(dst, src, len); \
flush_icache_user_range(vma, page, vaddr, len); \
} while (0)
#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
do { \
- flush_cache_page(vma, vaddr); \
+ flush_cache_page(vma, vaddr, page_to_pfn(page));\
memcpy(dst, src, len); \
} while (0)
+#endif /* __KERNEL__ */
#endif /* __ASM_SH_CACHEFLUSH_H */
Modified: linux-libc-headers/trunk/include/asm-sh/checksum.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sh/checksum.h (original)
+++ linux-libc-headers/trunk/include/asm-sh/checksum.h Tue Jul 5 22:58:33 2005
@@ -41,7 +41,7 @@
* passed in an incorrect kernel address to one of these functions.
*
* If you use these functions directly please don't forget the
- * verify_area().
+ * access_ok().
*/
static __inline__
unsigned int csum_partial_copy_nocheck (const unsigned char *src, unsigned char *dst,
Modified: linux-libc-headers/trunk/include/asm-sh/cpu-sh2/cacheflush.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sh/cpu-sh2/cacheflush.h (original)
+++ linux-libc-headers/trunk/include/asm-sh/cpu-sh2/cacheflush.h Tue Jul 5 22:58:33 2005
@@ -15,7 +15,7 @@
*
* - flush_cache_all() flushes entire cache
* - flush_cache_mm(mm) flushes the specified mm context's cache lines
- * - flush_cache_page(mm, vmaddr) flushes a single page
+ * - flush_cache_page(mm, vmaddr, pfn) flushes a single page
* - flush_cache_range(vma, start, end) flushes a range of pages
*
* - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache
@@ -28,7 +28,7 @@
#define flush_cache_all() do { } while (0)
#define flush_cache_mm(mm) do { } while (0)
#define flush_cache_range(vma, start, end) do { } while (0)
-#define flush_cache_page(vma, vmaddr) do { } while (0)
+#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
#define flush_dcache_page(page) do { } while (0)
#define flush_dcache_mmap_lock(mapping) do { } while (0)
#define flush_dcache_mmap_unlock(mapping) do { } while (0)
Modified: linux-libc-headers/trunk/include/asm-sh/cpu-sh3/cacheflush.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sh/cpu-sh3/cacheflush.h (original)
+++ linux-libc-headers/trunk/include/asm-sh/cpu-sh3/cacheflush.h Tue Jul 5 22:58:33 2005
@@ -15,7 +15,7 @@
*
* - flush_cache_all() flushes entire cache
* - flush_cache_mm(mm) flushes the specified mm context's cache lines
- * - flush_cache_page(mm, vmaddr) flushes a single page
+ * - flush_cache_page(mm, vmaddr, pfn) flushes a single page
* - flush_cache_range(vma, start, end) flushes a range of pages
*
* - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache
@@ -43,7 +43,7 @@
extern void flush_cache_mm(struct mm_struct *mm);
extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
unsigned long end);
-extern void flush_cache_page(struct vm_area_struct *vma, unsigned long addr);
+extern void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn);
extern void flush_dcache_page(struct page *pg);
extern void flush_icache_range(unsigned long start, unsigned long end);
extern void flush_icache_page(struct vm_area_struct *vma, struct page *page);
@@ -68,7 +68,7 @@
#define flush_cache_all() do { } while (0)
#define flush_cache_mm(mm) do { } while (0)
#define flush_cache_range(vma, start, end) do { } while (0)
-#define flush_cache_page(vma, vmaddr) do { } while (0)
+#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
#define flush_dcache_page(page) do { } while (0)
#define flush_dcache_mmap_lock(mapping) do { } while (0)
#define flush_dcache_mmap_unlock(mapping) do { } while (0)
Added: linux-libc-headers/trunk/include/asm-sh/cpu-sh3/timer.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/asm-sh/cpu-sh3/timer.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,64 @@
+/*
+ * include/asm-sh/cpu-sh3/timer.h
+ *
+ * Copyright (C) 2004 Lineo Solutions, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#ifndef __ASM_CPU_SH3_TIMER_H
+#define __ASM_CPU_SH3_TIMER_H
+
+/*
+ * ---------------------------------------------------------------------------
+ * TMU Common definitions for SH3 processors
+ * SH7706
+ * SH7709S
+ * SH7727
+ * SH7729R
+ * SH7710
+ * SH7720
+ * SH7300
+ * ---------------------------------------------------------------------------
+ */
+
+#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7710)
+#define TMU_TSTR 0xa412fe92 /* Byte access */
+
+#define TMU0_TCOR 0xa412fe94 /* Long access */
+#define TMU0_TCNT 0xa412fe98 /* Long access */
+#define TMU0_TCR 0xa412fe9c /* Word access */
+
+#define TMU1_TCOR 0xa412fea0 /* Long access */
+#define TMU1_TCNT 0xa412fea4 /* Long access */
+#define TMU1_TCR 0xa412fea8 /* Word access */
+
+#define TMU2_TCOR 0xa412feac /* Long access */
+#define TMU2_TCNT 0xa412feb0 /* Long access */
+#define TMU2_TCR 0xa412feb4 /* Word access */
+
+#else
+#if !defined(CONFIG_CPU_SUBTYPE_SH7727)
+#define TMU_TOCR 0xfffffe90 /* Byte access */
+#endif
+#define TMU_TSTR 0xfffffe92 /* Byte access */
+
+#define TMU0_TCOR 0xfffffe94 /* Long access */
+#define TMU0_TCNT 0xfffffe98 /* Long access */
+#define TMU0_TCR 0xfffffe9c /* Word access */
+
+#define TMU1_TCOR 0xfffffea0 /* Long access */
+#define TMU1_TCNT 0xfffffea4 /* Long access */
+#define TMU1_TCR 0xfffffea8 /* Word access */
+
+#define TMU2_TCOR 0xfffffeac /* Long access */
+#define TMU2_TCNT 0xfffffeb0 /* Long access */
+#define TMU2_TCR 0xfffffeb4 /* Word access */
+#if !defined(CONFIG_CPU_SUBTYPE_SH7727)
+#define TMU2_TCPR2 0xfffffeb8 /* Long access */
+#endif
+#endif
+
+#endif /* __ASM_CPU_SH3_TIMER_H */
+
Modified: linux-libc-headers/trunk/include/asm-sh/cpu-sh4/cacheflush.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sh/cpu-sh4/cacheflush.h (original)
+++ linux-libc-headers/trunk/include/asm-sh/cpu-sh4/cacheflush.h Tue Jul 5 22:58:33 2005
@@ -28,7 +28,7 @@
extern void flush_cache_mm(struct mm_struct *mm);
extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
unsigned long end);
-extern void flush_cache_page(struct vm_area_struct *vma, unsigned long addr);
+extern void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn);
extern void flush_dcache_page(struct page *pg);
#define flush_dcache_mmap_lock(mapping) do { } while (0)
Added: linux-libc-headers/trunk/include/asm-sh/cpu-sh4/timer.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/asm-sh/cpu-sh4/timer.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,51 @@
+/*
+ * include/asm-sh/cpu-sh4/timer.h
+ *
+ * Copyright (C) 2004 Lineo Solutions, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#ifndef __ASM_CPU_SH4_TIMER_H
+#define __ASM_CPU_SH4_TIMER_H
+
+/*
+ * ---------------------------------------------------------------------------
+ * TMU Common definitions for SH4 processors
+ * SH7750S/SH7750R
+ * SH7751/SH7751R
+ * SH7760
+ * ---------------------------------------------------------------------------
+ */
+
+#if !defined(CONFIG_CPU_SUBTYPE_SH7760)
+#define TMU_TOCR 0xffd80000 /* Byte access */
+#endif
+#define TMU_TSTR 0xffd80004 /* Byte access */
+
+#define TMU0_TCOR 0xffd80008 /* Long access */
+#define TMU0_TCNT 0xffd8000c /* Long access */
+#define TMU0_TCR 0xffd80010 /* Word access */
+
+#define TMU1_TCOR 0xffd80014 /* Long access */
+#define TMU1_TCNT 0xffd80018 /* Long access */
+#define TMU1_TCR 0xffd8001c /* Word access */
+
+#define TMU2_TCOR 0xffd80020 /* Long access */
+#define TMU2_TCNT 0xffd80024 /* Long access */
+#define TMU2_TCR 0xffd80028 /* Word access */
+#define TMU2_TCPR 0xffd8002c /* Long access */
+
+#if !defined(CONFIG_CPU_SUBTYPE_SH7760)
+#define TMU3_TCOR 0xfe100008 /* Long access */
+#define TMU3_TCNT 0xfe10000c /* Long access */
+#define TMU3_TCR 0xfe100010 /* Word access */
+
+#define TMU4_TCOR 0xfe100014 /* Long access */
+#define TMU4_TCNT 0xfe100018 /* Long access */
+#define TMU4_TCR 0xfe10001c /* Word access */
+#endif
+
+#endif /* __ASM_CPU_SH4_TIMER_H */
+
Modified: linux-libc-headers/trunk/include/asm-sh/floppy.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sh/floppy.h (original)
+++ linux-libc-headers/trunk/include/asm-sh/floppy.h Tue Jul 5 22:58:33 2005
@@ -226,7 +226,7 @@
return 0;
}
-struct fd_routine_l {
+static struct fd_routine_l {
int (*_request_dma)(unsigned int dmanr, const char * device_id);
void (*_free_dma)(unsigned int dmanr);
int (*_get_dma_residue)(unsigned int dummy);
Modified: linux-libc-headers/trunk/include/asm-sh/hardirq.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sh/hardirq.h (original)
+++ linux-libc-headers/trunk/include/asm-sh/hardirq.h Tue Jul 5 22:58:33 2005
@@ -11,15 +11,6 @@
#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
-#define HARDIRQ_BITS 8
-
-/*
- * The hardirq mask has to be large enough to have
- * space for potentially all IRQ sources in the system
- * nesting on a single CPU:
- */
-#if (1 << HARDIRQ_BITS) < NR_IRQS
-# error HARDIRQ_BITS is too low!
-#endif
+extern void ack_bad_irq(unsigned int irq);
#endif /* __ASM_SH_HARDIRQ_H */
Modified: linux-libc-headers/trunk/include/asm-sh/irq.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sh/irq.h (original)
+++ linux-libc-headers/trunk/include/asm-sh/irq.h Tue Jul 5 22:58:33 2005
@@ -16,7 +16,8 @@
#if defined(CONFIG_SH_HP600) || \
defined(CONFIG_SH_RTS7751R2D) || \
- defined(CONFIG_SH_HS7751RVOIP)
+ defined(CONFIG_SH_HS7751RVOIP) || \
+ defined(CONFIG_SH_SH03)
#include <asm/mach/ide.h>
#endif
Modified: linux-libc-headers/trunk/include/asm-sh/pgalloc.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sh/pgalloc.h (original)
+++ linux-libc-headers/trunk/include/asm-sh/pgalloc.h Tue Jul 5 22:58:33 2005
@@ -1,7 +1,6 @@
#ifndef __ASM_SH_PGALLOC_H
#define __ASM_SH_PGALLOC_H
-#include <asm/processor.h>
#include <linux/threads.h>
#include <linux/slab.h>
Modified: linux-libc-headers/trunk/include/asm-sh/pgtable-2level.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sh/pgtable-2level.h (original)
+++ linux-libc-headers/trunk/include/asm-sh/pgtable-2level.h Tue Jul 5 22:58:33 2005
@@ -41,6 +41,8 @@
* hook is made available.
*/
#define set_pte(pteptr, pteval) (*(pteptr) = pteval)
+#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
+
/*
* (pmds are folded into pgds so this doesn't get actually called,
* but the define is needed for a generic inline function.)
Added: linux-libc-headers/trunk/include/asm-sh/sh03/ide.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/asm-sh/sh03/ide.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,7 @@
+#ifndef __ASM_SH_SH03_IDE_H
+#define __ASM_SH_SH03_IDE_H
+
+#define IRQ_CFCARD 8
+#define IRQ_PCMCIA 8
+
+#endif /* __ASM_SH_SH03_IDE_H */
Added: linux-libc-headers/trunk/include/asm-sh/sh03/io.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/asm-sh/sh03/io.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,46 @@
+/*
+ * include/asm-sh/sh03/io.h
+ *
+ * Copyright 2004 Interface Co.,Ltd. Saito.K
+ *
+ * IO functions for an Interface CTP/PCI-SH03
+ */
+
+#ifndef _ASM_SH_IO_SH03_H
+#define _ASM_SH_IO_SH03_H
+
+#include <linux/time.h>
+
+#define INTC_IPRD 0xffd00010UL
+
+#define IRL0_IRQ 2
+#define IRL0_IPR_ADDR INTC_IPRD
+#define IRL0_IPR_POS 3
+#define IRL0_PRIORITY 13
+
+#define IRL1_IRQ 5
+#define IRL1_IPR_ADDR INTC_IPRD
+#define IRL1_IPR_POS 2
+#define IRL1_PRIORITY 10
+
+#define IRL2_IRQ 8
+#define IRL2_IPR_ADDR INTC_IPRD
+#define IRL2_IPR_POS 1
+#define IRL2_PRIORITY 7
+
+#define IRL3_IRQ 11
+#define IRL3_IPR_ADDR INTC_IPRD
+#define IRL3_IPR_POS 0
+#define IRL3_PRIORITY 4
+
+
+extern unsigned long sh03_isa_port2addr(unsigned long offset);
+
+extern void setup_sh03(void);
+extern void init_sh03_IRQ(void);
+extern void heartbeat_sh03(void);
+
+extern void sh03_rtc_gettimeofday(struct timeval *tv);
+extern int sh03_rtc_settimeofday(const struct timeval *tv);
+
+#endif /* _ASM_SH_IO_SH03_H */
Added: linux-libc-headers/trunk/include/asm-sh/sh03/sh03.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/asm-sh/sh03/sh03.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,18 @@
+#ifndef __ASM_SH_SH03_H
+#define __ASM_SH_SH03_H
+
+/*
+ * linux/include/asm-sh/sh03/sh03.h
+ *
+ * Copyright (C) 2004 Interface Co., Ltd. Saito.K
+ *
+ * Interface CTP/PCI-SH03 support
+ */
+
+#define PA_PCI_IO (0xbe240000) /* PCI I/O space */
+#define PA_PCI_MEM (0xbd000000) /* PCI MEM space */
+
+#define PCIPAR (0xa4000cf8) /* PCI Config address */
+#define PCIPDR (0xa4000cfc) /* PCI Config data */
+
+#endif /* __ASM_SH_SH03_H */
Modified: linux-libc-headers/trunk/include/asm-sh/system.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sh/system.h (original)
+++ linux-libc-headers/trunk/include/asm-sh/system.h Tue Jul 5 22:58:33 2005
@@ -258,4 +258,6 @@
void disable_hlt(void);
void enable_hlt(void);
+#define arch_align_stack(x) (x)
+
#endif
Modified: linux-libc-headers/trunk/include/asm-sh/unistd.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sh/unistd.h (original)
+++ linux-libc-headers/trunk/include/asm-sh/unistd.h Tue Jul 5 22:58:33 2005
@@ -491,7 +491,7 @@
* but it doesn't work on all toolchains, so we just do it by hand
*/
#ifndef cond_syscall
-#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall");
+#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
#endif
#endif /* __ASM_SH_UNISTD_H */
Modified: linux-libc-headers/trunk/include/asm-sh64/cacheflush.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sh64/cacheflush.h (original)
+++ linux-libc-headers/trunk/include/asm-sh64/cacheflush.h Tue Jul 5 22:58:33 2005
@@ -14,7 +14,7 @@
extern void flush_cache_sigtramp(unsigned long start, unsigned long end);
extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
unsigned long end);
-extern void flush_cache_page(struct vm_area_struct *vma, unsigned long addr);
+extern void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn);
extern void flush_dcache_page(struct page *pg);
extern void flush_icache_range(unsigned long start, unsigned long end);
extern void flush_icache_user_range(struct vm_area_struct *vma,
@@ -31,14 +31,14 @@
#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
do { \
- flush_cache_page(vma, vaddr); \
+ flush_cache_page(vma, vaddr, page_to_pfn(page));\
memcpy(dst, src, len); \
flush_icache_user_range(vma, page, vaddr, len); \
} while (0)
#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
do { \
- flush_cache_page(vma, vaddr); \
+ flush_cache_page(vma, vaddr, page_to_pfn(page));\
memcpy(dst, src, len); \
} while (0)
Modified: linux-libc-headers/trunk/include/asm-sh64/checksum.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sh64/checksum.h (original)
+++ linux-libc-headers/trunk/include/asm-sh64/checksum.h Tue Jul 5 22:58:33 2005
@@ -34,7 +34,7 @@
* passed in an incorrect kernel address to one of these functions.
*
* If you use these functions directly please don't forget the
- * verify_area().
+ * access_ok().
*/
Modified: linux-libc-headers/trunk/include/asm-sh64/elf.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sh64/elf.h (original)
+++ linux-libc-headers/trunk/include/asm-sh64/elf.h Tue Jul 5 22:58:33 2005
@@ -53,6 +53,12 @@
#define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3)
+#define R_SH_DIR32 1
+#define R_SH_REL32 2
+#define R_SH_IMM_LOW16 246
+#define R_SH_IMM_LOW16_PCREL 247
+#define R_SH_IMM_MEDLOW16 248
+#define R_SH_IMM_MEDLOW16_PCREL 249
#define ELF_CORE_COPY_REGS(_dest,_regs) \
memcpy((char *) &_dest, (char *) _regs, \
Modified: linux-libc-headers/trunk/include/asm-sh64/hardirq.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sh64/hardirq.h (original)
+++ linux-libc-headers/trunk/include/asm-sh64/hardirq.h Tue Jul 5 22:58:33 2005
@@ -1,7 +1,18 @@
#ifndef __ASM_SH64_HARDIRQ_H
#define __ASM_SH64_HARDIRQ_H
-#include <asm-sh/hardirq.h>
+#include <linux/threads.h>
+#include <linux/irq.h>
+
+/* entry.S is sensitive to the offsets of these fields */
+typedef struct {
+ unsigned int __softirq_pending;
+} ____cacheline_aligned irq_cpustat_t;
+
+#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
+
+/* arch/sh64/kernel/irq.c */
+extern void ack_bad_irq(unsigned int irq);
#endif /* __ASM_SH64_HARDIRQ_H */
Modified: linux-libc-headers/trunk/include/asm-sh64/hardware.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sh64/hardware.h (original)
+++ linux-libc-headers/trunk/include/asm-sh64/hardware.h Tue Jul 5 22:58:33 2005
@@ -17,29 +17,6 @@
#define PHYS_PERIPHERAL_BLOCK 0x09000000
#define PHYS_DMAC_BLOCK 0x0e000000
#define PHYS_PCI_BLOCK 0x60000000
-
-#ifndef __ASSEMBLY__
-#include <linux/types.h>
-#include <asm/io.h>
-
-struct vcr_info {
- __u8 perr_flags; /* P-port Error flags */
- __u8 merr_flags; /* Module Error flags */
- __u16 mod_vers; /* Module Version */
- __u16 mod_id; /* Module ID */
- __u8 bot_mb; /* Bottom Memory block */
- __u8 top_mb; /* Top Memory block */
-};
-
-static inline struct vcr_info sh64_get_vcr_info(unsigned long base)
-{
- unsigned long long tmp;
-
- tmp = sh64_in64(base);
-
- return *((struct vcr_info *)&tmp);
-}
-
-#endif /* __ASSEMBLY__ */
+#define PHYS_EMI_BLOCK 0xff000000
#endif /* __ASM_SH64_HARDWARE_H */
Modified: linux-libc-headers/trunk/include/asm-sh64/io.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sh64/io.h (original)
+++ linux-libc-headers/trunk/include/asm-sh64/io.h Tue Jul 5 22:58:33 2005
@@ -39,45 +39,45 @@
* with an implicit size. The traditional read{b,w,l}/write{b,w,l}
* mess is wrapped to this, as are the SH-specific ctrl_in/out routines.
*/
-static inline unsigned char sh64_in8(unsigned long addr)
+static inline unsigned char sh64_in8(const volatile void *addr)
{
return *(volatile unsigned char *)addr;
}
-static inline unsigned short sh64_in16(unsigned long addr)
+static inline unsigned short sh64_in16(const volatile void *addr)
{
return *(volatile unsigned short *)addr;
}
-static inline unsigned long sh64_in32(unsigned long addr)
+static inline unsigned int sh64_in32(const volatile void *addr)
{
- return *(volatile unsigned long *)addr;
+ return *(volatile unsigned int *)addr;
}
-static inline unsigned long long sh64_in64(unsigned long addr)
+static inline unsigned long long sh64_in64(const volatile void *addr)
{
return *(volatile unsigned long long *)addr;
}
-static inline void sh64_out8(unsigned char b, unsigned long addr)
+static inline void sh64_out8(unsigned char b, volatile void *addr)
{
*(volatile unsigned char *)addr = b;
wmb();
}
-static inline void sh64_out16(unsigned short b, unsigned long addr)
+static inline void sh64_out16(unsigned short b, volatile void *addr)
{
*(volatile unsigned short *)addr = b;
wmb();
}
-static inline void sh64_out32(unsigned long b, unsigned long addr)
+static inline void sh64_out32(unsigned int b, volatile void *addr)
{
- *(volatile unsigned long *)addr = b;
+ *(volatile unsigned int *)addr = b;
wmb();
}
-static inline void sh64_out64(unsigned long long b, unsigned long addr)
+static inline void sh64_out64(unsigned long long b, volatile void *addr)
{
*(volatile unsigned long long *)addr = b;
wmb();
@@ -86,28 +86,43 @@
#define readb(addr) sh64_in8(addr)
#define readw(addr) sh64_in16(addr)
#define readl(addr) sh64_in32(addr)
-#define readb_relaxed(addr) sh64_in8(addr)
-#define readw_relaxed(addr) sh64_in16(addr)
-#define readl_relaxed(addr) sh64_in32(addr)
+#define readb_relaxed(addr) sh64_in8(addr)
+#define readw_relaxed(addr) sh64_in16(addr)
+#define readl_relaxed(addr) sh64_in32(addr)
#define writeb(b, addr) sh64_out8(b, addr)
#define writew(b, addr) sh64_out16(b, addr)
#define writel(b, addr) sh64_out32(b, addr)
-#define ctrl_inb(addr) sh64_in8(addr)
-#define ctrl_inw(addr) sh64_in16(addr)
-#define ctrl_inl(addr) sh64_in32(addr)
-
-#define ctrl_outb(b, addr) sh64_out8(b, addr)
-#define ctrl_outw(b, addr) sh64_out16(b, addr)
-#define ctrl_outl(b, addr) sh64_out32(b, addr)
-
-unsigned long inb(unsigned long port);
-unsigned long inw(unsigned long port);
-unsigned long inl(unsigned long port);
-void outb(unsigned long value, unsigned long port);
-void outw(unsigned long value, unsigned long port);
-void outl(unsigned long value, unsigned long port);
+#define ctrl_inb(addr) sh64_in8(ioport_map(addr, 1))
+#define ctrl_inw(addr) sh64_in16(ioport_map(addr, 2))
+#define ctrl_inl(addr) sh64_in32(ioport_map(addr, 4))
+
+#define ctrl_outb(b, addr) sh64_out8(b, ioport_map(addr, 1))
+#define ctrl_outw(b, addr) sh64_out16(b, ioport_map(addr, 2))
+#define ctrl_outl(b, addr) sh64_out32(b, ioport_map(addr, 4))
+
+#define ioread8(addr) sh64_in8(addr)
+#define ioread16(addr) sh64_in16(addr)
+#define ioread32(addr) sh64_in32(addr)
+#define iowrite8(b, addr) sh64_out8(b, addr)
+#define iowrite16(b, addr) sh64_out16(b, addr)
+#define iowrite32(b, addr) sh64_out32(b, addr)
+
+#define inb(addr) ctrl_inb(addr)
+#define inw(addr) ctrl_inw(addr)
+#define inl(addr) ctrl_inl(addr)
+#define outb(b, addr) ctrl_outb(b, addr)
+#define outw(b, addr) ctrl_outw(b, addr)
+#define outl(b, addr) ctrl_outl(b, addr)
+
+void outsw(unsigned long port, const void *addr, unsigned long count);
+void insw(unsigned long port, void *addr, unsigned long count);
+void outsl(unsigned long port, const void *addr, unsigned long count);
+void insl(unsigned long port, void *addr, unsigned long count);
+
+void memcpy_toio(void *to, const void *from, long count);
+void memcpy_fromio(void *to, void *from, long count);
#define mmiowb()
Modified: linux-libc-headers/trunk/include/asm-sh64/ioctls.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sh64/ioctls.h (original)
+++ linux-libc-headers/trunk/include/asm-sh64/ioctls.h Tue Jul 5 22:58:33 2005
@@ -9,103 +9,108 @@
* include/asm-sh64/ioctls.h
*
* Copyright (C) 2000, 2001 Paolo Alberelli
+ * Copyright (C) 2004 Richard Curnow
*
*/
#include <asm/ioctl.h>
-#define FIOCLEX _IO('f', 1)
-#define FIONCLEX _IO('f', 2)
-#define FIOASYNC _IOW('f', 125, int)
-#define FIONBIO _IOW('f', 126, int)
-#define FIONREAD _IOR('f', 127, int)
+#define FIOCLEX 0x6601 /* _IO('f', 1) */
+#define FIONCLEX 0x6602 /* _IO('f', 2) */
+#define FIOASYNC 0x4004667d /* _IOW('f', 125, int) */
+#define FIONBIO 0x4004667e /* _IOW('f', 126, int) */
+#define FIONREAD 0x8004667f /* _IOW('f', 127, int) */
#define TIOCINQ FIONREAD
-#define FIOQSIZE _IOR('f', 128, loff_t)
+#define FIOQSIZE 0x80086680 /* _IOR('f', 128, loff_t) */
#define TCGETS 0x5401
#define TCSETS 0x5402
#define TCSETSW 0x5403
#define TCSETSF 0x5404
-#define TCGETA _IOR('t', 23, struct termio)
-#define TCSETA _IOW('t', 24, struct termio)
-#define TCSETAW _IOW('t', 25, struct termio)
-#define TCSETAF _IOW('t', 28, struct termio)
-
-#define TCSBRK _IO('t', 29)
-#define TCXONC _IO('t', 30)
-#define TCFLSH _IO('t', 31)
-
-#define TIOCSWINSZ _IOW('t', 103, struct winsize)
-#define TIOCGWINSZ _IOR('t', 104, struct winsize)
-#define TIOCSTART _IO('t', 110) /* start output, like ^Q */
-#define TIOCSTOP _IO('t', 111) /* stop output, like ^S */
-#define TIOCOUTQ _IOR('t', 115, int) /* output queue size */
-
-#define TIOCSPGRP _IOW('t', 118, int)
-#define TIOCGPGRP _IOR('t', 119, int)
-
-#define TIOCEXCL _IO('T', 12) /* 0x540C */
-#define TIOCNXCL _IO('T', 13) /* 0x540D */
-#define TIOCSCTTY _IO('T', 14) /* 0x540E */
-
-#define TIOCSTI _IOW('T', 18, char) /* 0x5412 */
-#define TIOCMGET _IOR('T', 21, unsigned int) /* 0x5415 */
-#define TIOCMBIS _IOW('T', 22, unsigned int) /* 0x5416 */
-#define TIOCMBIC _IOW('T', 23, unsigned int) /* 0x5417 */
-#define TIOCMSET _IOW('T', 24, unsigned int) /* 0x5418 */
-# define TIOCM_LE 0x001
-# define TIOCM_DTR 0x002
-# define TIOCM_RTS 0x004
-# define TIOCM_ST 0x008
-# define TIOCM_SR 0x010
-# define TIOCM_CTS 0x020
-# define TIOCM_CAR 0x040
-# define TIOCM_RNG 0x080
-# define TIOCM_DSR 0x100
-# define TIOCM_CD TIOCM_CAR
-# define TIOCM_RI TIOCM_RNG
-
-#define TIOCGSOFTCAR _IOR('T', 25, unsigned int) /* 0x5419 */
-#define TIOCSSOFTCAR _IOW('T', 26, unsigned int) /* 0x541A */
-#define TIOCLINUX _IOW('T', 28, char) /* 0x541C */
-#define TIOCCONS _IO('T', 29) /* 0x541D */
-#define TIOCGSERIAL _IOR('T', 30, struct serial_struct) /* 0x541E */
-#define TIOCSSERIAL _IOW('T', 31, struct serial_struct) /* 0x541F */
-#define TIOCPKT _IOW('T', 32, int) /* 0x5420 */
-# define TIOCPKT_DATA 0
-# define TIOCPKT_FLUSHREAD 1
-# define TIOCPKT_FLUSHWRITE 2
-# define TIOCPKT_STOP 4
-# define TIOCPKT_START 8
-# define TIOCPKT_NOSTOP 16
-# define TIOCPKT_DOSTOP 32
-
-
-#define TIOCNOTTY _IO('T', 34) /* 0x5422 */
-#define TIOCSETD _IOW('T', 35, int) /* 0x5423 */
-#define TIOCGETD _IOR('T', 36, int) /* 0x5424 */
-#define TCSBRKP _IOW('T', 37, int) /* 0x5425 */ /* Needed for POSIX tcsendbreak() */
-#define TIOCTTYGSTRUCT _IOR('T', 38, struct tty_struct) /* 0x5426 */ /* For debugging only */
-#define TIOCSBRK _IO('T', 39) /* 0x5427 */ /* BSD compatibility */
-#define TIOCCBRK _IO('T', 40) /* 0x5428 */ /* BSD compatibility */
-#define TIOCGSID _IOR('T', 41, pid_t) /* 0x5429 */ /* Return the session ID of FD */
-#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
-#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
-
-#define TIOCSERCONFIG _IO('T', 83) /* 0x5453 */
-#define TIOCSERGWILD _IOR('T', 84, int) /* 0x5454 */
-#define TIOCSERSWILD _IOW('T', 85, int) /* 0x5455 */
+#define TCGETA 0x80127417 /* _IOR('t', 23, struct termio) */
+#define TCSETA 0x40127418 /* _IOW('t', 24, struct termio) */
+#define TCSETAW 0x40127419 /* _IOW('t', 25, struct termio) */
+#define TCSETAF 0x4012741c /* _IOW('t', 28, struct termio) */
+
+#define TCSBRK 0x741d /* _IO('t', 29) */
+#define TCXONC 0x741e /* _IO('t', 30) */
+#define TCFLSH 0x741f /* _IO('t', 31) */
+
+#define TIOCSWINSZ 0x40087467 /* _IOW('t', 103, struct winsize) */
+#define TIOCGWINSZ 0x80087468 /* _IOR('t', 104, struct winsize) */
+#define TIOCSTART 0x746e /* _IO('t', 110) start output, like ^Q */
+#define TIOCSTOP 0x746f /* _IO('t', 111) stop output, like ^S */
+#define TIOCOUTQ 0x80047473 /* _IOR('t', 115, int) output queue size */
+
+#define TIOCSPGRP 0x40047476 /* _IOW('t', 118, int) */
+#define TIOCGPGRP 0x80047477 /* _IOR('t', 119, int) */
+
+#define TIOCEXCL 0x540c /* _IO('T', 12) */
+#define TIOCNXCL 0x540d /* _IO('T', 13) */
+#define TIOCSCTTY 0x540e /* _IO('T', 14) */
+
+#define TIOCSTI 0x40015412 /* _IOW('T', 18, char) 0x5412 */
+#define TIOCMGET 0x80045415 /* _IOR('T', 21, unsigned int) 0x5415 */
+#define TIOCMBIS 0x40045416 /* _IOW('T', 22, unsigned int) 0x5416 */
+#define TIOCMBIC 0x40045417 /* _IOW('T', 23, unsigned int) 0x5417 */
+#define TIOCMSET 0x40045418 /* _IOW('T', 24, unsigned int) 0x5418 */
+
+#define TIOCM_LE 0x001
+#define TIOCM_DTR 0x002
+#define TIOCM_RTS 0x004
+#define TIOCM_ST 0x008
+#define TIOCM_SR 0x010
+#define TIOCM_CTS 0x020
+#define TIOCM_CAR 0x040
+#define TIOCM_RNG 0x080
+#define TIOCM_DSR 0x100
+#define TIOCM_CD TIOCM_CAR
+#define TIOCM_RI TIOCM_RNG
+
+#define TIOCGSOFTCAR 0x80045419 /* _IOR('T', 25, unsigned int) 0x5419 */
+#define TIOCSSOFTCAR 0x4004541a /* _IOW('T', 26, unsigned int) 0x541A */
+#define TIOCLINUX 0x4004541c /* _IOW('T', 28, char) 0x541C */
+#define TIOCCONS 0x541d /* _IO('T', 29) */
+#define TIOCGSERIAL 0x803c541e /* _IOR('T', 30, struct serial_struct) 0x541E */
+#define TIOCSSERIAL 0x403c541f /* _IOW('T', 31, struct serial_struct) 0x541F */
+#define TIOCPKT 0x40045420 /* _IOW('T', 32, int) 0x5420 */
+
+#define TIOCPKT_DATA 0
+#define TIOCPKT_FLUSHREAD 1
+#define TIOCPKT_FLUSHWRITE 2
+#define TIOCPKT_STOP 4
+#define TIOCPKT_START 8
+#define TIOCPKT_NOSTOP 16
+#define TIOCPKT_DOSTOP 32
+
+
+#define TIOCNOTTY 0x5422 /* _IO('T', 34) */
+#define TIOCSETD 0x40045423 /* _IOW('T', 35, int) 0x5423 */
+#define TIOCGETD 0x80045424 /* _IOR('T', 36, int) 0x5424 */
+#define TCSBRKP 0x40045424 /* _IOW('T', 37, int) 0x5425 */ /* Needed for POSIX tcsendbreak() */
+#define TIOCTTYGSTRUCT 0x8c105426 /* _IOR('T', 38, struct tty_struct) 0x5426 */ /* For debugging only */
+#define TIOCSBRK 0x5427 /* _IO('T', 39) */ /* BSD compatibility */
+#define TIOCCBRK 0x5428 /* _IO('T', 40) */ /* BSD compatibility */
+#define TIOCGSID 0x80045429 /* _IOR('T', 41, pid_t) 0x5429 */ /* Return the session ID of FD */
+#define TIOCGPTN 0x80045430 /* _IOR('T',0x30, unsigned int) 0x5430 Get Pty Number (of pty-mux device) */
+#define TIOCSPTLCK 0x40045431 /* _IOW('T',0x31, int) Lock/unlock Pty */
+
+#define TIOCSERCONFIG 0x5453 /* _IO('T', 83) */
+#define TIOCSERGWILD 0x80045454 /* _IOR('T', 84, int) 0x5454 */
+#define TIOCSERSWILD 0x40045455 /* _IOW('T', 85, int) 0x5455 */
#define TIOCGLCKTRMIOS 0x5456
#define TIOCSLCKTRMIOS 0x5457
-#define TIOCSERGSTRUCT _IOR('T', 88, struct async_struct) /* 0x5458 */ /* For debugging only */
-#define TIOCSERGETLSR _IOR('T', 89, unsigned int) /* 0x5459 */ /* Get line status register */
- /* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
-# define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
-#define TIOCSERGETMULTI _IOR('T', 90, struct serial_multiport_struct) /* 0x545A */ /* Get multiport config */
-#define TIOCSERSETMULTI _IOW('T', 91, struct serial_multiport_struct) /* 0x545B */ /* Set multiport config */
+#define TIOCSERGSTRUCT 0x80d85458 /* _IOR('T', 88, struct async_struct) 0x5458 */ /* For debugging only */
+#define TIOCSERGETLSR 0x80045459 /* _IOR('T', 89, unsigned int) 0x5459 */ /* Get line status register */
-#define TIOCMIWAIT _IO('T', 92) /* 0x545C */ /* wait for a change on serial input line(s) */
-#define TIOCGICOUNT _IOR('T', 93, struct async_icount) /* 0x545D */ /* read serial port inline interrupt counts */
+/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
+#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
+
+#define TIOCSERGETMULTI 0x80a8545a /* _IOR('T', 90, struct serial_multiport_struct) 0x545A */ /* Get multiport config */
+#define TIOCSERSETMULTI 0x40a8545b /* _IOW('T', 91, struct serial_multiport_struct) 0x545B */ /* Set multiport config */
+
+#define TIOCMIWAIT 0x545c /* _IO('T', 92) wait for a change on serial input line(s) */
+#define TIOCGICOUNT 0x802c545d /* _IOR('T', 93, struct async_icount) 0x545D */ /* read serial port inline interrupt counts */
#endif /* __ASM_SH64_IOCTLS_H */
Modified: linux-libc-headers/trunk/include/asm-sh64/irq.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sh64/irq.h (original)
+++ linux-libc-headers/trunk/include/asm-sh64/irq.h Tue Jul 5 22:58:33 2005
@@ -82,11 +82,12 @@
#define IRQ_P2INTC (START_EXT_IRQS + (3*8) + 2)
#define IRQ_P2INTD (START_EXT_IRQS + (3*8) + 3)
-#define START_EXT_IRQS 64
-
#define I8042_KBD_IRQ (START_EXT_IRQS + 2)
#define I8042_AUX_IRQ (START_EXT_IRQS + 6)
+#define IRQ_CFCARD (START_EXT_IRQS + 7)
+#define IRQ_PCMCIA (0)
+
#else
#define NR_EXT_IRQS 0
#endif
Modified: linux-libc-headers/trunk/include/asm-sh64/module.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sh64/module.h (original)
+++ linux-libc-headers/trunk/include/asm-sh64/module.h Tue Jul 5 22:58:33 2005
@@ -4,6 +4,14 @@
* This file contains the SH architecture specific module code.
*/
+struct mod_arch_specific {
+ /* empty */
+};
+
+#define Elf_Shdr Elf32_Shdr
+#define Elf_Sym Elf32_Sym
+#define Elf_Ehdr Elf32_Ehdr
+
#define module_map(x) vmalloc(x)
#define module_unmap(x) vfree(x)
#define module_arch_init(x) (0)
Modified: linux-libc-headers/trunk/include/asm-sh64/pgalloc.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sh64/pgalloc.h (original)
+++ linux-libc-headers/trunk/include/asm-sh64/pgalloc.h Tue Jul 5 22:58:33 2005
@@ -14,7 +14,6 @@
*
*/
-#include <asm/processor.h>
#include <linux/threads.h>
#include <linux/mm.h>
Modified: linux-libc-headers/trunk/include/asm-sh64/system.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sh64/system.h (original)
+++ linux-libc-headers/trunk/include/asm-sh64/system.h Tue Jul 5 22:58:33 2005
@@ -14,7 +14,6 @@
*
*/
-#include <linux/kernel.h>
#include <asm/registers.h>
#include <asm/processor.h>
@@ -190,4 +189,6 @@
#define PL() printk("@ <%s,%s:%d>\n",__FILE__,__FUNCTION__,__LINE__)
+#define arch_align_stack(x) (x)
+
#endif /* __ASM_SH64_SYSTEM_H */
Modified: linux-libc-headers/trunk/include/asm-sh64/unistd.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sh64/unistd.h (original)
+++ linux-libc-headers/trunk/include/asm-sh64/unistd.h Tue Jul 5 22:58:33 2005
@@ -333,8 +333,13 @@
#define __NR_mq_timedreceive (__NR_mq_open+3)
#define __NR_mq_notify (__NR_mq_open+4)
#define __NR_mq_getsetattr (__NR_mq_open+5)
+#define __NR_sys_kexec_load 311
+#define __NR_waitid 312
+#define __NR_add_key 313
+#define __NR_request_key 314
+#define __NR_keyctl 315
-#define NR_syscalls 311
+#define NR_syscalls 316
/* user-visible error numbers are in the range -1 - -125: see <asm-sh64/errno.h> */
@@ -484,7 +489,7 @@
* but it doesn't work on all toolchains, so we just do it by hand
*/
#ifndef cond_syscall
-#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall");
+#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
#endif
#endif /* __ASM_SH64_UNISTD_H */
Modified: linux-libc-headers/trunk/include/asm-sparc/cacheflush.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sparc/cacheflush.h (original)
+++ linux-libc-headers/trunk/include/asm-sparc/cacheflush.h Tue Jul 5 22:58:33 2005
@@ -48,21 +48,21 @@
#define flush_cache_all() BTFIXUP_CALL(flush_cache_all)()
#define flush_cache_mm(mm) BTFIXUP_CALL(flush_cache_mm)(mm)
#define flush_cache_range(vma,start,end) BTFIXUP_CALL(flush_cache_range)(vma,start,end)
-#define flush_cache_page(vma,addr) BTFIXUP_CALL(flush_cache_page)(vma,addr)
+#define flush_cache_page(vma,addr,pfn) BTFIXUP_CALL(flush_cache_page)(vma,addr)
#define flush_icache_range(start, end) do { } while (0)
#define flush_icache_page(vma, pg) do { } while (0)
#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
- do { \
- flush_cache_page(vma, vaddr); \
- memcpy(dst, src, len); \
+ do { \
+ flush_cache_page(vma, vaddr, page_to_pfn(page));\
+ memcpy(dst, src, len); \
} while (0)
#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
- do { \
- flush_cache_page(vma, vaddr); \
- memcpy(dst, src, len); \
+ do { \
+ flush_cache_page(vma, vaddr, page_to_pfn(page));\
+ memcpy(dst, src, len); \
} while (0)
BTFIXUPDEF_CALL(void, __flush_page_to_ram, unsigned long)
Modified: linux-libc-headers/trunk/include/asm-sparc/errno.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sparc/errno.h (original)
+++ linux-libc-headers/trunk/include/asm-sparc/errno.h Tue Jul 5 22:58:33 2005
@@ -100,6 +100,8 @@
#undef EKEYEXPIRED
#undef EKEYREVOKED
#undef EKEYREJECTED
+#undef EOWNERDEAD
+#undef ENOTRECOVERABLE
/* These match the SunOS error numbering scheme. */
@@ -205,4 +207,9 @@
#define EKEYREVOKED 130 /* Key has been revoked */
#define EKEYREJECTED 131 /* Key was rejected by service */
+/* for robust mutexes */
+#define EOWNERDEAD 132 /* Owner died */
+#define ENOTRECOVERABLE 133 /* State not recoverable */
+
+
#endif
Modified: linux-libc-headers/trunk/include/asm-sparc/floppy.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sparc/floppy.h (original)
+++ linux-libc-headers/trunk/include/asm-sparc/floppy.h Tue Jul 5 22:58:33 2005
@@ -227,7 +227,7 @@
doing_pdma = 0;
if (pdma_base) {
mmu_unlockarea(pdma_base, pdma_areasize);
- pdma_base = 0;
+ pdma_base = NULL;
}
}
Modified: linux-libc-headers/trunk/include/asm-sparc/io.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sparc/io.h (original)
+++ linux-libc-headers/trunk/include/asm-sparc/io.h Tue Jul 5 22:58:33 2005
@@ -239,4 +239,17 @@
#define memcpy_toio(d,s,sz) _memcpy_toio(d,s,sz)
+#define __ARCH_HAS_NO_PAGE_ZERO_MAPPED 1
+
+/*
+ * Convert a physical pointer to a virtual kernel pointer for /dev/mem
+ * access
+ */
+#define xlate_dev_mem_ptr(p) __va(p)
+
+/*
+ * Convert a virtual cached pointer to an uncached pointer
+ */
+#define xlate_dev_kmem_ptr(p) p
+
#endif /* !(__SPARC_IO_H) */
Modified: linux-libc-headers/trunk/include/asm-sparc/mostek.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sparc/mostek.h (original)
+++ linux-libc-headers/trunk/include/asm-sparc/mostek.h Tue Jul 5 22:58:33 2005
@@ -127,7 +127,6 @@
char offset[6*1024]; /* Magic things may be here, who knows? */
struct mostek48t02 regs; /* Here is what we are interested in. */
};
-extern struct mostek48t08 *mstk48t08_regs;
extern enum sparc_clock_type sp_clock_typ;
Modified: linux-libc-headers/trunk/include/asm-sparc/mxcc.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sparc/mxcc.h (original)
+++ linux-libc-headers/trunk/include/asm-sparc/mxcc.h Tue Jul 5 22:58:33 2005
@@ -115,8 +115,8 @@
{
unsigned long mxcc_control;
- __asm__ __volatile__("set -1, %%g2\n\t"
- "set -1, %%g3\n\t"
+ __asm__ __volatile__("set 0xffffffff, %%g2\n\t"
+ "set 0xffffffff, %%g3\n\t"
"stda %%g2, [%1] %2\n\t"
"lda [%3] %2, %0\n\t" :
"=r" (mxcc_control) :
Modified: linux-libc-headers/trunk/include/asm-sparc/system.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sparc/system.h (original)
+++ linux-libc-headers/trunk/include/asm-sparc/system.h Tue Jul 5 22:58:33 2005
@@ -29,4 +29,6 @@
#endif /* __ASSEMBLY__ */
+#define arch_align_stack(x) (x)
+
#endif /* !(__SPARC_SYSTEM_H) */
Modified: linux-libc-headers/trunk/include/asm-sparc/unistd.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sparc/unistd.h (original)
+++ linux-libc-headers/trunk/include/asm-sparc/unistd.h Tue Jul 5 22:58:33 2005
@@ -78,7 +78,7 @@
#define __NR_umask 60 /* Common */
#define __NR_chroot 61 /* Common */
#define __NR_fstat 62 /* Common */
-#define __NR_fstat64 63 /* Linux sparc32 Specific */
+#define __NR_fstat64 63 /* Linux Specific */
#define __NR_getpagesize 64 /* Common */
#define __NR_msync 65 /* Common in newer 1.3.x revs... */
#define __NR_vfork 66 /* Common */
@@ -147,14 +147,14 @@
#define __NR_truncate 129 /* Common */
#define __NR_ftruncate 130 /* Common */
#define __NR_flock 131 /* Common */
-#define __NR_lstat64 132 /* Linux sparc32 Specific */
+#define __NR_lstat64 132 /* Linux Specific */
#define __NR_sendto 133 /* Common */
#define __NR_shutdown 134 /* Common */
#define __NR_socketpair 135 /* Common */
#define __NR_mkdir 136 /* Common */
#define __NR_rmdir 137 /* Common */
#define __NR_utimes 138 /* SunOS Specific */
-#define __NR_stat64 139 /* Linux sparc32 Specific */
+#define __NR_stat64 139 /* Linux Specific */
#define __NR_sendfile64 140 /* adjtime under SunOS */
#define __NR_getpeername 141 /* Common */
#define __NR_futex 142 /* gethostid under SunOS */
@@ -487,6 +487,6 @@
* What we want is __attribute__((weak,alias("sys_ni_syscall"))),
* but it doesn't work on all toolchains, so we just do it by hand
*/
-#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall");
+#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
#endif /* _SPARC_UNISTD_H */
Modified: linux-libc-headers/trunk/include/asm-sparc64/agp.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sparc64/agp.h (original)
+++ linux-libc-headers/trunk/include/asm-sparc64/agp.h Tue Jul 5 22:58:33 2005
@@ -8,4 +8,14 @@
#define flush_agp_mappings()
#define flush_agp_cache() mb()
+/* Convert a physical address to an address suitable for the GART. */
+#define phys_to_gart(x) (x)
+#define gart_to_phys(x) (x)
+
+/* GATT allocation. Returns/accepts GATT kernel virtual address. */
+#define alloc_gatt_pages(order) \
+ ((char *)__get_free_pages(GFP_KERNEL, (order)))
+#define free_gatt_pages(table, order) \
+ free_pages((unsigned long)(table), (order))
+
#endif
Modified: linux-libc-headers/trunk/include/asm-sparc64/cacheflush.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sparc64/cacheflush.h (original)
+++ linux-libc-headers/trunk/include/asm-sparc64/cacheflush.h Tue Jul 5 22:58:33 2005
@@ -1,6 +1,17 @@
#ifndef _SPARC64_CACHEFLUSH_H
#define _SPARC64_CACHEFLUSH_H
+#include <asm/page.h>
+
+/* Flushing for D-cache alias handling is only needed if
+ * the page size is smaller than 16K.
+ */
+#if PAGE_SHIFT < 14
+#define DCACHE_ALIASING_POSSIBLE
+#endif
+
+#ifndef __ASSEMBLY__
+
/* Cache flush operations. */
@@ -9,7 +20,7 @@
do { if ((__mm) == current->mm) flushw_user(); } while(0)
#define flush_cache_range(vma, start, end) \
flush_cache_mm((vma)->vm_mm)
-#define flush_cache_page(vma, page) \
+#define flush_cache_page(vma, page, pfn) \
flush_cache_mm((vma)->vm_mm)
/*
@@ -18,9 +29,9 @@
* module load, so we need this.
*/
extern void flush_icache_range(unsigned long start, unsigned long end);
+extern void __flush_icache_page(unsigned long);
extern void __flush_dcache_page(void *addr, int flush_icache);
-extern void __flush_icache_page(unsigned long);
extern void flush_dcache_page_impl(struct page *page);
#ifdef CONFIG_SMP
extern void smp_flush_dcache_page_impl(struct page *page, int cpu);
@@ -31,27 +42,35 @@
#endif
extern void __flush_dcache_range(unsigned long start, unsigned long end);
+extern void flush_dcache_page(struct page *page);
#define flush_icache_page(vma, pg) do { } while(0)
#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
-#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
- do { \
- flush_cache_page(vma, vaddr); \
- memcpy(dst, src, len); \
+extern void flush_ptrace_access(struct vm_area_struct *, struct page *,
+ unsigned long uaddr, void *kaddr,
+ unsigned long len, int write);
+
+#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
+ do { \
+ flush_cache_page(vma, vaddr, page_to_pfn(page)); \
+ memcpy(dst, src, len); \
+ flush_ptrace_access(vma, page, vaddr, src, len, 0); \
} while (0)
-#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
- do { \
- flush_cache_page(vma, vaddr); \
- memcpy(dst, src, len); \
+#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
+ do { \
+ flush_cache_page(vma, vaddr, page_to_pfn(page)); \
+ memcpy(dst, src, len); \
+ flush_ptrace_access(vma, page, vaddr, dst, len, 1); \
} while (0)
-extern void flush_dcache_page(struct page *page);
#define flush_dcache_mmap_lock(mapping) do { } while (0)
#define flush_dcache_mmap_unlock(mapping) do { } while (0)
#define flush_cache_vmap(start, end) do { } while (0)
#define flush_cache_vunmap(start, end) do { } while (0)
+#endif /* !__ASSEMBLY__ */
+
#endif /* _SPARC64_CACHEFLUSH_H */
Modified: linux-libc-headers/trunk/include/asm-sparc64/checksum.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sparc64/checksum.h (original)
+++ linux-libc-headers/trunk/include/asm-sparc64/checksum.h Tue Jul 5 22:58:33 2005
@@ -1,3 +1,4 @@
+/* $Id$ */
#ifndef __SPARC64_CHECKSUM_H
#define __SPARC64_CHECKSUM_H
@@ -37,44 +38,44 @@
* here even more important to align src and dst on a 32-bit (or even
* better 64-bit) boundary
*/
-extern unsigned int csum_partial_copy_sparc64(const unsigned char *src, unsigned char *dst,
+extern unsigned int csum_partial_copy_nocheck(const unsigned char *src,
+ unsigned char *dst,
int len, unsigned int sum);
-
-static inline unsigned int
-csum_partial_copy_nocheck (const unsigned char *src, unsigned char *dst, int len,
- unsigned int sum)
-{
- int ret;
- unsigned char cur_ds = get_thread_current_ds();
- __asm__ __volatile__ ("wr %%g0, %0, %%asi" : : "i" (ASI_P));
- ret = csum_partial_copy_sparc64(src, dst, len, sum);
- __asm__ __volatile__ ("wr %%g0, %0, %%asi" : : "r" (cur_ds));
- return ret;
-}
-static inline unsigned int
-csum_partial_copy_from_user(const unsigned char *src, unsigned char *dst, int len,
+extern long __csum_partial_copy_from_user(const unsigned char *src,
+ unsigned char *dst, int len,
+ unsigned int sum);
+
+static inline unsigned int
+csum_partial_copy_from_user(const unsigned char *src,
+ unsigned char *dst, int len,
unsigned int sum, int *err)
{
- __asm__ __volatile__ ("stx %0, [%%sp + 0x7ff + 128]"
- : : "r" (err));
- return csum_partial_copy_sparc64((const char *) src, dst, len, sum);
+ long ret = __csum_partial_copy_from_user(src, dst, len, sum);
+ if (ret < 0)
+ *err = -EFAULT;
+ return (unsigned int) ret;
}
/*
* Copy and checksum to user
*/
#define HAVE_CSUM_COPY_USER
-extern unsigned int csum_partial_copy_user_sparc64(const char *src, char *dst, int len, unsigned int sum);
-static inline unsigned int
-csum_and_copy_to_user(const char *src, char *dst, int len,
+extern long __csum_partial_copy_to_user(const unsigned char *src,
+ unsigned char *dst, int len,
+ unsigned int sum);
+
+static inline unsigned int
+csum_and_copy_to_user(const unsigned char *src,
+ unsigned char *dst, int len,
unsigned int sum, int *err)
{
- __asm__ __volatile__ ("stx %0, [%%sp + 0x7ff + 128]"
- : : "r" (err));
- return csum_partial_copy_user_sparc64(src, dst, len, sum);
+ long ret = __csum_partial_copy_to_user(src, dst, len, sum);
+ if (ret < 0)
+ *err = -EFAULT;
+ return (unsigned int) ret;
}
-
+
/* ihl is always 5 or greater, almost always is 5, and iph is word aligned
* the majority of the time.
*/
Modified: linux-libc-headers/trunk/include/asm-sparc64/compat.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sparc64/compat.h (original)
+++ linux-libc-headers/trunk/include/asm-sparc64/compat.h Tue Jul 5 22:58:33 2005
@@ -51,16 +51,50 @@
compat_dev_t st_rdev;
compat_off_t st_size;
compat_time_t st_atime;
- __u32 __unused1;
+ compat_ulong_t st_atime_nsec;
compat_time_t st_mtime;
- __u32 __unused2;
+ compat_ulong_t st_mtime_nsec;
compat_time_t st_ctime;
- __u32 __unused3;
+ compat_ulong_t st_ctime_nsec;
compat_off_t st_blksize;
compat_off_t st_blocks;
__u32 __unused4[2];
};
+struct compat_stat64 {
+ unsigned long long st_dev;
+
+ unsigned long long st_ino;
+
+ unsigned int st_mode;
+ unsigned int st_nlink;
+
+ unsigned int st_uid;
+ unsigned int st_gid;
+
+ unsigned long long st_rdev;
+
+ unsigned char __pad3[8];
+
+ long long st_size;
+ unsigned int st_blksize;
+
+ unsigned char __pad4[8];
+ unsigned int st_blocks;
+
+ unsigned int st_atime;
+ unsigned int st_atime_nsec;
+
+ unsigned int st_mtime;
+ unsigned int st_mtime_nsec;
+
+ unsigned int st_ctime;
+ unsigned int st_ctime_nsec;
+
+ unsigned int __unused4;
+ unsigned int __unused5;
+};
+
struct compat_flock {
short l_type;
short l_whence;
Modified: linux-libc-headers/trunk/include/asm-sparc64/cpudata.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sparc64/cpudata.h (original)
+++ linux-libc-headers/trunk/include/asm-sparc64/cpudata.h Tue Jul 5 22:58:33 2005
@@ -18,12 +18,13 @@
/* Dcache line 2 */
unsigned int pgcache_size;
- unsigned int pgdcache_size;
+ unsigned int __pad1;
unsigned long *pte_cache[2];
unsigned long *pgd_cache;
} cpuinfo_sparc;
DECLARE_PER_CPU(cpuinfo_sparc, __cpu_data);
-#define cpu_data(__cpu) per_cpu(__cpu_data, (__cpu))
+#define cpu_data(__cpu) per_cpu(__cpu_data, (__cpu))
+#define local_cpu_data() __get_cpu_var(__cpu_data)
#endif /* _SPARC64_CPUDATA_H */
Modified: linux-libc-headers/trunk/include/asm-sparc64/errno.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sparc64/errno.h (original)
+++ linux-libc-headers/trunk/include/asm-sparc64/errno.h Tue Jul 5 22:58:33 2005
@@ -100,6 +100,8 @@
#undef EKEYEXPIRED
#undef EKEYREVOKED
#undef EKEYREJECTED
+#undef EOWNERDEAD
+#undef ENOTRECOVERABLE
/* These match the SunOS error numbering scheme. */
@@ -204,4 +206,9 @@
#define EKEYREVOKED 130 /* Key has been revoked */
#define EKEYREJECTED 131 /* Key was rejected by service */
+/* for robust mutexes */
+#define EOWNERDEAD 132 /* Owner died */
+#define ENOTRECOVERABLE 133 /* State not recoverable */
+
+
#endif /* !(_SPARC64_ERRNO_H) */
Modified: linux-libc-headers/trunk/include/asm-sparc64/iommu.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sparc64/iommu.h (original)
+++ linux-libc-headers/trunk/include/asm-sparc64/iommu.h Tue Jul 5 22:58:33 2005
@@ -16,4 +16,6 @@
#define IOPTE_CACHE 0x0000000000000010UL /* Cached (in UPA E-cache) */
#define IOPTE_WRITE 0x0000000000000002UL /* Writeable */
+#define IOMMU_NUM_CTXS 4096
+
#endif /* !(_SPARC_IOMMU_H) */
Modified: linux-libc-headers/trunk/include/asm-sparc64/mmu.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sparc64/mmu.h (original)
+++ linux-libc-headers/trunk/include/asm-sparc64/mmu.h Tue Jul 5 22:58:33 2005
@@ -1,7 +1,98 @@
#ifndef __MMU_H
#define __MMU_H
-/* Default "unsigned long" context */
-typedef unsigned long mm_context_t;
+#include <asm/page.h>
+#include <asm/const.h>
+/*
+ * For the 8k pagesize kernel, use only 10 hw context bits to optimize some
+ * shifts in the fast tlbmiss handlers, instead of all 13 bits (specifically
+ * for vpte offset calculation). For other pagesizes, this optimization in
+ * the tlbhandlers can not be done; but still, all 13 bits can not be used
+ * because the tlb handlers use "andcc" instruction which sign extends 13
+ * bit arguments.
+ */
+#if PAGE_SHIFT == 13
+#define CTX_NR_BITS 10
+#else
+#define CTX_NR_BITS 12
#endif
+
+#define TAG_CONTEXT_BITS ((_AC(1,UL) << CTX_NR_BITS) - _AC(1,UL))
+
+/* UltraSPARC-III+ and later have a feature whereby you can
+ * select what page size the various Data-TLB instances in the
+ * chip. In order to gracefully support this, we put the version
+ * field in a spot outside of the areas of the context register
+ * where this parameter is specified.
+ */
+#define CTX_VERSION_SHIFT 22
+#define CTX_VERSION_MASK ((~0UL) << CTX_VERSION_SHIFT)
+
+#define CTX_PGSZ_8KB _AC(0x0,UL)
+#define CTX_PGSZ_64KB _AC(0x1,UL)
+#define CTX_PGSZ_512KB _AC(0x2,UL)
+#define CTX_PGSZ_4MB _AC(0x3,UL)
+#define CTX_PGSZ_BITS _AC(0x7,UL)
+#define CTX_PGSZ0_NUC_SHIFT 61
+#define CTX_PGSZ1_NUC_SHIFT 58
+#define CTX_PGSZ0_SHIFT 16
+#define CTX_PGSZ1_SHIFT 19
+#define CTX_PGSZ_MASK ((CTX_PGSZ_BITS << CTX_PGSZ0_SHIFT) | \
+ (CTX_PGSZ_BITS << CTX_PGSZ1_SHIFT))
+
+#if defined(CONFIG_SPARC64_PAGE_SIZE_8KB)
+#define CTX_PGSZ_BASE CTX_PGSZ_8KB
+#elif defined(CONFIG_SPARC64_PAGE_SIZE_64KB)
+#define CTX_PGSZ_BASE CTX_PGSZ_64KB
+#elif defined(CONFIG_SPARC64_PAGE_SIZE_512KB)
+#define CTX_PGSZ_BASE CTX_PGSZ_512KB
+#elif defined(CONFIG_SPARC64_PAGE_SIZE_4MB)
+#define CTX_PGSZ_BASE CTX_PGSZ_4MB
+#else
+#error No page size specified in kernel configuration
+#endif
+
+#if defined(CONFIG_HUGETLB_PAGE_SIZE_4MB)
+#define CTX_PGSZ_HUGE CTX_PGSZ_4MB
+#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K)
+#define CTX_PGSZ_HUGE CTX_PGSZ_512KB
+#elif defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
+#define CTX_PGSZ_HUGE CTX_PGSZ_64KB
+#endif
+
+#define CTX_PGSZ_KERN CTX_PGSZ_4MB
+
+/* Thus, when running on UltraSPARC-III+ and later, we use the following
+ * PRIMARY_CONTEXT register values for the kernel context.
+ */
+#define CTX_CHEETAH_PLUS_NUC \
+ ((CTX_PGSZ_KERN << CTX_PGSZ0_NUC_SHIFT) | \
+ (CTX_PGSZ_BASE << CTX_PGSZ1_NUC_SHIFT))
+
+#define CTX_CHEETAH_PLUS_CTX0 \
+ ((CTX_PGSZ_KERN << CTX_PGSZ0_SHIFT) | \
+ (CTX_PGSZ_BASE << CTX_PGSZ1_SHIFT))
+
+/* If you want "the TLB context number" use CTX_NR_MASK. If you
+ * want "the bits I program into the context registers" use
+ * CTX_HW_MASK.
+ */
+#define CTX_NR_MASK TAG_CONTEXT_BITS
+#define CTX_HW_MASK (CTX_NR_MASK | CTX_PGSZ_MASK)
+
+#define CTX_FIRST_VERSION ((_AC(1,UL) << CTX_VERSION_SHIFT) + _AC(1,UL))
+#define CTX_VALID(__ctx) \
+ (!(((__ctx.sparc64_ctx_val) ^ tlb_context_cache) & CTX_VERSION_MASK))
+#define CTX_HWBITS(__ctx) ((__ctx.sparc64_ctx_val) & CTX_HW_MASK)
+#define CTX_NRBITS(__ctx) ((__ctx.sparc64_ctx_val) & CTX_NR_MASK)
+
+#ifndef __ASSEMBLY__
+
+typedef struct {
+ unsigned long sparc64_ctx_val;
+} mm_context_t;
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* __MMU_H */
Modified: linux-libc-headers/trunk/include/asm-sparc64/mmu_context.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sparc64/mmu_context.h (original)
+++ linux-libc-headers/trunk/include/asm-sparc64/mmu_context.h Tue Jul 5 22:58:33 2005
@@ -3,23 +3,6 @@
/* Derived heavily from Linus's Alpha/AXP ASN code... */
-#include <asm/page.h>
-
-/*
- * For the 8k pagesize kernel, use only 10 hw context bits to optimize some shifts in
- * the fast tlbmiss handlers, instead of all 13 bits (specifically for vpte offset
- * calculation). For other pagesizes, this optimization in the tlbhandlers can not be
- * done; but still, all 13 bits can not be used because the tlb handlers use "andcc"
- * instruction which sign extends 13 bit arguments.
- */
-#if PAGE_SHIFT == 13
-#define CTX_VERSION_SHIFT 10
-#define TAG_CONTEXT_BITS 0x3ff
-#else
-#define CTX_VERSION_SHIFT 12
-#define TAG_CONTEXT_BITS 0xfff
-#endif
-
#ifndef __ASSEMBLY__
#include <asm/system.h>
@@ -33,19 +16,14 @@
extern unsigned long tlb_context_cache;
extern unsigned long mmu_context_bmap[];
-#define CTX_VERSION_MASK ((~0UL) << CTX_VERSION_SHIFT)
-#define CTX_FIRST_VERSION ((1UL << CTX_VERSION_SHIFT) + 1UL)
-#define CTX_VALID(__ctx) \
- (!(((__ctx) ^ tlb_context_cache) & CTX_VERSION_MASK))
-#define CTX_HWBITS(__ctx) ((__ctx) & ~CTX_VERSION_MASK)
-
extern void get_new_mmu_context(struct mm_struct *mm);
/* Initialize a new mmu context. This is invoked when a new
* address space instance (unique or shared) is instantiated.
* This just needs to set mm->context to an invalid context.
*/
-#define init_new_context(__tsk, __mm) (((__mm)->context = 0UL), 0)
+#define init_new_context(__tsk, __mm) \
+ (((__mm)->context.sparc64_ctx_val = 0UL), 0)
/* Destroy a dead context. This occurs when mmput drops the
* mm_users count to zero, the mmaps have been released, and
@@ -57,7 +35,7 @@
#define destroy_context(__mm) \
do { spin_lock(&ctx_alloc_lock); \
if (CTX_VALID((__mm)->context)) { \
- unsigned long nr = CTX_HWBITS((__mm)->context); \
+ unsigned long nr = CTX_NRBITS((__mm)->context); \
mmu_context_bmap[nr>>6] &= ~(1UL << (nr & 63)); \
} \
spin_unlock(&ctx_alloc_lock); \
@@ -99,7 +77,7 @@
"flush %%g6" \
: /* No outputs */ \
: "r" (CTX_HWBITS((__mm)->context)), \
- "r" (0x10), "i" (ASI_DMMU))
+ "r" (SECONDARY_CONTEXT), "i" (ASI_DMMU))
extern void __flush_tlb_mm(unsigned long, unsigned long);
@@ -133,7 +111,8 @@
*/
if (!ctx_valid || !cpu_isset(cpu, mm->cpu_vm_mask)) {
cpu_set(cpu, mm->cpu_vm_mask);
- __flush_tlb_mm(CTX_HWBITS(mm->context), SECONDARY_CONTEXT);
+ __flush_tlb_mm(CTX_HWBITS(mm->context),
+ SECONDARY_CONTEXT);
}
}
spin_unlock(&mm->page_table_lock);
Modified: linux-libc-headers/trunk/include/asm-sparc64/mostek.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sparc64/mostek.h (original)
+++ linux-libc-headers/trunk/include/asm-sparc64/mostek.h Tue Jul 5 22:58:33 2005
@@ -38,7 +38,7 @@
*
* We now deal with physical addresses for I/O to the chip. -DaveM
*/
-static __inline__ __u8 mostek_read(unsigned long addr)
+static __inline__ __u8 mostek_read(void *addr)
{
__u8 ret;
@@ -48,7 +48,7 @@
return ret;
}
-static __inline__ void mostek_write(unsigned long addr, __u8 val)
+static __inline__ void mostek_write(void *addr, __u8 val)
{
__asm__ __volatile__("stba %0, [%1] %2"
: /* no outputs */
@@ -67,7 +67,7 @@
#define MOSTEK_YEAR 0x07ffUL
extern spinlock_t mostek_lock;
-extern unsigned long mstk48t02_regs;
+extern void *mstk48t02_regs;
/* Control register values. */
#define MSTK_CREG_WRITE 0x80 /* Must set this before placing values. */
@@ -134,13 +134,11 @@
*/
#define MOSTEK_48T08_OFFSET 0x0000UL /* Lower NVRAM portions */
#define MOSTEK_48T08_48T02 0x1800UL /* Offset to 48T02 chip */
-extern unsigned long mstk48t08_regs;
/* SUN5 systems usually have 48t59 model clock chipsets. But we keep the older
* clock chip definitions around just in case.
*/
#define MOSTEK_48T59_OFFSET 0x0000UL /* Lower NVRAM portions */
#define MOSTEK_48T59_48T02 0x1800UL /* Offset to 48T02 chip */
-extern unsigned long mstk48t59_regs;
#endif /* !(_SPARC64_MOSTEK_H) */
Modified: linux-libc-headers/trunk/include/asm-sparc64/parport.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sparc64/parport.h (original)
+++ linux-libc-headers/trunk/include/asm-sparc64/parport.h Tue Jul 5 22:58:33 2005
@@ -13,6 +13,12 @@
#define PARPORT_PC_MAX_PORTS PARPORT_MAX
+/*
+ * While sparc64 doesn't have an ISA DMA API, we provide something that looks
+ * close enough to make parport_pc happy
+ */
+#define HAS_DMA
+
static struct sparc_ebus_info {
struct ebus_dma_info info;
unsigned int addr;
Modified: linux-libc-headers/trunk/include/asm-sparc64/pbm.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sparc64/pbm.h (original)
+++ linux-libc-headers/trunk/include/asm-sparc64/pbm.h Tue Jul 5 22:58:33 2005
@@ -14,6 +14,7 @@
#include <asm/io.h>
#include <asm/page.h>
#include <asm/oplib.h>
+#include <asm/iommu.h>
/* The abstraction used here is that there are PCI controllers,
* each with one (Sabre) or two (PSYCHO/SCHIZO) PCI bus modules
@@ -39,9 +40,6 @@
*/
spinlock_t lock;
- /* Context allocator. */
- unsigned int iommu_cur_ctx;
-
/* IOMMU page table, a linear array of ioptes. */
iopte_t *page_table; /* The page table itself. */
int page_table_sz_bits; /* log2 of ow many pages does it map? */
@@ -86,6 +84,10 @@
__u16 flush;
} alloc_info[PBM_NCLUSTERS];
+ /* CTX allocation. */
+ unsigned long ctx_lowest_free;
+ unsigned long ctx_bitmap[IOMMU_NUM_CTXS / (sizeof(unsigned long) * 8)];
+
/* Here a PCI controller driver describes the areas of
* PCI memory space where DMA to/from physical memory
* are addressed. Drivers interrogate the PCI layer
Modified: linux-libc-headers/trunk/include/asm-sparc64/pgalloc.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sparc64/pgalloc.h (original)
+++ linux-libc-headers/trunk/include/asm-sparc64/pgalloc.h Tue Jul 5 22:58:33 2005
@@ -4,88 +4,25 @@
#include <linux/kernel.h>
#include <linux/sched.h>
-#include <asm/page.h>
#include <asm/spitfire.h>
-#include <asm/pgtable.h>
#include <asm/cpudata.h>
+#include <asm/cacheflush.h>
/* Page table allocation/freeing. */
#ifdef CONFIG_SMP
/* Sliiiicck */
-#define pgt_quicklists cpu_data(smp_processor_id())
+#define pgt_quicklists local_cpu_data()
#else
extern struct pgtable_cache_struct {
unsigned long *pgd_cache;
unsigned long *pte_cache[2];
unsigned int pgcache_size;
- unsigned int pgdcache_size;
} pgt_quicklists;
#endif
#define pgd_quicklist (pgt_quicklists.pgd_cache)
#define pmd_quicklist ((unsigned long *)0)
#define pte_quicklist (pgt_quicklists.pte_cache)
#define pgtable_cache_size (pgt_quicklists.pgcache_size)
-#define pgd_cache_size (pgt_quicklists.pgdcache_size)
-
-#ifndef CONFIG_SMP
-
-static __inline__ void free_pgd_fast(pgd_t *pgd)
-{
- struct page *page = virt_to_page(pgd);
-
- preempt_disable();
- if (!page->lru.prev) {
- page->lru.next = (void *) pgd_quicklist;
- pgd_quicklist = (unsigned long *)page;
- }
- page->lru.prev = (void *)
- (((unsigned long)page->lru.prev) |
- (((unsigned long)pgd & (PAGE_SIZE / 2)) ? 2 : 1));
- pgd_cache_size++;
- preempt_enable();
-}
-
-static __inline__ pgd_t *get_pgd_fast(void)
-{
- struct page *ret;
-
- preempt_disable();
- if ((ret = (struct page *)pgd_quicklist) != NULL) {
- unsigned long mask = (unsigned long)ret->lru.prev;
- unsigned long off = 0;
-
- if (mask & 1)
- mask &= ~1;
- else {
- off = PAGE_SIZE / 2;
- mask &= ~2;
- }
- ret->lru.prev = (void *) mask;
- if (!mask)
- pgd_quicklist = (unsigned long *)ret->lru.next;
- ret = (struct page *)(__page_address(ret) + off);
- pgd_cache_size--;
- preempt_enable();
- } else {
- struct page *page;
-
- preempt_enable();
- page = alloc_page(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO);
- if (page) {
- ret = (struct page *)page_address(page);
- page->lru.prev = (void *) 2UL;
-
- preempt_disable();
- page->lru.next = (void *) pgd_quicklist;
- pgd_quicklist = (unsigned long *)page;
- pgd_cache_size++;
- preempt_enable();
- }
- }
- return (pgd_t *)ret;
-}
-
-#else /* CONFIG_SMP */
static __inline__ void free_pgd_fast(pgd_t *pgd)
{
@@ -120,9 +57,7 @@
free_page((unsigned long)pgd);
}
-#endif /* CONFIG_SMP */
-
-#if (L1DCACHE_SIZE > PAGE_SIZE) /* is there D$ aliasing problem */
+#ifdef DCACHE_ALIASING_POSSIBLE
#define VPTE_COLOR(address) (((address) >> (PAGE_SHIFT + 10)) & 1UL)
#define DCACHE_COLOR(address) (((address) >> PAGE_SHIFT) & 1UL)
#else
@@ -184,29 +119,16 @@
#define pmd_populate(MM,PMD,PTE_PAGE) \
pmd_populate_kernel(MM,PMD,page_address(PTE_PAGE))
-extern pte_t *__pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address);
-
-static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)
-{
- pte_t *pte = __pte_alloc_one_kernel(mm, address);
- if (pte) {
- struct page *page = virt_to_page(pte);
- page->mapping = (void *) mm;
- page->index = address & PMD_MASK;
- }
- return pte;
-}
+extern pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address);
static inline struct page *
pte_alloc_one(struct mm_struct *mm, unsigned long addr)
{
- pte_t *pte = __pte_alloc_one_kernel(mm, addr);
- if (pte) {
- struct page *page = virt_to_page(pte);
- page->mapping = (void *) mm;
- page->index = addr & PMD_MASK;
- return page;
- }
+ pte_t *pte = pte_alloc_one_kernel(mm, addr);
+
+ if (pte)
+ return virt_to_page(pte);
+
return NULL;
}
@@ -243,13 +165,11 @@
static inline void pte_free_kernel(pte_t *pte)
{
- virt_to_page(pte)->mapping = NULL;
free_pte_fast(pte);
}
static inline void pte_free(struct page *ptepage)
{
- ptepage->mapping = NULL;
free_pte_fast(page_address(ptepage));
}
Added: linux-libc-headers/trunk/include/asm-sparc64/rwsem-const.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/asm-sparc64/rwsem-const.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,12 @@
+/* rwsem-const.h: RW semaphore counter constants. */
+#ifndef _SPARC64_RWSEM_CONST_H
+#define _SPARC64_RWSEM_CONST_H
+
+#define RWSEM_UNLOCKED_VALUE 0x00000000
+#define RWSEM_ACTIVE_BIAS 0x00000001
+#define RWSEM_ACTIVE_MASK 0x0000ffff
+#define RWSEM_WAITING_BIAS 0xffff0000
+#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS
+#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
+
+#endif /* _SPARC64_RWSEM_CONST_H */
Modified: linux-libc-headers/trunk/include/asm-sparc64/spinlock.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sparc64/spinlock.h (original)
+++ linux-libc-headers/trunk/include/asm-sparc64/spinlock.h Tue Jul 5 22:58:33 2005
@@ -30,15 +30,20 @@
#ifndef CONFIG_DEBUG_SPINLOCK
-typedef unsigned char spinlock_t;
-#define SPIN_LOCK_UNLOCKED 0
+typedef struct {
+ volatile unsigned char lock;
+#ifdef CONFIG_PREEMPT
+ unsigned int break_lock;
+#endif
+} spinlock_t;
+#define SPIN_LOCK_UNLOCKED (spinlock_t) {0,}
-#define spin_lock_init(lock) (*((unsigned char *)(lock)) = 0)
-#define spin_is_locked(lock) (*((volatile unsigned char *)(lock)) != 0)
+#define spin_lock_init(lp) do { *(lp)= SPIN_LOCK_UNLOCKED; } while(0)
+#define spin_is_locked(lp) ((lp)->lock != 0)
-#define spin_unlock_wait(lock) \
+#define spin_unlock_wait(lp) \
do { membar("#LoadLoad"); \
-} while(*((volatile unsigned char *)lock))
+} while((lp)->lock)
static inline void _raw_spin_lock(spinlock_t *lock)
{
@@ -108,20 +113,19 @@
#else /* !(CONFIG_DEBUG_SPINLOCK) */
typedef struct {
- unsigned char lock;
+ volatile unsigned char lock;
unsigned int owner_pc, owner_cpu;
+#ifdef CONFIG_PREEMPT
+ unsigned int break_lock;
+#endif
} spinlock_t;
#define SPIN_LOCK_UNLOCKED (spinlock_t) { 0, 0, 0xff }
-#define spin_lock_init(__lock) \
-do { (__lock)->lock = 0; \
- (__lock)->owner_pc = 0; \
- (__lock)->owner_cpu = 0xff; \
-} while(0)
-#define spin_is_locked(__lock) (*((volatile unsigned char *)(&((__lock)->lock))) != 0)
+#define spin_lock_init(lp) do { *(lp)= SPIN_LOCK_UNLOCKED; } while(0)
+#define spin_is_locked(__lock) ((__lock)->lock != 0)
#define spin_unlock_wait(__lock) \
do { \
membar("#LoadLoad"); \
-} while(*((volatile unsigned char *)(&((__lock)->lock))))
+} while((__lock)->lock)
extern void _do_spin_lock (spinlock_t *lock, char *str);
extern void _do_spin_unlock (spinlock_t *lock);
@@ -138,8 +142,13 @@
#ifndef CONFIG_DEBUG_SPINLOCK
-typedef unsigned int rwlock_t;
-#define RW_LOCK_UNLOCKED 0
+typedef struct {
+ volatile unsigned int lock;
+#ifdef CONFIG_PREEMPT
+ unsigned int break_lock;
+#endif
+} rwlock_t;
+#define RW_LOCK_UNLOCKED (rwlock_t) {0,}
#define rwlock_init(lp) do { *(lp) = RW_LOCK_UNLOCKED; } while(0)
static void inline __read_lock(rwlock_t *lock)
@@ -250,9 +259,12 @@
#else /* !(CONFIG_DEBUG_SPINLOCK) */
typedef struct {
- unsigned long lock;
+ volatile unsigned long lock;
unsigned int writer_pc, writer_cpu;
unsigned int reader_pc[NR_CPUS];
+#ifdef CONFIG_PREEMPT
+ unsigned int break_lock;
+#endif
} rwlock_t;
#define RW_LOCK_UNLOCKED (rwlock_t) { 0, 0, 0xff, { } }
#define rwlock_init(lp) do { *(lp) = RW_LOCK_UNLOCKED; } while(0)
@@ -303,6 +315,8 @@
#endif /* CONFIG_DEBUG_SPINLOCK */
#define _raw_read_trylock(lock) generic_raw_read_trylock(lock)
+#define read_can_lock(rw) (!((rw)->lock & 0x80000000UL))
+#define write_can_lock(rw) (!(rw)->lock)
#endif /* !(__ASSEMBLY__) */
Modified: linux-libc-headers/trunk/include/asm-sparc64/spitfire.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sparc64/spitfire.h (original)
+++ linux-libc-headers/trunk/include/asm-sparc64/spitfire.h Tue Jul 5 22:58:33 2005
@@ -34,6 +34,9 @@
#define PHYS_WATCHPOINT 0x0000000000000040
#define SPITFIRE_HIGHEST_LOCKED_TLBENT (64 - 1)
+#define CHEETAH_HIGHEST_LOCKED_TLBENT (16 - 1)
+
+#define L1DCACHE_SIZE 0x4000
#ifndef __ASSEMBLY__
@@ -45,9 +48,8 @@
extern enum ultra_tlb_layout tlb_type;
-#define CHEETAH_HIGHEST_LOCKED_TLBENT (16 - 1)
-
-#define L1DCACHE_SIZE 0x4000
+extern int cheetah_pcache_forced_on;
+extern void cheetah_enable_pcache(void);
#define sparc64_highest_locked_tlbent() \
(tlb_type == spitfire ? \
@@ -100,46 +102,6 @@
: "r" (sfsr), "r" (TLB_SFSR), "i" (ASI_DMMU));
}
-static __inline__ unsigned long spitfire_get_primary_context(void)
-{
- unsigned long ctx;
-
- __asm__ __volatile__("ldxa [%1] %2, %0"
- : "=r" (ctx)
- : "r" (PRIMARY_CONTEXT), "i" (ASI_DMMU));
- return ctx;
-}
-
-static __inline__ void spitfire_set_primary_context(unsigned long ctx)
-{
- __asm__ __volatile__("stxa %0, [%1] %2\n\t"
- "membar #Sync"
- : /* No outputs */
- : "r" (ctx & 0x3ff),
- "r" (PRIMARY_CONTEXT), "i" (ASI_DMMU));
- __asm__ __volatile__ ("membar #Sync" : : : "memory");
-}
-
-static __inline__ unsigned long spitfire_get_secondary_context(void)
-{
- unsigned long ctx;
-
- __asm__ __volatile__("ldxa [%1] %2, %0"
- : "=r" (ctx)
- : "r" (SECONDARY_CONTEXT), "i" (ASI_DMMU));
- return ctx;
-}
-
-static __inline__ void spitfire_set_secondary_context(unsigned long ctx)
-{
- __asm__ __volatile__("stxa %0, [%1] %2\n\t"
- "membar #Sync"
- : /* No outputs */
- : "r" (ctx & 0x3ff),
- "r" (SECONDARY_CONTEXT), "i" (ASI_DMMU));
- __asm__ __volatile__ ("membar #Sync" : : : "memory");
-}
-
/* The data cache is write through, so this just invalidates the
* specified line.
*/
Modified: linux-libc-headers/trunk/include/asm-sparc64/stat.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sparc64/stat.h (original)
+++ linux-libc-headers/trunk/include/asm-sparc64/stat.h Tue Jul 5 22:58:33 2005
@@ -1,3 +1,4 @@
+/* $Id$ */
#ifndef _SPARC64_STAT_H
#define _SPARC64_STAT_H
@@ -20,4 +21,28 @@
unsigned long __unused4[2];
};
+struct stat64 {
+ unsigned long st_dev;
+ unsigned long st_ino;
+ unsigned long st_nlink;
+
+ unsigned int st_mode;
+ unsigned int st_uid;
+ unsigned int st_gid;
+ unsigned int __pad0;
+
+ unsigned long st_rdev;
+ long st_size;
+ long st_blksize;
+ long st_blocks;
+
+ unsigned long st_atime;
+ unsigned long st_atime_nsec;
+ unsigned long st_mtime;
+ unsigned long st_mtime_nsec;
+ unsigned long st_ctime;
+ unsigned long st_ctime_nsec;
+ long __unused[3];
+};
+
#endif
Modified: linux-libc-headers/trunk/include/asm-sparc64/system.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sparc64/system.h (original)
+++ linux-libc-headers/trunk/include/asm-sparc64/system.h Tue Jul 5 22:58:33 2005
@@ -180,7 +180,7 @@
__asm__ __volatile__("wr %%g0, %0, %%asi" \
: : "r" (__thread_flag_byte_ptr(next->thread_info)[TI_FLAG_BYTE_CURRENT_DS]));\
__asm__ __volatile__( \
- "mov %%g4, %%g5\n\t" \
+ "mov %%g4, %%g7\n\t" \
"wrpr %%g0, 0x95, %%pstate\n\t" \
"stx %%i6, [%%sp + 2047 + 0x70]\n\t" \
"stx %%i7, [%%sp + 2047 + 0x78]\n\t" \
@@ -205,7 +205,7 @@
"wrpr %%g0, 0x96, %%pstate\n\t" \
"andcc %%o7, %6, %%g0\n\t" \
"beq,pt %%icc, 1f\n\t" \
- " mov %%g5, %0\n\t" \
+ " mov %%g7, %0\n\t" \
"b,a ret_from_syscall\n\t" \
"1:\n\t" \
: "=&r" (last) \
@@ -213,7 +213,7 @@
"i" (TI_WSTATE), "i" (TI_KSP), "i" (TI_FLAGS), "i" (TI_CWP), \
"i" (_TIF_NEWCHILD), "i" (TI_TASK) \
: "cc", \
- "g1", "g2", "g3", "g5", "g7", \
+ "g1", "g2", "g3", "g7", \
"l2", "l3", "l4", "l5", "l6", "l7", \
"i0", "i1", "i2", "i3", "i4", "i5", \
"o0", "o1", "o2", "o3", "o4", "o5", "o7" EXTRA_CLOBBER);\
@@ -224,37 +224,41 @@
} \
} while(0)
-static __inline__ unsigned long xchg32(__volatile__ unsigned int *m, unsigned int val)
+static inline unsigned long xchg32(__volatile__ unsigned int *m, unsigned int val)
{
+ unsigned long tmp1, tmp2;
+
__asm__ __volatile__(
" membar #StoreLoad | #LoadLoad\n"
-" mov %0, %%g5\n"
-"1: lduw [%2], %%g7\n"
-" cas [%2], %%g7, %0\n"
-" cmp %%g7, %0\n"
+" mov %0, %1\n"
+"1: lduw [%4], %2\n"
+" cas [%4], %2, %0\n"
+" cmp %2, %0\n"
" bne,a,pn %%icc, 1b\n"
-" mov %%g5, %0\n"
+" mov %1, %0\n"
" membar #StoreLoad | #StoreStore\n"
- : "=&r" (val)
+ : "=&r" (val), "=&r" (tmp1), "=&r" (tmp2)
: "0" (val), "r" (m)
- : "g5", "g7", "cc", "memory");
+ : "cc", "memory");
return val;
}
-static __inline__ unsigned long xchg64(__volatile__ unsigned long *m, unsigned long val)
+static inline unsigned long xchg64(__volatile__ unsigned long *m, unsigned long val)
{
+ unsigned long tmp1, tmp2;
+
__asm__ __volatile__(
" membar #StoreLoad | #LoadLoad\n"
-" mov %0, %%g5\n"
-"1: ldx [%2], %%g7\n"
-" casx [%2], %%g7, %0\n"
-" cmp %%g7, %0\n"
+" mov %0, %1\n"
+"1: ldx [%4], %2\n"
+" casx [%4], %2, %0\n"
+" cmp %2, %0\n"
" bne,a,pn %%xcc, 1b\n"
-" mov %%g5, %0\n"
+" mov %1, %0\n"
" membar #StoreLoad | #StoreStore\n"
- : "=&r" (val)
+ : "=&r" (val), "=&r" (tmp1), "=&r" (tmp2)
: "0" (val), "r" (m)
- : "g5", "g7", "cc", "memory");
+ : "cc", "memory");
return val;
}
@@ -339,4 +343,6 @@
#endif /* !(__ASSEMBLY__) */
+#define arch_align_stack(x) (x)
+
#endif /* !(__SPARC64_SYSTEM_H) */
Modified: linux-libc-headers/trunk/include/asm-sparc64/unistd.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-sparc64/unistd.h (original)
+++ linux-libc-headers/trunk/include/asm-sparc64/unistd.h Tue Jul 5 22:58:33 2005
@@ -78,7 +78,7 @@
#define __NR_umask 60 /* Common */
#define __NR_chroot 61 /* Common */
#define __NR_fstat 62 /* Common */
-/* #define __NR_fstat64 63 Linux sparc32 Specific */
+#define __NR_fstat64 63 /* Linux Specific */
#define __NR_getpagesize 64 /* Common */
#define __NR_msync 65 /* Common in newer 1.3.x revs... */
#define __NR_vfork 66 /* Common */
@@ -147,14 +147,14 @@
#define __NR_truncate 129 /* Common */
#define __NR_ftruncate 130 /* Common */
#define __NR_flock 131 /* Common */
-/* #define __NR_lstat64 132 Linux sparc32 Specific */
+#define __NR_lstat64 132 /* Linux Specific */
#define __NR_sendto 133 /* Common */
#define __NR_shutdown 134 /* Common */
#define __NR_socketpair 135 /* Common */
#define __NR_mkdir 136 /* Common */
#define __NR_rmdir 137 /* Common */
#define __NR_utimes 138 /* SunOS Specific */
-/* #define __NR_stat64 139 Linux sparc32 Specific */
+#define __NR_stat64 139 /* Linux Specific */
#define __NR_sendfile64 140 /* adjtime under SunOS */
#define __NR_getpeername 141 /* Common */
#define __NR_futex 142 /* gethostid under SunOS */
@@ -471,6 +471,6 @@
* What we want is __attribute__((weak,alias("sys_ni_syscall"))),
* but it doesn't work on all toolchains, so we just do it by hand
*/
-#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall");
+#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
#endif /* _SPARC64_UNISTD_H */
Modified: linux-libc-headers/trunk/include/asm-um/archparam-i386.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-um/archparam-i386.h (original)
+++ linux-libc-headers/trunk/include/asm-um/archparam-i386.h Tue Jul 5 22:58:33 2005
@@ -6,143 +6,6 @@
#ifndef __UM_ARCHPARAM_I386_H
#define __UM_ARCHPARAM_I386_H
-/********* Bits for asm-um/elf.h ************/
-
-#include "user.h"
-
-extern char * elf_aux_platform;
-#define ELF_PLATFORM (elf_aux_platform)
-
-#define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3)
-
-typedef struct user_i387_struct elf_fpregset_t;
-typedef unsigned long elf_greg_t;
-
-#define ELF_NGREG (sizeof (struct user_regs_struct) / sizeof(elf_greg_t))
-typedef elf_greg_t elf_gregset_t[ELF_NGREG];
-
-#define ELF_DATA ELFDATA2LSB
-#define ELF_ARCH EM_386
-
-#define ELF_PLAT_INIT(regs, load_addr) do { \
- PT_REGS_EBX(regs) = 0; \
- PT_REGS_ECX(regs) = 0; \
- PT_REGS_EDX(regs) = 0; \
- PT_REGS_ESI(regs) = 0; \
- PT_REGS_EDI(regs) = 0; \
- PT_REGS_EBP(regs) = 0; \
- PT_REGS_EAX(regs) = 0; \
-} while(0)
-
-/* Shamelessly stolen from include/asm-i386/elf.h */
-
-#define ELF_CORE_COPY_REGS(pr_reg, regs) do { \
- pr_reg[0] = PT_REGS_EBX(regs); \
- pr_reg[1] = PT_REGS_ECX(regs); \
- pr_reg[2] = PT_REGS_EDX(regs); \
- pr_reg[3] = PT_REGS_ESI(regs); \
- pr_reg[4] = PT_REGS_EDI(regs); \
- pr_reg[5] = PT_REGS_EBP(regs); \
- pr_reg[6] = PT_REGS_EAX(regs); \
- pr_reg[7] = PT_REGS_DS(regs); \
- pr_reg[8] = PT_REGS_ES(regs); \
- /* fake once used fs and gs selectors? */ \
- pr_reg[9] = PT_REGS_DS(regs); \
- pr_reg[10] = PT_REGS_DS(regs); \
- pr_reg[11] = PT_REGS_SYSCALL_NR(regs); \
- pr_reg[12] = PT_REGS_IP(regs); \
- pr_reg[13] = PT_REGS_CS(regs); \
- pr_reg[14] = PT_REGS_EFLAGS(regs); \
- pr_reg[15] = PT_REGS_SP(regs); \
- pr_reg[16] = PT_REGS_SS(regs); \
-} while(0);
-
-
-extern unsigned long vsyscall_ehdr;
-extern unsigned long vsyscall_end;
-extern unsigned long __kernel_vsyscall;
-
-#define VSYSCALL_BASE vsyscall_ehdr
-#define VSYSCALL_END vsyscall_end
-
-/*
- * This is the range that is readable by user mode, and things
- * acting like user mode such as get_user_pages.
- */
-#define FIXADDR_USER_START VSYSCALL_BASE
-#define FIXADDR_USER_END VSYSCALL_END
-
-/*
- * Architecture-neutral AT_ values in 0-17, leave some room
- * for more of them, start the x86-specific ones at 32.
- */
-#define AT_SYSINFO 32
-#define AT_SYSINFO_EHDR 33
-
-#define ARCH_DLINFO \
-do { \
- if ( vsyscall_ehdr ) { \
- NEW_AUX_ENT(AT_SYSINFO, __kernel_vsyscall); \
- NEW_AUX_ENT(AT_SYSINFO_EHDR, vsyscall_ehdr); \
- } \
-} while (0)
-
-/*
- * These macros parameterize elf_core_dump in fs/binfmt_elf.c to write out
- * extra segments containing the vsyscall DSO contents. Dumping its
- * contents makes post-mortem fully interpretable later without matching up
- * the same kernel and hardware config to see what PC values meant.
- * Dumping its extra ELF program headers includes all the other information
- * a debugger needs to easily find how the vsyscall DSO was being used.
- */
-#define ELF_CORE_EXTRA_PHDRS \
- (vsyscall_ehdr ? (((struct elfhdr *)vsyscall_ehdr)->e_phnum) : 0 )
-
-#define ELF_CORE_WRITE_EXTRA_PHDRS \
-if ( vsyscall_ehdr ) { \
- const struct elfhdr *const ehdrp = (struct elfhdr *)vsyscall_ehdr; \
- const struct elf_phdr *const phdrp = \
- (const struct elf_phdr *) (vsyscall_ehdr + ehdrp->e_phoff); \
- int i; \
- Elf32_Off ofs = 0; \
- for (i = 0; i < ehdrp->e_phnum; ++i) { \
- struct elf_phdr phdr = phdrp[i]; \
- if (phdr.p_type == PT_LOAD) { \
- ofs = phdr.p_offset = offset; \
- offset += phdr.p_filesz; \
- } \
- else \
- phdr.p_offset += ofs; \
- phdr.p_paddr = 0; /* match other core phdrs */ \
- DUMP_WRITE(&phdr, sizeof(phdr)); \
- } \
-}
-#define ELF_CORE_WRITE_EXTRA_DATA \
-if ( vsyscall_ehdr ) { \
- const struct elfhdr *const ehdrp = (struct elfhdr *)vsyscall_ehdr; \
- const struct elf_phdr *const phdrp = \
- (const struct elf_phdr *) (vsyscall_ehdr + ehdrp->e_phoff); \
- int i; \
- for (i = 0; i < ehdrp->e_phnum; ++i) { \
- if (phdrp[i].p_type == PT_LOAD) \
- DUMP_WRITE((void *) phdrp[i].p_vaddr, \
- phdrp[i].p_filesz); \
- } \
-}
-
-#define R_386_NONE 0
-#define R_386_32 1
-#define R_386_PC32 2
-#define R_386_GOT32 3
-#define R_386_PLT32 4
-#define R_386_COPY 5
-#define R_386_GLOB_DAT 6
-#define R_386_JMP_SLOT 7
-#define R_386_RELATIVE 8
-#define R_386_GOTOFF 9
-#define R_386_GOTPC 10
-#define R_386_NUM 11
-
/********* Nothing for asm-um/hardirq.h **********/
/********* Nothing for asm-um/hw_irq.h **********/
Modified: linux-libc-headers/trunk/include/asm-um/archparam-ppc.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-um/archparam-ppc.h (original)
+++ linux-libc-headers/trunk/include/asm-um/archparam-ppc.h Tue Jul 5 22:58:33 2005
@@ -1,26 +1,6 @@
#ifndef __UM_ARCHPARAM_PPC_H
#define __UM_ARCHPARAM_PPC_H
-/********* Bits for asm-um/elf.h ************/
-
-#define ELF_PLATFORM (0)
-
-#define ELF_ET_DYN_BASE (0x08000000)
-
-/* the following stolen from asm-ppc/elf.h */
-#define ELF_NGREG 48 /* includes nip, msr, lr, etc. */
-#define ELF_NFPREG 33 /* includes fpscr */
-/* General registers */
-typedef unsigned long elf_greg_t;
-typedef elf_greg_t elf_gregset_t[ELF_NGREG];
-
-/* Floating point registers */
-typedef double elf_fpreg_t;
-typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
-
-#define ELF_DATA ELFDATA2MSB
-#define ELF_ARCH EM_PPC
-
/********* Bits for asm-um/hw_irq.h **********/
struct hw_interrupt_type;
Added: linux-libc-headers/trunk/include/asm-um/elf-i386.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/asm-um/elf-i386.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,169 @@
+/*
+ * Copyright (C) 2000 - 2003 Jeff Dike (jdike at addtoit.com)
+ * Licensed under the GPL
+ */
+#ifndef __UM_ELF_I386_H
+#define __UM_ELF_I386_H
+
+#include <asm/user.h>
+
+#define R_386_NONE 0
+#define R_386_32 1
+#define R_386_PC32 2
+#define R_386_GOT32 3
+#define R_386_PLT32 4
+#define R_386_COPY 5
+#define R_386_GLOB_DAT 6
+#define R_386_JMP_SLOT 7
+#define R_386_RELATIVE 8
+#define R_386_GOTOFF 9
+#define R_386_GOTPC 10
+#define R_386_NUM 11
+
+typedef unsigned long elf_greg_t;
+
+#define ELF_NGREG (sizeof (struct user_regs_struct) / sizeof(elf_greg_t))
+typedef elf_greg_t elf_gregset_t[ELF_NGREG];
+
+typedef struct user_i387_struct elf_fpregset_t;
+
+/*
+ * This is used to ensure we don't load something for the wrong architecture.
+ */
+#define elf_check_arch(x) \
+ (((x)->e_machine == EM_386) || ((x)->e_machine == EM_486))
+
+#define ELF_CLASS ELFCLASS32
+#define ELF_DATA ELFDATA2LSB
+#define ELF_ARCH EM_386
+
+#define ELF_PLAT_INIT(regs, load_addr) do { \
+ PT_REGS_EBX(regs) = 0; \
+ PT_REGS_ECX(regs) = 0; \
+ PT_REGS_EDX(regs) = 0; \
+ PT_REGS_ESI(regs) = 0; \
+ PT_REGS_EDI(regs) = 0; \
+ PT_REGS_EBP(regs) = 0; \
+ PT_REGS_EAX(regs) = 0; \
+} while(0)
+
+#define USE_ELF_CORE_DUMP
+#define ELF_EXEC_PAGESIZE 4096
+
+#define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3)
+
+/* Shamelessly stolen from include/asm-i386/elf.h */
+
+#define ELF_CORE_COPY_REGS(pr_reg, regs) do { \
+ pr_reg[0] = PT_REGS_EBX(regs); \
+ pr_reg[1] = PT_REGS_ECX(regs); \
+ pr_reg[2] = PT_REGS_EDX(regs); \
+ pr_reg[3] = PT_REGS_ESI(regs); \
+ pr_reg[4] = PT_REGS_EDI(regs); \
+ pr_reg[5] = PT_REGS_EBP(regs); \
+ pr_reg[6] = PT_REGS_EAX(regs); \
+ pr_reg[7] = PT_REGS_DS(regs); \
+ pr_reg[8] = PT_REGS_ES(regs); \
+ /* fake once used fs and gs selectors? */ \
+ pr_reg[9] = PT_REGS_DS(regs); \
+ pr_reg[10] = PT_REGS_DS(regs); \
+ pr_reg[11] = PT_REGS_SYSCALL_NR(regs); \
+ pr_reg[12] = PT_REGS_IP(regs); \
+ pr_reg[13] = PT_REGS_CS(regs); \
+ pr_reg[14] = PT_REGS_EFLAGS(regs); \
+ pr_reg[15] = PT_REGS_SP(regs); \
+ pr_reg[16] = PT_REGS_SS(regs); \
+} while(0);
+
+extern long elf_aux_hwcap;
+#define ELF_HWCAP (elf_aux_hwcap)
+
+extern char * elf_aux_platform;
+#define ELF_PLATFORM (elf_aux_platform)
+
+#define SET_PERSONALITY(ex, ibcs2) do ; while(0)
+
+extern unsigned long vsyscall_ehdr;
+extern unsigned long vsyscall_end;
+extern unsigned long __kernel_vsyscall;
+
+#define VSYSCALL_BASE vsyscall_ehdr
+#define VSYSCALL_END vsyscall_end
+
+/*
+ * This is the range that is readable by user mode, and things
+ * acting like user mode such as get_user_pages.
+ */
+#define FIXADDR_USER_START VSYSCALL_BASE
+#define FIXADDR_USER_END VSYSCALL_END
+
+/*
+ * Architecture-neutral AT_ values in 0-17, leave some room
+ * for more of them, start the x86-specific ones at 32.
+ */
+#define AT_SYSINFO 32
+#define AT_SYSINFO_EHDR 33
+
+#define ARCH_DLINFO \
+do { \
+ if ( vsyscall_ehdr ) { \
+ NEW_AUX_ENT(AT_SYSINFO, __kernel_vsyscall); \
+ NEW_AUX_ENT(AT_SYSINFO_EHDR, vsyscall_ehdr); \
+ } \
+} while (0)
+
+/*
+ * These macros parameterize elf_core_dump in fs/binfmt_elf.c to write out
+ * extra segments containing the vsyscall DSO contents. Dumping its
+ * contents makes post-mortem fully interpretable later without matching up
+ * the same kernel and hardware config to see what PC values meant.
+ * Dumping its extra ELF program headers includes all the other information
+ * a debugger needs to easily find how the vsyscall DSO was being used.
+ */
+#define ELF_CORE_EXTRA_PHDRS \
+ (vsyscall_ehdr ? (((struct elfhdr *)vsyscall_ehdr)->e_phnum) : 0 )
+
+#define ELF_CORE_WRITE_EXTRA_PHDRS \
+if ( vsyscall_ehdr ) { \
+ const struct elfhdr *const ehdrp = (struct elfhdr *)vsyscall_ehdr; \
+ const struct elf_phdr *const phdrp = \
+ (const struct elf_phdr *) (vsyscall_ehdr + ehdrp->e_phoff); \
+ int i; \
+ Elf32_Off ofs = 0; \
+ for (i = 0; i < ehdrp->e_phnum; ++i) { \
+ struct elf_phdr phdr = phdrp[i]; \
+ if (phdr.p_type == PT_LOAD) { \
+ ofs = phdr.p_offset = offset; \
+ offset += phdr.p_filesz; \
+ } \
+ else \
+ phdr.p_offset += ofs; \
+ phdr.p_paddr = 0; /* match other core phdrs */ \
+ DUMP_WRITE(&phdr, sizeof(phdr)); \
+ } \
+}
+#define ELF_CORE_WRITE_EXTRA_DATA \
+if ( vsyscall_ehdr ) { \
+ const struct elfhdr *const ehdrp = (struct elfhdr *)vsyscall_ehdr; \
+ const struct elf_phdr *const phdrp = \
+ (const struct elf_phdr *) (vsyscall_ehdr + ehdrp->e_phoff); \
+ int i; \
+ for (i = 0; i < ehdrp->e_phnum; ++i) { \
+ if (phdrp[i].p_type == PT_LOAD) \
+ DUMP_WRITE((void *) phdrp[i].p_vaddr, \
+ phdrp[i].p_filesz); \
+ } \
+}
+
+#endif
+
+/*
+ * Overrides for Emacs so that we follow Linus's tabbing style.
+ * Emacs will notice this stuff at the end of the file and automatically
+ * adjust the settings for this buffer only. This must remain at the end
+ * of the file.
+ * ---------------------------------------------------------------------------
+ * Local variables:
+ * c-file-style: "linux"
+ * End:
+ */
Added: linux-libc-headers/trunk/include/asm-um/elf-ppc.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/asm-um/elf-ppc.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,54 @@
+#ifndef __UM_ELF_PPC_H
+#define __UM_ELF_PPC_H
+
+#include "linux/config.h"
+
+extern long elf_aux_hwcap;
+#define ELF_HWCAP (elf_aux_hwcap)
+
+#define SET_PERSONALITY(ex, ibcs2) do ; while(0)
+
+#define ELF_EXEC_PAGESIZE 4096
+
+#define elf_check_arch(x) (1)
+
+#ifdef CONFIG_64_BIT
+#define ELF_CLASS ELFCLASS64
+#else
+#define ELF_CLASS ELFCLASS32
+#endif
+
+#define USE_ELF_CORE_DUMP
+
+#define R_386_NONE 0
+#define R_386_32 1
+#define R_386_PC32 2
+#define R_386_GOT32 3
+#define R_386_PLT32 4
+#define R_386_COPY 5
+#define R_386_GLOB_DAT 6
+#define R_386_JMP_SLOT 7
+#define R_386_RELATIVE 8
+#define R_386_GOTOFF 9
+#define R_386_GOTPC 10
+#define R_386_NUM 11
+
+#define ELF_PLATFORM (0)
+
+#define ELF_ET_DYN_BASE (0x08000000)
+
+/* the following stolen from asm-ppc/elf.h */
+#define ELF_NGREG 48 /* includes nip, msr, lr, etc. */
+#define ELF_NFPREG 33 /* includes fpscr */
+/* General registers */
+typedef unsigned long elf_greg_t;
+typedef elf_greg_t elf_gregset_t[ELF_NGREG];
+
+/* Floating point registers */
+typedef double elf_fpreg_t;
+typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
+
+#define ELF_DATA ELFDATA2MSB
+#define ELF_ARCH EM_PPC
+
+#endif
Added: linux-libc-headers/trunk/include/asm-um/elf-x86_64.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/asm-um/elf-x86_64.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,95 @@
+/*
+ * Copyright 2003 PathScale, Inc.
+ *
+ * Licensed under the GPL
+ */
+#ifndef __UM_ELF_X86_64_H
+#define __UM_ELF_X86_64_H
+
+#include <asm/user.h>
+
+/* x86-64 relocation types, taken from asm-x86_64/elf.h */
+#define R_X86_64_NONE 0 /* No reloc */
+#define R_X86_64_64 1 /* Direct 64 bit */
+#define R_X86_64_PC32 2 /* PC relative 32 bit signed */
+#define R_X86_64_GOT32 3 /* 32 bit GOT entry */
+#define R_X86_64_PLT32 4 /* 32 bit PLT address */
+#define R_X86_64_COPY 5 /* Copy symbol at runtime */
+#define R_X86_64_GLOB_DAT 6 /* Create GOT entry */
+#define R_X86_64_JUMP_SLOT 7 /* Create PLT entry */
+#define R_X86_64_RELATIVE 8 /* Adjust by program base */
+#define R_X86_64_GOTPCREL 9 /* 32 bit signed pc relative
+ offset to GOT */
+#define R_X86_64_32 10 /* Direct 32 bit zero extended */
+#define R_X86_64_32S 11 /* Direct 32 bit sign extended */
+#define R_X86_64_16 12 /* Direct 16 bit zero extended */
+#define R_X86_64_PC16 13 /* 16 bit sign extended pc relative */
+#define R_X86_64_8 14 /* Direct 8 bit sign extended */
+#define R_X86_64_PC8 15 /* 8 bit sign extended pc relative */
+
+#define R_X86_64_NUM 16
+
+typedef unsigned long elf_greg_t;
+
+#define ELF_NGREG (sizeof (struct user_regs_struct) / sizeof(elf_greg_t))
+typedef elf_greg_t elf_gregset_t[ELF_NGREG];
+
+typedef struct { } elf_fpregset_t;
+
+/*
+ * This is used to ensure we don't load something for the wrong architecture.
+ */
+#define elf_check_arch(x) \
+ ((x)->e_machine == EM_X86_64)
+
+#define ELF_CLASS ELFCLASS64
+#define ELF_DATA ELFDATA2LSB
+#define ELF_ARCH EM_X86_64
+
+#define ELF_PLAT_INIT(regs, load_addr) do { \
+ PT_REGS_RBX(regs) = 0; \
+ PT_REGS_RCX(regs) = 0; \
+ PT_REGS_RDX(regs) = 0; \
+ PT_REGS_RSI(regs) = 0; \
+ PT_REGS_RDI(regs) = 0; \
+ PT_REGS_RBP(regs) = 0; \
+ PT_REGS_RAX(regs) = 0; \
+ PT_REGS_R8(regs) = 0; \
+ PT_REGS_R9(regs) = 0; \
+ PT_REGS_R10(regs) = 0; \
+ PT_REGS_R11(regs) = 0; \
+ PT_REGS_R12(regs) = 0; \
+ PT_REGS_R13(regs) = 0; \
+ PT_REGS_R14(regs) = 0; \
+ PT_REGS_R15(regs) = 0; \
+} while (0)
+
+#ifdef TIF_IA32 /* XXX */
+#error XXX, indeed
+ clear_thread_flag(TIF_IA32);
+#endif
+
+#define USE_ELF_CORE_DUMP
+#define ELF_EXEC_PAGESIZE 4096
+
+#define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3)
+
+extern long elf_aux_hwcap;
+#define ELF_HWCAP (elf_aux_hwcap)
+
+#define ELF_PLATFORM "x86_64"
+
+#define SET_PERSONALITY(ex, ibcs2) do ; while(0)
+
+#endif
+
+/*
+ * Overrides for Emacs so that we follow Linus's tabbing style.
+ * Emacs will notice this stuff at the end of the file and automatically
+ * adjust the settings for this buffer only. This must remain at the end
+ * of the file.
+ * ---------------------------------------------------------------------------
+ * Local variables:
+ * c-file-style: "linux"
+ * End:
+ */
Modified: linux-libc-headers/trunk/include/asm-um/fixmap.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-um/fixmap.h (original)
+++ linux-libc-headers/trunk/include/asm-um/fixmap.h Tue Jul 5 22:58:33 2005
@@ -3,6 +3,7 @@
#include <asm/kmap_types.h>
#include <asm/archparam.h>
+#include <asm/elf.h>
/*
* Here we define all the compile-time 'special' virtual
Modified: linux-libc-headers/trunk/include/asm-um/io.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-um/io.h (original)
+++ linux-libc-headers/trunk/include/asm-um/io.h Tue Jul 5 22:58:33 2005
@@ -22,4 +22,15 @@
return __va(address);
}
+/*
+ * Convert a physical pointer to a virtual kernel pointer for /dev/mem
+ * access
+ */
+#define xlate_dev_mem_ptr(p) __va(p)
+
+/*
+ * Convert a virtual cached pointer to an uncached pointer
+ */
+#define xlate_dev_kmem_ptr(p) p
+
#endif
Modified: linux-libc-headers/trunk/include/asm-um/linkage.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-um/linkage.h (original)
+++ linux-libc-headers/trunk/include/asm-um/linkage.h Tue Jul 5 22:58:33 2005
@@ -1,7 +1,6 @@
-#ifndef __ASM_LINKAGE_H
-#define __ASM_LINKAGE_H
+#ifndef __ASM_UM_LINKAGE_H
+#define __ASM_UM_LINKAGE_H
-#define FASTCALL(x) x __attribute__((regparm(3)))
-#define fastcall __attribute__((regparm(3)))
+#include "asm/arch/linkage.h"
#endif
Modified: linux-libc-headers/trunk/include/asm-um/processor-generic.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-um/processor-generic.h (original)
+++ linux-libc-headers/trunk/include/asm-um/processor-generic.h Tue Jul 5 22:58:33 2005
@@ -15,15 +15,14 @@
struct mm_struct;
-#define cpu_relax() barrier()
-
struct thread_struct {
+ /* This flag is set to 1 before calling do_fork (and analyzed in
+ * copy_thread) to mark that we are begin called from userspace (fork /
+ * vfork / clone), and reset to 0 after. It is left to 0 when called
+ * from kernelspace (i.e. kernel_thread() or fork_idle(), as of 2.6.11). */
int forking;
int nsyscalls;
struct pt_regs regs;
- unsigned long cr2;
- int err;
- unsigned long trap_no;
int singlestep_syscall;
void *fault_addr;
void *fault_catcher;
@@ -71,8 +70,6 @@
.forking = 0, \
.nsyscalls = 0, \
.regs = EMPTY_REGS, \
- .cr2 = 0, \
- .err = 0, \
.fault_addr = NULL, \
.prev_sched = NULL, \
.temp_stack = 0, \
@@ -90,7 +87,11 @@
extern void release_thread(struct task_struct *);
extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
extern void dump_thread(struct pt_regs *regs, struct user *u);
-extern void prepare_to_copy(struct task_struct *tsk);
+
+static inline void prepare_to_copy(struct task_struct *tsk)
+{
+}
+
extern unsigned long thread_saved_pc(struct task_struct *t);
Modified: linux-libc-headers/trunk/include/asm-um/processor-i386.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-um/processor-i386.h (original)
+++ linux-libc-headers/trunk/include/asm-um/processor-i386.h Tue Jul 5 22:58:33 2005
@@ -9,16 +9,29 @@
extern int host_has_xmm;
extern int host_has_cmov;
+/* include faultinfo structure */
+#include "sysdep/faultinfo.h"
+
struct arch_thread {
unsigned long debugregs[8];
int debugregs_seq;
+ struct faultinfo faultinfo;
};
#define INIT_ARCH_THREAD { .debugregs = { [ 0 ... 7 ] = 0 }, \
- .debugregs_seq = 0 }
+ .debugregs_seq = 0, \
+ .faultinfo = { 0, 0, 0 } }
#include "asm/arch/user.h"
+/* REP NOP (PAUSE) is a good thing to insert into busy-wait loops. */
+static inline void rep_nop(void)
+{
+ __asm__ __volatile__("rep;nop": : :"memory");
+}
+
+#define cpu_relax() rep_nop()
+
/*
* Default implementation of macro that returns current
* instruction pointer ("program counter"). Stolen
Modified: linux-libc-headers/trunk/include/asm-um/ptrace-i386.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-um/ptrace-i386.h (original)
+++ linux-libc-headers/trunk/include/asm-um/ptrace-i386.h Tue Jul 5 22:58:33 2005
@@ -6,6 +6,8 @@
#ifndef __UM_PTRACE_I386_H
#define __UM_PTRACE_I386_H
+#define HOST_AUDIT_ARCH AUDIT_ARCH_I386
+
#include "sysdep/ptrace.h"
#include "asm/ptrace-generic.h"
Modified: linux-libc-headers/trunk/include/asm-v850/cacheflush.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-v850/cacheflush.h (original)
+++ linux-libc-headers/trunk/include/asm-v850/cacheflush.h Tue Jul 5 22:58:33 2005
@@ -24,7 +24,7 @@
#define flush_cache_all() ((void)0)
#define flush_cache_mm(mm) ((void)0)
#define flush_cache_range(vma, start, end) ((void)0)
-#define flush_cache_page(vma, vmaddr) ((void)0)
+#define flush_cache_page(vma, vmaddr, pfn) ((void)0)
#define flush_dcache_page(page) ((void)0)
#define flush_dcache_mmap_lock(mapping) ((void)0)
#define flush_dcache_mmap_unlock(mapping) ((void)0)
Modified: linux-libc-headers/trunk/include/asm-v850/io.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-v850/io.h (original)
+++ linux-libc-headers/trunk/include/asm-v850/io.h Tue Jul 5 22:58:33 2005
@@ -119,4 +119,15 @@
#define memcpy_fromio(dst, src, len) memcpy (dst, (void *)src, len)
#define memcpy_toio(dst, src, len) memcpy ((void *)dst, src, len)
+/*
+ * Convert a physical pointer to a virtual kernel pointer for /dev/mem
+ * access
+ */
+#define xlate_dev_mem_ptr(p) __va(p)
+
+/*
+ * Convert a virtual cached pointer to an uncached pointer
+ */
+#define xlate_dev_kmem_ptr(p) p
+
#endif /* __V850_IO_H__ */
Modified: linux-libc-headers/trunk/include/asm-v850/me2.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-v850/me2.h (original)
+++ linux-libc-headers/trunk/include/asm-v850/me2.h Tue Jul 5 22:58:33 2005
@@ -77,29 +77,29 @@
/* Select iRAM mode. */
#define ME2_IRAMM_ADDR 0xFFFFF80A
-#define ME2_IRAMM (*(volatile u8*)ME2_IRAMM_ADDR)
+#define ME2_IRAMM (*(volatile __u8*)ME2_IRAMM_ADDR)
/* Interrupt edge-detection configuration. INTF(n) and INTR(n) are only
valid for n == 1, 2, or 5. */
#define ME2_INTF_ADDR(n) (0xFFFFFC00 + (n) * 0x2)
-#define ME2_INTF(n) (*(volatile u8*)ME2_INTF_ADDR(n))
+#define ME2_INTF(n) (*(volatile __u8*)ME2_INTF_ADDR(n))
#define ME2_INTR_ADDR(n) (0xFFFFFC20 + (n) * 0x2)
-#define ME2_INTR(n) (*(volatile u8*)ME2_INTR_ADDR(n))
+#define ME2_INTR(n) (*(volatile __u8*)ME2_INTR_ADDR(n))
#define ME2_INTFAL_ADDR 0xFFFFFC10
-#define ME2_INTFAL (*(volatile u8*)ME2_INTFAL_ADDR)
+#define ME2_INTFAL (*(volatile __u8*)ME2_INTFAL_ADDR)
#define ME2_INTRAL_ADDR 0xFFFFFC30
-#define ME2_INTRAL (*(volatile u8*)ME2_INTRAL_ADDR)
+#define ME2_INTRAL (*(volatile __u8*)ME2_INTRAL_ADDR)
#define ME2_INTFDH_ADDR 0xFFFFFC16
-#define ME2_INTFDH (*(volatile u16*)ME2_INTFDH_ADDR)
+#define ME2_INTFDH (*(volatile __u16*)ME2_INTFDH_ADDR)
#define ME2_INTRDH_ADDR 0xFFFFFC36
-#define ME2_INTRDH (*(volatile u16*)ME2_INTRDH_ADDR)
+#define ME2_INTRDH (*(volatile __u16*)ME2_INTRDH_ADDR)
#define ME2_SESC_ADDR(n) (0xFFFFF609 + (n) * 0x10)
-#define ME2_SESC(n) (*(volatile u8*)ME2_SESC_ADDR(n))
+#define ME2_SESC(n) (*(volatile __u8*)ME2_SESC_ADDR(n))
#define ME2_SESA10_ADDR 0xFFFFF5AD
-#define ME2_SESA10 (*(volatile u8*)ME2_SESA10_ADDR)
+#define ME2_SESA10 (*(volatile __u8*)ME2_SESA10_ADDR)
#define ME2_SESA11_ADDR 0xFFFFF5DD
-#define ME2_SESA11 (*(volatile u8*)ME2_SESA11_ADDR)
+#define ME2_SESA11 (*(volatile __u8*)ME2_SESA11_ADDR)
/* Port 1 */
Modified: linux-libc-headers/trunk/include/asm-v850/system.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-v850/system.h (original)
+++ linux-libc-headers/trunk/include/asm-v850/system.h Tue Jul 5 22:58:33 2005
@@ -108,4 +108,6 @@
return tmp;
}
+#define arch_align_stack(x) (x)
+
#endif /* __V850_SYSTEM_H__ */
Modified: linux-libc-headers/trunk/include/asm-v850/unistd.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-v850/unistd.h (original)
+++ linux-libc-headers/trunk/include/asm-v850/unistd.h Tue Jul 5 22:58:33 2005
@@ -442,7 +442,7 @@
*/
#define cond_syscall(name) \
asm (".weak\t" C_SYMBOL_STRING(name) ";" \
- ".set\t" C_SYMBOL_STRING(name) "," C_SYMBOL_STRING(sys_ni_syscall));
+ ".set\t" C_SYMBOL_STRING(name) "," C_SYMBOL_STRING(sys_ni_syscall))
#if 0
/* This doesn't work if there's a function prototype for NAME visible,
because the argument types probably won't match. */
Modified: linux-libc-headers/trunk/include/asm-x86_64/agp.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-x86_64/agp.h (original)
+++ linux-libc-headers/trunk/include/asm-x86_64/agp.h Tue Jul 5 22:58:33 2005
@@ -19,4 +19,14 @@
worth it. Would need a page for it. */
#define flush_agp_cache() asm volatile("wbinvd":::"memory")
+/* Convert a physical address to an address suitable for the GART. */
+#define phys_to_gart(x) (x)
+#define gart_to_phys(x) (x)
+
+/* GATT allocation. Returns/accepts GATT kernel virtual address. */
+#define alloc_gatt_pages(order) \
+ ((char *)__get_free_pages(GFP_KERNEL, (order)))
+#define free_gatt_pages(table, order) \
+ free_pages((unsigned long)(table), (order))
+
#endif
Modified: linux-libc-headers/trunk/include/asm-x86_64/apic.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-x86_64/apic.h (original)
+++ linux-libc-headers/trunk/include/asm-x86_64/apic.h Tue Jul 5 22:58:33 2005
@@ -98,7 +98,6 @@
extern void enable_APIC_timer(void);
extern void clustered_apic_check(void);
-extern int check_nmi_watchdog(void);
extern void nmi_watchdog_default(void);
extern int setup_nmi_watchdog(char *);
Modified: linux-libc-headers/trunk/include/asm-x86_64/apicdef.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-x86_64/apicdef.h (original)
+++ linux-libc-headers/trunk/include/asm-x86_64/apicdef.h Tue Jul 5 22:58:33 2005
@@ -112,7 +112,7 @@
#define APIC_BASE (fix_to_virt(FIX_APIC_BASE))
-#define MAX_IO_APICS 32
+#define MAX_IO_APICS 128
/*
* All x86-64 systems are xAPIC compatible.
@@ -384,7 +384,6 @@
} __attribute__ ((packed));
-#undef u32
#define BAD_APICID 0xFFu
Modified: linux-libc-headers/trunk/include/asm-x86_64/bootsetup.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-x86_64/bootsetup.h (original)
+++ linux-libc-headers/trunk/include/asm-x86_64/bootsetup.h Tue Jul 5 22:58:33 2005
@@ -2,7 +2,8 @@
#ifndef _X86_64_BOOTSETUP_H
#define _X86_64_BOOTSETUP_H 1
-extern char x86_boot_params[2048];
+#define BOOT_PARAM_SIZE 4096
+extern char x86_boot_params[BOOT_PARAM_SIZE];
/*
* This is set up by the setup-routine at boot-time
Modified: linux-libc-headers/trunk/include/asm-x86_64/cacheflush.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-x86_64/cacheflush.h (original)
+++ linux-libc-headers/trunk/include/asm-x86_64/cacheflush.h Tue Jul 5 22:58:33 2005
@@ -7,7 +7,7 @@
#define flush_cache_all() do { } while (0)
#define flush_cache_mm(mm) do { } while (0)
#define flush_cache_range(vma, start, end) do { } while (0)
-#define flush_cache_page(vma, vmaddr) do { } while (0)
+#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
#define flush_dcache_page(page) do { } while (0)
#define flush_dcache_mmap_lock(mapping) do { } while (0)
#define flush_dcache_mmap_unlock(mapping) do { } while (0)
Modified: linux-libc-headers/trunk/include/asm-x86_64/cpufeature.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-x86_64/cpufeature.h (original)
+++ linux-libc-headers/trunk/include/asm-x86_64/cpufeature.h Tue Jul 5 22:58:33 2005
@@ -7,7 +7,7 @@
#ifndef __ASM_X8664_CPUFEATURE_H
#define __ASM_X8664_CPUFEATURE_H
-#define NCAPINTS 6
+#define NCAPINTS 7 /* N 32-bit words worth of info */
/* Intel-defined CPU features, CPUID level 0x00000001, word 0 */
#define X86_FEATURE_FPU (0*32+ 0) /* Onboard FPU */
@@ -62,6 +62,7 @@
#define X86_FEATURE_CYRIX_ARR (3*32+ 2) /* Cyrix ARRs (= MTRRs) */
#define X86_FEATURE_CENTAUR_MCR (3*32+ 3) /* Centaur MCRs (= MTRRs) */
#define X86_FEATURE_K8_C (3*32+ 4) /* C stepping K8 */
+#define X86_FEATURE_CONSTANT_TSC (3*32+5) /* TSC runs at constant rate */
/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
#define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */
@@ -73,9 +74,15 @@
#define X86_FEATURE_CX16 (4*32+13) /* CMPXCHG16B */
#define X86_FEATURE_XTPR (4*32+14) /* Send Task Priority Messages */
-/* More extended AMD flags: CPUID level 0x80000001, ecx, word 5 */
-#define X86_FEATURE_LAHF_LM (5*32+ 0) /* LAHF/SAHF in long mode */
-#define X86_FEATURE_CMP_LEGACY (5*32+ 1) /* If yes HyperThreading not valid */
+/* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */
+#define X86_FEATURE_XSTORE (5*32+ 2) /* on-CPU RNG present (xstore insn) */
+#define X86_FEATURE_XSTORE_EN (5*32+ 3) /* on-CPU RNG enabled */
+#define X86_FEATURE_XCRYPT (5*32+ 6) /* on-CPU crypto (xcrypt insn) */
+#define X86_FEATURE_XCRYPT_EN (5*32+ 7) /* on-CPU crypto enabled */
+
+/* More extended AMD flags: CPUID level 0x80000001, ecx, word 6 */
+#define X86_FEATURE_LAHF_LM (6*32+ 0) /* LAHF/SAHF in long mode */
+#define X86_FEATURE_CMP_LEGACY (6*32+ 1) /* If yes HyperThreading not valid */
#define cpu_has(c, bit) test_bit(bit, (c)->x86_capability)
#define boot_cpu_has(bit) test_bit(bit, boot_cpu_data.x86_capability)
Modified: linux-libc-headers/trunk/include/asm-x86_64/e820.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-x86_64/e820.h (original)
+++ linux-libc-headers/trunk/include/asm-x86_64/e820.h Tue Jul 5 22:58:33 2005
@@ -14,7 +14,7 @@
#include <linux/mmzone.h>
#define E820MAP 0x2d0 /* our map */
-#define E820MAX 32 /* number of entries in E820MAP */
+#define E820MAX 128 /* number of entries in E820MAP */
#define E820NR 0x1e8 /* # entries in E820MAP */
#define E820_RAM 1
@@ -50,6 +50,7 @@
extern int e820_mapped(unsigned long start, unsigned long end, unsigned type);
extern void e820_bootmem_free(pg_data_t *pgdat, unsigned long start,unsigned long end);
+extern void e820_setup_gap(void);
extern void __init parse_memopt(char *p, char **end);
Modified: linux-libc-headers/trunk/include/asm-x86_64/floppy.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-x86_64/floppy.h (original)
+++ linux-libc-headers/trunk/include/asm-x86_64/floppy.h Tue Jul 5 22:58:33 2005
@@ -222,7 +222,7 @@
return 0;
}
-struct fd_routine_l {
+static struct fd_routine_l {
int (*_request_dma)(unsigned int dmanr, const char * device_id);
void (*_free_dma)(unsigned int dmanr);
int (*_get_dma_residue)(unsigned int dummy);
Modified: linux-libc-headers/trunk/include/asm-x86_64/io_apic.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-x86_64/io_apic.h (original)
+++ linux-libc-headers/trunk/include/asm-x86_64/io_apic.h Tue Jul 5 22:58:33 2005
@@ -201,7 +201,6 @@
#define io_apic_assign_pci_irqs (mp_irq_entries && !skip_ioapic_setup && io_apic_irqs)
#ifdef CONFIG_ACPI_BOOT
-extern int io_apic_get_unique_id (int ioapic, int apic_id);
extern int io_apic_get_version (int ioapic);
extern int io_apic_get_redir_entries (int ioapic);
extern int io_apic_set_pci_routing (int ioapic, int pin, int irq, int, int);
Modified: linux-libc-headers/trunk/include/asm-x86_64/kdebug.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-x86_64/kdebug.h (original)
+++ linux-libc-headers/trunk/include/asm-x86_64/kdebug.h Tue Jul 5 22:58:33 2005
@@ -23,7 +23,6 @@
DIE_OOPS = 1,
DIE_INT3,
DIE_DEBUG,
- DIE_DEBUGSTEP,
DIE_PANIC,
DIE_NMI,
DIE_DIE,
Modified: linux-libc-headers/trunk/include/asm-x86_64/mmu_context.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-x86_64/mmu_context.h (original)
+++ linux-libc-headers/trunk/include/asm-x86_64/mmu_context.h Tue Jul 5 22:58:33 2005
@@ -27,6 +27,11 @@
}
#endif
+static inline void load_cr3(pgd_t *pgd)
+{
+ asm volatile("movq %0,%%cr3" :: "r" (__pa(pgd)) : "memory");
+}
+
static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
struct task_struct *tsk)
{
@@ -39,7 +44,8 @@
write_pda(active_mm, next);
#endif
set_bit(cpu, &next->cpu_vm_mask);
- asm volatile("movq %0,%%cr3" :: "r" (__pa(next->pgd)) : "memory");
+ load_cr3(next->pgd);
+
if (unlikely(next->context.ldt != prev->context.ldt))
load_LDT_nolock(&next->context, cpu);
}
@@ -53,7 +59,7 @@
* tlb flush IPI delivery. We must reload CR3
* to make sure to use no freed page tables.
*/
- asm volatile("movq %0,%%cr3" :: "r" (__pa(next->pgd)) : "memory");
+ load_cr3(next->pgd);
load_LDT_nolock(&next->context, cpu);
}
}
Modified: linux-libc-headers/trunk/include/asm-x86_64/mpspec.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-x86_64/mpspec.h (original)
+++ linux-libc-headers/trunk/include/asm-x86_64/mpspec.h Tue Jul 5 22:58:33 2005
@@ -156,7 +156,7 @@
* 7 2 CPU MCA+PCI
*/
-#define MAX_MP_BUSSES 270
+#define MAX_MP_BUSSES 256
#define MAX_IRQ_SOURCES 256
enum mp_bustype {
MP_BUS_ISA = 1,
@@ -176,7 +176,6 @@
extern int mp_irq_entries;
extern struct mpc_config_intsrc mp_irqs [MAX_IRQ_SOURCES];
extern int mpc_default_type;
-extern int mp_current_pci_id;
extern unsigned long mp_lapic_addr;
extern int pic_mode;
Modified: linux-libc-headers/trunk/include/asm-x86_64/msr.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-x86_64/msr.h (original)
+++ linux-libc-headers/trunk/include/asm-x86_64/msr.h Tue Jul 5 22:58:33 2005
@@ -28,8 +28,8 @@
#define wrmsrl(msr,val) wrmsr(msr,(__u32)((__u64)(val)),((__u64)(val))>>32)
-/* wrmsrl with exception handling */
-#define checking_wrmsrl(msr,val) ({ int ret__; \
+/* wrmsr with exception handling */
+#define wrmsr_safe(msr,a,b) ({ int ret__; \
asm volatile("2: wrmsr ; xorl %0,%0\n" \
"1:\n\t" \
".section .fixup,\"ax\"\n\t" \
@@ -40,9 +40,11 @@
" .quad 2b,3b\n\t" \
".previous" \
: "=a" (ret__) \
- : "c" (msr), "0" ((__u32)val), "d" ((val)>>32), "i" (-EFAULT));\
+ : "c" (msr), "0" (a), "d" (b), "i" (-EFAULT));\
ret__; })
+#define checking_wrmsrl(msr,val) wrmsr_safe(msr,(__u32)(val),(__u32)((val)>>32))
+
#define rdtsc(low,high) \
__asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high))
@@ -78,6 +80,18 @@
: "0" (op));
}
+/* Some CPUID calls want 'count' to be placed in ecx */
+static inline void cpuid_count(int op, int count, int *eax, int *ebx, int *ecx,
+ int *edx)
+{
+ __asm__("cpuid"
+ : "=a" (*eax),
+ "=b" (*ebx),
+ "=c" (*ecx),
+ "=d" (*edx)
+ : "0" (op), "c" (count));
+}
+
/*
* CPUID functions returning a single datum
*/
@@ -149,6 +163,7 @@
#define EFER_NX (1<<_EFER_NX)
/* Intel MSRs. Some also available on other CPUs */
+#define MSR_IA32_TSC 0x10
#define MSR_IA32_PLATFORM_ID 0x17
#define MSR_IA32_PERFCTR0 0xc1
Modified: linux-libc-headers/trunk/include/asm-x86_64/nmi.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-x86_64/nmi.h (original)
+++ linux-libc-headers/trunk/include/asm-x86_64/nmi.h Tue Jul 5 22:58:33 2005
@@ -53,5 +53,7 @@
extern int panic_on_timeout;
extern int unknown_nmi_panic;
+
+extern int check_nmi_watchdog(void);
#endif /* ASM_NMI_H */
Modified: linux-libc-headers/trunk/include/asm-x86_64/pgalloc.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-x86_64/pgalloc.h (original)
+++ linux-libc-headers/trunk/include/asm-x86_64/pgalloc.h Tue Jul 5 22:58:33 2005
@@ -1,7 +1,6 @@
#ifndef _X86_64_PGALLOC_H
#define _X86_64_PGALLOC_H
-#include <asm/processor.h>
#include <asm/fixmap.h>
#include <asm/pda.h>
#include <linux/threads.h>
@@ -98,7 +97,8 @@
}
#define __pte_free_tlb(tlb,pte) tlb_remove_page((tlb),(pte))
-#define __pmd_free_tlb(tlb,x) pmd_free(x)
-#define __pud_free_tlb(tlb,x) pud_free(x)
+
+#define __pmd_free_tlb(tlb,x) tlb_remove_page((tlb),virt_to_page(x))
+#define __pud_free_tlb(tlb,x) tlb_remove_page((tlb),virt_to_page(x))
#endif /* _X86_64_PGALLOC_H */
Modified: linux-libc-headers/trunk/include/asm-x86_64/processor.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-x86_64/processor.h (original)
+++ linux-libc-headers/trunk/include/asm-x86_64/processor.h Tue Jul 5 22:58:33 2005
@@ -60,9 +60,8 @@
int x86_tlbsize; /* number of 4K pages in DTLB/ITLB combined(in pages)*/
__u8 x86_virt_bits, x86_phys_bits;
__u8 x86_num_cores;
- __u8 x86_apicid;
__u32 x86_power;
- __u32 x86_cpuid_level; /* Max CPUID function supported */
+ __u32 extended_cpuid_level; /* Max extended CPUID function supported */
unsigned long loops_per_jiffy;
} ____cacheline_aligned;
@@ -90,7 +89,6 @@
extern void identify_cpu(struct cpuinfo_x86 *);
extern void print_cpu_info(struct cpuinfo_x86 *);
extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c);
-extern void dodgy_tsc(void);
/*
* EFLAGS bits
@@ -158,9 +156,9 @@
/*
- * User space process size. 47bits.
+ * User space process size. 47bits minus one guard page.
*/
-#define TASK_SIZE (0x800000000000UL)
+#define TASK_SIZE (0x800000000000UL - 4096)
/* This decides where the kernel will search for a free chunk of vm
* space during mmap's.
Modified: linux-libc-headers/trunk/include/asm-x86_64/proto.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-x86_64/proto.h (original)
+++ linux-libc-headers/trunk/include/asm-x86_64/proto.h Tue Jul 5 22:58:33 2005
@@ -29,7 +29,12 @@
extern void ia32_syscall(void);
extern void iommu_hole_init(void);
-extern void time_init_smp(void);
+extern void time_init_gtod(void);
+extern int pmtimer_mark_offset(void);
+extern unsigned int do_gettimeoffset_pm(void);
+extern __u32 pmtmr_ioport;
+extern unsigned long long monotonic_base;
+extern int sysctl_vsyscall;
extern void do_softirq_thunk(void);
@@ -69,8 +74,6 @@
extern void __show_regs(struct pt_regs * regs);
extern void show_regs(struct pt_regs * regs);
-extern int map_syscall32(struct mm_struct *mm, unsigned long address);
-extern int __map_syscall32(struct mm_struct *mm, unsigned long address);
extern char *syscall32_page;
extern void syscall32_cpu_init(void);
Modified: linux-libc-headers/trunk/include/asm-x86_64/segment.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-x86_64/segment.h (original)
+++ linux-libc-headers/trunk/include/asm-x86_64/segment.h Tue Jul 5 22:58:33 2005
@@ -24,10 +24,9 @@
#define GDT_ENTRY_TLS 1
#define GDT_ENTRY_TSS 8 /* needs two entries */
-#define GDT_ENTRY_LDT 10
-#define GDT_ENTRY_TLS_MIN 11
-#define GDT_ENTRY_TLS_MAX 13
-/* 14 free */
+#define GDT_ENTRY_LDT 10 /* needs two entries */
+#define GDT_ENTRY_TLS_MIN 12
+#define GDT_ENTRY_TLS_MAX 14
#define GDT_ENTRY_KERNELCS16 15
#define GDT_ENTRY_TLS_ENTRIES 3
Modified: linux-libc-headers/trunk/include/asm-x86_64/suspend.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-x86_64/suspend.h (original)
+++ linux-libc-headers/trunk/include/asm-x86_64/suspend.h Tue Jul 5 22:58:33 2005
@@ -55,5 +55,4 @@
/* routines for saving/restoring kernel state */
extern int acpi_save_state_mem(void);
-extern int acpi_save_state_disk(void);
#endif
Modified: linux-libc-headers/trunk/include/asm-x86_64/system.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-x86_64/system.h (original)
+++ linux-libc-headers/trunk/include/asm-x86_64/system.h Tue Jul 5 22:58:33 2005
@@ -162,4 +162,6 @@
#define HAVE_EAT_KEY
void eat_key(void);
+extern unsigned long arch_align_stack(unsigned long sp);
+
#endif
Modified: linux-libc-headers/trunk/include/asm-x86_64/unaligned.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-x86_64/unaligned.h (original)
+++ linux-libc-headers/trunk/include/asm-x86_64/unaligned.h Tue Jul 5 22:58:33 2005
@@ -15,7 +15,7 @@
*
* This macro should be used for accessing values larger in size than
* single bytes at locations that are expected to be improperly aligned,
- * e.g. retrieving a __u16 value from a location not u16-aligned.
+ * e.g. retrieving a __u16 value from a location not __u16-aligned.
*
* Note that unaligned accesses can be very expensive on some architectures.
*/
@@ -28,7 +28,7 @@
*
* This macro should be used for placing values larger in size than
* single bytes at locations that are expected to be improperly aligned,
- * e.g. writing a __u16 value to a location not u16-aligned.
+ * e.g. writing a __u16 value to a location not __u16-aligned.
*
* Note that unaligned accesses can be very expensive on some architectures.
*/
Modified: linux-libc-headers/trunk/include/asm-x86_64/unistd.h
==============================================================================
--- linux-libc-headers/trunk/include/asm-x86_64/unistd.h (original)
+++ linux-libc-headers/trunk/include/asm-x86_64/unistd.h Tue Jul 5 22:58:33 2005
@@ -76,7 +76,7 @@
#define __NR_shmget 29
__SYSCALL(__NR_shmget, sys_shmget)
#define __NR_shmat 30
-__SYSCALL(__NR_shmat, wrap_sys_shmat)
+__SYSCALL(__NR_shmat, sys_shmat)
#define __NR_shmctl 31
__SYSCALL(__NR_shmctl, sys_shmctl)
@@ -533,8 +533,6 @@
__SYSCALL(__NR_utimes, sys_utimes)
#define __NR_vserver 236
__SYSCALL(__NR_vserver, sys_ni_syscall)
-#define __NR_vserver 236
-__SYSCALL(__NR_vserver, sys_ni_syscall)
#define __NR_mbind 237
__SYSCALL(__NR_mbind, sys_mbind)
#define __NR_set_mempolicy 238
@@ -669,6 +667,6 @@
* What we want is __attribute__((weak,alias("sys_ni_syscall"))),
* but it doesn't work on all toolchains, so we just do it by hand
*/
-#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall");
+#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
#endif
Modified: linux-libc-headers/trunk/include/linux/acpi.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/acpi.h (original)
+++ linux-libc-headers/trunk/include/linux/acpi.h Tue Jul 5 22:58:33 2005
@@ -453,8 +453,6 @@
struct list_head entries;
};
-extern struct acpi_prt_list acpi_prt;
-
struct pci_dev;
int acpi_pci_irq_enable (struct pci_dev *dev);
Modified: linux-libc-headers/trunk/include/linux/aio_abi.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/aio_abi.h (original)
+++ linux-libc-headers/trunk/include/linux/aio_abi.h Tue Jul 5 22:58:33 2005
@@ -2,7 +2,7 @@
*
* Copyright 2000,2001,2002 Red Hat.
*
- * Written by Benjamin LaHaise <bcrl at redhat.com>
+ * Written by Benjamin LaHaise <bcrl at kvack.org>
*
* Distribute under the terms of the GPLv2 (see ../../COPYING) or under
* the following terms.
Modified: linux-libc-headers/trunk/include/linux/atalk.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/atalk.h (original)
+++ linux-libc-headers/trunk/include/linux/atalk.h Tue Jul 5 22:58:33 2005
@@ -1,5 +1,6 @@
#ifndef __LINUX_ATALK_H__
#define __LINUX_ATALK_H__
+
/*
* AppleTalk networking structures
*
@@ -36,39 +37,4 @@
__u16 nr_lastnet;
};
-struct atalk_route {
- struct net_device *dev;
- struct atalk_addr target;
- struct atalk_addr gateway;
- int flags;
- struct atalk_route *next;
-};
-
-/**
- * struct atalk_iface - AppleTalk Interface
- * @dev - Network device associated with this interface
- * @address - Our address
- * @status - What are we doing?
- * @nets - Associated direct netrange
- * @next - next element in the list of interfaces
- */
-struct atalk_iface {
- struct net_device *dev;
- struct atalk_addr address;
- int status;
-#define ATIF_PROBE 1 /* Probing for an address */
-#define ATIF_PROBE_FAIL 2 /* Probe collided */
- struct atalk_netrange nets;
- struct atalk_iface *next;
-};
-
-struct atalk_sock {
- unsigned short dest_net;
- unsigned short src_net;
- unsigned char dest_node;
- unsigned char src_node;
- unsigned char dest_port;
- unsigned char src_port;
-};
-
#endif /* __LINUX_ATALK_H__ */
Modified: linux-libc-headers/trunk/include/linux/atmdev.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/atmdev.h (original)
+++ linux-libc-headers/trunk/include/linux/atmdev.h Tue Jul 5 22:58:33 2005
@@ -29,9 +29,6 @@
#define ATM_DS3_PCR (8000*12)
/* DS3: 12 cells in a 125 usec time slot */
-#define atm_sk(__sk) ((struct atm_vcc *)(__sk)->sk_protinfo)
-#define ATM_SD(s) (atm_sk((s)->sk))
-
#define __AAL_STAT_ITEMS \
__HANDLE_ITEM(tx); /* TX okay */ \
Modified: linux-libc-headers/trunk/include/linux/audit.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/audit.h (original)
+++ linux-libc-headers/trunk/include/linux/audit.h Tue Jul 5 22:58:33 2005
@@ -1,4 +1,4 @@
-/* audit.h -- Auditing support -*- linux-c -*-
+/* audit.h -- Auditing support
*
* Copyright 2003-2004 Red Hat Inc., Durham, North Carolina.
* All Rights Reserved.
@@ -27,6 +27,9 @@
#include <asm/types.h>
#include <linux/netlink.h>
+#include <linux/sched.h>
+#include <linux/elf.h>
+
/* Request and reply types */
#define AUDIT_GET 1000 /* Get status */
#define AUDIT_SET 1001 /* Set status (enable/disable/auditd) */
@@ -70,6 +73,7 @@
#define AUDIT_FSGID 8
#define AUDIT_LOGINUID 9
#define AUDIT_PERS 10
+#define AUDIT_ARCH 11
/* These are ONLY useful when checking
* at syscall exit time (AUDIT_AT_EXIT). */
@@ -99,6 +103,38 @@
#define AUDIT_FAIL_PRINTK 1
#define AUDIT_FAIL_PANIC 2
+/* distinguish syscall tables */
+#define __AUDIT_ARCH_64BIT 0x80000000
+#define __AUDIT_ARCH_LE 0x40000000
+#define AUDIT_ARCH_ALPHA (EM_ALPHA|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
+#define AUDIT_ARCH_ARM (EM_ARM|__AUDIT_ARCH_LE)
+#define AUDIT_ARCH_ARMEB (EM_ARM)
+#define AUDIT_ARCH_CRIS (EM_CRIS|__AUDIT_ARCH_LE)
+#define AUDIT_ARCH_FRV (EM_FRV)
+#define AUDIT_ARCH_H8300 (EM_H8_300)
+#define AUDIT_ARCH_I386 (EM_386|__AUDIT_ARCH_LE)
+#define AUDIT_ARCH_IA64 (EM_IA_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
+#define AUDIT_ARCH_M32R (EM_M32R)
+#define AUDIT_ARCH_M68K (EM_68K)
+#define AUDIT_ARCH_MIPS (EM_MIPS)
+#define AUDIT_ARCH_MIPSEL (EM_MIPS|__AUDIT_ARCH_LE)
+#define AUDIT_ARCH_MIPS64 (EM_MIPS|__AUDIT_ARCH_64BIT)
+#define AUDIT_ARCH_MIPSEL64 (EM_MIPS|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
+#define AUDIT_ARCH_PARISC (EM_PARISC)
+#define AUDIT_ARCH_PARISC64 (EM_PARISC|__AUDIT_ARCH_64BIT)
+#define AUDIT_ARCH_PPC (EM_PPC)
+#define AUDIT_ARCH_PPC64 (EM_PPC64|__AUDIT_ARCH_64BIT)
+#define AUDIT_ARCH_S390 (EM_S390)
+#define AUDIT_ARCH_S390X (EM_S390|__AUDIT_ARCH_64BIT)
+#define AUDIT_ARCH_SH (EM_SH)
+#define AUDIT_ARCH_SHEL (EM_SH|__AUDIT_ARCH_LE)
+#define AUDIT_ARCH_SH64 (EM_SH|__AUDIT_ARCH_64BIT)
+#define AUDIT_ARCH_SHEL64 (EM_SH|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
+#define AUDIT_ARCH_SPARC (EM_SPARC)
+#define AUDIT_ARCH_SPARC64 (EM_SPARC64|__AUDIT_ARCH_64BIT)
+#define AUDIT_ARCH_V850 (EM_V850|__AUDIT_ARCH_LE)
+#define AUDIT_ARCH_X86_64 (EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
+
struct audit_message {
struct nlmsghdr nlh;
char data[1200];
Modified: linux-libc-headers/trunk/include/linux/auto_fs4.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/auto_fs4.h (original)
+++ linux-libc-headers/trunk/include/linux/auto_fs4.h Tue Jul 5 22:58:33 2005
@@ -23,7 +23,7 @@
#define AUTOFS_MIN_PROTO_VERSION 3
#define AUTOFS_MAX_PROTO_VERSION 4
-#define AUTOFS_PROTO_SUBVERSION 5
+#define AUTOFS_PROTO_SUBVERSION 6
/* Mask for expire behaviour */
#define AUTOFS_EXP_IMMEDIATE 1
Modified: linux-libc-headers/trunk/include/linux/awe_voice.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/awe_voice.h (original)
+++ linux-libc-headers/trunk/include/linux/awe_voice.h Tue Jul 5 22:58:33 2005
@@ -29,9 +29,9 @@
#define SAMPLE_TYPE_AWE32 0x20
#endif
-#ifndef _PATCHKEY
-#define _PATCHKEY(id) ((id<<8)|0xfd)
-#endif
+#define _LINUX_PATCHKEY_H_INDIRECT
+#include <linux/patchkey.h>
+#undef _LINUX_PATCHKEY_H_INDIRECT
/*----------------------------------------------------------------
* patch information record
Modified: linux-libc-headers/trunk/include/linux/backing-dev.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/backing-dev.h (original)
+++ linux-libc-headers/trunk/include/linux/backing-dev.h Tue Jul 5 22:58:33 2005
@@ -24,13 +24,39 @@
struct backing_dev_info {
unsigned long ra_pages; /* max readahead in PAGE_CACHE_SIZE units */
unsigned long state; /* Always use atomic bitops on this */
- int memory_backed; /* Cannot clean pages with writepage */
+ unsigned int capabilities; /* Device capabilities */
congested_fn *congested_fn; /* Function pointer if device is md/dm */
void *congested_data; /* Pointer to aux data for congested func */
void (*unplug_io_fn)(struct backing_dev_info *, struct page *);
void *unplug_io_data;
};
+
+/*
+ * Flags in backing_dev_info::capability
+ * - The first two flags control whether dirty pages will contribute to the
+ * VM's accounting and whether writepages() should be called for dirty pages
+ * (something that would not, for example, be appropriate for ramfs)
+ * - These flags let !MMU mmap() govern direct device mapping vs immediate
+ * copying more easily for MAP_PRIVATE, especially for ROM filesystems
+ */
+#define BDI_CAP_NO_ACCT_DIRTY 0x00000001 /* Dirty pages shouldn't contribute to accounting */
+#define BDI_CAP_NO_WRITEBACK 0x00000002 /* Don't write pages back */
+#define BDI_CAP_MAP_COPY 0x00000004 /* Copy can be mapped (MAP_PRIVATE) */
+#define BDI_CAP_MAP_DIRECT 0x00000008 /* Can be mapped directly (MAP_SHARED) */
+#define BDI_CAP_READ_MAP 0x00000010 /* Can be mapped for reading */
+#define BDI_CAP_WRITE_MAP 0x00000020 /* Can be mapped for writing */
+#define BDI_CAP_EXEC_MAP 0x00000040 /* Can be mapped for execution */
+#define BDI_CAP_VMFLAGS \
+ (BDI_CAP_READ_MAP | BDI_CAP_WRITE_MAP | BDI_CAP_EXEC_MAP)
+
+#if defined(VM_MAYREAD) && \
+ (BDI_CAP_READ_MAP != VM_MAYREAD || \
+ BDI_CAP_WRITE_MAP != VM_MAYWRITE || \
+ BDI_CAP_EXEC_MAP != VM_MAYEXEC)
+#error please change backing_dev_info::capabilities flags
+#endif
+
extern struct backing_dev_info default_backing_dev_info;
void default_unplug_io_fn(struct backing_dev_info *bdi, struct page *page);
@@ -61,4 +87,17 @@
(1 << BDI_write_congested));
}
+#define bdi_cap_writeback_dirty(bdi) \
+ (!((bdi)->capabilities & BDI_CAP_NO_WRITEBACK))
+
+#define bdi_cap_account_dirty(bdi) \
+ (!((bdi)->capabilities & BDI_CAP_NO_ACCT_DIRTY))
+
+#define mapping_cap_writeback_dirty(mapping) \
+ bdi_cap_writeback_dirty((mapping)->backing_dev_info)
+
+#define mapping_cap_account_dirty(mapping) \
+ bdi_cap_account_dirty((mapping)->backing_dev_info)
+
+
#endif /* _LINUX_BACKING_DEV_H */
Modified: linux-libc-headers/trunk/include/linux/bitops.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/bitops.h (original)
+++ linux-libc-headers/trunk/include/linux/bitops.h Tue Jul 5 22:58:33 2005
@@ -134,4 +134,26 @@
return sizeof(w) == 4 ? generic_hweight32(w) : generic_hweight64(w);
}
+/*
+ * rol32 - rotate a 32-bit value left
+ *
+ * @word: value to rotate
+ * @shift: bits to roll
+ */
+static inline __u32 rol32(__u32 word, unsigned int shift)
+{
+ return (word << shift) | (word >> (32 - shift));
+}
+
+/*
+ * ror32 - rotate a 32-bit value right
+ *
+ * @word: value to rotate
+ * @shift: bits to roll
+ */
+static inline __u32 ror32(__u32 word, unsigned int shift)
+{
+ return (word >> shift) | (word << (32 - shift));
+}
+
#endif
Modified: linux-libc-headers/trunk/include/linux/compat.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/compat.h (original)
+++ linux-libc-headers/trunk/include/linux/compat.h Tue Jul 5 22:58:33 2005
@@ -79,6 +79,12 @@
compat_long_t ru_nivcsw;
};
+struct compat_siginfo;
+
+extern asmlinkage long compat_sys_waitid(int, compat_pid_t,
+ struct compat_siginfo *, int,
+ struct compat_rusage *);
+
struct compat_dirent {
__u32 d_ino;
compat_off_t d_off;
@@ -91,12 +97,14 @@
compat_uptr_t sival_ptr;
} compat_sigval_t;
+#define COMPAT_SIGEV_PAD_SIZE ((SIGEV_MAX_SIZE/sizeof(int)) - 3)
+
typedef struct compat_sigevent {
compat_sigval_t sigev_value;
compat_int_t sigev_signo;
compat_int_t sigev_notify;
union {
- compat_int_t _pad[SIGEV_PAD_SIZE];
+ compat_int_t _pad[COMPAT_SIGEV_PAD_SIZE];
compat_int_t _tid;
struct {
Modified: linux-libc-headers/trunk/include/linux/compat_ioctl.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/compat_ioctl.h (original)
+++ linux-libc-headers/trunk/include/linux/compat_ioctl.h Tue Jul 5 22:58:33 2005
@@ -16,6 +16,7 @@
COMPATIBLE_IOCTL(TCSETAW)
COMPATIBLE_IOCTL(TCSETAF)
COMPATIBLE_IOCTL(TCSBRK)
+ULONG_IOCTL(TCSBRKP)
COMPATIBLE_IOCTL(TCXONC)
COMPATIBLE_IOCTL(TCFLSH)
COMPATIBLE_IOCTL(TCGETS)
@@ -692,6 +693,9 @@
COMPATIBLE_IOCTL(USBDEVFS_CONNECTINFO)
COMPATIBLE_IOCTL(USBDEVFS_HUB_PORTINFO)
COMPATIBLE_IOCTL(USBDEVFS_RESET)
+COMPATIBLE_IOCTL(USBDEVFS_SUBMITURB32)
+COMPATIBLE_IOCTL(USBDEVFS_REAPURB32)
+COMPATIBLE_IOCTL(USBDEVFS_REAPURBNDELAY32)
COMPATIBLE_IOCTL(USBDEVFS_CLEAR_HALT)
/* MTD */
COMPATIBLE_IOCTL(MEMGETINFO)
Modified: linux-libc-headers/trunk/include/linux/console.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/console.h (original)
+++ linux-libc-headers/trunk/include/linux/console.h Tue Jul 5 22:58:33 2005
@@ -58,7 +58,6 @@
extern const struct consw *conswitchp;
extern const struct consw dummy_con; /* dummy console buffer */
-extern const struct consw fb_con; /* frame buffer based console */
extern const struct consw vga_con; /* VGA text console */
extern const struct consw newport_con; /* SGI Newport console */
extern const struct consw prom_con; /* SPARC PROM console */
@@ -76,13 +75,17 @@
#define CM_MOVE (3)
/*
- * The interface for a console, or any other device that
- * wants to capture console messages (printer driver?)
+ * The interface for a console, or any other device that wants to capture
+ * console messages (printer driver?)
+ *
+ * If a console driver is marked CON_BOOT then it will be auto-unregistered
+ * when the first real console is registered. This is for early-printk drivers.
*/
#define CON_PRINTBUFFER (1)
#define CON_CONSDEV (2) /* Last on the command line */
#define CON_ENABLED (4)
+#define CON_BOOT (8)
struct console
{
Modified: linux-libc-headers/trunk/include/linux/console_struct.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/console_struct.h (original)
+++ linux-libc-headers/trunk/include/linux/console_struct.h Tue Jul 5 22:58:33 2005
@@ -26,6 +26,7 @@
const struct consw *vc_sw;
unsigned short *vc_screenbuf; /* In-memory character/attribute buffer */
unsigned int vc_screenbuf_size;
+ unsigned char vc_mode; /* KD_TEXT, ... */
/* attributes for all characters on screen */
unsigned char vc_attr; /* Current attributes */
unsigned char vc_def_color; /* Default colors */
@@ -48,6 +49,11 @@
unsigned int vc_state; /* Escape sequence parser state */
unsigned int vc_npar,vc_par[NPAR]; /* Parameters of current escape sequence */
struct tty_struct *vc_tty; /* TTY we are attached to */
+ /* data for manual vt switching */
+ struct vt_mode vt_mode;
+ int vt_pid;
+ int vt_newvt;
+ wait_queue_head_t paste_wait;
/* mode flags */
unsigned int vc_charset : 1; /* Character set G0 / G1 */
unsigned int vc_s_charset : 1; /* Saved character set */
@@ -89,7 +95,6 @@
struct vc_data **vc_display_fg; /* [!] Ptr to var holding fg console for this display */
unsigned long vc_uni_pagedir;
unsigned long *vc_uni_pagedir_loc; /* [!] Location of uni_pagedir variable for this console */
- struct vt_struct *vc_vt;
/* additional information is in vt_kern.h */
};
Modified: linux-libc-headers/trunk/include/linux/consolemap.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/consolemap.h (original)
+++ linux-libc-headers/trunk/include/linux/consolemap.h Tue Jul 5 22:58:33 2005
@@ -11,5 +11,5 @@
struct vc_data;
extern unsigned char inverse_translate(struct vc_data *conp, int glyph);
-extern unsigned short *set_translate(int m,int currcons);
+extern unsigned short *set_translate(int m, struct vc_data *vc);
extern int conv_uni_to_pc(struct vc_data *conp, long ucs);
Modified: linux-libc-headers/trunk/include/linux/cpufreq.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/cpufreq.h (original)
+++ linux-libc-headers/trunk/include/linux/cpufreq.h Tue Jul 5 22:58:33 2005
@@ -46,7 +46,7 @@
/* Frequency values here are CPU kHz so that hardware which doesn't run
* with some frequencies can complain without having to guess what per
* cent / per mille means.
- * Maximum transition latency is in microseconds - if it's unknown,
+ * Maximum transition latency is in nanoseconds - if it's unknown,
* CPUFREQ_ETERNAL shall be used.
*/
@@ -100,6 +100,7 @@
#define CPUFREQ_PRECHANGE (0)
#define CPUFREQ_POSTCHANGE (1)
#define CPUFREQ_RESUMECHANGE (8)
+#define CPUFREQ_SUSPENDCHANGE (9)
struct cpufreq_freqs {
unsigned int cpu; /* cpu nr */
@@ -197,6 +198,7 @@
/* optional */
int (*exit) (struct cpufreq_policy *policy);
+ int (*suspend) (struct cpufreq_policy *policy, __u32 state);
int (*resume) (struct cpufreq_policy *policy);
struct freq_attr **attr;
};
@@ -208,7 +210,8 @@
#define CPUFREQ_CONST_LOOPS 0x02 /* loops_per_jiffy or other kernel
* "constants" aren't affected by
* frequency transitions */
-
+#define CPUFREQ_PM_NO_WARN 0x04 /* don't warn on suspend/resume speed
+ * mismatches */
int cpufreq_register_driver(struct cpufreq_driver *driver_data);
int cpufreq_unregister_driver(struct cpufreq_driver *driver_data);
Modified: linux-libc-headers/trunk/include/linux/cycx_drv.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/cycx_drv.h (original)
+++ linux-libc-headers/trunk/include/linux/cycx_drv.h Tue Jul 5 22:58:33 2005
@@ -14,7 +14,7 @@
* ============================================================================
* 1999/10/23 acme cycxhw_t cleanup
* 1999/01/03 acme more judicious use of data types...
-* uclong, ucchar, etc deleted, the __u8, __u16, u32
+* uclong, ucchar, etc deleted, the __u8, __u16, __u32
* types are the portable way to go.
* 1999/01/03 acme judicious use of data types... __u16, __u32, etc
* 1998/12/26 acme FIXED_BUFFERS, CONF_OFFSET,
Modified: linux-libc-headers/trunk/include/linux/device.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/device.h (original)
+++ linux-libc-headers/trunk/include/linux/device.h Tue Jul 5 22:58:33 2005
@@ -97,7 +97,7 @@
char * name;
struct bus_type * bus;
- struct semaphore unload_sem;
+ struct completion unloaded;
struct kobject kobj;
struct list_head devices;
@@ -106,7 +106,7 @@
int (*probe) (struct device * dev);
int (*remove) (struct device * dev);
void (*shutdown) (struct device * dev);
- int (*suspend) (struct device * dev, __u32 state, __u32 level);
+ int (*suspend) (struct device * dev, pm_message_t state, __u32 level);
int (*resume) (struct device * dev, __u32 level);
};
@@ -143,6 +143,7 @@
struct subsystem subsys;
struct list_head children;
struct list_head interfaces;
+ struct semaphore sem; /* locks both the children and interfaces lists */
struct class_attribute * class_attrs;
struct class_device_attribute * class_dev_attrs;
@@ -179,6 +180,7 @@
struct kobject kobj;
struct class * class; /* required */
+ dev_t devt; /* dev_t, creates the sysfs "dev" */
struct device * dev; /* not necessary, but nice to have */
void * class_data; /* class-specific data */
@@ -267,9 +269,6 @@
BIOS data relevant to device) */
struct dev_pm_info power;
- __u32 detach_state; /* State to enter when device is
- detached from its driver. */
-
__u64 *dma_mask; /* dma mask (if dma'able device) */
__u64 coherent_dma_mask;/* Like dma_mask, but for
alloc_coherent mappings as
Modified: linux-libc-headers/trunk/include/linux/dqblk_xfs.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/dqblk_xfs.h (original)
+++ linux-libc-headers/trunk/include/linux/dqblk_xfs.h Tue Jul 5 22:58:33 2005
@@ -28,6 +28,12 @@
*/
#define XQM_CMD(x) (('X'<<8)+(x)) /* note: forms first QCMD argument */
+#define XQM_COMMAND(x) (((x) & (0xff<<8)) == ('X'<<8)) /* test if for XFS */
+
+#define XQM_USRQUOTA 0 /* system call user quota type */
+#define XQM_GRPQUOTA 1 /* system call group quota type */
+#define XQM_MAXQUOTAS 2
+
#define Q_XQUOTAON XQM_CMD(1) /* enable accounting/enforcement */
#define Q_XQUOTAOFF XQM_CMD(2) /* disable accounting/enforcement */
#define Q_XGETQUOTA XQM_CMD(3) /* get disk limits and usage */
Modified: linux-libc-headers/trunk/include/linux/dvb/audio.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/dvb/audio.h (original)
+++ linux-libc-headers/trunk/include/linux/dvb/audio.h Tue Jul 5 22:58:33 2005
@@ -1,9 +1,9 @@
-/*
+/*
* audio.h
*
* Copyright (C) 2000 Ralph Metzler <ralph at convergence.de>
* & Marcus Metzler <marcus at convergence.de>
- for convergence integrated media GmbH
+ * for convergence integrated media GmbH
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Lesser Public License
@@ -28,35 +28,35 @@
typedef enum {
- AUDIO_SOURCE_DEMUX, /* Select the demux as the main source */
- AUDIO_SOURCE_MEMORY /* Select internal memory as the main source */
+ AUDIO_SOURCE_DEMUX, /* Select the demux as the main source */
+ AUDIO_SOURCE_MEMORY /* Select internal memory as the main source */
} audio_stream_source_t;
-typedef enum {
- AUDIO_STOPPED, /* Device is stopped */
- AUDIO_PLAYING, /* Device is currently playing */
- AUDIO_PAUSED /* Device is paused */
+typedef enum {
+ AUDIO_STOPPED, /* Device is stopped */
+ AUDIO_PLAYING, /* Device is currently playing */
+ AUDIO_PAUSED /* Device is paused */
} audio_play_state_t;
typedef enum {
AUDIO_STEREO,
- AUDIO_MONO_LEFT,
- AUDIO_MONO_RIGHT
+ AUDIO_MONO_LEFT,
+ AUDIO_MONO_RIGHT
} audio_channel_select_t;
-typedef struct audio_mixer {
+typedef struct audio_mixer {
unsigned int volume_left;
unsigned int volume_right;
// what else do we need? bass, pass-through, ...
} audio_mixer_t;
-typedef struct audio_status {
+typedef struct audio_status {
int AV_sync_state; /* sync audio and video? */
- int mute_state; /* audio is muted */
+ int mute_state; /* audio is muted */
audio_play_state_t play_state; /* current playback state */
audio_stream_source_t stream_source; /* current stream source */
audio_channel_select_t channel_select; /* currently selected channel */
@@ -84,7 +84,7 @@
/* 7- 6 Quantization / DRC (mpeg audio: 1=DRC exists)(lpcm: 0=16bit, */
/* 5- 4 Sample frequency fs (0=48kHz, 1=96kHz) */
/* 2- 0 number of audio channels (n+1 channels) */
-
+
/* for GET_CAPABILITIES and SET_FORMAT, the latter should only set one bit */
#define AUDIO_CAP_DTS 1
@@ -97,7 +97,7 @@
#define AUDIO_CAP_SDDS 128
#define AUDIO_CAP_AC3 256
-#define AUDIO_STOP _IO('o', 1)
+#define AUDIO_STOP _IO('o', 1)
#define AUDIO_PLAY _IO('o', 2)
#define AUDIO_PAUSE _IO('o', 3)
#define AUDIO_CONTINUE _IO('o', 4)
@@ -118,4 +118,3 @@
#define AUDIO_SET_KARAOKE _IOW('o', 18, audio_karaoke_t)
#endif /* _DVBAUDIO_H_ */
-
Modified: linux-libc-headers/trunk/include/linux/dvb/ca.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/dvb/ca.h (original)
+++ linux-libc-headers/trunk/include/linux/dvb/ca.h Tue Jul 5 22:58:33 2005
@@ -1,9 +1,9 @@
-/*
+/*
* ca.h
*
* Copyright (C) 2000 Ralph Metzler <ralph at convergence.de>
* & Marcus Metzler <marcus at convergence.de>
- for convergence integrated media GmbH
+ * for convergence integrated media GmbH
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Lesser Public License
@@ -88,4 +88,3 @@
#define CA_SET_PID _IOW('o', 135, ca_pid_t)
#endif
-
Modified: linux-libc-headers/trunk/include/linux/dvb/dmx.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/dvb/dmx.h (original)
+++ linux-libc-headers/trunk/include/linux/dvb/dmx.h Tue Jul 5 22:58:33 2005
@@ -3,7 +3,7 @@
*
* Copyright (C) 2000 Marcus Metzler <marcus at convergence.de>
* & Ralph Metzler <ralph at convergence.de>
- for convergence integrated media GmbH
+ * for convergence integrated media GmbH
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public License
@@ -27,6 +27,7 @@
#include <asm/types.h>
#include <time.h>
+
#define DMX_FILTER_SIZE 16
typedef enum
@@ -107,10 +108,10 @@
struct dmx_sct_filter_params
{
- __u16 pid;
- dmx_filter_t filter;
- __u32 timeout;
- __u32 flags;
+ __u16 pid;
+ dmx_filter_t filter;
+ __u32 timeout;
+ __u32 flags;
#define DMX_CHECK_CRC 1
#define DMX_ONESHOT 2
#define DMX_IMMEDIATE_START 4
@@ -120,11 +121,11 @@
struct dmx_pes_filter_params
{
- __u16 pid;
- dmx_input_t input;
- dmx_output_t output;
- dmx_pes_type_t pes_type;
- __u32 flags;
+ __u16 pid;
+ dmx_input_t input;
+ dmx_output_t output;
+ dmx_pes_type_t pes_type;
+ __u32 flags;
};
@@ -140,7 +141,7 @@
typedef struct dmx_caps {
__u32 caps;
- int num_decoders;
+ int num_decoders;
} dmx_caps_t;
typedef enum {
@@ -161,16 +162,15 @@
};
-#define DMX_START _IO('o',41)
-#define DMX_STOP _IO('o',42)
-#define DMX_SET_FILTER _IOW('o',43,struct dmx_sct_filter_params)
-#define DMX_SET_PES_FILTER _IOW('o',44,struct dmx_pes_filter_params)
-#define DMX_SET_BUFFER_SIZE _IO('o',45)
-#define DMX_GET_EVENT _IOR('o',46,struct dmx_event)
+#define DMX_START _IO('o', 41)
+#define DMX_STOP _IO('o', 42)
+#define DMX_SET_FILTER _IOW('o', 43, struct dmx_sct_filter_params)
+#define DMX_SET_PES_FILTER _IOW('o', 44, struct dmx_pes_filter_params)
+#define DMX_SET_BUFFER_SIZE _IO('o', 45)
+#define DMX_GET_EVENT _IOR('o', 46, struct dmx_event)
#define DMX_GET_PES_PIDS _IOR('o', 47, __u16[5])
-#define DMX_GET_CAPS _IOR('o',48,dmx_caps_t)
-#define DMX_SET_SOURCE _IOW('o',49,dmx_source_t)
-#define DMX_GET_STC _IOWR('o',50,struct dmx_stc)
+#define DMX_GET_CAPS _IOR('o', 48, dmx_caps_t)
+#define DMX_SET_SOURCE _IOW('o', 49, dmx_source_t)
+#define DMX_GET_STC _IOWR('o', 50, struct dmx_stc)
#endif /*_DVBDMX_H_*/
-
Modified: linux-libc-headers/trunk/include/linux/dvb/frontend.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/dvb/frontend.h (original)
+++ linux-libc-headers/trunk/include/linux/dvb/frontend.h Tue Jul 5 22:58:33 2005
@@ -2,10 +2,10 @@
* frontend.h
*
* Copyright (C) 2000 Marcus Metzler <marcus at convergence.de>
- * Ralph Metzler <ralph at convergence.de>
- * Holger Waechtler <holger at convergence.de>
- * Andre Draszik <ad at convergence.de>
- * for convergence integrated media GmbH
+ * Ralph Metzler <ralph at convergence.de>
+ * Holger Waechtler <holger at convergence.de>
+ * Andre Draszik <ad at convergence.de>
+ * for convergence integrated media GmbH
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public License
@@ -30,54 +30,54 @@
typedef enum fe_type {
- FE_QPSK,
- FE_QAM,
+ FE_QPSK,
+ FE_QAM,
FE_OFDM,
FE_ATSC
} fe_type_t;
typedef enum fe_caps {
- FE_IS_STUPID = 0,
- FE_CAN_INVERSION_AUTO = 0x1,
- FE_CAN_FEC_1_2 = 0x2,
- FE_CAN_FEC_2_3 = 0x4,
- FE_CAN_FEC_3_4 = 0x8,
- FE_CAN_FEC_4_5 = 0x10,
- FE_CAN_FEC_5_6 = 0x20,
- FE_CAN_FEC_6_7 = 0x40,
- FE_CAN_FEC_7_8 = 0x80,
- FE_CAN_FEC_8_9 = 0x100,
- FE_CAN_FEC_AUTO = 0x200,
- FE_CAN_QPSK = 0x400,
- FE_CAN_QAM_16 = 0x800,
- FE_CAN_QAM_32 = 0x1000,
- FE_CAN_QAM_64 = 0x2000,
- FE_CAN_QAM_128 = 0x4000,
- FE_CAN_QAM_256 = 0x8000,
- FE_CAN_QAM_AUTO = 0x10000,
- FE_CAN_TRANSMISSION_MODE_AUTO = 0x20000,
- FE_CAN_BANDWIDTH_AUTO = 0x40000,
- FE_CAN_GUARD_INTERVAL_AUTO = 0x80000,
- FE_CAN_HIERARCHY_AUTO = 0x100000,
+ FE_IS_STUPID = 0,
+ FE_CAN_INVERSION_AUTO = 0x1,
+ FE_CAN_FEC_1_2 = 0x2,
+ FE_CAN_FEC_2_3 = 0x4,
+ FE_CAN_FEC_3_4 = 0x8,
+ FE_CAN_FEC_4_5 = 0x10,
+ FE_CAN_FEC_5_6 = 0x20,
+ FE_CAN_FEC_6_7 = 0x40,
+ FE_CAN_FEC_7_8 = 0x80,
+ FE_CAN_FEC_8_9 = 0x100,
+ FE_CAN_FEC_AUTO = 0x200,
+ FE_CAN_QPSK = 0x400,
+ FE_CAN_QAM_16 = 0x800,
+ FE_CAN_QAM_32 = 0x1000,
+ FE_CAN_QAM_64 = 0x2000,
+ FE_CAN_QAM_128 = 0x4000,
+ FE_CAN_QAM_256 = 0x8000,
+ FE_CAN_QAM_AUTO = 0x10000,
+ FE_CAN_TRANSMISSION_MODE_AUTO = 0x20000,
+ FE_CAN_BANDWIDTH_AUTO = 0x40000,
+ FE_CAN_GUARD_INTERVAL_AUTO = 0x80000,
+ FE_CAN_HIERARCHY_AUTO = 0x100000,
FE_CAN_8VSB = 0x200000,
FE_CAN_16VSB = 0x400000,
FE_NEEDS_BENDING = 0x20000000, // not supported anymore, don't use (frontend requires frequency bending)
- FE_CAN_RECOVER = 0x40000000, // frontend can recover from a cable unplug automatically
- FE_CAN_MUTE_TS = 0x80000000 // frontend can stop spurious TS data output
+ FE_CAN_RECOVER = 0x40000000, // frontend can recover from a cable unplug automatically
+ FE_CAN_MUTE_TS = 0x80000000 // frontend can stop spurious TS data output
} fe_caps_t;
struct dvb_frontend_info {
char name[128];
- fe_type_t type;
- __u32 frequency_min;
- __u32 frequency_max;
+ fe_type_t type;
+ __u32 frequency_min;
+ __u32 frequency_max;
__u32 frequency_stepsize;
__u32 frequency_tolerance;
__u32 symbol_rate_min;
- __u32 symbol_rate_max;
- __u32 symbol_rate_tolerance; /* ppm */
+ __u32 symbol_rate_max;
+ __u32 symbol_rate_tolerance; /* ppm */
__u32 notifier_delay; /* DEPRECATED */
fe_caps_t caps;
};
@@ -88,76 +88,76 @@
* the meaning of this struct...
*/
struct dvb_diseqc_master_cmd {
- __u8 msg [6]; /* { framing, address, command, data [3] } */
- __u8 msg_len; /* valid values are 3...6 */
+ __u8 msg [6]; /* { framing, address, command, data [3] } */
+ __u8 msg_len; /* valid values are 3...6 */
};
struct dvb_diseqc_slave_reply {
- __u8 msg [4]; /* { framing, data [3] } */
- __u8 msg_len; /* valid values are 0...4, 0 means no msg */
- int timeout; /* return from ioctl after timeout ms with */
-}; /* errorcode when no message was received */
+ __u8 msg [4]; /* { framing, data [3] } */
+ __u8 msg_len; /* valid values are 0...4, 0 means no msg */
+ int timeout; /* return from ioctl after timeout ms with */
+}; /* errorcode when no message was received */
typedef enum fe_sec_voltage {
- SEC_VOLTAGE_13,
- SEC_VOLTAGE_18,
+ SEC_VOLTAGE_13,
+ SEC_VOLTAGE_18,
SEC_VOLTAGE_OFF
} fe_sec_voltage_t;
typedef enum fe_sec_tone_mode {
- SEC_TONE_ON,
- SEC_TONE_OFF
+ SEC_TONE_ON,
+ SEC_TONE_OFF
} fe_sec_tone_mode_t;
typedef enum fe_sec_mini_cmd {
- SEC_MINI_A,
- SEC_MINI_B
+ SEC_MINI_A,
+ SEC_MINI_B
} fe_sec_mini_cmd_t;
typedef enum fe_status {
- FE_HAS_SIGNAL = 0x01, /* found something above the noise level */
- FE_HAS_CARRIER = 0x02, /* found a DVB signal */
- FE_HAS_VITERBI = 0x04, /* FEC is stable */
- FE_HAS_SYNC = 0x08, /* found sync bytes */
- FE_HAS_LOCK = 0x10, /* everything's working... */
- FE_TIMEDOUT = 0x20, /* no lock within the last ~2 seconds */
- FE_REINIT = 0x40 /* frontend was reinitialized, */
-} fe_status_t; /* application is recommended to reset */
- /* DiSEqC, tone and parameters */
+ FE_HAS_SIGNAL = 0x01, /* found something above the noise level */
+ FE_HAS_CARRIER = 0x02, /* found a DVB signal */
+ FE_HAS_VITERBI = 0x04, /* FEC is stable */
+ FE_HAS_SYNC = 0x08, /* found sync bytes */
+ FE_HAS_LOCK = 0x10, /* everything's working... */
+ FE_TIMEDOUT = 0x20, /* no lock within the last ~2 seconds */
+ FE_REINIT = 0x40 /* frontend was reinitialized, */
+} fe_status_t; /* application is recommended to reset */
+ /* DiSEqC, tone and parameters */
typedef enum fe_spectral_inversion {
- INVERSION_OFF,
- INVERSION_ON,
- INVERSION_AUTO
+ INVERSION_OFF,
+ INVERSION_ON,
+ INVERSION_AUTO
} fe_spectral_inversion_t;
typedef enum fe_code_rate {
- FEC_NONE = 0,
- FEC_1_2,
- FEC_2_3,
- FEC_3_4,
- FEC_4_5,
- FEC_5_6,
- FEC_6_7,
- FEC_7_8,
- FEC_8_9,
- FEC_AUTO
+ FEC_NONE = 0,
+ FEC_1_2,
+ FEC_2_3,
+ FEC_3_4,
+ FEC_4_5,
+ FEC_5_6,
+ FEC_6_7,
+ FEC_7_8,
+ FEC_8_9,
+ FEC_AUTO
} fe_code_rate_t;
typedef enum fe_modulation {
- QPSK,
- QAM_16,
- QAM_32,
- QAM_64,
- QAM_128,
- QAM_256,
+ QPSK,
+ QAM_16,
+ QAM_32,
+ QAM_64,
+ QAM_128,
+ QAM_256,
QAM_AUTO,
VSB_8,
VSB_16
@@ -196,15 +196,14 @@
struct dvb_qpsk_parameters {
- __u32 symbol_rate; /* symbol rate in Symbols per second */
- fe_code_rate_t fec_inner; /* forward error correction (see above) */
+ __u32 symbol_rate; /* symbol rate in Symbols per second */
+ fe_code_rate_t fec_inner; /* forward error correction (see above) */
};
-
struct dvb_qam_parameters {
- __u32 symbol_rate; /* symbol rate in Symbols per second */
- fe_code_rate_t fec_inner; /* forward error correction (see above) */
- fe_modulation_t modulation; /* modulation type (see above) */
+ __u32 symbol_rate; /* symbol rate in Symbols per second */
+ fe_code_rate_t fec_inner; /* forward error correction (see above) */
+ fe_modulation_t modulation; /* modulation type (see above) */
};
struct dvb_vsb_parameters {
@@ -212,19 +211,19 @@
};
struct dvb_ofdm_parameters {
- fe_bandwidth_t bandwidth;
- fe_code_rate_t code_rate_HP; /* high priority stream code rate */
- fe_code_rate_t code_rate_LP; /* low priority stream code rate */
- fe_modulation_t constellation; /* modulation type (see above) */
- fe_transmit_mode_t transmission_mode;
- fe_guard_interval_t guard_interval;
- fe_hierarchy_t hierarchy_information;
+ fe_bandwidth_t bandwidth;
+ fe_code_rate_t code_rate_HP; /* high priority stream code rate */
+ fe_code_rate_t code_rate_LP; /* low priority stream code rate */
+ fe_modulation_t constellation; /* modulation type (see above) */
+ fe_transmit_mode_t transmission_mode;
+ fe_guard_interval_t guard_interval;
+ fe_hierarchy_t hierarchy_information;
};
struct dvb_frontend_parameters {
__u32 frequency; /* (absolute) frequency in Hz for QAM/OFDM/ATSC */
- /* intermediate frequency in kHz for QPSK */
+ /* intermediate frequency in kHz for QPSK */
fe_spectral_inversion_t inversion;
union {
struct dvb_qpsk_parameters qpsk;
@@ -242,29 +241,27 @@
-#define FE_GET_INFO _IOR('o', 61, struct dvb_frontend_info)
+#define FE_GET_INFO _IOR('o', 61, struct dvb_frontend_info)
#define FE_DISEQC_RESET_OVERLOAD _IO('o', 62)
#define FE_DISEQC_SEND_MASTER_CMD _IOW('o', 63, struct dvb_diseqc_master_cmd)
#define FE_DISEQC_RECV_SLAVE_REPLY _IOR('o', 64, struct dvb_diseqc_slave_reply)
#define FE_DISEQC_SEND_BURST _IO('o', 65) /* fe_sec_mini_cmd_t */
-#define FE_SET_TONE _IO('o', 66) /* fe_sec_tone_mode_t */
-#define FE_SET_VOLTAGE _IO('o', 67) /* fe_sec_voltage_t */
+#define FE_SET_TONE _IO('o', 66) /* fe_sec_tone_mode_t */
+#define FE_SET_VOLTAGE _IO('o', 67) /* fe_sec_voltage_t */
#define FE_ENABLE_HIGH_LNB_VOLTAGE _IO('o', 68) /* int */
-#define FE_READ_STATUS _IOR('o', 69, fe_status_t)
-#define FE_READ_BER _IOR('o', 70, __u32)
+#define FE_READ_STATUS _IOR('o', 69, fe_status_t)
+#define FE_READ_BER _IOR('o', 70, __u32)
#define FE_READ_SIGNAL_STRENGTH _IOR('o', 71, __u16)
-#define FE_READ_SNR _IOR('o', 72, __u16)
+#define FE_READ_SNR _IOR('o', 72, __u16)
#define FE_READ_UNCORRECTED_BLOCKS _IOR('o', 73, __u32)
-#define FE_SET_FRONTEND _IOW('o', 76, struct dvb_frontend_parameters)
-#define FE_GET_FRONTEND _IOR('o', 77, struct dvb_frontend_parameters)
-#define FE_GET_EVENT _IOR('o', 78, struct dvb_frontend_event)
+#define FE_SET_FRONTEND _IOW('o', 76, struct dvb_frontend_parameters)
+#define FE_GET_FRONTEND _IOR('o', 77, struct dvb_frontend_parameters)
+#define FE_GET_EVENT _IOR('o', 78, struct dvb_frontend_event)
#define FE_DISHNETWORK_SEND_LEGACY_CMD _IO('o', 80) /* unsigned int */
-
#endif /*_DVBFRONTEND_H_*/
-
Modified: linux-libc-headers/trunk/include/linux/dvb/net.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/dvb/net.h (original)
+++ linux-libc-headers/trunk/include/linux/dvb/net.h Tue Jul 5 22:58:33 2005
@@ -1,9 +1,9 @@
-/*
+/*
* net.h
*
* Copyright (C) 2000 Marcus Metzler <marcus at convergence.de>
* & Ralph Metzler <ralph at convergence.de>
- for convergence integrated media GmbH
+ * for convergence integrated media GmbH
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public License
@@ -30,15 +30,15 @@
struct dvb_net_if {
__u16 pid;
__u16 if_num;
- __u8 feedtype;
+ __u8 feedtype;
#define DVB_NET_FEEDTYPE_MPE 0 /* multi protocol encapsulation */
#define DVB_NET_FEEDTYPE_ULE 1 /* ultra lightweight encapsulation */
};
-#define NET_ADD_IF _IOWR('o', 52, struct dvb_net_if)
-#define NET_REMOVE_IF _IO('o', 53)
-#define NET_GET_IF _IOWR('o', 54, struct dvb_net_if)
+#define NET_ADD_IF _IOWR('o', 52, struct dvb_net_if)
+#define NET_REMOVE_IF _IO('o', 53)
+#define NET_GET_IF _IOWR('o', 54, struct dvb_net_if)
/* binary compatibility cruft: */
Modified: linux-libc-headers/trunk/include/linux/dvb/osd.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/dvb/osd.h (original)
+++ linux-libc-headers/trunk/include/linux/dvb/osd.h Tue Jul 5 22:58:33 2005
@@ -1,9 +1,9 @@
-/*
+/*
* osd.h
*
* Copyright (C) 2001 Ralph Metzler <ralph at convergence.de>
* & Marcus Metzler <marcus at convergence.de>
- for convergence integrated media GmbH
+ * for convergence integrated media GmbH
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Lesser Public License
@@ -91,7 +91,7 @@
// TODO: remove "test" in final version
OSD_Text, // (x0,y0,size,color,text)
OSD_SetWindow, // (x0) set window with number 0<x0<8 as current
- OSD_MoveWindow, // move current window to (x0, y0)
+ OSD_MoveWindow, // move current window to (x0, y0)
OSD_OpenRaw, // Open other types of OSD windows
} OSD_Command;
@@ -136,8 +136,7 @@
} osd_cap_t;
-#define OSD_SEND_CMD _IOW('o', 160, osd_cmd_t)
+#define OSD_SEND_CMD _IOW('o', 160, osd_cmd_t)
#define OSD_GET_CAPABILITY _IOR('o', 161, osd_cap_t)
#endif
-
Modified: linux-libc-headers/trunk/include/linux/dvb/version.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/dvb/version.h (original)
+++ linux-libc-headers/trunk/include/linux/dvb/version.h Tue Jul 5 22:58:33 2005
@@ -27,4 +27,3 @@
#define DVB_API_VERSION_MINOR 1
#endif /*_DVBVERSION_H_*/
-
Modified: linux-libc-headers/trunk/include/linux/dvb/video.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/dvb/video.h (original)
+++ linux-libc-headers/trunk/include/linux/dvb/video.h Tue Jul 5 22:58:33 2005
@@ -1,9 +1,9 @@
-/*
+/*
* video.h
*
* Copyright (C) 2000 Marcus Metzler <marcus at convergence.de>
* & Ralph Metzler <ralph at convergence.de>
- for convergence integrated media GmbH
+ * for convergence integrated media GmbH
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public License
@@ -28,25 +28,25 @@
#include <time.h>
typedef enum {
- VIDEO_FORMAT_4_3, /* Select 4:3 format */
+ VIDEO_FORMAT_4_3, /* Select 4:3 format */
VIDEO_FORMAT_16_9, /* Select 16:9 format. */
VIDEO_FORMAT_221_1 /* 2.21:1 */
} video_format_t;
typedef enum {
- VIDEO_SYSTEM_PAL,
- VIDEO_SYSTEM_NTSC,
- VIDEO_SYSTEM_PALN,
- VIDEO_SYSTEM_PALNc,
- VIDEO_SYSTEM_PALM,
- VIDEO_SYSTEM_NTSC60,
+ VIDEO_SYSTEM_PAL,
+ VIDEO_SYSTEM_NTSC,
+ VIDEO_SYSTEM_PALN,
+ VIDEO_SYSTEM_PALNc,
+ VIDEO_SYSTEM_PALM,
+ VIDEO_SYSTEM_NTSC60,
VIDEO_SYSTEM_PAL60,
VIDEO_SYSTEM_PALM60
} video_system_t;
-typedef enum {
+typedef enum {
VIDEO_PAN_SCAN, /* use pan and scan format */
VIDEO_LETTER_BOX, /* use letterbox format */
VIDEO_CENTER_CUT_OUT /* use center cut out format */
@@ -59,35 +59,35 @@
} video_size_t;
typedef enum {
- VIDEO_SOURCE_DEMUX, /* Select the demux as the main source */
- VIDEO_SOURCE_MEMORY /* If this source is selected, the stream
- comes from the user through the write
- system call */
+ VIDEO_SOURCE_DEMUX, /* Select the demux as the main source */
+ VIDEO_SOURCE_MEMORY /* If this source is selected, the stream
+ comes from the user through the write
+ system call */
} video_stream_source_t;
typedef enum {
- VIDEO_STOPPED, /* Video is stopped */
- VIDEO_PLAYING, /* Video is currently playing */
- VIDEO_FREEZED /* Video is freezed */
-} video_play_state_t;
+ VIDEO_STOPPED, /* Video is stopped */
+ VIDEO_PLAYING, /* Video is currently playing */
+ VIDEO_FREEZED /* Video is freezed */
+} video_play_state_t;
-struct video_event {
- int32_t type;
-#define VIDEO_EVENT_SIZE_CHANGED 1
+struct video_event {
+ int32_t type;
+#define VIDEO_EVENT_SIZE_CHANGED 1
#define VIDEO_EVENT_FRAME_RATE_CHANGED 2
time_t timestamp;
- union {
+ union {
video_size_t size;
unsigned int frame_rate; /* in frames per 1000sec */
- } u;
+ } u;
};
-struct video_status {
+struct video_status {
int video_blank; /* blank video on freeze? */
- video_play_state_t play_state; /* current state of playback */
+ video_play_state_t play_state; /* current state of playback */
video_stream_source_t stream_source; /* current source (demux/memory) */
video_format_t video_format; /* current aspect ratio of stream*/
video_displayformat_t display_format;/* selected cropping mode */
@@ -96,11 +96,11 @@
struct video_still_picture {
char *iFrame; /* pointer to a single iframe in memory */
- int32_t size;
+ int32_t size;
};
-typedef
+typedef
struct video_highlight {
int active; /* 1=show highlight, 0=hide highlight */
uint8_t contrast1; /* 7- 4 Pattern pixel contrast */
@@ -111,7 +111,7 @@
/* 3- 0 Background pixel color */
uint8_t color2; /* 7- 4 Emphasis pixel-2 color */
/* 3- 0 Emphasis pixel-1 color */
- uint32_t ypos; /* 23-22 auto action mode */
+ uint32_t ypos; /* 23-22 auto action mode */
/* 21-12 start y */
/* 9- 0 end y */
uint32_t xpos; /* 23-22 button color number */
@@ -153,21 +153,21 @@
/* bit definitions for capabilities: */
/* can the hardware decode MPEG1 and/or MPEG2? */
-#define VIDEO_CAP_MPEG1 1
+#define VIDEO_CAP_MPEG1 1
#define VIDEO_CAP_MPEG2 2
/* can you send a system and/or program stream to video device?
- (you still have to open the video and the audio device but only
+ (you still have to open the video and the audio device but only
send the stream to the video device) */
#define VIDEO_CAP_SYS 4
#define VIDEO_CAP_PROG 8
-/* can the driver also handle SPU, NAVI and CSS encoded data?
+/* can the driver also handle SPU, NAVI and CSS encoded data?
(CSS API is not present yet) */
#define VIDEO_CAP_SPU 16
#define VIDEO_CAP_NAVI 32
#define VIDEO_CAP_CSS 64
-#define VIDEO_STOP _IO('o', 21)
+#define VIDEO_STOP _IO('o', 21)
#define VIDEO_PLAY _IO('o', 22)
#define VIDEO_FREEZE _IO('o', 23)
#define VIDEO_CONTINUE _IO('o', 24)
@@ -194,4 +194,3 @@
#define VIDEO_GET_FRAME_RATE _IOR('o', 56, unsigned int)
#endif /*_DVBVIDEO_H_*/
-
Modified: linux-libc-headers/trunk/include/linux/efi.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/efi.h (original)
+++ linux-libc-headers/trunk/include/linux/efi.h Tue Jul 5 22:58:33 2005
@@ -300,7 +300,6 @@
extern int __init efi_uart_console_only (void);
extern void efi_initialize_iomem_resources(struct resource *code_resource,
struct resource *data_resource);
-extern efi_status_t phys_efi_get_time(efi_time_t *tm, efi_time_cap_t *tc);
extern unsigned long __init efi_get_time(void);
extern int __init efi_set_rtc_mmss(unsigned long nowtime);
extern struct efi_memory_map memmap;
Modified: linux-libc-headers/trunk/include/linux/err.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/err.h (original)
+++ linux-libc-headers/trunk/include/linux/err.h Tue Jul 5 22:58:33 2005
@@ -11,6 +11,8 @@
* This should be a per-architecture thing, to allow different
* error and pointer decisions.
*/
+#define IS_ERR_VALUE(x) unlikely((x) > (unsigned long)-1000L)
+
static inline void *ERR_PTR(long error)
{
return (void *) error;
@@ -23,7 +25,7 @@
static inline long IS_ERR(const void *ptr)
{
- return unlikely((unsigned long)ptr > (unsigned long)-1000L);
+ return IS_ERR_VALUE((unsigned long)ptr);
}
#endif /* _LINUX_ERR_H */
Modified: linux-libc-headers/trunk/include/linux/errno.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/errno.h (original)
+++ linux-libc-headers/trunk/include/linux/errno.h Tue Jul 5 22:58:33 2005
@@ -134,6 +134,10 @@
#define EKEYEXPIRED 127 /* Key has expired */
#define EKEYREVOKED 128 /* Key has been revoked */
#define EKEYREJECTED 129 /* Key was rejected by service */
+
+/* for robust mutexes */
+#define EOWNERDEAD 130 /* Owner died */
+#define ENOTRECOVERABLE 131 /* State not recoverable */
#include <asm/errno.h>
Modified: linux-libc-headers/trunk/include/linux/ethtool.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/ethtool.h (original)
+++ linux-libc-headers/trunk/include/linux/ethtool.h Tue Jul 5 22:58:33 2005
@@ -42,7 +42,7 @@
/* For PCI devices, use pci_name(pci_dev). */
char reserved1[32];
char reserved2[16];
- __u32 n_stats; /* number of u64's from ETHTOOL_GSTATS */
+ __u32 n_stats; /* number of __u64's from ETHTOOL_GSTATS */
__u32 testinfo_len;
__u32 eedump_len; /* Size of data from ETHTOOL_GEEPROM (bytes) */
__u32 regdump_len; /* Size of data from ETHTOOL_GREGS (bytes) */
@@ -248,7 +248,7 @@
/* for dumping NIC-specific statistics */
struct ethtool_stats {
__u32 cmd; /* ETHTOOL_GSTATS */
- __u32 n_stats; /* number of u64's being returned */
+ __u32 n_stats; /* number of __u64's being returned */
__u64 data[0];
};
@@ -258,6 +258,7 @@
__u32 ethtool_op_get_link(struct net_device *dev);
__u32 ethtool_op_get_tx_csum(struct net_device *dev);
int ethtool_op_set_tx_csum(struct net_device *dev, __u32 data);
+int ethtool_op_set_tx_hw_csum(struct net_device *dev, __u32 data);
__u32 ethtool_op_get_sg(struct net_device *dev);
int ethtool_op_set_sg(struct net_device *dev, __u32 data);
__u32 ethtool_op_get_tso(struct net_device *dev);
Modified: linux-libc-headers/trunk/include/linux/ext3_fs.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/ext3_fs.h (original)
+++ linux-libc-headers/trunk/include/linux/ext3_fs.h Tue Jul 5 22:58:33 2005
@@ -329,6 +329,7 @@
#define EXT3_MOUNT_POSIX_ACL 0x08000 /* POSIX Access Control Lists */
#define EXT3_MOUNT_RESERVATION 0x10000 /* Preallocation */
#define EXT3_MOUNT_BARRIER 0x20000 /* Use block barriers */
+#define EXT3_MOUNT_NOBH 0x40000 /* No bufferheads */
/* Compatibility, for having both ext2_fs.h and ext3_fs.h included at once */
#ifndef _LINUX_EXT2_FS_H
Modified: linux-libc-headers/trunk/include/linux/fb.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/fb.h (original)
+++ linux-libc-headers/trunk/include/linux/fb.h Tue Jul 5 22:58:33 2005
@@ -99,7 +99,10 @@
#define FB_ACCEL_SIS_GLAMOUR_2 40 /* SiS 315, 650, 740 */
#define FB_ACCEL_SIS_XABRE 41 /* SiS 330 ("Xabre") */
#define FB_ACCEL_I830 42 /* Intel 830M/845G/85x/865G */
-
+#define FB_ACCEL_NV_10 43 /* nVidia Arch 10 */
+#define FB_ACCEL_NV_20 44 /* nVidia Arch 20 */
+#define FB_ACCEL_NV_30 45 /* nVidia Arch 30 */
+#define FB_ACCEL_NV_40 46 /* nVidia Arch 40 */
#define FB_ACCEL_NEOMAGIC_NM2070 90 /* NeoMagic NM2070 */
#define FB_ACCEL_NEOMAGIC_NM2090 91 /* NeoMagic NM2090 */
#define FB_ACCEL_NEOMAGIC_NM2093 92 /* NeoMagic NM2093 */
Modified: linux-libc-headers/trunk/include/linux/fs.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/fs.h (original)
+++ linux-libc-headers/trunk/include/linux/fs.h Tue Jul 5 22:58:33 2005
@@ -129,6 +129,7 @@
#define S_DIRSYNC 64 /* Directory modifications are synchronous */
#define S_NOCMTIME 128 /* Do not update file c/mtime */
#define S_SWAPFILE 256 /* Do not truncate: swapon got its bmaps */
+#define S_PRIVATE 512 /* Inode is fs-internal */
/*
* Note that nosuid etc flags are inode-specific: setting some file-system
@@ -162,6 +163,7 @@
#define IS_DEADDIR(inode) ((inode)->i_flags & S_DEAD)
#define IS_NOCMTIME(inode) ((inode)->i_flags & S_NOCMTIME)
#define IS_SWAPFILE(inode) ((inode)->i_flags & S_SWAPFILE)
+#define IS_PRIVATE(inode) ((inode)->i_flags & S_PRIVATE)
/* the read-only stuff doesn't really belong here, but any other place is
probably as bad and I don't want to create yet another include file. */
Modified: linux-libc-headers/trunk/include/linux/gameport.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/gameport.h (original)
+++ linux-libc-headers/trunk/include/linux/gameport.h Tue Jul 5 22:58:33 2005
@@ -10,18 +10,13 @@
*/
#include <asm/io.h>
-#include <linux/input.h>
-
-struct gameport;
+#include <linux/device.h>
struct gameport {
- void *private; /* Private pointer for joystick drivers */
- void *driver; /* Private pointer for gameport drivers */
- char *name;
- char *phys;
-
- struct input_id id;
+ void *port_data; /* Private pointer for gameport drivers */
+ char name[32];
+ char phys[32];
int io;
int speed;
@@ -34,36 +29,127 @@
int (*open)(struct gameport *, int);
void (*close)(struct gameport *);
- struct gameport_dev *dev;
+ struct timer_list poll_timer;
+ unsigned int poll_interval; /* in msecs */
+ spinlock_t timer_lock;
+ unsigned int poll_cnt;
+ void (*poll_handler)(struct gameport *);
+
+ struct gameport *parent, *child;
+
+ struct gameport_driver *drv;
+ struct semaphore drv_sem; /* protects serio->drv so attributes can pin driver */
+
+ struct device dev;
+ unsigned int registered; /* port has been fully registered with driver core */
struct list_head node;
};
+#define to_gameport_port(d) container_of(d, struct gameport, dev)
-struct gameport_dev {
+struct gameport_driver {
void *private;
- char *name;
+ char *description;
- void (*connect)(struct gameport *, struct gameport_dev *dev);
+ int (*connect)(struct gameport *, struct gameport_driver *drv);
+ int (*reconnect)(struct gameport *);
void (*disconnect)(struct gameport *);
- struct list_head node;
+ struct device_driver driver;
+
+ unsigned int ignore;
};
+#define to_gameport_driver(d) container_of(d, struct gameport_driver, driver)
-int gameport_open(struct gameport *gameport, struct gameport_dev *dev, int mode);
+int gameport_open(struct gameport *gameport, struct gameport_driver *drv, int mode);
void gameport_close(struct gameport *gameport);
void gameport_rescan(struct gameport *gameport);
-#if defined(CONFIG_GAMEPORT) || defined(CONFIG_GAMEPORT_MODULE)
-void gameport_register_port(struct gameport *gameport);
+#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
+
+void __gameport_register_port(struct gameport *gameport, struct module *owner);
+static inline void gameport_register_port(struct gameport *gameport)
+{
+ __gameport_register_port(gameport, THIS_MODULE);
+}
+
void gameport_unregister_port(struct gameport *gameport);
+
+void gameport_set_phys(struct gameport *gameport, const char *fmt, ...)
+ __attribute__ ((format (printf, 2, 3)));
+
#else
-inline void gameport_register_port(struct gameport *gameport) { return; }
-inline void gameport_unregister_port(struct gameport *gameport) { return; }
+
+static inline void gameport_register_port(struct gameport *gameport)
+{
+ return;
+}
+
+static inline void gameport_unregister_port(struct gameport *gameport)
+{
+ return;
+}
+
+static inline void gameport_set_phys(struct gameport *gameport,
+ const char *fmt, ...)
+{
+ return;
+}
+
#endif
-void gameport_register_device(struct gameport_dev *dev);
-void gameport_unregister_device(struct gameport_dev *dev);
+static inline struct gameport *gameport_allocate_port(void)
+{
+ struct gameport *gameport = kcalloc(1, sizeof(struct gameport), GFP_KERNEL);
+
+ return gameport;
+}
+
+static inline void gameport_free_port(struct gameport *gameport)
+{
+ kfree(gameport);
+}
+
+static inline void gameport_set_name(struct gameport *gameport, const char *name)
+{
+ strlcpy(gameport->name, name, sizeof(gameport->name));
+}
+
+/*
+ * Use the following fucntions to manipulate gameport's per-port
+ * driver-specific data.
+ */
+static inline void *gameport_get_drvdata(struct gameport *gameport)
+{
+ return dev_get_drvdata(&gameport->dev);
+}
+
+static inline void gameport_set_drvdata(struct gameport *gameport, void *data)
+{
+ dev_set_drvdata(&gameport->dev, data);
+}
+
+/*
+ * Use the following fucntions to pin gameport's driver in process context
+ */
+static inline int gameport_pin_driver(struct gameport *gameport)
+{
+ return down_interruptible(&gameport->drv_sem);
+}
+
+static inline void gameport_unpin_driver(struct gameport *gameport)
+{
+ up(&gameport->drv_sem);
+}
+
+void __gameport_register_driver(struct gameport_driver *drv, struct module *owner);
+static inline void gameport_register_driver(struct gameport_driver *drv)
+{
+ __gameport_register_driver(drv, THIS_MODULE);
+}
+
+void gameport_unregister_driver(struct gameport_driver *drv);
#define GAMEPORT_MODE_DISABLED 0
#define GAMEPORT_MODE_RAW 1
@@ -80,7 +166,7 @@
#define GAMEPORT_ID_VENDOR_GRAVIS 0x0009
#define GAMEPORT_ID_VENDOR_GUILLEMOT 0x000a
-static __inline__ void gameport_trigger(struct gameport *gameport)
+static inline void gameport_trigger(struct gameport *gameport)
{
if (gameport->trigger)
gameport->trigger(gameport);
@@ -88,7 +174,7 @@
outb(0xff, gameport->io);
}
-static __inline__ unsigned char gameport_read(struct gameport *gameport)
+static inline unsigned char gameport_read(struct gameport *gameport)
{
if (gameport->read)
return gameport->read(gameport);
@@ -96,7 +182,7 @@
return inb(gameport->io);
}
-static __inline__ int gameport_cooked_read(struct gameport *gameport, int *axes, int *buttons)
+static inline int gameport_cooked_read(struct gameport *gameport, int *axes, int *buttons)
{
if (gameport->cooked_read)
return gameport->cooked_read(gameport, axes, buttons);
@@ -104,7 +190,7 @@
return -1;
}
-static __inline__ int gameport_calibrate(struct gameport *gameport, int *axes, int *max)
+static inline int gameport_calibrate(struct gameport *gameport, int *axes, int *max)
{
if (gameport->calibrate)
return gameport->calibrate(gameport, axes, max);
@@ -112,9 +198,22 @@
return -1;
}
-static __inline__ int gameport_time(struct gameport *gameport, int time)
+static inline int gameport_time(struct gameport *gameport, int time)
{
return (time * gameport->speed) / 1000;
}
+static inline void gameport_set_poll_handler(struct gameport *gameport, void (*handler)(struct gameport *))
+{
+ gameport->poll_handler = handler;
+}
+
+static inline void gameport_set_poll_interval(struct gameport *gameport, unsigned int msecs)
+{
+ gameport->poll_interval = msecs;
+}
+
+void gameport_start_polling(struct gameport *gameport);
+void gameport_stop_polling(struct gameport *gameport);
+
#endif
Modified: linux-libc-headers/trunk/include/linux/generic_serial.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/generic_serial.h (original)
+++ linux-libc-headers/trunk/include/linux/generic_serial.h Tue Jul 5 22:58:33 2005
@@ -34,7 +34,7 @@
int xmit_head;
int xmit_tail;
int xmit_cnt;
- /* struct semaphore port_write_sem; */
+ struct semaphore port_write_sem;
int flags;
wait_queue_head_t open_wait;
wait_queue_head_t close_wait;
@@ -49,6 +49,7 @@
int baud_base;
int baud;
int custom_divisor;
+ spinlock_t driver_lock;
};
@@ -70,6 +71,7 @@
#define GS_DEBUG_STUFF 0x00000008
#define GS_DEBUG_CLOSE 0x00000010
#define GS_DEBUG_FLOW 0x00000020
+#define GS_DEBUG_WRITE 0x00000040
void gs_put_char(struct tty_struct *tty, unsigned char ch);
@@ -91,6 +93,4 @@
int gs_getserial(struct gs_port *port, struct serial_struct *sp);
void gs_got_break(struct gs_port *port);
-extern int gs_debug;
-
#endif
Modified: linux-libc-headers/trunk/include/linux/gfp.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/gfp.h (original)
+++ linux-libc-headers/trunk/include/linux/gfp.h Tue Jul 5 22:58:33 2005
@@ -25,26 +25,28 @@
*
* __GFP_NORETRY: The VM implementation must not retry indefinitely.
*/
-#define __GFP_WAIT 0x10 /* Can wait and reschedule? */
-#define __GFP_HIGH 0x20 /* Should access emergency pools? */
-#define __GFP_IO 0x40 /* Can start physical IO? */
-#define __GFP_FS 0x80 /* Can call down to low-level FS? */
-#define __GFP_COLD 0x100 /* Cache-cold page required */
-#define __GFP_NOWARN 0x200 /* Suppress page allocation failure warning */
-#define __GFP_REPEAT 0x400 /* Retry the allocation. Might fail */
-#define __GFP_NOFAIL 0x800 /* Retry for ever. Cannot fail */
-#define __GFP_NORETRY 0x1000 /* Do not retry. Might fail */
-#define __GFP_NO_GROW 0x2000 /* Slab internal usage */
-#define __GFP_COMP 0x4000 /* Add compound page metadata */
-#define __GFP_ZERO 0x8000 /* Return zeroed page on success */
+#define __GFP_WAIT 0x10u /* Can wait and reschedule? */
+#define __GFP_HIGH 0x20u /* Should access emergency pools? */
+#define __GFP_IO 0x40u /* Can start physical IO? */
+#define __GFP_FS 0x80u /* Can call down to low-level FS? */
+#define __GFP_COLD 0x100u /* Cache-cold page required */
+#define __GFP_NOWARN 0x200u /* Suppress page allocation failure warning */
+#define __GFP_REPEAT 0x400u /* Retry the allocation. Might fail */
+#define __GFP_NOFAIL 0x800u /* Retry for ever. Cannot fail */
+#define __GFP_NORETRY 0x1000u /* Do not retry. Might fail */
+#define __GFP_NO_GROW 0x2000u /* Slab internal usage */
+#define __GFP_COMP 0x4000u /* Add compound page metadata */
+#define __GFP_ZERO 0x8000u /* Return zeroed page on success */
+#define __GFP_NOMEMALLOC 0x10000u /* Don't use emergency reserves */
-#define __GFP_BITS_SHIFT 16 /* Room for 16 __GFP_FOO bits */
+#define __GFP_BITS_SHIFT 20 /* Room for 20 __GFP_FOO bits */
#define __GFP_BITS_MASK ((1 << __GFP_BITS_SHIFT) - 1)
/* if you forget to add the bitmask here kernel will crash, period */
#define GFP_LEVEL_MASK (__GFP_WAIT|__GFP_HIGH|__GFP_IO|__GFP_FS| \
__GFP_COLD|__GFP_NOWARN|__GFP_REPEAT| \
- __GFP_NOFAIL|__GFP_NORETRY|__GFP_NO_GROW|__GFP_COMP)
+ __GFP_NOFAIL|__GFP_NORETRY|__GFP_NO_GROW|__GFP_COMP| \
+ __GFP_NOMEMALLOC)
#define GFP_ATOMIC (__GFP_HIGH)
#define GFP_NOIO (__GFP_WAIT)
@@ -92,7 +94,7 @@
}
#ifdef CONFIG_NUMA
-extern struct page *alloc_pages_current(unsigned gfp_mask, unsigned order);
+extern struct page *alloc_pages_current(unsigned int gfp_mask, unsigned order);
static inline struct page *
alloc_pages(unsigned int gfp_mask, unsigned int order)
Modified: linux-libc-headers/trunk/include/linux/hiddev.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/hiddev.h (original)
+++ linux-libc-headers/trunk/include/linux/hiddev.h Tue Jul 5 22:58:33 2005
@@ -202,8 +202,8 @@
* ioctl(fd, HIDIOCGUSAGE, &uref);
* }
* }
- * uref.report_id |= HID_REPORT_ID_NEXT;
- * ret = ioctl(fd, HIDIOCGREPORTINFO, &uref);
+ * rinfo.report_id |= HID_REPORT_ID_NEXT;
+ * ret = ioctl(fd, HIDIOCGREPORTINFO, &rinfo);
* }
*/
Modified: linux-libc-headers/trunk/include/linux/i2c-id.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/i2c-id.h (original)
+++ linux-libc-headers/trunk/include/linux/i2c-id.h Tue Jul 5 22:58:33 2005
@@ -195,11 +195,15 @@
#define I2C_ALGO_OCP 0x120000 /* IBM or otherwise On-chip I2C algorithm */
#define I2C_ALGO_BITHS 0x130000 /* enhanced bit style adapters */
#define I2C_ALGO_IOP3XX 0x140000 /* XSCALE IOP3XX On-chip I2C alg */
-#define I2C_ALGO_PCA 0x150000 /* PCA 9564 style adapters */
-
#define I2C_ALGO_SIBYTE 0x150000 /* Broadcom SiByte SOCs */
-#define I2C_ALGO_SGI 0x160000 /* SGI algorithm */
-#define I2C_ALGO_AU1550 0x170000 /* Au1550 PSC algorithm */
+#define I2C_ALGO_SGI 0x160000 /* SGI algorithm */
+
+#define I2C_ALGO_USB 0x170000 /* USB algorithm */
+#define I2C_ALGO_VIRT 0x180000 /* Virtual bus adapter */
+
+#define I2C_ALGO_MV64XXX 0x190000 /* Marvell mv64xxx i2c ctlr */
+#define I2C_ALGO_PCA 0x1a0000 /* PCA 9564 style adapters */
+#define I2C_ALGO_AU1550 0x1b0000 /* Au1550 PSC algorithm */
#define I2C_ALGO_EXP 0x800000 /* experimental */
@@ -239,6 +243,7 @@
#define I2C_HW_B_IXP4XX 0x17 /* GPIO on IXP4XX systems */
#define I2C_HW_B_S3VIA 0x18 /* S3Via ProSavage adapter */
#define I2C_HW_B_ZR36067 0x19 /* Zoran-36057/36067 based boards */
+#define I2C_HW_B_PCILYNX 0x1a /* TI PCILynx I2C adapter */
#define I2C_HW_B_CX2388x 0x1b /* connexant 2388x based tv cards */
/* --- PCF 8584 based algorithms */
@@ -309,4 +314,7 @@
/* --- MCP107 adapter */
#define I2C_HW_MPC107 0x00
+/* --- Marvell mv64xxx i2c adapter */
+#define I2C_HW_MV64XXX 0x00
+
#endif /* LINUX_I2C_ID_H */
Modified: linux-libc-headers/trunk/include/linux/i2c.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/i2c.h (original)
+++ linux-libc-headers/trunk/include/linux/i2c.h Tue Jul 5 22:58:33 2005
@@ -54,7 +54,7 @@
/* Transfer num messages.
*/
-extern int i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[],int num);
+extern int i2c_transfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num);
/*
* Some adapter types (i.e. PCF 8584 based ones) may support slave behaviuor.
@@ -133,8 +133,6 @@
};
#define to_i2c_driver(d) container_of(d, struct i2c_driver, driver)
-extern struct bus_type i2c_bus_type;
-
#define I2C_NAME_SIZE 50
/*
@@ -143,7 +141,6 @@
* function is mainly used for lookup & other admin. functions.
*/
struct i2c_client {
- int id;
unsigned int flags; /* div., see below */
unsigned int addr; /* chip address - NOTE: 7bit */
/* addresses are stored in the */
@@ -189,11 +186,11 @@
char name[32]; /* textual description */
unsigned int id;
- /* If an adapter algorithm can't to I2C-level access, set master_xfer
+ /* If an adapter algorithm can't do I2C-level access, set master_xfer
to NULL. If an adapter algorithm can do SMBus access, set
smbus_xfer. If set to NULL, the SMBus protocol is simulated
using common I2C messages */
- int (*master_xfer)(struct i2c_adapter *adap,struct i2c_msg msgs[],
+ int (*master_xfer)(struct i2c_adapter *adap,struct i2c_msg *msgs,
int num);
int (*smbus_xfer) (struct i2c_adapter *adap, __u16 addr,
unsigned short flags, char read_write,
@@ -301,16 +298,13 @@
};
/* Internal numbers to terminate lists */
-#define I2C_CLIENT_END 0xfffe
-#define I2C_CLIENT_ISA_END 0xfffefffe
+#define I2C_CLIENT_END 0xfffeU
+#define I2C_CLIENT_ISA_END 0xfffefffeU
/* The numbers to use to set I2C bus address */
#define ANY_I2C_BUS 0xffff
#define ANY_I2C_ISA_BUS 9191
-/* The length of the option lists */
-#define I2C_CLIENT_MAX_OPTS 48
-
/* ----- functions exported by i2c.o */
@@ -373,10 +367,16 @@
/* Return the functionality mask */
-extern __u32 i2c_get_functionality (struct i2c_adapter *adap);
+static inline __u32 i2c_get_functionality(struct i2c_adapter *adap)
+{
+ return adap->algo->functionality(adap);
+}
/* Return 1 if adapter supports everything we need, 0 if not. */
-extern int i2c_check_functionality (struct i2c_adapter *adap, __u32 func);
+static inline int i2c_check_functionality(struct i2c_adapter *adap, __u32 func)
+{
+ return (func & i2c_get_functionality(adap)) == func;
+}
/*
* I2C Message - used for pure i2c transaction, also from /dev interface
@@ -422,22 +422,22 @@
#define I2C_FUNC_SMBUS_READ_BLOCK_DATA_PEC 0x40000000 /* SMBus 2.0 */
#define I2C_FUNC_SMBUS_WRITE_BLOCK_DATA_PEC 0x80000000 /* SMBus 2.0 */
-#define I2C_FUNC_SMBUS_BYTE I2C_FUNC_SMBUS_READ_BYTE | \
- I2C_FUNC_SMBUS_WRITE_BYTE
-#define I2C_FUNC_SMBUS_BYTE_DATA I2C_FUNC_SMBUS_READ_BYTE_DATA | \
- I2C_FUNC_SMBUS_WRITE_BYTE_DATA
-#define I2C_FUNC_SMBUS_WORD_DATA I2C_FUNC_SMBUS_READ_WORD_DATA | \
- I2C_FUNC_SMBUS_WRITE_WORD_DATA
-#define I2C_FUNC_SMBUS_BLOCK_DATA I2C_FUNC_SMBUS_READ_BLOCK_DATA | \
- I2C_FUNC_SMBUS_WRITE_BLOCK_DATA
-#define I2C_FUNC_SMBUS_I2C_BLOCK I2C_FUNC_SMBUS_READ_I2C_BLOCK | \
- I2C_FUNC_SMBUS_WRITE_I2C_BLOCK
-#define I2C_FUNC_SMBUS_I2C_BLOCK_2 I2C_FUNC_SMBUS_READ_I2C_BLOCK_2 | \
- I2C_FUNC_SMBUS_WRITE_I2C_BLOCK_2
-#define I2C_FUNC_SMBUS_BLOCK_DATA_PEC I2C_FUNC_SMBUS_READ_BLOCK_DATA_PEC | \
- I2C_FUNC_SMBUS_WRITE_BLOCK_DATA_PEC
-#define I2C_FUNC_SMBUS_WORD_DATA_PEC I2C_FUNC_SMBUS_READ_WORD_DATA_PEC | \
- I2C_FUNC_SMBUS_WRITE_WORD_DATA_PEC
+#define I2C_FUNC_SMBUS_BYTE (I2C_FUNC_SMBUS_READ_BYTE | \
+ I2C_FUNC_SMBUS_WRITE_BYTE)
+#define I2C_FUNC_SMBUS_BYTE_DATA (I2C_FUNC_SMBUS_READ_BYTE_DATA | \
+ I2C_FUNC_SMBUS_WRITE_BYTE_DATA)
+#define I2C_FUNC_SMBUS_WORD_DATA (I2C_FUNC_SMBUS_READ_WORD_DATA | \
+ I2C_FUNC_SMBUS_WRITE_WORD_DATA)
+#define I2C_FUNC_SMBUS_BLOCK_DATA (I2C_FUNC_SMBUS_READ_BLOCK_DATA | \
+ I2C_FUNC_SMBUS_WRITE_BLOCK_DATA)
+#define I2C_FUNC_SMBUS_I2C_BLOCK (I2C_FUNC_SMBUS_READ_I2C_BLOCK | \
+ I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)
+#define I2C_FUNC_SMBUS_I2C_BLOCK_2 (I2C_FUNC_SMBUS_READ_I2C_BLOCK_2 | \
+ I2C_FUNC_SMBUS_WRITE_I2C_BLOCK_2)
+#define I2C_FUNC_SMBUS_BLOCK_DATA_PEC (I2C_FUNC_SMBUS_READ_BLOCK_DATA_PEC | \
+ I2C_FUNC_SMBUS_WRITE_BLOCK_DATA_PEC)
+#define I2C_FUNC_SMBUS_WORD_DATA_PEC (I2C_FUNC_SMBUS_READ_WORD_DATA_PEC | \
+ I2C_FUNC_SMBUS_WRITE_WORD_DATA_PEC)
#define I2C_FUNC_SMBUS_READ_BYTE_PEC I2C_FUNC_SMBUS_READ_BYTE_DATA
#define I2C_FUNC_SMBUS_WRITE_BYTE_PEC I2C_FUNC_SMBUS_WRITE_BYTE_DATA
@@ -446,14 +446,14 @@
#define I2C_FUNC_SMBUS_BYTE_PEC I2C_FUNC_SMBUS_BYTE_DATA
#define I2C_FUNC_SMBUS_BYTE_DATA_PEC I2C_FUNC_SMBUS_WORD_DATA
-#define I2C_FUNC_SMBUS_EMUL I2C_FUNC_SMBUS_QUICK | \
- I2C_FUNC_SMBUS_BYTE | \
- I2C_FUNC_SMBUS_BYTE_DATA | \
- I2C_FUNC_SMBUS_WORD_DATA | \
- I2C_FUNC_SMBUS_PROC_CALL | \
- I2C_FUNC_SMBUS_WRITE_BLOCK_DATA | \
- I2C_FUNC_SMBUS_WRITE_BLOCK_DATA_PEC | \
- I2C_FUNC_SMBUS_I2C_BLOCK
+#define I2C_FUNC_SMBUS_EMUL (I2C_FUNC_SMBUS_QUICK | \
+ I2C_FUNC_SMBUS_BYTE | \
+ I2C_FUNC_SMBUS_BYTE_DATA | \
+ I2C_FUNC_SMBUS_WORD_DATA | \
+ I2C_FUNC_SMBUS_PROC_CALL | \
+ I2C_FUNC_SMBUS_WRITE_BLOCK_DATA | \
+ I2C_FUNC_SMBUS_WRITE_BLOCK_DATA_PEC | \
+ I2C_FUNC_SMBUS_I2C_BLOCK)
/*
* Data for SMBus Messages
@@ -528,6 +528,9 @@
#define I2C_MAJOR 89 /* Device major number */
/* These defines are used for probing i2c client addresses */
+/* The length of the option lists */
+#define I2C_CLIENT_MAX_OPTS 48
+
/* Default fill of many variables */
#define I2C_CLIENT_DEFAULTS {I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \
I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \
@@ -546,19 +549,12 @@
I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \
I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END}
-/* This is ugly. We need to evaluate I2C_CLIENT_MAX_OPTS before it is
- stringified */
-#define I2C_CLIENT_MODPARM_AUX1(x) "1-" #x "h"
-#define I2C_CLIENT_MODPARM_AUX(x) I2C_CLIENT_MODPARM_AUX1(x)
-#define I2C_CLIENT_MODPARM I2C_CLIENT_MODPARM_AUX(I2C_CLIENT_MAX_OPTS)
-
/* I2C_CLIENT_MODULE_PARM creates a module parameter, and puts it in the
module header */
#define I2C_CLIENT_MODULE_PARM(var,desc) \
static unsigned short var[I2C_CLIENT_MAX_OPTS] = I2C_CLIENT_DEFAULTS; \
static unsigned int var##_num; \
- /*MODULE_PARM(var,I2C_CLIENT_MODPARM);*/ \
module_param_array(var, short, &var##_num, 0); \
MODULE_PARM_DESC(var,desc)
Modified: linux-libc-headers/trunk/include/linux/i2o-dev.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/i2o-dev.h (original)
+++ linux-libc-headers/trunk/include/linux/i2o-dev.h Tue Jul 5 22:58:33 2005
@@ -31,7 +31,7 @@
* I2O Control IOCTLs and structures
*/
#define I2O_MAGIC_NUMBER 'i'
-#define I2OGETIOPS _IOR(I2O_MAGIC_NUMBER,0,u8[MAX_I2O_CONTROLLERS])
+#define I2OGETIOPS _IOR(I2O_MAGIC_NUMBER,0,__u8[MAX_I2O_CONTROLLERS])
#define I2OHRTGET _IOWR(I2O_MAGIC_NUMBER,1,struct i2o_cmd_hrtlct)
#define I2OLCTGET _IOWR(I2O_MAGIC_NUMBER,2,struct i2o_cmd_hrtlct)
#define I2OPARMSET _IOWR(I2O_MAGIC_NUMBER,3,struct i2o_cmd_psetget)
Modified: linux-libc-headers/trunk/include/linux/ibmtr.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/ibmtr.h (original)
+++ linux-libc-headers/trunk/include/linux/ibmtr.h Tue Jul 5 22:58:33 2005
@@ -194,12 +194,13 @@
/* Additions by Peter De Schrijver */
unsigned char page_mask; /* mask to select RAM page to Map*/
unsigned char mapped_ram_size; /* size of RAM page */
- __u32 sram_virt; /* Shared memory base address */
- __u32 init_srb; /* Initial System Request Block address */
- __u32 srb; /* System Request Block address */
- __u32 ssb; /* System Status Block address */
- __u32 arb; /* Adapter Request Block address */
- __u32 asb; /* Adapter Status Block address */
+ __u32 sram_phys; /* Shared memory base address */
+ void *sram_virt; /* Shared memory base address */
+ void *init_srb; /* Initial System Request Block address */
+ void *srb; /* System Request Block address */
+ void *ssb; /* System Status Block address */
+ void *arb; /* Adapter Request Block address */
+ void *asb; /* Adapter Status Block address */
__u8 init_srb_page;
__u8 srb_page;
__u8 ssb_page;
Modified: linux-libc-headers/trunk/include/linux/if.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/if.h (original)
+++ linux-libc-headers/trunk/include/linux/if.h Tue Jul 5 22:58:33 2005
@@ -8,7 +8,7 @@
* Version: @(#)if.h 1.0.2 04/18/93
*
* Authors: Original taken from Berkeley UNIX 4.3, (c) UCB 1982-1988
- * Ross Biro, <bir7 at leland.Stanford.Edu>
+ * Ross Biro
* Fred N. van Kempen, <waltje at uWalt.NL.Mugnet.ORG>
*
* This program is free software; you can redistribute it and/or
Modified: linux-libc-headers/trunk/include/linux/if_arp.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/if_arp.h (original)
+++ linux-libc-headers/trunk/include/linux/if_arp.h Tue Jul 5 22:58:33 2005
@@ -9,7 +9,7 @@
*
* Authors: Original taken from Berkeley UNIX 4.3, (c) UCB 1986-1988
* Portions taken from the KA9Q/NOS (v2.00m PA0GRI) source.
- * Ross Biro, <bir7 at leland.Stanford.Edu>
+ * Ross Biro
* Fred N. van Kempen, <waltje at uWalt.NL.Mugnet.ORG>
* Florian La Roche,
* Jonathan Layes <layes at loran.com>
Modified: linux-libc-headers/trunk/include/linux/if_tr.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/if_tr.h (original)
+++ linux-libc-headers/trunk/include/linux/if_tr.h Tue Jul 5 22:58:33 2005
@@ -9,7 +9,7 @@
*
* Author: Fred N. van Kempen, <waltje at uWalt.NL.Mugnet.ORG>
* Donald Becker, <becker at super.org>
- * Peter De Schrijver, <stud11 at cc4.kuleuven.ac.be>
+ * Peter De Schrijver, <stud11 at cc4.kuleuven.ac.be>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
@@ -19,25 +19,18 @@
#ifndef _LINUX_IF_TR_H
#define _LINUX_IF_TR_H
-#include <asm/types.h>
+#include <asm/byteorder.h> /* For __be16 */
/* IEEE 802.5 Token-Ring magic constants. The frame sizes omit the preamble
and FCS/CRC (frame check sequence). */
-#define TR_ALEN 6 /* Octets in one ethernet addr */
-#define TR_HLEN (sizeof(struct trh_hdr)+sizeof(struct trllc))
-#define AC 0x10
-#define LLC_FRAME 0x40
-#if 0
-#define ETH_HLEN 14 /* Total octets in header. */
-#define ETH_ZLEN 60 /* Min. octets in frame sans FCS */
-#define ETH_DATA_LEN 1500 /* Max. octets in payload */
-#define ETH_FRAME_LEN 1514 /* Max. octets in frame sans FCS */
-#endif
-
+#define TR_ALEN 6 /* Octets in one token-ring addr */
+#define TR_HLEN (sizeof(struct trh_hdr)+sizeof(struct trllc))
+#define AC 0x10
+#define LLC_FRAME 0x40
/* LLC and SNAP constants */
-#define EXTENDED_SAP 0xAA
-#define UI_CMD 0x03
+#define EXTENDED_SAP 0xAA
+#define UI_CMD 0x03
/* This is an Token-Ring frame header. */
struct trh_hdr {
@@ -45,8 +38,8 @@
__u8 fc; /* frame control field */
__u8 daddr[TR_ALEN]; /* destination address */
__u8 saddr[TR_ALEN]; /* source address */
- __u16 rcf; /* route control field */
- __u16 rseg[8]; /* routing registers */
+ __be16 rcf; /* route control field */
+ __be16 rseg[8]; /* routing registers */
};
/* This is an Token-Ring LLC structure */
@@ -55,7 +48,7 @@
__u8 ssap; /* source SAP */
__u8 llc; /* LLC control field */
__u8 protid[3]; /* protocol id */
- __u16 ethertype; /* ether type field */
+ __be16 ethertype; /* ether type field */
};
/* Token-Ring statistics collection data. */
@@ -88,14 +81,13 @@
};
/* source routing stuff */
-
-#define TR_RII 0x80
-#define TR_RCF_DIR_BIT 0x80
-#define TR_RCF_LEN_MASK 0x1f00
-#define TR_RCF_BROADCAST 0x8000 /* all-routes broadcast */
-#define TR_RCF_LIMITED_BROADCAST 0xC000 /* single-route broadcast */
-#define TR_RCF_FRAME2K 0x20
-#define TR_RCF_BROADCAST_MASK 0xC000
-#define TR_MAXRIFLEN 18
+#define TR_RII 0x80
+#define TR_RCF_DIR_BIT 0x80
+#define TR_RCF_LEN_MASK 0x1f00
+#define TR_RCF_BROADCAST 0x8000 /* all-routes broadcast */
+#define TR_RCF_LIMITED_BROADCAST 0xC000 /* single-route broadcast */
+#define TR_RCF_FRAME2K 0x20
+#define TR_RCF_BROADCAST_MASK 0xC000
+#define TR_MAXRIFLEN 18
#endif /* _LINUX_IF_TR_H */
Modified: linux-libc-headers/trunk/include/linux/init_task.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/init_task.h (original)
+++ linux-libc-headers/trunk/include/linux/init_task.h Tue Jul 5 22:58:33 2005
@@ -51,6 +51,7 @@
.list = LIST_HEAD_INIT(sig.shared_pending.list), \
.signal = {{0}}}, \
.posix_timers = LIST_HEAD_INIT(sig.posix_timers), \
+ .cpu_timers = INIT_CPU_TIMERS(sig.cpu_timers), \
.rlim = INIT_RLIMITS, \
}
@@ -89,9 +90,6 @@
.children = LIST_HEAD_INIT(tsk.children), \
.sibling = LIST_HEAD_INIT(tsk.sibling), \
.group_leader = &tsk, \
- .real_timer = { \
- .function = it_real_fn \
- }, \
.group_info = &init_groups, \
.cap_effective = CAP_INIT_EFF_SET, \
.cap_inheritable = CAP_INIT_INH_SET, \
@@ -112,8 +110,16 @@
.proc_lock = SPIN_LOCK_UNLOCKED, \
.switch_lock = SPIN_LOCK_UNLOCKED, \
.journal_info = NULL, \
+ .cpu_timers = INIT_CPU_TIMERS(tsk.cpu_timers), \
}
+#define INIT_CPU_TIMERS(cpu_timers) \
+{ \
+ LIST_HEAD_INIT(cpu_timers[0]), \
+ LIST_HEAD_INIT(cpu_timers[1]), \
+ LIST_HEAD_INIT(cpu_timers[2]), \
+}
+
#endif
Modified: linux-libc-headers/trunk/include/linux/input.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/input.h (original)
+++ linux-libc-headers/trunk/include/linux/input.h Tue Jul 5 22:58:33 2005
@@ -330,6 +330,11 @@
#define KEY_BRIGHTNESSUP 225
#define KEY_MEDIA 226
+#define KEY_SWITCHVIDEOMODE 227
+#define KEY_KBDILLUMTOGGLE 228
+#define KEY_KBDILLUMDOWN 229
+#define KEY_KBDILLUMUP 230
+
#define KEY_UNKNOWN 240
#define BTN_MISC 0x100
Modified: linux-libc-headers/trunk/include/linux/ioport.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/ioport.h (original)
+++ linux-libc-headers/trunk/include/linux/ioport.h Tue Jul 5 22:58:33 2005
@@ -90,8 +90,6 @@
extern struct resource ioport_resource;
extern struct resource iomem_resource;
-extern int get_resource_list(struct resource *, char *buf, int size);
-
extern int request_resource(struct resource *root, struct resource *new);
extern struct resource * ____request_resource(struct resource *root, struct resource *new);
extern int release_resource(struct resource *new);
Added: linux-libc-headers/trunk/include/linux/ip_mp_alg.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/linux/ip_mp_alg.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,22 @@
+/* ip_mp_alg.h: IPV4 multipath algorithm support, user-visible values.
+ *
+ * Copyright (C) 2004, 2005 Einar Lueck <elueck at de.ibm.com>
+ * Copyright (C) 2005 David S. Miller <davem at davemloft.net>
+ */
+
+#ifndef _LINUX_IP_MP_ALG_H
+#define _LINUX_IP_MP_ALG_H
+
+enum ip_mp_alg {
+ IP_MP_ALG_NONE,
+ IP_MP_ALG_RR,
+ IP_MP_ALG_DRR,
+ IP_MP_ALG_RANDOM,
+ IP_MP_ALG_WRANDOM,
+ __IP_MP_ALG_MAX
+};
+
+#define IP_MP_ALG_MAX (__IP_MP_ALG_MAX - 1)
+
+#endif /* _LINUX_IP_MP_ALG_H */
+
Modified: linux-libc-headers/trunk/include/linux/ipmi_smi.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/ipmi_smi.h (original)
+++ linux-libc-headers/trunk/include/linux/ipmi_smi.h Tue Jul 5 22:58:33 2005
@@ -104,13 +104,22 @@
/* Called to poll for work to do. This is so upper layers can
poll for operations during things like crash dumps. */
void (*poll)(void *send_info);
+
+ /* Tell the handler that we are using it/not using it. The
+ message handler get the modules that this handler belongs
+ to; this function lets the SMI claim any modules that it
+ uses. These may be NULL if this is not required. */
+ int (*inc_usecount)(void *send_info);
+ void (*dec_usecount)(void *send_info);
};
-/* Add a low-level interface to the IPMI driver. */
+/* Add a low-level interface to the IPMI driver. Note that if the
+ interface doesn't know its slave address, it should pass in zero. */
int ipmi_register_smi(struct ipmi_smi_handlers *handlers,
void *send_info,
unsigned char version_major,
unsigned char version_minor,
+ unsigned char slave_addr,
ipmi_smi_t *intf);
/*
Modified: linux-libc-headers/trunk/include/linux/ixjuser.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/ixjuser.h (original)
+++ linux-libc-headers/trunk/include/linux/ixjuser.h Tue Jul 5 22:58:33 2005
@@ -42,7 +42,6 @@
*
*****************************************************************************/
-static char ixjuser_h_rcsid[] = "Id: ixjuser.h,v 4.1 2001/08/05 00:17:37 craigs Exp";
#include <linux/telephony.h>
Modified: linux-libc-headers/trunk/include/linux/jhash.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/jhash.h (original)
+++ linux-libc-headers/trunk/include/linux/jhash.h Tue Jul 5 22:58:33 2005
@@ -83,8 +83,8 @@
return c;
}
-/* A special optimized version that handles 1 or more of u32s.
- * The length parameter here is the number of u32s in the key.
+/* A special optimized version that handles 1 or more of __u32s.
+ * The length parameter here is the number of __u32s in the key.
*/
static inline __u32 jhash2(__u32 *k, __u32 length, __u32 initval)
{
Modified: linux-libc-headers/trunk/include/linux/journal-head.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/journal-head.h (original)
+++ linux-libc-headers/trunk/include/linux/journal-head.h Tue Jul 5 22:58:33 2005
@@ -32,6 +32,13 @@
unsigned b_jlist;
/*
+ * This flag signals the buffer has been modified by
+ * the currently running transaction
+ * [jbd_lock_bh_state()]
+ */
+ unsigned b_modified;
+
+ /*
* Copy of the buffer data frozen for writing to the log.
* [jbd_lock_bh_state()]
*/
Modified: linux-libc-headers/trunk/include/linux/joystick.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/joystick.h (original)
+++ linux-libc-headers/trunk/include/linux/joystick.h Tue Jul 5 22:58:33 2005
@@ -65,10 +65,10 @@
#define JSIOCSCORR _IOW('j', 0x21, struct js_corr) /* set correction values */
#define JSIOCGCORR _IOR('j', 0x22, struct js_corr) /* get correction values */
-#define JSIOCSAXMAP _IOW('j', 0x31, __u8[ABS_MAX]) /* set axis mapping */
-#define JSIOCGAXMAP _IOR('j', 0x32, __u8[ABS_MAX]) /* get axis mapping */
-#define JSIOCSBTNMAP _IOW('j', 0x33, __u16[KEY_MAX - BTN_MISC]) /* set button mapping */
-#define JSIOCGBTNMAP _IOR('j', 0x34, __u16[KEY_MAX - BTN_MISC]) /* get button mapping */
+#define JSIOCSAXMAP _IOW('j', 0x31, __u8[ABS_MAX + 1]) /* set axis mapping */
+#define JSIOCGAXMAP _IOR('j', 0x32, __u8[ABS_MAX + 1]) /* get axis mapping */
+#define JSIOCSBTNMAP _IOW('j', 0x33, __u16[KEY_MAX - BTN_MISC + 1]) /* set button mapping */
+#define JSIOCGBTNMAP _IOR('j', 0x34, __u16[KEY_MAX - BTN_MISC + 1]) /* get button mapping */
/*
* Types and constants for get/set correction
Modified: linux-libc-headers/trunk/include/linux/kernel.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/kernel.h (original)
+++ linux-libc-headers/trunk/include/linux/kernel.h Tue Jul 5 22:58:33 2005
@@ -26,6 +26,12 @@
extern void BUILD_BUG(void);
#define BUILD_BUG_ON(condition) do { if (condition) BUILD_BUG(); } while(0)
+#ifdef CONFIG_SYSCTL
+extern int randomize_va_space;
+#else
+#define randomize_va_space 1
+#endif
+
/* Trap pasters of __FUNCTION__ at compile-time */
#if __GNUC__ > 2 || __GNUC_MINOR__ >= 95
#define __FUNCTION__ (__func__)
Modified: linux-libc-headers/trunk/include/linux/keyboard.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/keyboard.h (original)
+++ linux-libc-headers/trunk/include/linux/keyboard.h Tue Jul 5 22:58:33 2005
@@ -16,7 +16,7 @@
#define NR_SHIFT 9
-#define NR_KEYS 255
+#define NR_KEYS 256
#define MAX_NR_KEYMAPS 256
/* This means 128Kb if all keymaps are allocated. Only the superuser
may increase the number of keymaps beyond MAX_NR_OF_USER_KEYMAPS. */
Modified: linux-libc-headers/trunk/include/linux/kprobes.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/kprobes.h (original)
+++ linux-libc-headers/trunk/include/linux/kprobes.h Tue Jul 5 22:58:33 2005
@@ -42,6 +42,9 @@
struct kprobe {
struct hlist_node hlist;
+ /* list of kprobes for multi-handler support */
+ struct list_head list;
+
/* location of the probe point */
kprobe_opcode_t *addr;
Modified: linux-libc-headers/trunk/include/linux/libata.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/libata.h (original)
+++ linux-libc-headers/trunk/include/linux/libata.h Tue Jul 5 22:58:33 2005
@@ -411,6 +411,7 @@
extern void ata_exec_command(struct ata_port *ap, struct ata_taskfile *tf);
extern int ata_port_start (struct ata_port *ap);
extern void ata_port_stop (struct ata_port *ap);
+extern void ata_host_stop (struct ata_host_set *host_set);
extern irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs);
extern void ata_qc_prep(struct ata_queued_cmd *qc);
extern int ata_qc_issue_prot(struct ata_queued_cmd *qc);
@@ -467,12 +468,34 @@
return ap->ops->check_status(ap);
}
+
+/**
+ * ata_pause - Flush writes and pause 400 nanoseconds.
+ * @ap: Port to wait for.
+ *
+ * LOCKING:
+ * Inherited from caller.
+ */
+
static inline void ata_pause(struct ata_port *ap)
{
ata_altstatus(ap);
ndelay(400);
}
+
+/**
+ * ata_busy_wait - Wait for a port status register
+ * @ap: Port to wait for.
+ *
+ * Waits up to max*10 microseconds for the selected bits in the port's
+ * status register to be cleared.
+ * Returns final value of status register.
+ *
+ * LOCKING:
+ * Inherited from caller.
+ */
+
static inline __u8 ata_busy_wait(struct ata_port *ap, unsigned int bits,
unsigned int max)
{
@@ -487,6 +510,18 @@
return status;
}
+
+/**
+ * ata_wait_idle - Wait for a port to be idle.
+ * @ap: Port to wait for.
+ *
+ * Waits up to 10ms for port's BUSY and DRQ signals to clear.
+ * Returns final value of status register.
+ *
+ * LOCKING:
+ * Inherited from caller.
+ */
+
static inline __u8 ata_wait_idle(struct ata_port *ap)
{
__u8 status = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000);
@@ -525,6 +560,18 @@
tf->device = ATA_DEVICE_OBS | ATA_DEV1;
}
+
+/**
+ * ata_irq_on - Enable interrupts on a port.
+ * @ap: Port on which interrupts are enabled.
+ *
+ * Enable interrupts on a legacy IDE device using MMIO or PIO,
+ * wait for idle, clear any pending interrupts.
+ *
+ * LOCKING:
+ * Inherited from caller.
+ */
+
static inline __u8 ata_irq_on(struct ata_port *ap)
{
struct ata_ioports *ioaddr = &ap->ioaddr;
@@ -544,6 +591,18 @@
return tmp;
}
+
+/**
+ * ata_irq_ack - Acknowledge a device interrupt.
+ * @ap: Port on which interrupts are enabled.
+ *
+ * Wait up to 10 ms for legacy IDE device to become idle (BUSY
+ * or BUSY+DRQ clear). Obtain dma status and port status from
+ * device. Clear the interrupt. Return port status.
+ *
+ * LOCKING:
+ */
+
static inline __u8 ata_irq_ack(struct ata_port *ap, unsigned int chk_drq)
{
unsigned int bits = chk_drq ? ATA_BUSY | ATA_DRQ : ATA_BUSY;
@@ -585,6 +644,13 @@
ap->ops->scr_write(ap, reg, val);
}
+static inline void scr_write_flush(struct ata_port *ap, unsigned int reg,
+ __u32 val)
+{
+ ap->ops->scr_write(ap, reg, val);
+ (void) ap->ops->scr_read(ap, reg);
+}
+
static inline unsigned int sata_dev_present(struct ata_port *ap)
{
return ((scr_read(ap, SCR_STATUS) & 0xf) == 0x3) ? 1 : 0;
Modified: linux-libc-headers/trunk/include/linux/loop.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/loop.h (original)
+++ linux-libc-headers/trunk/include/linux/loop.h Tue Jul 5 22:58:33 2005
@@ -16,7 +16,10 @@
/*
* Loop flags
*/
-#define LO_FLAGS_READ_ONLY 1
+enum {
+ LO_FLAGS_READ_ONLY = 1,
+ LO_FLAGS_USE_AOPS = 2,
+};
#include <asm/posix_types.h> /* for __kernel_old_dev_t */
#include <asm/types.h> /* for __u64 */
Modified: linux-libc-headers/trunk/include/linux/major.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/major.h (original)
+++ linux-libc-headers/trunk/include/linux/major.h Tue Jul 5 22:58:33 2005
@@ -25,7 +25,6 @@
#define MISC_MAJOR 10
#define SCSI_CDROM_MAJOR 11
#define MUX_MAJOR 11 /* PA-RISC only */
-#define QIC02_TAPE_MAJOR 12
#define XT_DISK_MAJOR 13
#define INPUT_MAJOR 13
#define SOUND_MAJOR 14
Modified: linux-libc-headers/trunk/include/linux/mempool.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/mempool.h (original)
+++ linux-libc-headers/trunk/include/linux/mempool.h Tue Jul 5 22:58:33 2005
@@ -6,7 +6,7 @@
#include <linux/wait.h>
-typedef void * (mempool_alloc_t)(int gfp_mask, void *pool_data);
+typedef void * (mempool_alloc_t)(unsigned int gfp_mask, void *pool_data);
typedef void (mempool_free_t)(void *element, void *pool_data);
typedef struct mempool_s {
@@ -22,16 +22,16 @@
} mempool_t;
extern mempool_t * mempool_create(int min_nr, mempool_alloc_t *alloc_fn,
mempool_free_t *free_fn, void *pool_data);
-extern int mempool_resize(mempool_t *pool, int new_min_nr, int gfp_mask);
+extern int mempool_resize(mempool_t *pool, int new_min_nr, unsigned int gfp_mask);
extern void mempool_destroy(mempool_t *pool);
-extern void * mempool_alloc(mempool_t *pool, int gfp_mask);
+extern void * mempool_alloc(mempool_t *pool, unsigned int gfp_mask);
extern void mempool_free(void *element, mempool_t *pool);
/*
* A mempool_alloc_t and mempool_free_t that get the memory from
* a slab that is passed in through pool_data.
*/
-void *mempool_alloc_slab(int gfp_mask, void *pool_data);
+void *mempool_alloc_slab(unsigned int gfp_mask, void *pool_data);
void mempool_free_slab(void *element, void *pool_data);
#endif /* _LINUX_MEMPOOL_H */
Modified: linux-libc-headers/trunk/include/linux/mii.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/mii.h (original)
+++ linux-libc-headers/trunk/include/linux/mii.h Tue Jul 5 22:58:33 2005
@@ -20,6 +20,8 @@
#define MII_ADVERTISE 0x04 /* Advertisement control reg */
#define MII_LPA 0x05 /* Link partner ability reg */
#define MII_EXPANSION 0x06 /* Expansion register */
+#define MII_CTRL1000 0x09 /* 1000BASE-T control */
+#define MII_STAT1000 0x0a /* 1000BASE-T status */
#define MII_DCOUNTER 0x12 /* Disconnect counter */
#define MII_FCSCOUNTER 0x13 /* False carrier counter */
#define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */
@@ -63,11 +65,17 @@
#define ADVERTISE_SLCT 0x001f /* Selector bits */
#define ADVERTISE_CSMA 0x0001 /* Only selector supported */
#define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */
+#define ADVERTISE_1000XFULL 0x0020 /* Try for 1000BASE-X full-duplex */
#define ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */
+#define ADVERTISE_1000XHALF 0x0040 /* Try for 1000BASE-X half-duplex */
#define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */
+#define ADVERTISE_1000XPAUSE 0x0080 /* Try for 1000BASE-X pause */
#define ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */
+#define ADVERTISE_1000XPSE_ASYM 0x0100 /* Try for 1000BASE-X asym pause */
#define ADVERTISE_100BASE4 0x0200 /* Try for 100mbps 4k packets */
-#define ADVERTISE_RESV 0x1c00 /* Unused... */
+#define ADVERTISE_PAUSE_CAP 0x0400 /* Try for pause */
+#define ADVERTISE_PAUSE_ASYM 0x0800 /* Try for asymetric pause */
+#define ADVERTISE_RESV 0x1000 /* Unused... */
#define ADVERTISE_RFAULT 0x2000 /* Say we can detect faults */
#define ADVERTISE_LPACK 0x4000 /* Ack link partners response */
#define ADVERTISE_NPAGE 0x8000 /* Next page bit */
@@ -80,11 +88,17 @@
/* Link partner ability register. */
#define LPA_SLCT 0x001f /* Same as advertise selector */
#define LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */
+#define LPA_1000XFULL 0x0020 /* Can do 1000BASE-X full-duplex */
#define LPA_10FULL 0x0040 /* Can do 10mbps full-duplex */
+#define LPA_1000XHALF 0x0040 /* Can do 1000BASE-X half-duplex */
#define LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */
+#define LPA_1000XPAUSE 0x0080 /* Can do 1000BASE-X pause */
#define LPA_100FULL 0x0100 /* Can do 100mbps full-duplex */
+#define LPA_1000XPAUSE_ASYM 0x0100 /* Can do 1000BASE-X pause asym*/
#define LPA_100BASE4 0x0200 /* Can do 100mbps 4k packets */
-#define LPA_RESV 0x1c00 /* Unused... */
+#define LPA_PAUSE_CAP 0x0400 /* Can pause */
+#define LPA_PAUSE_ASYM 0x0800 /* Can pause asymetrically */
+#define LPA_RESV 0x1000 /* Unused... */
#define LPA_RFAULT 0x2000 /* Link partner faulted */
#define LPA_LPACK 0x4000 /* Link partner acked us */
#define LPA_NPAGE 0x8000 /* Next page bit */
@@ -105,6 +119,15 @@
#define NWAYTEST_LOOPBACK 0x0100 /* Enable loopback for N-way */
#define NWAYTEST_RESV2 0xfe00 /* Unused... */
+/* 1000BASE-T Control register */
+#define ADVERTISE_1000FULL 0x0200 /* Advertise 1000BASE-T full duplex */
+#define ADVERTISE_1000HALF 0x0100 /* Advertise 1000BASE-T half duplex */
+
+/* 1000BASE-T Status register */
+#define LPA_1000LOCALRXOK 0x2000 /* Link partner local receiver status */
+#define LPA_1000REMRXOK 0x1000 /* Link partner remote receiver status */
+#define LPA_1000FULL 0x0800 /* Link partner 1000BASE-T full duplex */
+#define LPA_1000HALF 0x0400 /* Link partner 1000BASE-T half duplex */
struct mii_if_info {
int phy_id;
@@ -114,6 +137,7 @@
unsigned int full_duplex : 1; /* is full duplex? */
unsigned int force_media : 1; /* is autoneg. disabled? */
+ unsigned int supports_gmii : 1; /* are GMII registers supported? */
struct net_device *dev;
int (*mdio_read) (struct net_device *dev, int phy_id, int location);
Modified: linux-libc-headers/trunk/include/linux/mod_devicetable.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/mod_devicetable.h (original)
+++ linux-libc-headers/trunk/include/linux/mod_devicetable.h Tue Jul 5 22:58:33 2005
@@ -163,4 +163,14 @@
};
+#define SERIO_ANY 0xff
+
+struct serio_device_id {
+ __u8 type;
+ __u8 extra;
+ __u8 id;
+ __u8 proto;
+};
+
+
#endif /* LINUX_MOD_DEVICETABLE_H */
Modified: linux-libc-headers/trunk/include/linux/module.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/module.h (original)
+++ linux-libc-headers/trunk/include/linux/module.h Tue Jul 5 22:58:33 2005
@@ -68,23 +68,14 @@
extern struct subsystem module_subsys;
#ifdef MODULE
-#define ___module_cat(a,b) __mod_ ## a ## b
-#define __module_cat(a,b) ___module_cat(a,b)
-#define __MODULE_INFO(tag, name, info) \
-static const char __module_cat(name,__LINE__)[] \
- __attribute__((section(".modinfo"),unused)) = __stringify(tag) "=" info
-
#define MODULE_GENERIC_TABLE(gtype,name) \
extern const struct gtype##_id __mod_##gtype##_table \
__attribute__ ((unused, alias(__stringify(name))))
extern struct module __this_module;
#define THIS_MODULE (&__this_module)
-
#else /* !MODULE */
-
#define MODULE_GENERIC_TABLE(gtype,name)
-#define __MODULE_INFO(tag, name, info)
#define THIS_MODULE ((struct module *)0)
#endif
Modified: linux-libc-headers/trunk/include/linux/moduleparam.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/moduleparam.h (original)
+++ linux-libc-headers/trunk/include/linux/moduleparam.h Tue Jul 5 22:58:33 2005
@@ -13,6 +13,19 @@
#define MODULE_PARAM_PREFIX __stringify(KBUILD_MODNAME) "."
#endif
+#ifdef MODULE
+#define ___module_cat(a,b) __mod_ ## a ## b
+#define __module_cat(a,b) ___module_cat(a,b)
+#define __MODULE_INFO(tag, name, info) \
+static const char __module_cat(name,__LINE__)[] \
+ __attribute_used__ \
+ __attribute__((section(".modinfo"),unused)) = __stringify(tag) "=" info
+#else /* !MODULE */
+#define __MODULE_INFO(tag, name, info)
+#endif
+#define __MODULE_PARM_TYPE(name, _type) \
+ __MODULE_INFO(parmtype, name##type, #name ":" _type)
+
struct kernel_param;
/* Returns 0, or -errno. arg is in kp->arg. */
@@ -64,7 +77,7 @@
#define module_param_named(name, value, type, perm) \
param_check_##type(name, &(value)); \
module_param_call(name, param_set_##type, param_get_##type, &value, perm); \
- __MODULE_INFO(parmtype, name##type, #name ":" #type)
+ __MODULE_PARM_TYPE(name, #type)
#define module_param(name, type, perm) \
module_param_named(name, name, type, perm)
@@ -75,7 +88,7 @@
= { len, string }; \
module_param_call(name, param_set_copystring, param_get_string, \
&__param_string_##name, perm); \
- __MODULE_INFO(parmtype, name##type, #name ":string")
+ __MODULE_PARM_TYPE(name, "string")
/* Called on module insert or kernel boot */
extern int parse_args(const char *name,
@@ -137,7 +150,7 @@
sizeof(array[0]), array }; \
module_param_call(name, param_array_set, param_array_get, \
&__param_arr_##name, perm); \
- __MODULE_INFO(parmtype, name##type, #name ":array of " #type)
+ __MODULE_PARM_TYPE(name, "array of " #type)
#define module_param_array(name, type, nump, perm) \
module_param_array_named(name, name, type, nump, perm)
Modified: linux-libc-headers/trunk/include/linux/msdos_fs.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/msdos_fs.h (original)
+++ linux-libc-headers/trunk/include/linux/msdos_fs.h Tue Jul 5 22:58:33 2005
@@ -49,8 +49,6 @@
#define MSDOS_VALID_MODE (S_IFREG | S_IFDIR | S_IRWXU | S_IRWXG | S_IRWXO)
/* Convert attribute bits and a mask to the UNIX mode. */
#define MSDOS_MKMODE(a, m) (m & (a & ATTR_RO ? S_IRUGO|S_IXUGO : S_IRWXUGO))
-/* Convert the UNIX mode to MS-DOS attribute bits. */
-#define MSDOS_MKATTR(m) ((m & S_IWUGO) ? ATTR_NONE : ATTR_RO)
#define MSDOS_NAME 11 /* maximum name length */
#define MSDOS_LONGNAME 256 /* maximum name length */
@@ -77,15 +75,11 @@
#define BAD_FAT12 0xFF7
#define BAD_FAT16 0xFFF7
#define BAD_FAT32 0x0FFFFFF7
-#define BAD_FAT(s) (MSDOS_SB(s)->fat_bits == 32 ? BAD_FAT32 : \
- MSDOS_SB(s)->fat_bits == 16 ? BAD_FAT16 : BAD_FAT12)
/* standard EOF */
#define EOF_FAT12 0xFFF
#define EOF_FAT16 0xFFFF
#define EOF_FAT32 0x0FFFFFFF
-#define EOF_FAT(s) (MSDOS_SB(s)->fat_bits == 32 ? EOF_FAT32 : \
- MSDOS_SB(s)->fat_bits == 16 ? EOF_FAT16 : EOF_FAT12)
#define FAT_ENT_FREE (0)
#define FAT_ENT_BAD (BAD_FAT32)
@@ -99,8 +93,11 @@
/*
* ioctl commands
*/
-#define VFAT_IOCTL_READDIR_BOTH _IOR('r', 1, struct dirent [2])
-#define VFAT_IOCTL_READDIR_SHORT _IOR('r', 2, struct dirent [2])
+#define VFAT_IOCTL_READDIR_BOTH _IOR('r', 1, struct dirent [2])
+#define VFAT_IOCTL_READDIR_SHORT _IOR('r', 2, struct dirent [2])
+/* <linux/videotext.h> has used 0x72 ('r') in collision, so skip a few */
+#define FAT_IOCTL_GET_ATTRIBUTES _IOR('r', 0x10, __u32)
+#define FAT_IOCTL_SET_ATTRIBUTES _IOW('r', 0x11, __u32)
/*
* vfat shortname flags
@@ -154,7 +151,7 @@
__u8 name[8],ext[3]; /* name and extension */
__u8 attr; /* attribute bits */
__u8 lcase; /* Case for base and extension */
- __u8 ctime_ms; /* Creation time, milliseconds */
+ __u8 ctime_cs; /* Creation time, centiseconds (0-199) */
__le16 ctime; /* Creation time */
__le16 cdate; /* Creation date */
__le16 adate; /* Last access date */
@@ -175,10 +172,12 @@
__u8 name11_12[4]; /* last 2 characters in name */
};
-struct vfat_slot_info {
- int long_slots; /* number of long slots in filename */
- loff_t longname_offset; /* dir offset for longname start */
+struct fat_slot_info {
loff_t i_pos; /* on-disk position of directory entry */
+ loff_t slot_off; /* offset for slot or de start */
+ int nr_slots; /* number of slots + 1(de) in filename */
+ struct msdos_dir_entry *de;
+ struct buffer_head *bh;
};
Modified: linux-libc-headers/trunk/include/linux/mtio.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/mtio.h (original)
+++ linux-libc-headers/trunk/include/linux/mtio.h Tue Jul 5 22:58:33 2005
@@ -150,34 +150,6 @@
};
-/* structure for MTIOCGETCONFIG/MTIOCSETCONFIG primarily intended
- * as an interim solution for QIC-02 until DDI is fully implemented.
- */
-struct mtconfiginfo {
- long mt_type; /* drive type */
- long ifc_type; /* interface card type */
- unsigned short irqnr; /* IRQ number to use */
- unsigned short dmanr; /* DMA channel to use */
- unsigned short port; /* IO port base address */
-
- unsigned long debug; /* debugging flags */
-
- unsigned have_dens:1;
- unsigned have_bsf:1;
- unsigned have_fsr:1;
- unsigned have_bsr:1;
- unsigned have_eod:1;
- unsigned have_seek:1;
- unsigned have_tell:1;
- unsigned have_ras1:1;
- unsigned have_ras2:1;
- unsigned have_ras3:1;
- unsigned have_qfa:1;
-
- unsigned pad1:5;
- char reserved[10];
-};
-
/* structure for MTIOCVOLINFO, query information about the volume
* currently positioned at (zftape)
*/
Modified: linux-libc-headers/trunk/include/linux/namei.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/namei.h (original)
+++ linux-libc-headers/trunk/include/linux/namei.h Tue Jul 5 22:58:33 2005
@@ -39,12 +39,14 @@
* - ending slashes ok even for nonexistent files
* - internal "there are more path compnents" flag
* - locked when lookup done with dcache_lock held
+ * - dentry cache is untrusted; force a real lookup
*/
#define LOOKUP_FOLLOW 1
#define LOOKUP_DIRECTORY 2
#define LOOKUP_CONTINUE 4
#define LOOKUP_PARENT 16
#define LOOKUP_NOALT 32
+#define LOOKUP_REVAL 64
/*
* Intent data
*/
Modified: linux-libc-headers/trunk/include/linux/net.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/net.h (original)
+++ linux-libc-headers/trunk/include/linux/net.h Tue Jul 5 22:58:33 2005
@@ -7,7 +7,7 @@
* Version: @(#)net.h 1.0.3 05/25/93
*
* Authors: Orest Zborowski, <obz at Kodak.COM>
- * Ross Biro, <bir7 at leland.Stanford.Edu>
+ * Ross Biro
* Fred N. van Kempen, <waltje at uWalt.NL.Mugnet.ORG>
*
* This program is free software; you can redistribute it and/or
Modified: linux-libc-headers/trunk/include/linux/netdevice.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/netdevice.h (original)
+++ linux-libc-headers/trunk/include/linux/netdevice.h Tue Jul 5 22:58:33 2005
@@ -7,7 +7,7 @@
*
* Version: @(#)dev.h 1.0.10 08/12/93
*
- * Authors: Ross Biro, <bir7 at leland.Stanford.Edu>
+ * Authors: Ross Biro
* Fred N. van Kempen, <waltje at uWalt.NL.Mugnet.ORG>
* Corey Minyard <wf-rch!minyard at relay.EU.net>
* Donald J. Becker, <becker at cesdis.gsfc.nasa.gov>
Modified: linux-libc-headers/trunk/include/linux/netfilter.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/netfilter.h (original)
+++ linux-libc-headers/trunk/include/linux/netfilter.h Tue Jul 5 22:58:33 2005
@@ -7,7 +7,8 @@
#define NF_STOLEN 2
#define NF_QUEUE 3
#define NF_REPEAT 4
-#define NF_MAX_VERDICT NF_REPEAT
+#define NF_STOP 5
+#define NF_MAX_VERDICT NF_STOP
/* Generic cache responses from hook functions.
<= 0x2000 is used for protocol-flags. */
Modified: linux-libc-headers/trunk/include/linux/netfilter_arp/arp_tables.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/netfilter_arp/arp_tables.h (original)
+++ linux-libc-headers/trunk/include/linux/netfilter_arp/arp_tables.h Tue Jul 5 22:58:33 2005
@@ -146,7 +146,7 @@
#define ARPT_CONTINUE 0xFFFFFFFF
/* For standard target */
-#define ARPT_RETURN (-NF_MAX_VERDICT - 1)
+#define ARPT_RETURN (-NF_REPEAT - 1)
/* The argument to ARPT_SO_GET_INFO */
struct arpt_getinfo
Modified: linux-libc-headers/trunk/include/linux/netfilter_ipv4.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/netfilter_ipv4.h (original)
+++ linux-libc-headers/trunk/include/linux/netfilter_ipv4.h Tue Jul 5 22:58:33 2005
@@ -61,6 +61,9 @@
NF_IP_PRI_FILTER = 0,
NF_IP_PRI_NAT_SRC = 100,
NF_IP_PRI_SELINUX_LAST = 225,
+ NF_IP_PRI_CONNTRACK_HELPER = INT_MAX - 2,
+ NF_IP_PRI_NAT_SEQ_ADJUST = INT_MAX - 1,
+ NF_IP_PRI_CONNTRACK_CONFIRM = INT_MAX,
NF_IP_PRI_LAST = INT_MAX,
};
Modified: linux-libc-headers/trunk/include/linux/netfilter_ipv4/ip_conntrack_tcp.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/netfilter_ipv4/ip_conntrack_tcp.h (original)
+++ linux-libc-headers/trunk/include/linux/netfilter_ipv4/ip_conntrack_tcp.h Tue Jul 5 22:58:33 2005
@@ -23,13 +23,16 @@
/* SACK is permitted by the sender */
#define IP_CT_TCP_FLAG_SACK_PERM 0x02
+/* This sender sent FIN first */
+#define IP_CT_TCP_FLAG_CLOSE_INIT 0x03
+
struct ip_ct_tcp_state {
u_int32_t td_end; /* max of seq + len */
u_int32_t td_maxend; /* max of ack + max(win, 1) */
u_int32_t td_maxwin; /* max(win) */
u_int8_t td_scale; /* window scale factor */
u_int8_t loose; /* used when connection picked up from the middle */
- u_int8_t flags; /* per direction state flags */
+ u_int8_t flags; /* per direction options */
};
struct ip_ct_tcp
Modified: linux-libc-headers/trunk/include/linux/netfilter_ipv4/ip_tables.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/netfilter_ipv4/ip_tables.h (original)
+++ linux-libc-headers/trunk/include/linux/netfilter_ipv4/ip_tables.h Tue Jul 5 22:58:33 2005
@@ -158,7 +158,7 @@
#define IPT_CONTINUE 0xFFFFFFFF
/* For standard target */
-#define IPT_RETURN (-NF_MAX_VERDICT - 1)
+#define IPT_RETURN (-NF_REPEAT - 1)
/* TCP matching stuff */
struct ipt_tcp
Modified: linux-libc-headers/trunk/include/linux/netfilter_ipv6/ip6_tables.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/netfilter_ipv6/ip6_tables.h (original)
+++ linux-libc-headers/trunk/include/linux/netfilter_ipv6/ip6_tables.h Tue Jul 5 22:58:33 2005
@@ -159,7 +159,7 @@
#define IP6T_CONTINUE 0xFFFFFFFF
/* For standard target */
-#define IP6T_RETURN (-NF_MAX_VERDICT - 1)
+#define IP6T_RETURN (-NF_REPEAT - 1)
/* TCP matching stuff */
struct ip6t_tcp
Modified: linux-libc-headers/trunk/include/linux/nfs_fs_sb.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/nfs_fs_sb.h (original)
+++ linux-libc-headers/trunk/include/linux/nfs_fs_sb.h Tue Jul 5 22:58:33 2005
@@ -54,5 +54,6 @@
#define NFS_CAP_HARDLINKS (1U << 1)
#define NFS_CAP_SYMLINKS (1U << 2)
#define NFS_CAP_ACLS (1U << 3)
+#define NFS_CAP_ATOMIC_OPEN (1U << 4)
#endif
Modified: linux-libc-headers/trunk/include/linux/nfs_xdr.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/nfs_xdr.h (original)
+++ linux-libc-headers/trunk/include/linux/nfs_xdr.h Tue Jul 5 22:58:33 2005
@@ -565,6 +565,7 @@
__u32 count;
struct page ** pages; /* zero-copy data */
unsigned int pgbase; /* zero-copy data */
+ const __u32 * bitmask;
};
struct nfs4_readdir_res {
@@ -642,7 +643,5 @@
extern struct rpc_version nfs_version2;
extern struct rpc_version nfs_version3;
extern struct rpc_version nfs_version4;
-extern struct rpc_program nfs_program;
-extern struct rpc_stat nfs_rpcstat;
#endif
Modified: linux-libc-headers/trunk/include/linux/nfsd/state.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/nfsd/state.h (original)
+++ linux-libc-headers/trunk/include/linux/nfsd/state.h Tue Jul 5 22:58:33 2005
@@ -68,12 +68,6 @@
#define ZERO_STATEID(stateid) (!memcmp((stateid), &zerostateid, sizeof(stateid_t)))
#define ONE_STATEID(stateid) (!memcmp((stateid), &onestateid, sizeof(stateid_t)))
-/* Delegation recall states */
-#define NFS4_NO_RECALL 0x000
-#define NFS4_RECALL_IN_PROGRESS 0x001
-#define NFS4_RECALL_COMPLETE 0x002
-#define NFS4_REAP_DELEG 0x004
-
struct nfs4_cb_recall {
__u32 cbr_ident;
int cbr_trunc;
@@ -87,13 +81,11 @@
struct list_head dl_del_perfile; /* nfs4_file->fi_del_perfile */
struct list_head dl_del_perclnt; /* nfs4_client->cl_del_perclnt*/
struct list_head dl_recall_lru; /* delegation recalled */
- atomic_t dl_recall_cnt; /* resend cb_recall only once */
atomic_t dl_count; /* ref count */
- atomic_t dl_state; /* recall state */
struct nfs4_client *dl_client;
struct nfs4_file *dl_file;
struct file_lock *dl_flock;
- struct nfs4_stateid *dl_stp;
+ struct file *dl_vfs_file;
__u32 dl_type;
time_t dl_time;
struct nfs4_cb_recall dl_recall;
@@ -142,7 +134,6 @@
clientid_t cl_clientid; /* generated by server */
nfs4_verifier cl_confirm; /* generated by server */
struct nfs4_callback cl_callback; /* callback info */
- time_t cl_first_state; /* first state aquisition*/
atomic_t cl_count; /* ref count */
};
@@ -154,8 +145,6 @@
struct nfs4_client_reclaim {
struct list_head cr_strhash; /* hash by cr_name */
struct xdr_netobj cr_name; /* id generated by client */
- time_t cr_first_state; /* first state aquisition */
- __u32 cr_expired; /* boolean: lease expired? */
};
static inline void
@@ -259,7 +248,6 @@
struct nfs4_file * st_file;
stateid_t st_stateid;
struct file * st_vfs_file;
- int st_vfs_set;
unsigned long st_access_bmap;
unsigned long st_deny_bmap;
};
@@ -283,7 +271,7 @@
extern time_t nfs4_laundromat(void);
extern int nfsd4_renew(clientid_t *clid);
extern int nfs4_preprocess_stateid_op(struct svc_fh *current_fh,
- stateid_t *stateid, int flags);
+ stateid_t *stateid, int flags, struct file **filp);
extern int nfs4_share_conflict(struct svc_fh *current_fh,
unsigned int deny_type);
extern void nfs4_lock_state(void);
@@ -293,7 +281,8 @@
extern void put_nfs4_client(struct nfs4_client *clp);
extern void nfs4_free_stateowner(struct kref *kref);
extern void nfsd4_probe_callback(struct nfs4_client *clp);
-extern int nfsd4_cb_recall(struct nfs4_delegation *dp);
+extern void nfsd4_cb_recall(struct nfs4_delegation *dp);
+extern void nfs4_put_delegation(struct nfs4_delegation *dp);
static inline void
nfs4_put_stateowner(struct nfs4_stateowner *so)
Modified: linux-libc-headers/trunk/include/linux/nfsd/xdr4.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/nfsd/xdr4.h (original)
+++ linux-libc-headers/trunk/include/linux/nfsd/xdr4.h Tue Jul 5 22:58:33 2005
@@ -243,6 +243,7 @@
__u32 rd_length; /* request */
struct kvec rd_iov[RPCSVC_MAXPAGES];
int rd_vlen;
+ struct file *rd_filp;
struct svc_rqst *rd_rqstp; /* response */
struct svc_fh * rd_fhp; /* response */
Added: linux-libc-headers/trunk/include/linux/patchkey.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/linux/patchkey.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,34 @@
+/*
+ * <linux/patchkey.h> -- definition of _PATCHKEY macro
+ *
+ * Copyright (C) 2005 Stuart Brady
+ *
+ * This exists because awe_voice.h defined its own _PATCHKEY and it wasn't
+ * clear whether removing this would break anything in userspace.
+ *
+ * Do not include this file directly. Please use <sys/soundcard.h> instead.
+ * For kernel code, use <linux/soundcard.h>
+ */
+
+#ifndef _LINUX_PATCHKEY_H_INDIRECT
+#error "patchkey.h included directly"
+#endif
+
+#ifndef _LINUX_PATCHKEY_H
+#define _LINUX_PATCHKEY_H
+
+/* Endian macros. */
+# include <endian.h>
+#endif
+
+#if defined(__BYTE_ORDER)
+# if __BYTE_ORDER == __BIG_ENDIAN
+# define _PATCHKEY(id) (0xfd00|id)
+# elif __BYTE_ORDER == __LITTLE_ENDIAN
+# define _PATCHKEY(id) ((id<<8)|0x00fd)
+# else
+# error "could not determine byte order"
+# endif
+#endif
+
+#endif /* _LINUX_PATCHKEY_H */
Modified: linux-libc-headers/trunk/include/linux/pci_ids.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/pci_ids.h (original)
+++ linux-libc-headers/trunk/include/linux/pci_ids.h Tue Jul 5 22:58:33 2005
@@ -352,10 +352,21 @@
#define PCI_DEVICE_ID_ATI_RS300_133 0x5831
#define PCI_DEVICE_ID_ATI_RS300_166 0x5832
#define PCI_DEVICE_ID_ATI_RS300_200 0x5833
+#define PCI_DEVICE_ID_ATI_RS350_100 0x7830
+#define PCI_DEVICE_ID_ATI_RS350_133 0x7831
+#define PCI_DEVICE_ID_ATI_RS350_166 0x7832
+#define PCI_DEVICE_ID_ATI_RS350_200 0x7833
+#define PCI_DEVICE_ID_ATI_RS400_100 0x5a30
+#define PCI_DEVICE_ID_ATI_RS400_133 0x5a31
+#define PCI_DEVICE_ID_ATI_RS400_166 0x5a32
+#define PCI_DEVICE_ID_ATI_RS400_200 0x5a33
+#define PCI_DEVICE_ID_ATI_RS480 0x5950
/* ATI IXP Chipset */
#define PCI_DEVICE_ID_ATI_IXP200_IDE 0x4349
#define PCI_DEVICE_ID_ATI_IXP300_IDE 0x4369
+#define PCI_DEVICE_ID_ATI_IXP300_SATA 0x436e
#define PCI_DEVICE_ID_ATI_IXP400_IDE 0x4376
+#define PCI_DEVICE_ID_ATI_IXP400_SATA 0x4379
#define PCI_VENDOR_ID_VLSI 0x1004
#define PCI_DEVICE_ID_VLSI_82C592 0x0005
@@ -386,6 +397,8 @@
#define PCI_DEVICE_ID_NS_SCx200_VIDEO 0x0504
#define PCI_DEVICE_ID_NS_SCx200_XBUS 0x0505
#define PCI_DEVICE_ID_NS_SC1100_BRIDGE 0x0510
+#define PCI_DEVICE_ID_NS_SC1100_SMI 0x0511
+#define PCI_DEVICE_ID_NS_SC1100_XBUS 0x0515
#define PCI_DEVICE_ID_NS_87410 0xd001
#define PCI_VENDOR_ID_TSENG 0x100c
@@ -506,6 +519,7 @@
#define PCI_DEVICE_ID_AMD_OPUS_7449 0x7449
# define PCI_DEVICE_ID_AMD_VIPER_7449 PCI_DEVICE_ID_AMD_OPUS_7449
#define PCI_DEVICE_ID_AMD_8111_LAN 0x7462
+#define PCI_DEVICE_ID_AMD_8111_LPC 0x7468
#define PCI_DEVICE_ID_AMD_8111_IDE 0x7469
#define PCI_DEVICE_ID_AMD_8111_SMBUS2 0x746a
#define PCI_DEVICE_ID_AMD_8111_SMBUS 0x746b
@@ -695,7 +709,10 @@
#define PCI_DEVICE_ID_HP_SX1000_IOC 0x127c
#define PCI_DEVICE_ID_HP_DIVA_EVEREST 0x1282
#define PCI_DEVICE_ID_HP_DIVA_AUX 0x1290
+#define PCI_DEVICE_ID_HP_DIVA_RMP3 0x1301
#define PCI_DEVICE_ID_HP_CISSA 0x3220
+#define PCI_DEVICE_ID_HP_CISSB 0x3230
+#define PCI_DEVICE_ID_HP_ZX2_IOC 0x4031
#define PCI_VENDOR_ID_PCTECH 0x1042
#define PCI_DEVICE_ID_PCTECH_RZ1000 0x1000
@@ -753,6 +770,7 @@
#define PCI_DEVICE_ID_TI_1251B 0xac1f
#define PCI_DEVICE_ID_TI_4410 0xac41
#define PCI_DEVICE_ID_TI_4451 0xac42
+#define PCI_DEVICE_ID_TI_4510 0xac44
#define PCI_DEVICE_ID_TI_4520 0xac46
#define PCI_DEVICE_ID_TI_1410 0xac50
#define PCI_DEVICE_ID_TI_1420 0xac51
@@ -792,6 +810,7 @@
#define PCI_DEVICE_ID_MOTOROLA_HAWK 0x4803
#define PCI_DEVICE_ID_MOTOROLA_CPX8216 0x4806
#define PCI_DEVICE_ID_MOTOROLA_HARRIER 0x480b
+#define PCI_DEVICE_ID_MOTOROLA_MPC5200 0x5803
#define PCI_VENDOR_ID_PROMISE 0x105a
#define PCI_DEVICE_ID_PROMISE_20265 0x0d30
@@ -835,6 +854,7 @@
#define PCI_DEVICE_ID_MYLEX_DAC960_LA 0x0020
#define PCI_DEVICE_ID_MYLEX_DAC960_LP 0x0050
#define PCI_DEVICE_ID_MYLEX_DAC960_BA 0xBA56
+#define PCI_DEVICE_ID_MYLEX_DAC960_GEM 0xB166
#define PCI_VENDOR_ID_PICOP 0x1066
#define PCI_DEVICE_ID_PICOP_PT86C52X 0x0001
@@ -854,6 +874,7 @@
#define PCI_DEVICE_ID_APPLE_KL_USB_P 0x0026
#define PCI_DEVICE_ID_APPLE_UNI_N_AGP_P 0x0027
#define PCI_DEVICE_ID_APPLE_UNI_N_AGP15 0x002d
+#define PCI_DEVICE_ID_APPLE_UNI_N_PCI15 0x002e
#define PCI_DEVICE_ID_APPLE_UNI_N_FW2 0x0030
#define PCI_DEVICE_ID_APPLE_UNI_N_GMAC2 0x0032
#define PCI_DEVIEC_ID_APPLE_UNI_N_ATA 0x0033
@@ -861,7 +882,13 @@
#define PCI_DEVICE_ID_APPLE_IPID_ATA100 0x003b
#define PCI_DEVICE_ID_APPLE_KEYLARGO_I 0x003e
#define PCI_DEVICE_ID_APPLE_K2_ATA100 0x0043
+#define PCI_DEVICE_ID_APPLE_U3_AGP 0x004b
#define PCI_DEVICE_ID_APPLE_K2_GMAC 0x004c
+#define PCI_DEVICE_ID_APPLE_SH_ATA 0x0050
+#define PCI_DEVICE_ID_APPLE_SH_SUNGEM 0x0051
+#define PCI_DEVICE_ID_APPLE_SH_FW 0x0052
+#define PCI_DEVICE_ID_APPLE_U3L_AGP 0x0058
+#define PCI_DEVICE_ID_APPLE_U3H_AGP 0x0059
#define PCI_DEVICE_ID_APPLE_TIGON3 0x1645
#define PCI_VENDOR_ID_YAMAHA 0x1073
@@ -1091,6 +1118,7 @@
#define PCI_DEVICE_ID_NVIDIA_TNT 0x0020
#define PCI_DEVICE_ID_NVIDIA_TNT2 0x0028
#define PCI_DEVICE_ID_NVIDIA_UTNT2 0x0029
+#define PCI_DEVICE_ID_NVIDIA_TNT_UNKNOWN 0x002a
#define PCI_DEVICE_ID_NVIDIA_VTNT2 0x002C
#define PCI_DEVICE_ID_NVIDIA_UVTNT2 0x002D
#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_IDE 0x0035
@@ -1098,6 +1126,12 @@
#define PCI_DEVICE_ID_NVIDIA_NVENET_10 0x0037
#define PCI_DEVICE_ID_NVIDIA_NVENET_11 0x0038
#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA2 0x003e
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6800_ULTRA 0x0040
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6800 0x0041
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6800_LE 0x0042
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6800_GT 0x0045
+#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_4000 0x004E
+#define PCI_DEVICE_ID_NVIDIA_NFORCE4_SMBUS 0x0052
#define PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_IDE 0x0053
#define PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_SATA 0x0054
#define PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_SATA2 0x0055
@@ -1114,6 +1148,12 @@
#define PCI_DEVICE_ID_NVIDIA_NVENET_5 0x008c
#define PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA 0x008e
#define PCI_DEVICE_ID_NVIDIA_ITNT2 0x00A0
+#define PCI_DEVICE_ID_GEFORCE_6800A 0x00c1
+#define PCI_DEVICE_ID_GEFORCE_6800A_LE 0x00c2
+#define PCI_DEVICE_ID_GEFORCE_GO_6800 0x00c8
+#define PCI_DEVICE_ID_GEFORCE_GO_6800_ULTRA 0x00c9
+#define PCI_DEVICE_ID_QUADRO_FX_GO1400 0x00cc
+#define PCI_DEVICE_ID_QUADRO_FX_1400 0x00ce
#define PCI_DEVICE_ID_NVIDIA_NFORCE3 0x00d1
#define PCI_DEVICE_ID_NVIDIA_MCP3_AUDIO 0x00da
#define PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS 0x00d4
@@ -1134,21 +1174,43 @@
#define PCI_DEVICE_ID_NVIDIA_GEFORCE2_MX2 0x0111
#define PCI_DEVICE_ID_NVIDIA_GEFORCE2_GO 0x0112
#define PCI_DEVICE_ID_NVIDIA_QUADRO2_MXR 0x0113
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6600_GT 0x0140
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6600 0x0141
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6610_XL 0x0145
+#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_540 0x014E
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6200 0x014F
#define PCI_DEVICE_ID_NVIDIA_GEFORCE2_GTS 0x0150
#define PCI_DEVICE_ID_NVIDIA_GEFORCE2_GTS2 0x0151
#define PCI_DEVICE_ID_NVIDIA_GEFORCE2_ULTRA 0x0152
#define PCI_DEVICE_ID_NVIDIA_QUADRO2_PRO 0x0153
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6200_TURBOCACHE 0x0161
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_6200 0x0164
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_6250 0x0166
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_6200_1 0x0167
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_6250_1 0x0168
#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_460 0x0170
#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_440 0x0171
#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_420 0x0172
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_440_SE 0x0173
#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_440_GO 0x0174
#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_420_GO 0x0175
#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_420_GO_M32 0x0176
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_460_GO 0x0177
#define PCI_DEVICE_ID_NVIDIA_QUADRO4_500XGL 0x0178
#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_440_GO_M64 0x0179
#define PCI_DEVICE_ID_NVIDIA_QUADRO4_200 0x017A
#define PCI_DEVICE_ID_NVIDIA_QUADRO4_550XGL 0x017B
#define PCI_DEVICE_ID_NVIDIA_QUADRO4_500_GOGL 0x017C
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_410_GO_M16 0x017D
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_440_8X 0x0181
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_440SE_8X 0x0182
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_420_8X 0x0183
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_448_GO 0x0186
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_488_GO 0x0187
+#define PCI_DEVICE_ID_NVIDIA_QUADRO4_580_XGL 0x0188
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_MAC 0x0189
+#define PCI_DEVICE_ID_NVIDIA_QUADRO4_280_NVS 0x018A
+#define PCI_DEVICE_ID_NVIDIA_QUADRO4_380_XGL 0x018B
#define PCI_DEVICE_ID_NVIDIA_IGEFORCE2 0x01a0
#define PCI_DEVICE_ID_NVIDIA_NFORCE 0x01a4
#define PCI_DEVICE_ID_NVIDIA_MCP1_AUDIO 0x01b1
@@ -1160,13 +1222,67 @@
#define PCI_DEVICE_ID_NVIDIA_GEFORCE3_1 0x0201
#define PCI_DEVICE_ID_NVIDIA_GEFORCE3_2 0x0202
#define PCI_DEVICE_ID_NVIDIA_QUADRO_DDC 0x0203
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6800B 0x0211
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6800B_LE 0x0212
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6800B_GT 0x0215
#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4600 0x0250
#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4400 0x0251
#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4200 0x0253
#define PCI_DEVICE_ID_NVIDIA_QUADRO4_900XGL 0x0258
#define PCI_DEVICE_ID_NVIDIA_QUADRO4_750XGL 0x0259
#define PCI_DEVICE_ID_NVIDIA_QUADRO4_700XGL 0x025B
-#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO_5200 0x0329
+#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE 0x0265
+#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA 0x0266
+#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA2 0x0267
+#define PCI_DEVICE_ID_NVIDIA_NVENET_12 0x0268
+#define PCI_DEVICE_ID_NVIDIA_NVENET_13 0x0269
+#define PCI_DEVICE_ID_NVIDIA_MCP51_AUDIO 0x026B
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800 0x0280
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800_8X 0x0281
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800SE 0x0282
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_4200_GO 0x0286
+#define PCI_DEVICE_ID_NVIDIA_QUADRO4_980_XGL 0x0288
+#define PCI_DEVICE_ID_NVIDIA_QUADRO4_780_XGL 0x0289
+#define PCI_DEVICE_ID_NVIDIA_QUADRO4_700_GOGL 0x028C
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5800_ULTRA 0x0301
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5800 0x0302
+#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_2000 0x0308
+#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_1000 0x0309
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5600_ULTRA 0x0311
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5600 0x0312
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5600SE 0x0314
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5600 0x031A
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5650 0x031B
+#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_GO700 0x031C
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5200 0x0320
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5200_ULTRA 0x0321
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5200_1 0x0322
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5200SE 0x0323
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5200 0x0324
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5250 0x0325
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5500 0x0326
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5100 0x0327
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5250_32 0x0328
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO_5200 0x0329
+#define PCI_DEVICE_ID_NVIDIA_QUADRO_NVS_280_PCI 0x032A
+#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_500 0x032B
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5300 0x032C
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5100 0x032D
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5900_ULTRA 0x0330
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5900 0x0331
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5900XT 0x0332
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5950_ULTRA 0x0333
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5900ZT 0x0334
+#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_3000 0x0338
+#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_700 0x033F
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5700_ULTRA 0x0341
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5700 0x0342
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5700LE 0x0343
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5700VE 0x0344
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5700_1 0x0347
+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5700_2 0x0348
+#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_GO1000 0x034C
+#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_1100 0x034E
#define PCI_VENDOR_ID_IMS 0x10e0
#define PCI_DEVICE_ID_IMS_8849 0x8849
@@ -1418,6 +1534,10 @@
#define PCI_DEVICE_ID_DIGI_DF_M_E 0x0071
#define PCI_DEVICE_ID_DIGI_DF_M_IOM2_A 0x0072
#define PCI_DEVICE_ID_DIGI_DF_M_A 0x0073
+#define PCI_DEVICE_ID_NEO_2DB9 0x00C8
+#define PCI_DEVICE_ID_NEO_2DB9PRI 0x00C9
+#define PCI_DEVICE_ID_NEO_2RJ45 0x00CA
+#define PCI_DEVICE_ID_NEO_2RJ45PRI 0x00CB
#define PCI_VENDOR_ID_MUTECH 0x1159
#define PCI_DEVICE_ID_MUTECH_MV1000 0x0001
@@ -1497,6 +1617,9 @@
#define PCI_DEVICE_ID_ARTOP_AEC7612D 0x8040
#define PCI_DEVICE_ID_ARTOP_AEC7612SUW 0x8050
#define PCI_DEVICE_ID_ARTOP_8060 0x8060
+#define PCI_DEVICE_ID_ARTOP_AEC67160 0x8080
+#define PCI_DEVICE_ID_ARTOP_AEC67160_2 0x8081
+#define PCI_DEVICE_ID_ARTOP_AEC67162 0x808a
#define PCI_VENDOR_ID_ZEITNET 0x1193
#define PCI_DEVICE_ID_ZEITNET_1221 0x0001
@@ -1609,6 +1732,10 @@
#define PCI_DEVICE_ID_PC300_TE_M_2 0x0320
#define PCI_DEVICE_ID_PC300_TE_M_1 0x0321
+/* Allied Telesyn */
+#define PCI_VENDOR_ID_AT 0x1259
+#define PCI_SUBDEVICE_ID_AT_2701FX 0x2703
+
#define PCI_VENDOR_ID_ESSENTIAL 0x120f
#define PCI_DEVICE_ID_ESSENTIAL_ROADRUNNER 0x0001
@@ -1652,6 +1779,11 @@
#define PCI_DEVICE_ID_OPTIBASE_VPLEXCC 0x2120
#define PCI_DEVICE_ID_OPTIBASE_VQUEST 0x2130
+/* Allied Telesyn */
+#define PCI_VENDOR_ID_AT 0x1259
+#define PCI_SUBDEVICE_ID_AT_2700FX 0x2701
+#define PCI_SUBDEVICE_ID_AT_2701FX 0x2703
+
#define PCI_VENDOR_ID_ESS 0x125d
#define PCI_DEVICE_ID_ESS_ESS1968 0x1968
#define PCI_DEVICE_ID_ESS_AUDIOPCI 0x1969
@@ -1789,6 +1921,7 @@
#define PCI_DEVICE_ID_SEALEVEL_UCOMM232 0x7202
#define PCI_DEVICE_ID_SEALEVEL_COMM4 0x7401
#define PCI_DEVICE_ID_SEALEVEL_COMM8 0x7801
+#define PCI_DEVICE_ID_SEALEVEL_UCOMM8 0x7804
#define PCI_VENDOR_ID_HYPERCOPE 0x1365
#define PCI_DEVICE_ID_HYPERCOPE_PLX 0x9050
@@ -1905,6 +2038,8 @@
#define PCI_DEVICE_ID_OXSEMI_16PCI954PP 0x9513
#define PCI_DEVICE_ID_OXSEMI_16PCI952 0x9521
+#define PCI_VENDOR_ID_SAMSUNG 0x144d
+
#define PCI_VENDOR_ID_AIRONET 0x14b9
#define PCI_DEVICE_ID_AIRONET_4800_1 0x0001
#define PCI_DEVICE_ID_AIRONET_4800 0x4500 // values switched? see
@@ -1935,12 +2070,15 @@
#define PCI_DEVICE_ID_AFAVLAB_P030 0x2182
#define PCI_VENDOR_ID_BROADCOM 0x14e4
+#define PCI_DEVICE_ID_TIGON3_5752 0x1600
+#define PCI_DEVICE_ID_TIGON3_5752M 0x1601
#define PCI_DEVICE_ID_TIGON3_5700 0x1644
#define PCI_DEVICE_ID_TIGON3_5701 0x1645
#define PCI_DEVICE_ID_TIGON3_5702 0x1646
#define PCI_DEVICE_ID_TIGON3_5703 0x1647
#define PCI_DEVICE_ID_TIGON3_5704 0x1648
#define PCI_DEVICE_ID_TIGON3_5704S_2 0x1649
+#define PCI_DEVICE_ID_NX2_5706 0x164a
#define PCI_DEVICE_ID_TIGON3_5702FE 0x164d
#define PCI_DEVICE_ID_TIGON3_5705 0x1653
#define PCI_DEVICE_ID_TIGON3_5705_2 0x1654
@@ -1960,6 +2098,7 @@
#define PCI_DEVICE_ID_TIGON3_5702X 0x16a6
#define PCI_DEVICE_ID_TIGON3_5703X 0x16a7
#define PCI_DEVICE_ID_TIGON3_5704S 0x16a8
+#define PCI_DEVICE_ID_NX2_5706S 0x16aa
#define PCI_DEVICE_ID_TIGON3_5702A3 0x16c6
#define PCI_DEVICE_ID_TIGON3_5703A3 0x16c7
#define PCI_DEVICE_ID_TIGON3_5781 0x16dd
@@ -1995,6 +2134,8 @@
#define PCI_DEVICE_ID_MELLANOX_TAVOR 0x5a44
#define PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT 0x6278
#define PCI_DEVICE_ID_MELLANOX_ARBEL 0x6282
+#define PCI_DEVICE_ID_MELLANOX_SINAI_OLD 0x5e8c
+#define PCI_DEVICE_ID_MELLANOX_SINAI 0x6274
#define PCI_VENDOR_ID_PDC 0x15e9
#define PCI_DEVICE_ID_PDC_1841 0x1841
@@ -2032,13 +2173,15 @@
#define PCI_VENDOR_ID_S2IO 0x17d5
#define PCI_DEVICE_ID_S2IO_WIN 0x5731
#define PCI_DEVICE_ID_S2IO_UNI 0x5831
+#define PCI_DEVICE_ID_HERC_WIN 0x5732
+#define PCI_DEVICE_ID_HERC_UNI 0x5832
#define PCI_VENDOR_ID_INFINICON 0x1820
#define PCI_VENDOR_ID_TOPSPIN 0x1867
-#define PCI_VENDOR_ID_ARC 0x192E
-#define PCI_DEVICE_ID_ARC_EHCI 0x0101
+#define PCI_VENDOR_ID_TDI 0x192E
+#define PCI_DEVICE_ID_TDI_EHCI 0x0101
#define PCI_VENDOR_ID_SYMPHONY 0x1c1c
#define PCI_DEVICE_ID_SYMPHONY_101 0x0001
@@ -2240,6 +2383,8 @@
#define PCI_DEVICE_ID_INTEL_82915G_IG 0x2582
#define PCI_DEVICE_ID_INTEL_82915GM_HB 0x2590
#define PCI_DEVICE_ID_INTEL_82915GM_IG 0x2592
+#define PCI_DEVICE_ID_INTEL_82945G_HB 0x2770
+#define PCI_DEVICE_ID_INTEL_82945G_IG 0x2772
#define PCI_DEVICE_ID_INTEL_ICH6_0 0x2640
#define PCI_DEVICE_ID_INTEL_ICH6_1 0x2641
#define PCI_DEVICE_ID_INTEL_ICH6_2 0x2642
@@ -2260,11 +2405,31 @@
#define PCI_DEVICE_ID_INTEL_ICH6_17 0x266d
#define PCI_DEVICE_ID_INTEL_ICH6_18 0x266e
#define PCI_DEVICE_ID_INTEL_ICH6_19 0x266f
+#define PCI_DEVICE_ID_INTEL_ESB2_0 0x2670
+#define PCI_DEVICE_ID_INTEL_ESB2_1 0x2680
+#define PCI_DEVICE_ID_INTEL_ESB2_2 0x2681
+#define PCI_DEVICE_ID_INTEL_ESB2_3 0x2682
+#define PCI_DEVICE_ID_INTEL_ESB2_4 0x2683
+#define PCI_DEVICE_ID_INTEL_ESB2_5 0x2688
+#define PCI_DEVICE_ID_INTEL_ESB2_6 0x2689
+#define PCI_DEVICE_ID_INTEL_ESB2_7 0x268a
+#define PCI_DEVICE_ID_INTEL_ESB2_8 0x268b
+#define PCI_DEVICE_ID_INTEL_ESB2_9 0x268c
+#define PCI_DEVICE_ID_INTEL_ESB2_10 0x2690
+#define PCI_DEVICE_ID_INTEL_ESB2_11 0x2692
+#define PCI_DEVICE_ID_INTEL_ESB2_12 0x2694
+#define PCI_DEVICE_ID_INTEL_ESB2_13 0x2696
+#define PCI_DEVICE_ID_INTEL_ESB2_14 0x2698
+#define PCI_DEVICE_ID_INTEL_ESB2_15 0x2699
+#define PCI_DEVICE_ID_INTEL_ESB2_16 0x269a
+#define PCI_DEVICE_ID_INTEL_ESB2_17 0x269b
+#define PCI_DEVICE_ID_INTEL_ESB2_18 0x269e
#define PCI_DEVICE_ID_INTEL_ICH7_0 0x27b8
-#define PCI_DEVICE_ID_INTEL_ICH7_1 0x27b1
+#define PCI_DEVICE_ID_INTEL_ICH7_1 0x27b9
#define PCI_DEVICE_ID_INTEL_ICH7_2 0x27c0
#define PCI_DEVICE_ID_INTEL_ICH7_3 0x27c1
-#define PCI_DEVICE_ID_INTEL_ICH7_4 0x27c2
+#define PCI_DEVICE_ID_INTEL_ICH7_30 0x27b0
+#define PCI_DEVICE_ID_INTEL_ICH7_31 0x27bd
#define PCI_DEVICE_ID_INTEL_ICH7_5 0x27c4
#define PCI_DEVICE_ID_INTEL_ICH7_6 0x27c5
#define PCI_DEVICE_ID_INTEL_ICH7_7 0x27c8
@@ -2285,6 +2450,18 @@
#define PCI_DEVICE_ID_INTEL_ICH7_22 0x27e0
#define PCI_DEVICE_ID_INTEL_ICH7_23 0x27e2
#define PCI_DEVICE_ID_INTEL_82855PM_HB 0x3340
+#define PCI_DEVICE_ID_INTEL_ESB2_19 0x3500
+#define PCI_DEVICE_ID_INTEL_ESB2_20 0x3501
+#define PCI_DEVICE_ID_INTEL_ESB2_21 0x3504
+#define PCI_DEVICE_ID_INTEL_ESB2_22 0x3505
+#define PCI_DEVICE_ID_INTEL_ESB2_23 0x350c
+#define PCI_DEVICE_ID_INTEL_ESB2_24 0x350d
+#define PCI_DEVICE_ID_INTEL_ESB2_25 0x3510
+#define PCI_DEVICE_ID_INTEL_ESB2_26 0x3511
+#define PCI_DEVICE_ID_INTEL_ESB2_27 0x3514
+#define PCI_DEVICE_ID_INTEL_ESB2_28 0x3515
+#define PCI_DEVICE_ID_INTEL_ESB2_29 0x3518
+#define PCI_DEVICE_ID_INTEL_ESB2_30 0x3519
#define PCI_DEVICE_ID_INTEL_82830_HB 0x3575
#define PCI_DEVICE_ID_INTEL_82830_CGC 0x3577
#define PCI_DEVICE_ID_INTEL_82855GM_HB 0x3580
@@ -2396,6 +2573,7 @@
#define PCI_DEVICE_ID_ADAPTEC2_7899B 0x00c1
#define PCI_DEVICE_ID_ADAPTEC2_7899D 0x00c3
#define PCI_DEVICE_ID_ADAPTEC2_7899P 0x00cf
+#define PCI_DEVICE_ID_ADAPTEC2_SCAMP 0x0503
#define PCI_VENDOR_ID_ATRONICS 0x907f
#define PCI_DEVICE_ID_ATRONICS_2015 0x2015
@@ -2405,13 +2583,15 @@
#define PCI_VENDOR_ID_NETMOS 0x9710
#define PCI_DEVICE_ID_NETMOS_9705 0x9705
+#define PCI_DEVICE_ID_NETMOS_9715 0x9715
#define PCI_DEVICE_ID_NETMOS_9735 0x9735
+#define PCI_DEVICE_ID_NETMOS_9745 0x9745
+#define PCI_DEVICE_ID_NETMOS_9755 0x9755
#define PCI_DEVICE_ID_NETMOS_9805 0x9805
#define PCI_DEVICE_ID_NETMOS_9815 0x9815
#define PCI_DEVICE_ID_NETMOS_9835 0x9835
+#define PCI_DEVICE_ID_NETMOS_9845 0x9845
#define PCI_DEVICE_ID_NETMOS_9855 0x9855
-#define PCI_DEVICE_ID_NETMOS_9755 0x9755
-#define PCI_DEVICE_ID_NETMOS_9715 0x9715
#define PCI_SUBVENDOR_ID_EXSYS 0xd84d
#define PCI_SUBDEVICE_ID_EXSYS_4014 0x4014
Modified: linux-libc-headers/trunk/include/linux/pcieport_if.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/pcieport_if.h (original)
+++ linux-libc-headers/trunk/include/linux/pcieport_if.h Tue Jul 5 22:58:33 2005
@@ -61,7 +61,7 @@
int (*probe) (struct pcie_device *dev,
const struct pcie_port_service_id *id);
void (*remove) (struct pcie_device *dev);
- int (*suspend) (struct pcie_device *dev, __u32 state);
+ int (*suspend) (struct pcie_device *dev, pm_message_t state);
int (*resume) (struct pcie_device *dev);
const struct pcie_port_service_id *id_table;
Modified: linux-libc-headers/trunk/include/linux/personality.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/personality.h (original)
+++ linux-libc-headers/trunk/include/linux/personality.h Tue Jul 5 22:58:33 2005
@@ -18,6 +18,7 @@
* These occupy the top three bytes.
*/
enum {
+ ADDR_NO_RANDOMIZE = 0x0040000, /* disable randomization of VA space */
FDPIC_FUNCPTRS = 0x0080000, /* userspace function ptrs point to descriptors
* (signal handling)
*/
@@ -35,7 +36,7 @@
* Security-relevant compatibility flags that must be
* cleared upon setuid or setgid exec:
*/
-#define PER_CLEAR_ON_SETID (READ_IMPLIES_EXEC)
+#define PER_CLEAR_ON_SETID (READ_IMPLIES_EXEC|ADDR_NO_RANDOMIZE)
/*
* Personality types.
Modified: linux-libc-headers/trunk/include/linux/pkt_cls.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/pkt_cls.h (original)
+++ linux-libc-headers/trunk/include/linux/pkt_cls.h Tue Jul 5 22:58:33 2005
@@ -82,6 +82,7 @@
TCA_ACT_KIND,
TCA_ACT_OPTIONS,
TCA_ACT_INDEX,
+ TCA_ACT_STATS,
__TCA_ACT_MAX
};
@@ -319,4 +320,101 @@
#define TCA_TCINDEX_MAX (__TCA_TCINDEX_MAX - 1)
+/* Basic filter */
+
+enum
+{
+ TCA_BASIC_UNSPEC,
+ TCA_BASIC_CLASSID,
+ TCA_BASIC_EMATCHES,
+ TCA_BASIC_ACT,
+ TCA_BASIC_POLICE,
+ __TCA_BASIC_MAX
+};
+
+#define TCA_BASIC_MAX (__TCA_BASIC_MAX - 1)
+
+/* Extended Matches */
+
+struct tcf_ematch_tree_hdr
+{
+ __u16 nmatches;
+ __u16 progid;
+};
+
+enum
+{
+ TCA_EMATCH_TREE_UNSPEC,
+ TCA_EMATCH_TREE_HDR,
+ TCA_EMATCH_TREE_LIST,
+ __TCA_EMATCH_TREE_MAX
+};
+#define TCA_EMATCH_TREE_MAX (__TCA_EMATCH_TREE_MAX - 1)
+
+struct tcf_ematch_hdr
+{
+ __u16 matchid;
+ __u16 kind;
+ __u16 flags;
+ __u16 pad; /* currently unused */
+};
+
+/* 0 1
+ * 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5
+ * +-----------------------+-+-+---+
+ * | Unused |S|I| R |
+ * +-----------------------+-+-+---+
+ *
+ * R(2) ::= relation to next ematch
+ * where: 0 0 END (last ematch)
+ * 0 1 AND
+ * 1 0 OR
+ * 1 1 Unused (invalid)
+ * I(1) ::= invert result
+ * S(1) ::= simple payload
+ */
+#define TCF_EM_REL_END 0
+#define TCF_EM_REL_AND (1<<0)
+#define TCF_EM_REL_OR (1<<1)
+#define TCF_EM_INVERT (1<<2)
+#define TCF_EM_SIMPLE (1<<3)
+
+#define TCF_EM_REL_MASK 3
+#define TCF_EM_REL_VALID(v) (((v) & TCF_EM_REL_MASK) != TCF_EM_REL_MASK)
+
+enum
+{
+ TCF_LAYER_LINK,
+ TCF_LAYER_NETWORK,
+ TCF_LAYER_TRANSPORT,
+ __TCF_LAYER_MAX
+};
+#define TCF_LAYER_MAX (__TCF_LAYER_MAX - 1)
+
+/* Ematch type assignments
+ * 1..32767 Reserved for ematches inside kernel tree
+ * 32768..65535 Free to use, not reliable
+ */
+enum
+{
+ TCF_EM_CONTAINER,
+ TCF_EM_CMP,
+ TCF_EM_NBYTE,
+ TCF_EM_U32,
+ TCF_EM_META,
+ __TCF_EM_MAX
+};
+
+enum
+{
+ TCF_EM_PROG_TC
+};
+
+enum
+{
+ TCF_EM_OPND_EQ,
+ TCF_EM_OPND_GT,
+ TCF_EM_OPND_LT
+};
+
#endif
Modified: linux-libc-headers/trunk/include/linux/pkt_sched.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/pkt_sched.h (original)
+++ linux-libc-headers/trunk/include/linux/pkt_sched.h Tue Jul 5 22:58:33 2005
@@ -430,6 +430,7 @@
TCA_NETEM_UNSPEC,
TCA_NETEM_CORR,
TCA_NETEM_DELAY_DIST,
+ TCA_NETEM_REORDER,
__TCA_NETEM_MAX,
};
@@ -440,7 +441,7 @@
__u32 latency; /* added delay (us) */
__u32 limit; /* fifo limit (packets) */
__u32 loss; /* random packet loss (0=none ~0=100%) */
- __u32 gap; /* re-ordering gap (0 for delay all) */
+ __u32 gap; /* re-ordering gap (0 for none) */
__u32 duplicate; /* random packet dup (0=none ~0=100%) */
__u32 jitter; /* random jitter in latency (us) */
};
@@ -452,6 +453,12 @@
__u32 dup_corr; /* duplicate correlation */
};
+struct tc_netem_reorder
+{
+ __u32 probability;
+ __u32 correlation;
+};
+
#define NETEM_DIST_SCALE 8192
#endif
Modified: linux-libc-headers/trunk/include/linux/pmu.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/pmu.h (original)
+++ linux-libc-headers/trunk/include/linux/pmu.h Tue Jul 5 22:58:33 2005
@@ -120,15 +120,15 @@
/* no param */
#define PMU_IOC_SLEEP _IO('B', 0)
-/* out param: u32* backlight value: 0 to 15 */
+/* out param: __u32* backlight value: 0 to 15 */
#define PMU_IOC_GET_BACKLIGHT _IOR('B', 1, size_t)
/* in param: __u32 backlight value: 0 to 15 */
#define PMU_IOC_SET_BACKLIGHT _IOW('B', 2, size_t)
-/* out param: u32* PMU model */
+/* out param: __u32* PMU model */
#define PMU_IOC_GET_MODEL _IOR('B', 3, size_t)
-/* out param: u32* has_adb: 0 or 1 */
+/* out param: __u32* has_adb: 0 or 1 */
#define PMU_IOC_HAS_ADB _IOR('B', 4, size_t)
-/* out param: u32* can_sleep: 0 or 1 */
+/* out param: __u32* can_sleep: 0 or 1 */
#define PMU_IOC_CAN_SLEEP _IOR('B', 5, size_t)
/* no param, but historically was _IOR('B', 6, 0), meaning 4 bytes */
#define PMU_IOC_GRAB_BACKLIGHT _IOR('B', 6, size_t)
Modified: linux-libc-headers/trunk/include/linux/posix-timers.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/posix-timers.h (original)
+++ linux-libc-headers/trunk/include/linux/posix-timers.h Tue Jul 5 22:58:33 2005
@@ -4,26 +4,27 @@
struct k_clock {
int res; /* in nano seconds */
+ int (*clock_getres) (clockid_t which_clock, struct timespec *tp);
struct k_clock_abs *abs_struct;
- int (*clock_set) (struct timespec * tp);
- int (*clock_get) (struct timespec * tp);
+ int (*clock_set) (clockid_t which_clock, struct timespec * tp);
+ int (*clock_get) (clockid_t which_clock, struct timespec * tp);
int (*timer_create) (struct k_itimer *timer);
- int (*nsleep) (int which_clock, int flags,
- struct timespec * t);
+ int (*nsleep) (clockid_t which_clock, int flags, struct timespec *);
int (*timer_set) (struct k_itimer * timr, int flags,
struct itimerspec * new_setting,
struct itimerspec * old_setting);
int (*timer_del) (struct k_itimer * timr);
+#define TIMER_RETRY 1
void (*timer_get) (struct k_itimer * timr,
struct itimerspec * cur_setting);
};
-void register_posix_clock(int clock_id, struct k_clock *new_clock);
+void register_posix_clock(clockid_t clock_id, struct k_clock *new_clock);
/* Error handlers for timer_create, nanosleep and settime */
int do_posix_clock_notimer_create(struct k_itimer *timer);
-int do_posix_clock_nonanosleep(int which_clock, int flags, struct timespec * t);
-int do_posix_clock_nosettime(struct timespec *tp);
+int do_posix_clock_nonanosleep(clockid_t, int flags, struct timespec *);
+int do_posix_clock_nosettime(clockid_t, struct timespec *tp);
/* function to call to trigger timer event */
int posix_timer_event(struct k_itimer *timr, int si_private);
@@ -39,12 +40,32 @@
#define posix_bump_timer(timr, now) \
do { \
long delta, orun; \
- delta = now.jiffies - (timr)->it_timer.expires; \
+ delta = now.jiffies - (timr)->it.real.timer.expires; \
if (delta >= 0) { \
- orun = 1 + (delta / (timr)->it_incr); \
- (timr)->it_timer.expires += orun * (timr)->it_incr; \
+ orun = 1 + (delta / (timr)->it.real.incr); \
+ (timr)->it.real.timer.expires += \
+ orun * (timr)->it.real.incr; \
(timr)->it_overrun += orun; \
} \
}while (0)
-#endif
+int posix_cpu_clock_getres(clockid_t which_clock, struct timespec *);
+int posix_cpu_clock_get(clockid_t which_clock, struct timespec *);
+int posix_cpu_clock_set(clockid_t which_clock, const struct timespec *tp);
+int posix_cpu_timer_create(struct k_itimer *);
+int posix_cpu_nsleep(clockid_t, int, struct timespec *);
+int posix_cpu_timer_set(struct k_itimer *, int,
+ struct itimerspec *, struct itimerspec *);
+int posix_cpu_timer_del(struct k_itimer *);
+void posix_cpu_timer_get(struct k_itimer *, struct itimerspec *);
+
+void posix_cpu_timer_schedule(struct k_itimer *);
+
+void run_posix_cpu_timers(struct task_struct *);
+void posix_cpu_timers_exit(struct task_struct *);
+void posix_cpu_timers_exit_group(struct task_struct *);
+
+void set_process_cpu_timer(struct task_struct *, unsigned int,
+ cputime_t *, cputime_t *);
+
+#endif
Modified: linux-libc-headers/trunk/include/linux/posix_acl.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/posix_acl.h (original)
+++ linux-libc-headers/trunk/include/linux/posix_acl.h Tue Jul 5 22:58:33 2005
@@ -71,11 +71,11 @@
/* posix_acl.c */
-extern struct posix_acl *posix_acl_alloc(int, int);
-extern struct posix_acl *posix_acl_clone(const struct posix_acl *, int);
+extern struct posix_acl *posix_acl_alloc(int, unsigned int);
+extern struct posix_acl *posix_acl_clone(const struct posix_acl *, unsigned int );
extern int posix_acl_valid(const struct posix_acl *);
extern int posix_acl_permission(struct inode *, const struct posix_acl *, int);
-extern struct posix_acl *posix_acl_from_mode(mode_t, int);
+extern struct posix_acl *posix_acl_from_mode(mode_t, unsigned int );
extern int posix_acl_equiv_mode(const struct posix_acl *, mode_t *);
extern int posix_acl_create_masq(struct posix_acl *, mode_t *);
extern int posix_acl_chmod_masq(struct posix_acl *, mode_t);
Modified: linux-libc-headers/trunk/include/linux/reiserfs_acl.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/reiserfs_acl.h (original)
+++ linux-libc-headers/trunk/include/linux/reiserfs_acl.h Tue Jul 5 22:58:33 2005
@@ -3,18 +3,18 @@
#define REISERFS_ACL_VERSION 0x0001
typedef struct {
- __u16 e_tag;
- __u16 e_perm;
- __u32 e_id;
+ __le16 e_tag;
+ __le16 e_perm;
+ __le32 e_id;
} reiserfs_acl_entry;
typedef struct {
- __u16 e_tag;
- __u16 e_perm;
+ __le16 e_tag;
+ __le16 e_perm;
} reiserfs_acl_entry_short;
typedef struct {
- __u32 a_version;
+ __le32 a_version;
} reiserfs_acl_header;
Modified: linux-libc-headers/trunk/include/linux/reiserfs_fs.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/reiserfs_fs.h (original)
+++ linux-libc-headers/trunk/include/linux/reiserfs_fs.h Tue Jul 5 22:58:33 2005
@@ -101,47 +101,47 @@
struct journal_params {
- __u32 jp_journal_1st_block; /* where does journal start from on its
+ __le32 jp_journal_1st_block; /* where does journal start from on its
* device */
- __u32 jp_journal_dev; /* journal device st_rdev */
- __u32 jp_journal_size; /* size of the journal */
- __u32 jp_journal_trans_max; /* max number of blocks in a transaction. */
- __u32 jp_journal_magic; /* random value made on fs creation (this
+ __le32 jp_journal_dev; /* journal device st_rdev */
+ __le32 jp_journal_size; /* size of the journal */
+ __le32 jp_journal_trans_max; /* max number of blocks in a transaction. */
+ __le32 jp_journal_magic; /* random value made on fs creation (this
* was sb_journal_block_count) */
- __u32 jp_journal_max_batch; /* max number of blocks to batch into a
+ __le32 jp_journal_max_batch; /* max number of blocks to batch into a
* trans */
- __u32 jp_journal_max_commit_age; /* in seconds, how old can an async
+ __le32 jp_journal_max_commit_age; /* in seconds, how old can an async
* commit be */
- __u32 jp_journal_max_trans_age; /* in seconds, how old can a transaction
+ __le32 jp_journal_max_trans_age; /* in seconds, how old can a transaction
* be */
};
/* this is the super from 3.5.X, where X >= 10 */
struct reiserfs_super_block_v1
{
- __u32 s_block_count; /* blocks count */
- __u32 s_free_blocks; /* free blocks count */
- __u32 s_root_block; /* root block number */
+ __le32 s_block_count; /* blocks count */
+ __le32 s_free_blocks; /* free blocks count */
+ __le32 s_root_block; /* root block number */
struct journal_params s_journal;
- __u16 s_blocksize; /* block size */
- __u16 s_oid_maxsize; /* max size of object id array, see
+ __le16 s_blocksize; /* block size */
+ __le16 s_oid_maxsize; /* max size of object id array, see
* get_objectid() commentary */
- __u16 s_oid_cursize; /* current size of object id array */
- __u16 s_umount_state; /* this is set to 1 when filesystem was
+ __le16 s_oid_cursize; /* current size of object id array */
+ __le16 s_umount_state; /* this is set to 1 when filesystem was
* umounted, to 2 - when not */
char s_magic[10]; /* reiserfs magic string indicates that
* file system is reiserfs:
* "ReIsErFs" or "ReIsEr2Fs" or "ReIsEr3Fs" */
- __u16 s_fs_state; /* it is set to used by fsck to mark which
+ __le16 s_fs_state; /* it is set to used by fsck to mark which
* phase of rebuilding is done */
- __u32 s_hash_function_code; /* indicate, what hash function is being use
+ __le32 s_hash_function_code; /* indicate, what hash function is being use
* to sort names in a directory*/
- __u16 s_tree_height; /* height of disk tree */
- __u16 s_bmap_nr; /* amount of bitmap blocks needed to address
+ __le16 s_tree_height; /* height of disk tree */
+ __le16 s_bmap_nr; /* amount of bitmap blocks needed to address
* each block of file system */
- __u16 s_version; /* this field is only reliable on filesystem
+ __le16 s_version; /* this field is only reliable on filesystem
* with non-standard journal */
- __u16 s_reserved_for_journal; /* size in blocks of journal area on main
+ __le16 s_reserved_for_journal; /* size in blocks of journal area on main
* device, we need to keep after
* making fs with non-standard journal */
} __attribute__ ((__packed__));
@@ -152,8 +152,8 @@
struct reiserfs_super_block
{
struct reiserfs_super_block_v1 s_v1;
- __u32 s_inode_generation;
- __u32 s_flags; /* Right now used only by inode-attributes, if enabled */
+ __le32 s_inode_generation;
+ __le32 s_flags; /* Right now used only by inode-attributes, if enabled */
unsigned char s_uuid[16]; /* filesystem unique identifier */
unsigned char s_label[16]; /* filesystem volume label */
char s_unused[88] ; /* zero filled by mkreiserfs and
@@ -212,7 +212,7 @@
#define SB_ONDISK_JOURNAL_DEVICE(s) \
le32_to_cpu ((SB_ONDISK_JP(s)->jp_journal_dev))
#define SB_ONDISK_RESERVED_FOR_JOURNAL(s) \
- le32_to_cpu ((SB_V1_DISK_SUPER_BLOCK(s)->s_reserved_for_journal))
+ le16_to_cpu ((SB_V1_DISK_SUPER_BLOCK(s)->s_reserved_for_journal))
#define is_block_in_log_or_reserved_area(s, block) \
block >= SB_JOURNAL_1st_RESERVED_BLOCK(s) \
@@ -256,7 +256,7 @@
#define QUOTA_EXCEEDED -6
typedef __u32 b_blocknr_t;
-typedef __u32 unp_t;
+typedef __le32 unp_t;
struct unfm_nodeinfo {
unp_t unfm_nodenum;
@@ -363,78 +363,57 @@
// directories use this key as well as old files
//
struct offset_v1 {
- __u32 k_offset;
- __u32 k_uniqueness;
+ __le32 k_offset;
+ __le32 k_uniqueness;
} __attribute__ ((__packed__));
struct offset_v2 {
-#ifdef __LITTLE_ENDIAN
- /* little endian version */
- __u64 k_offset:60;
- __u64 k_type: 4;
-#else
- /* big endian version */
- __u64 k_type: 4;
- __u64 k_offset:60;
-#endif
+ __le64 v;
} __attribute__ ((__packed__));
-#ifndef __LITTLE_ENDIAN
-typedef union {
- struct offset_v2 offset_v2;
- __u64 linear;
-} __attribute__ ((__packed__)) offset_v2_esafe_overlay;
-
static inline __u16 offset_v2_k_type( const struct offset_v2 *v2 )
{
- offset_v2_esafe_overlay tmp = *(const offset_v2_esafe_overlay *)v2;
- tmp.linear = le64_to_cpu( tmp.linear );
- return (tmp.offset_v2.k_type <= TYPE_MAXTYPE)?tmp.offset_v2.k_type:TYPE_ANY;
+ __u8 type = le64_to_cpu(v2->v) >> 60;
+ return (type <= TYPE_MAXTYPE)?type:TYPE_ANY;
}
static inline void set_offset_v2_k_type( struct offset_v2 *v2, int type )
{
- offset_v2_esafe_overlay *tmp = (offset_v2_esafe_overlay *)v2;
- tmp->linear = le64_to_cpu(tmp->linear);
- tmp->offset_v2.k_type = type;
- tmp->linear = cpu_to_le64(tmp->linear);
+ v2->v = (v2->v & cpu_to_le64(~0ULL>>4)) | cpu_to_le64((__u64)type<<60);
}
static inline loff_t offset_v2_k_offset( const struct offset_v2 *v2 )
{
- offset_v2_esafe_overlay tmp = *(const offset_v2_esafe_overlay *)v2;
- tmp.linear = le64_to_cpu( tmp.linear );
- return tmp.offset_v2.k_offset;
+ return le64_to_cpu(v2->v) & (~0ULL>>4);
}
static inline void set_offset_v2_k_offset( struct offset_v2 *v2, loff_t offset ){
- offset_v2_esafe_overlay *tmp = (offset_v2_esafe_overlay *)v2;
- tmp->linear = le64_to_cpu(tmp->linear);
- tmp->offset_v2.k_offset = offset;
- tmp->linear = cpu_to_le64(tmp->linear);
+ offset &= (~0ULL>>4);
+ v2->v = (v2->v & cpu_to_le64(15ULL<<60)) | cpu_to_le64(offset);
}
-#else
-# define offset_v2_k_type(v2) ((v2)->k_type)
-# define set_offset_v2_k_type(v2,val) (offset_v2_k_type(v2) = (val))
-# define offset_v2_k_offset(v2) ((v2)->k_offset)
-# define set_offset_v2_k_offset(v2,val) (offset_v2_k_offset(v2) = (val))
-#endif
/* Key of an item determines its location in the S+tree, and
is composed of 4 components */
struct reiserfs_key {
- __u32 k_dir_id; /* packing locality: by default parent
+ __le32 k_dir_id; /* packing locality: by default parent
directory object id */
- __u32 k_objectid; /* object identifier */
+ __le32 k_objectid; /* object identifier */
union {
struct offset_v1 k_offset_v1;
struct offset_v2 k_offset_v2;
} __attribute__ ((__packed__)) u;
} __attribute__ ((__packed__));
+struct in_core_key {
+ __u32 k_dir_id; /* packing locality: by default parent
+ directory object id */
+ __u32 k_objectid; /* object identifier */
+ __u64 k_offset;
+ __u8 k_type;
+};
struct cpu_key {
- struct reiserfs_key on_disk_key;
+ struct in_core_key on_disk_key;
int version;
int key_length; /* 3 in all cases but direct2indirect and
indirect2direct conversion */
@@ -495,15 +474,15 @@
item. Note that the key, not this field, is used to
determine the item type, and thus which field this
union contains. */
- __u16 ih_free_space_reserved;
+ __le16 ih_free_space_reserved;
/* Iff this is a directory item, this field equals the
number of directory entries in the directory item. */
- __u16 ih_entry_count;
+ __le16 ih_entry_count;
} __attribute__ ((__packed__)) u;
- __u16 ih_item_len; /* total size of the item body */
- __u16 ih_item_location; /* an offset to the item body
+ __le16 ih_item_len; /* total size of the item body */
+ __le16 ih_item_location; /* an offset to the item body
* within the block */
- __u16 ih_version; /* 0 for all old items, 2 for new
+ __le16 ih_version; /* 0 for all old items, 2 for new
ones. Highest bit is set by fsck
temporary, cleaned after all
done */
@@ -657,43 +636,29 @@
//
static inline loff_t cpu_key_k_offset (const struct cpu_key * key)
{
- return (key->version == KEY_FORMAT_3_5) ?
- key->on_disk_key.u.k_offset_v1.k_offset :
- key->on_disk_key.u.k_offset_v2.k_offset;
+ return key->on_disk_key.k_offset;
}
static inline loff_t cpu_key_k_type (const struct cpu_key * key)
{
- return (key->version == KEY_FORMAT_3_5) ?
- uniqueness2type (key->on_disk_key.u.k_offset_v1.k_uniqueness) :
- key->on_disk_key.u.k_offset_v2.k_type;
+ return key->on_disk_key.k_type;
}
static inline void set_cpu_key_k_offset (struct cpu_key * key, loff_t offset)
{
- (key->version == KEY_FORMAT_3_5) ?
- (key->on_disk_key.u.k_offset_v1.k_offset = offset) :
- (key->on_disk_key.u.k_offset_v2.k_offset = offset);
+ key->on_disk_key.k_offset = offset;
}
-
static inline void set_cpu_key_k_type (struct cpu_key * key, int type)
{
- (key->version == KEY_FORMAT_3_5) ?
- (key->on_disk_key.u.k_offset_v1.k_uniqueness = type2uniqueness (type)):
- (key->on_disk_key.u.k_offset_v2.k_type = type);
+ key->on_disk_key.k_type = type;
}
-
static inline void cpu_key_k_offset_dec (struct cpu_key * key)
{
- if (key->version == KEY_FORMAT_3_5)
- key->on_disk_key.u.k_offset_v1.k_offset --;
- else
- key->on_disk_key.u.k_offset_v2.k_offset --;
+ key->on_disk_key.k_offset --;
}
-
#define is_direntry_cpu_key(key) (cpu_key_k_type (key) == TYPE_DIRENTRY)
#define is_direct_cpu_key(key) (cpu_key_k_type (key) == TYPE_DIRECT)
#define is_indirect_cpu_key(key) (cpu_key_k_type (key) == TYPE_INDIRECT)
@@ -739,10 +704,10 @@
/* Header of a disk block. More precisely, header of a formatted leaf
or internal node, and not the header of an unformatted node. */
struct block_head {
- __u16 blk_level; /* Level of a block in the tree. */
- __u16 blk_nr_item; /* Number of keys/items in a block. */
- __u16 blk_free_space; /* Block free space in bytes. */
- __u16 blk_reserved;
+ __le16 blk_level; /* Level of a block in the tree. */
+ __le16 blk_nr_item; /* Number of keys/items in a block. */
+ __le16 blk_free_space; /* Block free space in bytes. */
+ __le16 blk_reserved;
/* dump this in v4/planA */
struct reiserfs_key blk_right_delim_key; /* kept only for compatibility */
};
@@ -806,19 +771,19 @@
//
struct stat_data_v1
{
- __u16 sd_mode; /* file type, permissions */
- __u16 sd_nlink; /* number of hard links */
- __u16 sd_uid; /* owner */
- __u16 sd_gid; /* group */
- __u32 sd_size; /* file size */
- __u32 sd_atime; /* time of last access */
- __u32 sd_mtime; /* time file was last modified */
- __u32 sd_ctime; /* time inode (stat data) was last changed (except changes to sd_atime and sd_mtime) */
+ __le16 sd_mode; /* file type, permissions */
+ __le16 sd_nlink; /* number of hard links */
+ __le16 sd_uid; /* owner */
+ __le16 sd_gid; /* group */
+ __le32 sd_size; /* file size */
+ __le32 sd_atime; /* time of last access */
+ __le32 sd_mtime; /* time file was last modified */
+ __le32 sd_ctime; /* time inode (stat data) was last changed (except changes to sd_atime and sd_mtime) */
union {
- __u32 sd_rdev;
- __u32 sd_blocks; /* number of blocks file uses */
+ __le32 sd_rdev;
+ __le32 sd_blocks; /* number of blocks file uses */
} __attribute__ ((__packed__)) u;
- __u32 sd_first_direct_byte; /* first byte of file which is stored
+ __le32 sd_first_direct_byte; /* first byte of file which is stored
in a direct item: except that if it
equals 1 it is a symlink and if it
equals ~(__u32)0 there is no
@@ -884,20 +849,20 @@
/* Stat Data on disk (reiserfs version of UFS disk inode minus the
address blocks) */
struct stat_data {
- __u16 sd_mode; /* file type, permissions */
- __u16 sd_attrs; /* persistent inode flags */
- __u32 sd_nlink; /* number of hard links */
- __u64 sd_size; /* file size */
- __u32 sd_uid; /* owner */
- __u32 sd_gid; /* group */
- __u32 sd_atime; /* time of last access */
- __u32 sd_mtime; /* time file was last modified */
- __u32 sd_ctime; /* time inode (stat data) was last changed (except changes to sd_atime and sd_mtime) */
- __u32 sd_blocks;
+ __le16 sd_mode; /* file type, permissions */
+ __le16 sd_attrs; /* persistent inode flags */
+ __le32 sd_nlink; /* number of hard links */
+ __le64 sd_size; /* file size */
+ __le32 sd_uid; /* owner */
+ __le32 sd_gid; /* group */
+ __le32 sd_atime; /* time of last access */
+ __le32 sd_mtime; /* time file was last modified */
+ __le32 sd_ctime; /* time inode (stat data) was last changed (except changes to sd_atime and sd_mtime) */
+ __le32 sd_blocks;
union {
- __u32 sd_rdev;
- __u32 sd_generation;
- //__u32 sd_first_direct_byte;
+ __le32 sd_rdev;
+ __le32 sd_generation;
+ //__le32 sd_first_direct_byte;
/* first byte of file which is stored in a
direct item: except that if it equals 1
it is a symlink and if it equals
@@ -980,12 +945,12 @@
struct reiserfs_de_head
{
- __u32 deh_offset; /* third component of the directory entry key */
- __u32 deh_dir_id; /* objectid of the parent directory of the object, that is referenced
+ __le32 deh_offset; /* third component of the directory entry key */
+ __le32 deh_dir_id; /* objectid of the parent directory of the object, that is referenced
by directory entry */
- __u32 deh_objectid; /* objectid of the object, that is referenced by directory entry */
- __u16 deh_location; /* offset of name in the whole item */
- __u16 deh_state; /* whether 1) entry contains stat data (for future), and 2) whether
+ __le32 deh_objectid; /* objectid of the object, that is referenced by directory entry */
+ __le16 deh_location; /* offset of name in the whole item */
+ __le16 deh_state; /* whether 1) entry contains stat data (for future), and 2) whether
entry is hidden (unlinked) */
} __attribute__ ((__packed__));
#define DEH_SIZE sizeof(struct reiserfs_de_head)
@@ -1045,10 +1010,10 @@
#define de_visible(deh) test_bit_unaligned (DEH_Visible, &((deh)->deh_state))
#define de_hidden(deh) !test_bit_unaligned (DEH_Visible, &((deh)->deh_state))
-extern void make_empty_dir_item_v1 (char * body, __u32 dirid, __u32 objid,
- __u32 par_dirid, __u32 par_objid);
-extern void make_empty_dir_item (char * body, __u32 dirid, __u32 objid,
- __u32 par_dirid, __u32 par_objid);
+extern void make_empty_dir_item_v1 (char * body, __le32 dirid, __le32 objid,
+ __le32 par_dirid, __le32 par_objid);
+extern void make_empty_dir_item (char * body, __le32 dirid, __le32 objid,
+ __le32 par_dirid, __le32 par_objid);
/* array of the entry headers */
/* get item body */
@@ -1115,9 +1080,9 @@
/* Disk child pointer: The pointer from an internal node of the tree
to a node that is on disk. */
struct disk_child {
- __u32 dc_block_number; /* Disk child's block number. */
- __u16 dc_size; /* Disk child's used space. */
- __u16 dc_reserved;
+ __le32 dc_block_number; /* Disk child's block number. */
+ __le16 dc_size; /* Disk child's used space. */
+ __le16 dc_reserved;
};
#define DC_SIZE (sizeof(struct disk_child))
@@ -1489,10 +1454,10 @@
/* first block written in a commit. */
struct reiserfs_journal_desc {
- __u32 j_trans_id ; /* id of commit */
- __u32 j_len ; /* length of commit. len +1 is the commit block */
- __u32 j_mount_id ; /* mount id of this trans*/
- __u32 j_realblock[1] ; /* real locations for each block */
+ __le32 j_trans_id ; /* id of commit */
+ __le32 j_len ; /* length of commit. len +1 is the commit block */
+ __le32 j_mount_id ; /* mount id of this trans*/
+ __le32 j_realblock[1] ; /* real locations for each block */
} ;
#define get_desc_trans_id(d) le32_to_cpu((d)->j_trans_id)
@@ -1505,9 +1470,9 @@
/* last block written in a commit */
struct reiserfs_journal_commit {
- __u32 j_trans_id ; /* must match j_trans_id from the desc block */
- __u32 j_len ; /* ditto */
- __u32 j_realblock[1] ; /* real locations for each block */
+ __le32 j_trans_id ; /* must match j_trans_id from the desc block */
+ __le32 j_len ; /* ditto */
+ __le32 j_realblock[1] ; /* real locations for each block */
} ;
#define get_commit_trans_id(c) le32_to_cpu((c)->j_trans_id)
@@ -1522,9 +1487,9 @@
** and this transaction does not need to be replayed.
*/
struct reiserfs_journal_header {
- __u32 j_last_flush_trans_id ; /* id of last fully flushed transaction */
- __u32 j_first_unflushed_offset ; /* offset in the log of where to start replay after a crash */
- __u32 j_mount_id ;
+ __le32 j_last_flush_trans_id ; /* id of last fully flushed transaction */
+ __le32 j_first_unflushed_offset ; /* offset in the log of where to start replay after a crash */
+ __le32 j_mount_id ;
/* 12 */ struct journal_params jh_journal;
} ;
@@ -1795,7 +1760,7 @@
struct __reiserfs_blocknr_hint {
struct inode * inode; /* inode passed to allocator, if we allocate unf. nodes */
long block; /* file offset, in blocks */
- struct reiserfs_key key;
+ struct in_core_key key;
struct path * path; /* search path, used by allocator to deternine search_start by
* various ways */
struct reiserfs_transaction_handle * th; /* transaction handle is needed to log super blocks and
@@ -1822,7 +1787,7 @@
* to use for a new object underneat it. The locality is returned
* in disk byte order (le).
*/
-__u32 reiserfs_choose_packing(struct inode *dir);
+__le32 reiserfs_choose_packing(struct inode *dir);
int is_reusable (struct super_block * s, b_blocknr_t block, int bit_value);
void reiserfs_free_block (struct reiserfs_transaction_handle *th, struct inode *, b_blocknr_t, int for_unformatted);
Modified: linux-libc-headers/trunk/include/linux/reiserfs_xattr.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/reiserfs_xattr.h (original)
+++ linux-libc-headers/trunk/include/linux/reiserfs_xattr.h Tue Jul 5 22:58:33 2005
@@ -10,8 +10,8 @@
#define REISERFS_XATTR_MAGIC 0x52465841 /* "RFXA" */
struct reiserfs_xattr_header {
- __u32 h_magic; /* magic number for identification */
- __u32 h_hash; /* hash of the value */
+ __le32 h_magic; /* magic number for identification */
+ __le32 h_hash; /* hash of the value */
};
Modified: linux-libc-headers/trunk/include/linux/rtnetlink.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/rtnetlink.h (original)
+++ linux-libc-headers/trunk/include/linux/rtnetlink.h Tue Jul 5 22:58:33 2005
@@ -89,10 +89,14 @@
RTM_GETANYCAST = 62,
#define RTM_GETANYCAST RTM_GETANYCAST
- RTM_MAX,
-#define RTM_MAX RTM_MAX
+ __RTM_MAX,
+#define RTM_MAX (((__RTM_MAX + 3) & ~3) - 1)
};
+#define RTM_NR_MSGTYPES (RTM_MAX + 1 - RTM_BASE)
+#define RTM_NR_FAMILIES (RTM_NR_MSGTYPES >> 2)
+#define RTM_FAM(cmd) (((cmd) - RTM_BASE) >> 2)
+
/*
Generic structure for encapsulation of optional route information.
It is reminiscent of sockaddr, but with sa_family replaced
@@ -249,6 +253,7 @@
RTA_FLOW,
RTA_CACHEINFO,
RTA_SESSION,
+ RTA_MP_ALGO,
__RTA_MAX
};
@@ -345,6 +350,7 @@
#define RTAX_FEATURE_ECN 0x00000001
#define RTAX_FEATURE_SACK 0x00000002
#define RTAX_FEATURE_TIMESTAMP 0x00000004
+#define RTAX_FEATURE_ALLFRAG 0x00000008
struct rta_session
{
@@ -445,6 +451,7 @@
NDA_DST,
NDA_LLADDR,
NDA_CACHEINFO,
+ NDA_PROBES,
__NDA_MAX
};
@@ -698,7 +705,6 @@
TCA_RATE,
TCA_FCNT,
TCA_STATS2,
- TCA_ACT_STATS,
__TCA_MAX
};
Modified: linux-libc-headers/trunk/include/linux/scx200.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/scx200.h (original)
+++ linux-libc-headers/trunk/include/linux/scx200.h Tue Jul 5 22:58:33 2005
@@ -7,6 +7,10 @@
/* Interesting stuff for the National Semiconductor SCx200 CPU */
+extern unsigned scx200_cb_base;
+
+#define scx200_cb_present() (scx200_cb_base!=0)
+
/* F0 PCI Header/Bridge Configuration Registers */
#define SCx200_DOCCS_BASE 0x78 /* DOCCS Base Address Register */
#define SCx200_DOCCS_CTRL 0x7c /* DOCCS Control Register */
@@ -15,7 +19,7 @@
#define SCx200_GPIO_SIZE 0x2c /* Size of GPIO register block */
/* General Configuration Block */
-#define SCx200_CB_BASE 0x9000 /* Base fixed at 0x9000 according to errata */
+#define SCx200_CB_BASE_FIXED 0x9000 /* Base fixed at 0x9000 according to errata? */
/* Watchdog Timer */
#define SCx200_WDT_OFFSET 0x00 /* offset within configuration block */
@@ -44,9 +48,7 @@
#define SCx200_IID 0x3c /* IA On a Chip Identification Number Reg */
#define SCx200_REV 0x3d /* Revision Register */
#define SCx200_CBA 0x3e /* Configuration Base Address Register */
-
-/* Verify that the configuration block really is there */
-#define scx200_cb_probe(base) (inw((base) + SCx200_CBA) == (base))
+#define SCx200_CBA_SCRATCH 0x64 /* Configuration Base Address Scratchpad */
/*
Local variables:
Modified: linux-libc-headers/trunk/include/linux/scx200_gpio.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/scx200_gpio.h (original)
+++ linux-libc-headers/trunk/include/linux/scx200_gpio.h Tue Jul 5 22:58:33 2005
@@ -2,10 +2,8 @@
__u32 scx200_gpio_configure(int index, __u32 set, __u32 clear);
-void scx200_gpio_dump(unsigned index);
extern unsigned scx200_gpio_base;
-extern spinlock_t scx200_gpio_lock;
extern long scx200_gpio_shadow[2];
#define scx200_gpio_present() (scx200_gpio_base!=0)
Modified: linux-libc-headers/trunk/include/linux/sdladrv.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/sdladrv.h (original)
+++ linux-libc-headers/trunk/include/linux/sdladrv.h Tue Jul 5 22:58:33 2005
@@ -58,7 +58,7 @@
extern int sdla_intde (sdlahw_t* hw);
extern int sdla_intack (sdlahw_t* hw);
extern void S514_intack (sdlahw_t* hw, __u32 int_status);
-extern void read_S514_int_stat (sdlahw_t* hw, u32* int_status);
+extern void read_S514_int_stat (sdlahw_t* hw, __u32* int_status);
extern int sdla_intr (sdlahw_t* hw);
extern int sdla_mapmem (sdlahw_t* hw, unsigned long addr);
extern int sdla_peek (sdlahw_t* hw, unsigned long addr, void* buf,
Modified: linux-libc-headers/trunk/include/linux/security.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/security.h (original)
+++ linux-libc-headers/trunk/include/linux/security.h Tue Jul 5 22:58:33 2005
@@ -458,13 +458,15 @@
* Check permissions for a mmap operation. The @file may be NULL, e.g.
* if mapping anonymous memory.
* @file contains the file structure for file to map (may be NULL).
- * @prot contains the requested permissions.
+ * @reqprot contains the protection requested by the application.
+ * @prot contains the protection that will be applied by the kernel.
* @flags contains the operational flags.
* Return 0 if permission is granted.
* @file_mprotect:
* Check permissions before changing memory access permissions.
* @vma contains the memory region to modify.
- * @prot contains the requested permissions.
+ * @reqprot contains the protection requested by the application.
+ * @prot contains the protection that will be applied by the kernel.
* Return 0 if permission is granted.
* @file_lock:
* Check permission before performing file locking operations.
@@ -1129,8 +1131,11 @@
int (*file_ioctl) (struct file * file, unsigned int cmd,
unsigned long arg);
int (*file_mmap) (struct file * file,
+ unsigned long reqprot,
unsigned long prot, unsigned long flags);
- int (*file_mprotect) (struct vm_area_struct * vma, unsigned long prot);
+ int (*file_mprotect) (struct vm_area_struct * vma,
+ unsigned long reqprot,
+ unsigned long prot);
int (*file_lock) (struct file * file, unsigned int cmd);
int (*file_fcntl) (struct file * file, unsigned int cmd,
unsigned long arg);
@@ -1426,11 +1431,15 @@
static inline int security_inode_alloc (struct inode *inode)
{
+ if (unlikely (IS_PRIVATE (inode)))
+ return 0;
return security_ops->inode_alloc_security (inode);
}
static inline void security_inode_free (struct inode *inode)
{
+ if (unlikely (IS_PRIVATE (inode)))
+ return;
security_ops->inode_free_security (inode);
}
@@ -1438,6 +1447,8 @@
struct dentry *dentry,
int mode)
{
+ if (unlikely (IS_PRIVATE (dir)))
+ return 0;
return security_ops->inode_create (dir, dentry, mode);
}
@@ -1445,6 +1456,8 @@
struct dentry *dentry,
int mode)
{
+ if (dentry->d_inode && unlikely (IS_PRIVATE (dentry->d_inode)))
+ return;
security_ops->inode_post_create (dir, dentry, mode);
}
@@ -1452,6 +1465,8 @@
struct inode *dir,
struct dentry *new_dentry)
{
+ if (unlikely (IS_PRIVATE (old_dentry->d_inode)))
+ return 0;
return security_ops->inode_link (old_dentry, dir, new_dentry);
}
@@ -1459,12 +1474,16 @@
struct inode *dir,
struct dentry *new_dentry)
{
+ if (new_dentry->d_inode && unlikely (IS_PRIVATE (new_dentry->d_inode)))
+ return;
security_ops->inode_post_link (old_dentry, dir, new_dentry);
}
static inline int security_inode_unlink (struct inode *dir,
struct dentry *dentry)
{
+ if (unlikely (IS_PRIVATE (dentry->d_inode)))
+ return 0;
return security_ops->inode_unlink (dir, dentry);
}
@@ -1472,6 +1491,8 @@
struct dentry *dentry,
const char *old_name)
{
+ if (unlikely (IS_PRIVATE (dir)))
+ return 0;
return security_ops->inode_symlink (dir, dentry, old_name);
}
@@ -1479,6 +1500,8 @@
struct dentry *dentry,
const char *old_name)
{
+ if (dentry->d_inode && unlikely (IS_PRIVATE (dentry->d_inode)))
+ return;
security_ops->inode_post_symlink (dir, dentry, old_name);
}
@@ -1486,6 +1509,8 @@
struct dentry *dentry,
int mode)
{
+ if (unlikely (IS_PRIVATE (dir)))
+ return 0;
return security_ops->inode_mkdir (dir, dentry, mode);
}
@@ -1493,12 +1518,16 @@
struct dentry *dentry,
int mode)
{
+ if (dentry->d_inode && unlikely (IS_PRIVATE (dentry->d_inode)))
+ return;
security_ops->inode_post_mkdir (dir, dentry, mode);
}
static inline int security_inode_rmdir (struct inode *dir,
struct dentry *dentry)
{
+ if (unlikely (IS_PRIVATE (dentry->d_inode)))
+ return 0;
return security_ops->inode_rmdir (dir, dentry);
}
@@ -1506,6 +1535,8 @@
struct dentry *dentry,
int mode, dev_t dev)
{
+ if (unlikely (IS_PRIVATE (dir)))
+ return 0;
return security_ops->inode_mknod (dir, dentry, mode, dev);
}
@@ -1513,6 +1544,8 @@
struct dentry *dentry,
int mode, dev_t dev)
{
+ if (dentry->d_inode && unlikely (IS_PRIVATE (dentry->d_inode)))
+ return;
security_ops->inode_post_mknod (dir, dentry, mode, dev);
}
@@ -1521,6 +1554,9 @@
struct inode *new_dir,
struct dentry *new_dentry)
{
+ if (unlikely (IS_PRIVATE (old_dentry->d_inode) ||
+ (new_dentry->d_inode && IS_PRIVATE (new_dentry->d_inode))))
+ return 0;
return security_ops->inode_rename (old_dir, old_dentry,
new_dir, new_dentry);
}
@@ -1530,83 +1566,114 @@
struct inode *new_dir,
struct dentry *new_dentry)
{
+ if (unlikely (IS_PRIVATE (old_dentry->d_inode) ||
+ (new_dentry->d_inode && IS_PRIVATE (new_dentry->d_inode))))
+ return;
security_ops->inode_post_rename (old_dir, old_dentry,
new_dir, new_dentry);
}
static inline int security_inode_readlink (struct dentry *dentry)
{
+ if (unlikely (IS_PRIVATE (dentry->d_inode)))
+ return 0;
return security_ops->inode_readlink (dentry);
}
static inline int security_inode_follow_link (struct dentry *dentry,
struct nameidata *nd)
{
+ if (unlikely (IS_PRIVATE (dentry->d_inode)))
+ return 0;
return security_ops->inode_follow_link (dentry, nd);
}
static inline int security_inode_permission (struct inode *inode, int mask,
struct nameidata *nd)
{
+ if (unlikely (IS_PRIVATE (inode)))
+ return 0;
return security_ops->inode_permission (inode, mask, nd);
}
static inline int security_inode_setattr (struct dentry *dentry,
struct iattr *attr)
{
+ if (unlikely (IS_PRIVATE (dentry->d_inode)))
+ return 0;
return security_ops->inode_setattr (dentry, attr);
}
static inline int security_inode_getattr (struct vfsmount *mnt,
struct dentry *dentry)
{
+ if (unlikely (IS_PRIVATE (dentry->d_inode)))
+ return 0;
return security_ops->inode_getattr (mnt, dentry);
}
static inline void security_inode_delete (struct inode *inode)
{
+ if (unlikely (IS_PRIVATE (inode)))
+ return;
security_ops->inode_delete (inode);
}
static inline int security_inode_setxattr (struct dentry *dentry, char *name,
void *value, size_t size, int flags)
{
+ if (unlikely (IS_PRIVATE (dentry->d_inode)))
+ return 0;
return security_ops->inode_setxattr (dentry, name, value, size, flags);
}
static inline void security_inode_post_setxattr (struct dentry *dentry, char *name,
void *value, size_t size, int flags)
{
+ if (unlikely (IS_PRIVATE (dentry->d_inode)))
+ return;
security_ops->inode_post_setxattr (dentry, name, value, size, flags);
}
static inline int security_inode_getxattr (struct dentry *dentry, char *name)
{
+ if (unlikely (IS_PRIVATE (dentry->d_inode)))
+ return 0;
return security_ops->inode_getxattr (dentry, name);
}
static inline int security_inode_listxattr (struct dentry *dentry)
{
+ if (unlikely (IS_PRIVATE (dentry->d_inode)))
+ return 0;
return security_ops->inode_listxattr (dentry);
}
static inline int security_inode_removexattr (struct dentry *dentry, char *name)
{
+ if (unlikely (IS_PRIVATE (dentry->d_inode)))
+ return 0;
return security_ops->inode_removexattr (dentry, name);
}
static inline int security_inode_getsecurity(struct inode *inode, const char *name, void *buffer, size_t size)
{
+ if (unlikely (IS_PRIVATE (inode)))
+ return 0;
return security_ops->inode_getsecurity(inode, name, buffer, size);
}
static inline int security_inode_setsecurity(struct inode *inode, const char *name, const void *value, size_t size, int flags)
{
+ if (unlikely (IS_PRIVATE (inode)))
+ return 0;
return security_ops->inode_setsecurity(inode, name, value, size, flags);
}
static inline int security_inode_listsecurity(struct inode *inode, char *buffer, size_t buffer_size)
{
+ if (unlikely (IS_PRIVATE (inode)))
+ return 0;
return security_ops->inode_listsecurity(inode, buffer, buffer_size);
}
@@ -1631,16 +1698,18 @@
return security_ops->file_ioctl (file, cmd, arg);
}
-static inline int security_file_mmap (struct file *file, unsigned long prot,
+static inline int security_file_mmap (struct file *file, unsigned long reqprot,
+ unsigned long prot,
unsigned long flags)
{
- return security_ops->file_mmap (file, prot, flags);
+ return security_ops->file_mmap (file, reqprot, prot, flags);
}
static inline int security_file_mprotect (struct vm_area_struct *vma,
+ unsigned long reqprot,
unsigned long prot)
{
- return security_ops->file_mprotect (vma, prot);
+ return security_ops->file_mprotect (vma, reqprot, prot);
}
static inline int security_file_lock (struct file *file, unsigned int cmd)
@@ -1883,6 +1952,8 @@
static inline void security_d_instantiate (struct dentry *dentry, struct inode *inode)
{
+ if (unlikely (inode && IS_PRIVATE (inode)))
+ return;
security_ops->d_instantiate (dentry, inode);
}
@@ -2278,13 +2349,15 @@
return 0;
}
-static inline int security_file_mmap (struct file *file, unsigned long prot,
+static inline int security_file_mmap (struct file *file, unsigned long reqprot,
+ unsigned long prot,
unsigned long flags)
{
return 0;
}
static inline int security_file_mprotect (struct vm_area_struct *vma,
+ unsigned long reqprot,
unsigned long prot)
{
return 0;
Modified: linux-libc-headers/trunk/include/linux/serial_core.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/serial_core.h (original)
+++ linux-libc-headers/trunk/include/linux/serial_core.h Tue Jul 5 22:58:33 2005
@@ -107,4 +107,17 @@
/* TXX9 type number */
#define PORT_TXX9 64
+/* NEC VR4100 series SIU/DSIU */
+#define PORT_VR41XX_SIU 65
+#define PORT_VR41XX_DSIU 66
+
+/* Samsung S3C2400 SoC */
+#define PORT_S3C2400 67
+
+/* M32R SIO */
+#define PORT_M32R_SIO 68
+
+/*Digi jsm */
+#define PORT_JSM 65
+
#endif /* LINUX_SERIAL_CORE_H */
Modified: linux-libc-headers/trunk/include/linux/serio.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/serio.h (original)
+++ linux-libc-headers/trunk/include/linux/serio.h Tue Jul 5 22:58:33 2005
@@ -20,15 +20,20 @@
#define SERIO_PARITY 2
#define SERIO_FRAME 4
-#define SERIO_TYPE 0xff000000UL
-#define SERIO_XT 0x00000000UL
-#define SERIO_8042 0x01000000UL
-#define SERIO_RS232 0x02000000UL
-#define SERIO_HIL_MLC 0x03000000UL
-#define SERIO_PS_PSTHRU 0x05000000UL
-#define SERIO_8042_XL 0x06000000UL
+/*
+ * Serio types
+ */
+#define SERIO_XT 0x00
+#define SERIO_8042 0x01
+#define SERIO_RS232 0x02
+#define SERIO_HIL_MLC 0x03
+#define SERIO_PS_PSTHRU 0x05
+#define SERIO_8042_XL 0x06
-#define SERIO_PROTO 0xFFUL
+/*
+ * Serio types
+ */
+#define SERIO_UNKNOWN 0x00
#define SERIO_MSC 0x01
#define SERIO_SUN 0x02
#define SERIO_MS 0x03
@@ -55,8 +60,7 @@
#define SERIO_SNES232 0x26
#define SERIO_SEMTECH 0x27
#define SERIO_LKKBD 0x28
-
-#define SERIO_ID 0xff00UL
-#define SERIO_EXTRA 0xff0000UL
+#define SERIO_ELO 0x29
+#define SERIO_MICROTOUCH 0x30
#endif
Modified: linux-libc-headers/trunk/include/linux/skbuff.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/skbuff.h (original)
+++ linux-libc-headers/trunk/include/linux/skbuff.h Tue Jul 5 22:58:33 2005
@@ -77,12 +77,6 @@
* Any questions? No questions, good. --ANK
*/
-#ifdef __i386__
-#define NET_CALLER(arg) (*(((void **)&arg) - 1))
-#else
-#define NET_CALLER(arg) __builtin_return_address(0)
-#endif
-
struct net_device;
#ifdef CONFIG_NETFILTER
@@ -140,6 +134,20 @@
skb_frag_t frags[MAX_SKB_FRAGS];
};
+/* We divide dataref into two halves. The higher 16 bits hold references
+ * to the payload part of skb->data. The lower 16 bits hold references to
+ * the entire skb->data. It is up to the users of the skb to agree on
+ * where the payload starts.
+ *
+ * All users must obey the rule that the skb->data reference count must be
+ * greater than or equal to the payload reference count.
+ *
+ * Holding a reference to the payload part means that the user does not
+ * care about modifications to the header part of skb->data.
+ */
+#define SKB_DATAREF_SHIFT 16
+#define SKB_DATAREF_MASK ((1 << SKB_DATAREF_SHIFT) - 1)
+
/**
* struct sk_buff - socket buffer
* @next: Next buffer in list
@@ -153,14 +161,16 @@
* @h: Transport layer header
* @nh: Network layer header
* @mac: Link layer header
- * @dst: FIXME: Describe this field
+ * @dst: destination entry
+ * @sp: the security path, used for xfrm
* @cb: Control buffer. Free for use by every layer. Put private vars here
* @len: Length of actual data
* @data_len: Data length
* @mac_len: Length of link layer header
* @csum: Checksum
- * @__unused: Dead field, may be reused
+ * @local_df: allow local fragmentation
* @cloned: Head may be cloned (check refcnt to be sure)
+ * @nohdr: Payload reference only, must not modify header
* @pkt_type: Packet class
* @ip_summed: Driver fed us an IP checksum
* @priority: Packet queueing priority
@@ -181,6 +191,8 @@
* @nf_bridge: Saved data about a bridged frame - see br_netfilter.c
* @private: Data which is private to the HIPPI implementation
* @tc_index: Traffic control index
+ * @tc_verd: traffic control verdict
+ * @tc_classid: traffic control classid
*/
struct sk_buff {
@@ -232,7 +244,8 @@
mac_len,
csum;
unsigned char local_df,
- cloned,
+ cloned:1,
+ nohdr:1,
pkt_type,
ip_summed;
__u32 priority;
Modified: linux-libc-headers/trunk/include/linux/sockios.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/sockios.h (original)
+++ linux-libc-headers/trunk/include/linux/sockios.h Tue Jul 5 22:58:33 2005
@@ -7,7 +7,7 @@
*
* Version: @(#)sockios.h 1.0.2 03/09/93
*
- * Authors: Ross Biro, <bir7 at leland.Stanford.Edu>
+ * Authors: Ross Biro
* Fred N. van Kempen, <waltje at uWalt.NL.Mugnet.ORG>
*
* This program is free software; you can redistribute it and/or
Modified: linux-libc-headers/trunk/include/linux/soundcard.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/soundcard.h (original)
+++ linux-libc-headers/trunk/include/linux/soundcard.h Tue Jul 5 22:58:33 2005
@@ -39,6 +39,13 @@
/* In Linux we need to be prepared for cross compiling */
#include <linux/ioctl.h>
+/* Endian macros. */
+#ifdef __KERNEL__
+# include <asm/byteorder.h>
+#else
+# include <endian.h>
+#endif
+
/*
* Supported card ID numbers (Should be somewhere else?)
*/
@@ -179,13 +186,26 @@
* Some big endian/little endian handling macros
*/
-#if defined(_AIX) || defined(AIX) || defined(sparc) || defined(__sparc__) || defined(HPPA) || defined(PPC) || defined(__mc68000__)
-/* Big endian machines */
-# define _PATCHKEY(id) (0xfd00|id)
-# define AFMT_S16_NE AFMT_S16_BE
-#else
-# define _PATCHKEY(id) ((id<<8)|0xfd)
-# define AFMT_S16_NE AFMT_S16_LE
+#define _LINUX_PATCHKEY_H_INDIRECT
+#include <linux/patchkey.h>
+#undef _LINUX_PATCHKEY_H_INDIRECT
+
+#if defined(__KERNEL__)
+# if defined(__BIG_ENDIAN)
+# define AFMT_S16_NE AFMT_S16_BE
+# elif defined(__LITTLE_ENDIAN)
+# define AFMT_S16_NE AFMT_S16_LE
+# else
+# error "could not determine byte order"
+# endif
+#elif defined(__BYTE_ORDER)
+# if __BYTE_ORDER == __BIG_ENDIAN
+# define AFMT_S16_NE AFMT_S16_BE
+# elif __BYTE_ORDER == __LITTLE_ENDIAN
+# define AFMT_S16_NE AFMT_S16_LE
+# else
+# error "could not determine byte order"
+# endif
#endif
/*
Modified: linux-libc-headers/trunk/include/linux/stallion.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/stallion.h (original)
+++ linux-libc-headers/trunk/include/linux/stallion.h Tue Jul 5 22:58:33 2005
@@ -126,7 +126,7 @@
int nrbnks;
int irq;
int irqtype;
- void (*isr)(struct stlbrd *brdp);
+ int (*isr)(struct stlbrd *brdp);
unsigned int ioaddr1;
unsigned int ioaddr2;
unsigned int iosize1;
Modified: linux-libc-headers/trunk/include/linux/sunrpc/cache.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/sunrpc/cache.h (original)
+++ linux-libc-headers/trunk/include/linux/sunrpc/cache.h Tue Jul 5 22:58:33 2005
@@ -37,8 +37,7 @@
* Entries have a ref count and a 'hashed' flag which counts the existance
* in the hash table.
* We only expire entries when refcount is zero.
- * Existance in the cache is not measured in refcount but rather in
- * CACHE_HASHED flag.
+ * Existance in the cache is counted the refcount.
*/
/* Every cache item has a common header that is used
@@ -57,7 +56,6 @@
#define CACHE_VALID 0 /* Entry contains valid data */
#define CACHE_NEGATIVE 1 /* Negative entry - there is no match for the key */
#define CACHE_PENDING 2 /* An upcall has been sent but no reply received yet*/
-#define CACHE_HASHED 3 /* Entry is in a hash table */
#define CACHE_NEW_EXPIRY 120 /* keep new things pending confirmation for 120 seconds */
@@ -185,7 +183,6 @@
\
if (new) \
{INIT;} \
- cache_get(&tmp->MEMBER); \
if (set) { \
if (!INPLACE && test_bit(CACHE_VALID, &tmp->MEMBER.flags))\
{ /* need to swap in new */ \
@@ -194,8 +191,6 @@
new->MEMBER.next = tmp->MEMBER.next; \
*hp = &new->MEMBER; \
tmp->MEMBER.next = NULL; \
- set_bit(CACHE_HASHED, &new->MEMBER.flags); \
- clear_bit(CACHE_HASHED, &tmp->MEMBER.flags); \
t2 = tmp; tmp = new; new = t2; \
} \
if (test_bit(CACHE_NEGATIVE, &item->MEMBER.flags)) \
@@ -205,6 +200,7 @@
clear_bit(CACHE_NEGATIVE, &tmp->MEMBER.flags); \
} \
} \
+ cache_get(&tmp->MEMBER); \
if (set||new) write_unlock(&(DETAIL)->hash_lock); \
else read_unlock(&(DETAIL)->hash_lock); \
if (set) \
@@ -220,7 +216,7 @@
new->MEMBER.next = *head; \
*head = &new->MEMBER; \
(DETAIL)->entries ++; \
- set_bit(CACHE_HASHED, &new->MEMBER.flags); \
+ cache_get(&new->MEMBER); \
if (set) { \
tmp = new; \
if (test_bit(CACHE_NEGATIVE, &item->MEMBER.flags)) \
@@ -268,15 +264,10 @@
static inline int cache_put(struct cache_head *h, struct cache_detail *cd)
{
- atomic_dec(&h->refcnt);
- if (!atomic_read(&h->refcnt) &&
+ if (atomic_read(&h->refcnt) <= 2 &&
h->expiry_time < cd->nextcheck)
cd->nextcheck = h->expiry_time;
- if (!test_bit(CACHE_HASHED, &h->flags) &&
- !atomic_read(&h->refcnt))
- return 1;
-
- return 0;
+ return atomic_dec_and_test(&h->refcnt);
}
extern void cache_init(struct cache_head *h);
Modified: linux-libc-headers/trunk/include/linux/sunrpc/clnt.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/sunrpc/clnt.h (original)
+++ linux-libc-headers/trunk/include/linux/sunrpc/clnt.h Tue Jul 5 22:58:33 2005
@@ -49,7 +49,6 @@
cl_intr : 1,/* interruptible */
cl_chatty : 1,/* be verbose */
cl_autobind : 1,/* use getport() */
- cl_droppriv : 1,/* enable NFS suid hack */
cl_oneshot : 1,/* dispose after use */
cl_dead : 1;/* abandoned */
Modified: linux-libc-headers/trunk/include/linux/sunrpc/sched.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/sunrpc/sched.h (original)
+++ linux-libc-headers/trunk/include/linux/sunrpc/sched.h Tue Jul 5 22:58:33 2005
@@ -53,9 +53,8 @@
struct rpc_message tk_msg; /* RPC call info */
__u32 * tk_buffer; /* XDR buffer */
size_t tk_bufsize;
- __u8 tk_garb_retry,
- tk_cred_retry,
- tk_suid_retry;
+ __u8 tk_garb_retry;
+ __u8 tk_cred_retry;
unsigned long tk_cookie; /* Cookie for batching tasks */
@@ -118,9 +117,7 @@
*/
#define RPC_TASK_ASYNC 0x0001 /* is an async task */
#define RPC_TASK_SWAPPER 0x0002 /* is swapping in/out */
-#define RPC_TASK_SETUID 0x0004 /* is setuid process */
#define RPC_TASK_CHILD 0x0008 /* is child of other task */
-#define RPC_CALL_REALUID 0x0010 /* try using real uid */
#define RPC_CALL_MAJORSEEN 0x0020 /* major timeout seen */
#define RPC_TASK_ROOTCREDS 0x0040 /* force root creds */
#define RPC_TASK_DYNAMIC 0x0080 /* task was kmalloc'ed */
@@ -129,7 +126,6 @@
#define RPC_TASK_NOINTR 0x0400 /* uninterruptible task */
#define RPC_IS_ASYNC(t) ((t)->tk_flags & RPC_TASK_ASYNC)
-#define RPC_IS_SETUID(t) ((t)->tk_flags & RPC_TASK_SETUID)
#define RPC_IS_CHILD(t) ((t)->tk_flags & RPC_TASK_CHILD)
#define RPC_IS_SWAPPER(t) ((t)->tk_flags & RPC_TASK_SWAPPER)
#define RPC_DO_ROOTOVERRIDE(t) ((t)->tk_flags & RPC_TASK_ROOTCREDS)
Modified: linux-libc-headers/trunk/include/linux/sunrpc/svc.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/sunrpc/svc.h (original)
+++ linux-libc-headers/trunk/include/linux/sunrpc/svc.h Tue Jul 5 22:58:33 2005
@@ -250,8 +250,7 @@
char * pg_name; /* service name */
char * pg_class; /* class name: services sharing authentication */
struct svc_stat * pg_stats; /* rpc statistics */
- /* Override authentication. NULL means use default */
- int (*pg_authenticate)(struct svc_rqst *, __u32 *);
+ int (*pg_authenticate)(struct svc_rqst *);
};
/*
Modified: linux-libc-headers/trunk/include/linux/sunrpc/xprt.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/sunrpc/xprt.h (original)
+++ linux-libc-headers/trunk/include/linux/sunrpc/xprt.h Tue Jul 5 22:58:33 2005
@@ -141,6 +141,9 @@
unsigned int rcvsize, /* socket receive buffer size */
sndsize; /* socket send buffer size */
+ size_t max_payload; /* largest RPC payload size,
+ in bytes */
+
struct rpc_wait_queue sending; /* requests waiting to send */
struct rpc_wait_queue resend; /* requests waiting to resend */
struct rpc_wait_queue pending; /* requests in flight */
Added: linux-libc-headers/trunk/include/linux/superhyway.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/linux/superhyway.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,79 @@
+/*
+ * include/linux/superhyway.h
+ *
+ * SuperHyway Bus definitions
+ *
+ * Copyright (C) 2004, 2005 Paul Mundt <lethal at linux-sh.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#ifndef __LINUX_SUPERHYWAY_H
+#define __LINUX_SUPERHYWAY_H
+
+#include <linux/device.h>
+
+/*
+ * SuperHyway IDs
+ */
+#define SUPERHYWAY_DEVICE_ID_SH5_DMAC 0x0183
+
+struct vcr_info {
+ __u8 perr_flags; /* P-port Error flags */
+ __u8 merr_flags; /* Module Error flags */
+ __u16 mod_vers; /* Module Version */
+ __u16 mod_id; /* Module ID */
+ __u8 bot_mb; /* Bottom Memory block */
+ __u8 top_mb; /* Top Memory block */
+};
+
+struct superhyway_device_id {
+ unsigned int id;
+ unsigned long driver_data;
+};
+
+struct superhyway_device;
+extern struct bus_type superhyway_bus_type;
+
+struct superhyway_driver {
+ char *name;
+
+ const struct superhyway_device_id *id_table;
+ struct device_driver drv;
+
+ int (*probe)(struct superhyway_device *dev, const struct superhyway_device_id *id);
+ void (*remove)(struct superhyway_device *dev);
+};
+
+#define to_superhyway_driver(d) container_of((d), struct superhyway_driver, drv)
+
+struct superhyway_device {
+ char name[32];
+
+ struct device dev;
+
+ struct superhyway_device_id id;
+ struct superhyway_driver *drv;
+
+ struct resource resource;
+ struct vcr_info vcr;
+};
+
+#define to_superhyway_device(d) container_of((d), struct superhyway_device, dev)
+
+#define superhyway_get_drvdata(d) dev_get_drvdata(&(d)->dev)
+#define superhyway_set_drvdata(d,p) dev_set_drvdata(&(d)->dev, (p))
+
+extern int superhyway_scan_bus(void);
+
+/* drivers/sh/superhyway/superhyway.c */
+int superhyway_register_driver(struct superhyway_driver *);
+void superhyway_unregister_driver(struct superhyway_driver *);
+int superhyway_add_device(unsigned int, unsigned long, unsigned long long);
+
+/* drivers/sh/superhyway/superhyway-sysfs.c */
+extern struct device_attribute superhyway_dev_attrs[];
+
+#endif /* __LINUX_SUPERHYWAY_H */
+
Modified: linux-libc-headers/trunk/include/linux/suspend.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/suspend.h (original)
+++ linux-libc-headers/trunk/include/linux/suspend.h Tue Jul 5 22:58:33 2005
@@ -1,7 +1,7 @@
#ifndef _LINUX_SWSUSP_H
#define _LINUX_SWSUSP_H
-#if defined(CONFIG_X86) || defined(CONFIG_FRV)
+#if defined(CONFIG_X86) || defined(CONFIG_FRV) || defined(CONFIG_PPC32)
#include <asm/suspend.h>
#endif
#include <linux/swap.h>
@@ -14,15 +14,26 @@
unsigned long address; /* address of the copy */
unsigned long orig_address; /* original address of page */
swp_entry_t swap_address;
- swp_entry_t dummy; /* we need scratch space at
- * end of page (see link, diskpage)
- */
+
+ struct pbe *next; /* also used as scratch space at
+ * end of page (see link, diskpage)
+ */
} suspend_pagedir_t;
+#define for_each_pbe(pbe, pblist) \
+ for (pbe = pblist ; pbe ; pbe = pbe->next)
+
+#define PBES_PER_PAGE (PAGE_SIZE/sizeof(struct pbe))
+#define PB_PAGE_SKIP (PBES_PER_PAGE-1)
+
+#define for_each_pb_page(pbe, pblist) \
+ for (pbe = pblist ; pbe ; pbe = (pbe+PB_PAGE_SKIP)->next)
+
+
#define SWAP_FILENAME_MAXLENGTH 32
-#define SUSPEND_PD_PAGES(x) (((x)*sizeof(struct pbe))/PAGE_SIZE+1)
+extern dev_t swsusp_resume_device;
/* mm/vmscan.c */
extern int shrink_mem(void);
Modified: linux-libc-headers/trunk/include/linux/sysctl.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/sysctl.h (original)
+++ linux-libc-headers/trunk/include/linux/sysctl.h Tue Jul 5 22:58:33 2005
@@ -123,7 +123,8 @@
KERN_SPARC_SCONS_PWROFF=64, /* int: serial console power-off halt */
KERN_HZ_TIMER=65, /* int: hz timer on or off */
KERN_UNKNOWN_NMI_PANIC=66, /* int: unknown nmi panic flag */
- KERN_BOOTLOADER_TYPE=67 /* int: boot loader type */
+ KERN_BOOTLOADER_TYPE=67, /* int: boot loader type */
+ KERN_RANDOMIZE=68 /* int: randomize virtual address space */
};
@@ -345,7 +346,8 @@
NET_TCP_DEFAULT_WIN_SCALE=105,
NET_TCP_MODERATE_RCVBUF=106,
NET_TCP_TSO_WIN_DIVISOR=107,
- NET_TCP_BIC_BETA=108
+ NET_TCP_BIC_BETA=108,
+ NET_IPV4_ICMP_ERRORS_USE_INBOUND_IFADDR=109
};
enum {
@@ -398,7 +400,9 @@
NET_IPV4_CONF_NOPOLICY=16,
NET_IPV4_CONF_FORCE_IGMP_VERSION=17,
NET_IPV4_CONF_ARP_ANNOUNCE=18,
- NET_IPV4_CONF_ARP_IGNORE=19
+ NET_IPV4_CONF_ARP_IGNORE=19,
+ NET_IPV4_CONF_PROMOTE_SECONDARIES=20,
+ __NET_IPV4_CONF_MAX
};
/* /proc/sys/net/ipv4/netfilter */
@@ -456,7 +460,8 @@
NET_IPV6_ROUTE_GC_INTERVAL=6,
NET_IPV6_ROUTE_GC_ELASTICITY=7,
NET_IPV6_ROUTE_MTU_EXPIRES=8,
- NET_IPV6_ROUTE_MIN_ADVMSS=9
+ NET_IPV6_ROUTE_MIN_ADVMSS=9,
+ NET_IPV6_ROUTE_GC_MIN_INTERVAL_MS=10
};
enum {
@@ -476,7 +481,8 @@
NET_IPV6_REGEN_MAX_RETRY=14,
NET_IPV6_MAX_DESYNC_FACTOR=15,
NET_IPV6_MAX_ADDRESSES=16,
- NET_IPV6_FORCE_MLD_VERSION=17
+ NET_IPV6_FORCE_MLD_VERSION=17,
+ __NET_IPV6_MAX
};
/* /proc/sys/net/ipv6/icmp */
@@ -501,7 +507,10 @@
NET_NEIGH_GC_INTERVAL=13,
NET_NEIGH_GC_THRESH1=14,
NET_NEIGH_GC_THRESH2=15,
- NET_NEIGH_GC_THRESH3=16
+ NET_NEIGH_GC_THRESH3=16,
+ NET_NEIGH_RETRANS_TIME_MS=17,
+ NET_NEIGH_REACHABLE_TIME_MS=18,
+ __NET_NEIGH_MAX
};
/* /proc/sys/net/ipx */
@@ -653,7 +662,8 @@
NET_SCTP_PRESERVE_ENABLE = 11,
NET_SCTP_MAX_BURST = 12,
NET_SCTP_ADDIP_ENABLE = 13,
- NET_SCTP_PRSCTP_ENABLE = 14
+ NET_SCTP_PRSCTP_ENABLE = 14,
+ NET_SCTP_SNDBUF_POLICY = 15
};
/* /proc/sys/net/bridge */
Modified: linux-libc-headers/trunk/include/linux/sysdev.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/sysdev.h (original)
+++ linux-libc-headers/trunk/include/linux/sysdev.h Tue Jul 5 22:58:33 2005
@@ -33,7 +33,7 @@
/* Default operations for these types of devices */
int (*shutdown)(struct sys_device *);
- int (*suspend)(struct sys_device *, __u32 state);
+ int (*suspend)(struct sys_device *, pm_message_t state);
int (*resume)(struct sys_device *);
struct kset kset;
};
@@ -52,7 +52,7 @@
int (*add)(struct sys_device *);
int (*remove)(struct sys_device *);
int (*shutdown)(struct sys_device *);
- int (*suspend)(struct sys_device *, __u32 state);
+ int (*suspend)(struct sys_device *, pm_message_t state);
int (*resume)(struct sys_device *);
};
Modified: linux-libc-headers/trunk/include/linux/sysfs.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/sysfs.h (original)
+++ linux-libc-headers/trunk/include/linux/sysfs.h Tue Jul 5 22:58:33 2005
@@ -99,6 +99,9 @@
extern int
sysfs_update_file(struct kobject *, const struct attribute *);
+extern int
+sysfs_chmod_file(struct kobject *kobj, struct attribute *attr, mode_t mode);
+
extern void
sysfs_remove_file(struct kobject *, const struct attribute *);
@@ -140,6 +143,10 @@
{
return 0;
}
+static inline int sysfs_chmod_file(struct kobject *kobj, struct attribute *attr, mode_t mode)
+{
+ return 0;
+}
static inline void sysfs_remove_file(struct kobject * k, const struct attribute * a)
{
Modified: linux-libc-headers/trunk/include/linux/sysrq.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/sysrq.h (original)
+++ linux-libc-headers/trunk/include/linux/sysrq.h Tue Jul 5 22:58:33 2005
@@ -14,10 +14,22 @@
struct pt_regs;
struct tty_struct;
+/* Possible values of bitmask for enabling sysrq functions */
+/* 0x0001 is reserved for enable everything */
+#define SYSRQ_ENABLE_LOG 0x0002
+#define SYSRQ_ENABLE_KEYBOARD 0x0004
+#define SYSRQ_ENABLE_DUMP 0x0008
+#define SYSRQ_ENABLE_SYNC 0x0010
+#define SYSRQ_ENABLE_REMOUNT 0x0020
+#define SYSRQ_ENABLE_SIGNAL 0x0040
+#define SYSRQ_ENABLE_BOOT 0x0080
+#define SYSRQ_ENABLE_RTNICE 0x0100
+
struct sysrq_key_op {
void (*handler)(int, struct pt_regs *, struct tty_struct *);
char *help_msg;
char *action_msg;
+ int enable_mask;
};
#ifdef CONFIG_MAGIC_SYSRQ
@@ -28,7 +40,7 @@
*/
void handle_sysrq(int, struct pt_regs *, struct tty_struct *);
-void __handle_sysrq(int, struct pt_regs *, struct tty_struct *);
+void __handle_sysrq(int, struct pt_regs *, struct tty_struct *, int check_mask);
int register_sysrq_key(int, struct sysrq_key_op *);
int unregister_sysrq_key(int, struct sysrq_key_op *);
struct sysrq_key_op *__sysrq_get_key_op(int key);
Added: linux-libc-headers/trunk/include/linux/tc_act/tc_defact.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/linux/tc_act/tc_defact.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,21 @@
+#ifndef __LINUX_TC_DEF_H
+#define __LINUX_TC_DEF_H
+
+#include <linux/pkt_cls.h>
+
+struct tc_defact
+{
+ tc_gen;
+};
+
+enum
+{
+ TCA_DEF_UNSPEC,
+ TCA_DEF_TM,
+ TCA_DEF_PARMS,
+ TCA_DEF_DATA,
+ __TCA_DEF_MAX
+};
+#define TCA_DEF_MAX (__TCA_DEF_MAX - 1)
+
+#endif
Added: linux-libc-headers/trunk/include/linux/tc_ematch/tc_em_cmp.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/linux/tc_ematch/tc_em_cmp.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,26 @@
+#ifndef __LINUX_TC_EM_CMP_H
+#define __LINUX_TC_EM_CMP_H
+
+#include <linux/pkt_cls.h>
+
+struct tcf_em_cmp
+{
+ __u32 val;
+ __u32 mask;
+ __u16 off;
+ __u8 align:4;
+ __u8 flags:4;
+ __u8 layer:4;
+ __u8 opnd:4;
+};
+
+enum
+{
+ TCF_EM_ALIGN_U8 = 1,
+ TCF_EM_ALIGN_U16 = 2,
+ TCF_EM_ALIGN_U32 = 4
+};
+
+#define TCF_EM_CMP_TRANS 1
+
+#endif
Added: linux-libc-headers/trunk/include/linux/tc_ematch/tc_em_meta.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/linux/tc_ematch/tc_em_meta.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,99 @@
+#ifndef __LINUX_TC_EM_META_H
+#define __LINUX_TC_EM_META_H
+
+#include <linux/pkt_cls.h>
+
+enum
+{
+ TCA_EM_META_UNSPEC,
+ TCA_EM_META_HDR,
+ TCA_EM_META_LVALUE,
+ TCA_EM_META_RVALUE,
+ __TCA_EM_META_MAX
+};
+#define TCA_EM_META_MAX (__TCA_EM_META_MAX - 1)
+
+struct tcf_meta_val
+{
+ __u16 kind;
+ __u8 shift;
+ __u8 op;
+};
+
+#define TCF_META_TYPE_MASK (0xf << 12)
+#define TCF_META_TYPE(kind) (((kind) & TCF_META_TYPE_MASK) >> 12)
+#define TCF_META_ID_MASK 0x7ff
+#define TCF_META_ID(kind) ((kind) & TCF_META_ID_MASK)
+
+enum
+{
+ TCF_META_TYPE_VAR,
+ TCF_META_TYPE_INT,
+ __TCF_META_TYPE_MAX
+};
+#define TCF_META_TYPE_MAX (__TCF_META_TYPE_MAX - 1)
+
+enum
+{
+ TCF_META_ID_VALUE,
+ TCF_META_ID_RANDOM,
+ TCF_META_ID_LOADAVG_0,
+ TCF_META_ID_LOADAVG_1,
+ TCF_META_ID_LOADAVG_2,
+ TCF_META_ID_DEV,
+ TCF_META_ID_INDEV,
+ TCF_META_ID_REALDEV,
+ TCF_META_ID_PRIORITY,
+ TCF_META_ID_PROTOCOL,
+ TCF_META_ID_SECURITY,
+ TCF_META_ID_PKTTYPE,
+ TCF_META_ID_PKTLEN,
+ TCF_META_ID_DATALEN,
+ TCF_META_ID_MACLEN,
+ TCF_META_ID_NFMARK,
+ TCF_META_ID_TCINDEX,
+ TCF_META_ID_TCVERDICT,
+ TCF_META_ID_TCCLASSID,
+ TCF_META_ID_RTCLASSID,
+ TCF_META_ID_RTIIF,
+ TCF_META_ID_SK_FAMILY,
+ TCF_META_ID_SK_STATE,
+ TCF_META_ID_SK_REUSE,
+ TCF_META_ID_SK_BOUND_IF,
+ TCF_META_ID_SK_REFCNT,
+ TCF_META_ID_SK_SHUTDOWN,
+ TCF_META_ID_SK_PROTO,
+ TCF_META_ID_SK_TYPE,
+ TCF_META_ID_SK_RCVBUF,
+ TCF_META_ID_SK_RMEM_ALLOC,
+ TCF_META_ID_SK_WMEM_ALLOC,
+ TCF_META_ID_SK_OMEM_ALLOC,
+ TCF_META_ID_SK_WMEM_QUEUED,
+ TCF_META_ID_SK_RCV_QLEN,
+ TCF_META_ID_SK_SND_QLEN,
+ TCF_META_ID_SK_ERR_QLEN,
+ TCF_META_ID_SK_FORWARD_ALLOCS,
+ TCF_META_ID_SK_SNDBUF,
+ TCF_META_ID_SK_ALLOCS,
+ TCF_META_ID_SK_ROUTE_CAPS,
+ TCF_META_ID_SK_HASHENT,
+ TCF_META_ID_SK_LINGERTIME,
+ TCF_META_ID_SK_ACK_BACKLOG,
+ TCF_META_ID_SK_MAX_ACK_BACKLOG,
+ TCF_META_ID_SK_PRIO,
+ TCF_META_ID_SK_RCVLOWAT,
+ TCF_META_ID_SK_RCVTIMEO,
+ TCF_META_ID_SK_SNDTIMEO,
+ TCF_META_ID_SK_SENDMSG_OFF,
+ TCF_META_ID_SK_WRITE_PENDING,
+ __TCF_META_ID_MAX
+};
+#define TCF_META_ID_MAX (__TCF_META_ID_MAX - 1)
+
+struct tcf_meta_hdr
+{
+ struct tcf_meta_val left;
+ struct tcf_meta_val right;
+};
+
+#endif
Added: linux-libc-headers/trunk/include/linux/tc_ematch/tc_em_nbyte.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/linux/tc_ematch/tc_em_nbyte.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,13 @@
+#ifndef __LINUX_TC_EM_NBYTE_H
+#define __LINUX_TC_EM_NBYTE_H
+
+#include <linux/pkt_cls.h>
+
+struct tcf_em_nbyte
+{
+ __u16 off;
+ __u16 len:12;
+ __u8 layer:4;
+};
+
+#endif
Modified: linux-libc-headers/trunk/include/linux/threads.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/threads.h (original)
+++ linux-libc-headers/trunk/include/linux/threads.h Tue Jul 5 22:58:33 2005
@@ -6,7 +6,7 @@
* The default limit for the nr of threads is now in
* /proc/sys/kernel/threads-max.
*/
-
+
/*
* Maximum supported processors that can run under SMP. This value is
* set via configure setting. The maximum is equal to the size of the
@@ -24,11 +24,12 @@
/*
* This controls the default maximum pid allocated to a process
*/
-#define PID_MAX_DEFAULT 0x8000
+#define PID_MAX_DEFAULT (CONFIG_BASE_SMALL ? 0x1000 : 0x8000)
/*
* A maximum of 4 million PIDs should be enough for a while:
*/
-#define PID_MAX_LIMIT (sizeof(long) > 4 ? 4*1024*1024 : PID_MAX_DEFAULT)
+#define PID_MAX_LIMIT (CONFIG_BASE_SMALL ? PAGE_SIZE * 8 : \
+ (sizeof(long) > 4 ? 4 * 1024 * 1024 : PID_MAX_DEFAULT))
#endif
Modified: linux-libc-headers/trunk/include/linux/tiocl.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/tiocl.h (original)
+++ linux-libc-headers/trunk/include/linux/tiocl.h Tue Jul 5 22:58:33 2005
@@ -23,7 +23,7 @@
#define TIOCL_SELLOADLUT 5
/* set characters to be considered alphabetic when selecting */
- /* u32[8] bit array, 4 bytes-aligned with type */
+ /* __u32[8] bit array, 4 bytes-aligned with type */
/* these two don't return a value: they write it back in the type */
#define TIOCL_GETSHIFTSTATE 6 /* write shift state */
Modified: linux-libc-headers/trunk/include/linux/uinput.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/uinput.h (original)
+++ linux-libc-headers/trunk/include/linux/uinput.h Tue Jul 5 22:58:33 2005
@@ -22,14 +22,30 @@
* Author: Aristeu Sergio Rozanski Filho <aris at cathedrallabs.org>
*
* Changes/Revisions:
+ * 0.2 16/10/2004 (Micah Dowty <micah at navi.cx>)
+ * - added force feedback support
+ * - added UI_SET_PHYS
* 0.1 20/06/2002
* - first public version
*/
+struct uinput_ff_upload {
+ int request_id;
+ int retval;
+ struct ff_effect effect;
+};
+
+struct uinput_ff_erase {
+ int request_id;
+ int retval;
+ int effect_id;
+};
+
/* ioctl */
#define UINPUT_IOCTL_BASE 'U'
#define UI_DEV_CREATE _IO(UINPUT_IOCTL_BASE, 1)
#define UI_DEV_DESTROY _IO(UINPUT_IOCTL_BASE, 2)
+
#define UI_SET_EVBIT _IOW(UINPUT_IOCTL_BASE, 100, int)
#define UI_SET_KEYBIT _IOW(UINPUT_IOCTL_BASE, 101, int)
#define UI_SET_RELBIT _IOW(UINPUT_IOCTL_BASE, 102, int)
@@ -38,6 +54,63 @@
#define UI_SET_LEDBIT _IOW(UINPUT_IOCTL_BASE, 105, int)
#define UI_SET_SNDBIT _IOW(UINPUT_IOCTL_BASE, 106, int)
#define UI_SET_FFBIT _IOW(UINPUT_IOCTL_BASE, 107, int)
+#define UI_SET_PHYS _IOW(UINPUT_IOCTL_BASE, 108, char*)
+
+#define UI_BEGIN_FF_UPLOAD _IOWR(UINPUT_IOCTL_BASE, 200, struct uinput_ff_upload)
+#define UI_END_FF_UPLOAD _IOW(UINPUT_IOCTL_BASE, 201, struct uinput_ff_upload)
+#define UI_BEGIN_FF_ERASE _IOWR(UINPUT_IOCTL_BASE, 202, struct uinput_ff_erase)
+#define UI_END_FF_ERASE _IOW(UINPUT_IOCTL_BASE, 203, struct uinput_ff_erase)
+
+/* To write a force-feedback-capable driver, the upload_effect
+ * and erase_effect callbacks in input_dev must be implemented.
+ * The uinput driver will generate a fake input event when one of
+ * these callbacks are invoked. The userspace code then uses
+ * ioctls to retrieve additional parameters and send the return code.
+ * The callback blocks until this return code is sent.
+ *
+ * The described callback mechanism is only used if EV_FF is set.
+ * Otherwise, default implementations of upload_effect and erase_effect
+ * are used.
+ *
+ * To implement upload_effect():
+ * 1. Wait for an event with type==EV_UINPUT and code==UI_FF_UPLOAD.
+ * A request ID will be given in 'value'.
+ * 2. Allocate a uinput_ff_upload struct, fill in request_id with
+ * the 'value' from the EV_UINPUT event.
+ * 3. Issue a UI_BEGIN_FF_UPLOAD ioctl, giving it the
+ * uinput_ff_upload struct. It will be filled in with the
+ * ff_effect passed to upload_effect().
+ * 4. Perform the effect upload, and place the modified ff_effect
+ * and a return code back into the uinput_ff_upload struct.
+ * 5. Issue a UI_END_FF_UPLOAD ioctl, also giving it the
+ * uinput_ff_upload_effect struct. This will complete execution
+ * of our upload_effect() handler.
+ *
+ * To implement erase_effect():
+ * 1. Wait for an event with type==EV_UINPUT and code==UI_FF_ERASE.
+ * A request ID will be given in 'value'.
+ * 2. Allocate a uinput_ff_erase struct, fill in request_id with
+ * the 'value' from the EV_UINPUT event.
+ * 3. Issue a UI_BEGIN_FF_ERASE ioctl, giving it the
+ * uinput_ff_erase struct. It will be filled in with the
+ * effect ID passed to erase_effect().
+ * 4. Perform the effect erasure, and place a return code back
+ * into the uinput_ff_erase struct.
+ * and a return code back into the uinput_ff_erase struct.
+ * 5. Issue a UI_END_FF_ERASE ioctl, also giving it the
+ * uinput_ff_erase_effect struct. This will complete execution
+ * of our erase_effect() handler.
+ */
+
+/* This is the new event type, used only by uinput.
+ * 'code' is UI_FF_UPLOAD or UI_FF_ERASE, and 'value'
+ * is the unique request ID. This number was picked
+ * arbitrarily, above EV_MAX (since the input system
+ * never sees it) but in the range of a 16-bit int.
+ */
+#define EV_UINPUT 0x0101
+#define UI_FF_UPLOAD 1
+#define UI_FF_ERASE 2
#ifndef NBITS
#define NBITS(x) ((((x)-1)/(sizeof(long)*8))+1)
Added: linux-libc-headers/trunk/include/linux/usb_cdc.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/linux/usb_cdc.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,192 @@
+/*
+ * USB Communications Device Class (CDC) definitions
+ *
+ * CDC says how to talk to lots of different types of network adapters,
+ * notably ethernet adapters and various modems. It's used mostly with
+ * firmware based USB peripherals.
+ */
+
+#define USB_CDC_SUBCLASS_ACM 0x02
+#define USB_CDC_SUBCLASS_ETHERNET 0x06
+#define USB_CDC_SUBCLASS_WHCM 0x08
+#define USB_CDC_SUBCLASS_DMM 0x09
+#define USB_CDC_SUBCLASS_MDLM 0x0a
+#define USB_CDC_SUBCLASS_OBEX 0x0b
+
+#define USB_CDC_PROTO_NONE 0
+
+#define USB_CDC_ACM_PROTO_AT_V25TER 1
+#define USB_CDC_ACM_PROTO_AT_PCCA101 2
+#define USB_CDC_ACM_PROTO_AT_PCCA101_WAKE 3
+#define USB_CDC_ACM_PROTO_AT_GSM 4
+#define USB_CDC_ACM_PROTO_AT_3G 5
+#define USB_CDC_ACM_PROTO_AT_CDMA 6
+#define USB_CDC_ACM_PROTO_VENDOR 0xff
+
+/*-------------------------------------------------------------------------*/
+
+/*
+ * Class-Specific descriptors ... there are a couple dozen of them
+ */
+
+#define USB_CDC_HEADER_TYPE 0x00 /* header_desc */
+#define USB_CDC_CALL_MANAGEMENT_TYPE 0x01 /* call_mgmt_descriptor */
+#define USB_CDC_ACM_TYPE 0x02 /* acm_descriptor */
+#define USB_CDC_UNION_TYPE 0x06 /* union_desc */
+#define USB_CDC_COUNTRY_TYPE 0x07
+#define USB_CDC_ETHERNET_TYPE 0x0f /* ether_desc */
+#define USB_CDC_WHCM_TYPE 0x11
+#define USB_CDC_MDLM_TYPE 0x12 /* mdlm_desc */
+#define USB_CDC_MDLM_DETAIL_TYPE 0x13 /* mdlm_detail_desc */
+#define USB_CDC_DMM_TYPE 0x14
+#define USB_CDC_OBEX_TYPE 0x15
+
+/* "Header Functional Descriptor" from CDC spec 5.2.3.1 */
+struct usb_cdc_header_desc {
+ __u8 bLength;
+ __u8 bDescriptorType;
+ __u8 bDescriptorSubType;
+
+ __le16 bcdCDC;
+} __attribute__ ((packed));
+
+/* "Call Management Descriptor" from CDC spec 5.2.3.2 */
+struct usb_cdc_call_mgmt_descriptor {
+ __u8 bLength;
+ __u8 bDescriptorType;
+ __u8 bDescriptorSubType;
+
+ __u8 bmCapabilities;
+#define USB_CDC_CALL_MGMT_CAP_CALL_MGMT 0x01
+#define USB_CDC_CALL_MGMT_CAP_DATA_INTF 0x02
+
+ __u8 bDataInterface;
+} __attribute__ ((packed));
+
+/* "Abstract Control Management Descriptor" from CDC spec 5.2.3.3 */
+struct usb_cdc_acm_descriptor {
+ __u8 bLength;
+ __u8 bDescriptorType;
+ __u8 bDescriptorSubType;
+
+ __u8 bmCapabilities;
+} __attribute__ ((packed));
+
+/* "Union Functional Descriptor" from CDC spec 5.2.3.8 */
+struct usb_cdc_union_desc {
+ __u8 bLength;
+ __u8 bDescriptorType;
+ __u8 bDescriptorSubType;
+
+ __u8 bMasterInterface0;
+ __u8 bSlaveInterface0;
+ /* ... and there could be other slave interfaces */
+} __attribute__ ((packed));
+
+/* "Ethernet Networking Functional Descriptor" from CDC spec 5.2.3.16 */
+struct usb_cdc_ether_desc {
+ __u8 bLength;
+ __u8 bDescriptorType;
+ __u8 bDescriptorSubType;
+
+ __u8 iMACAddress;
+ __le32 bmEthernetStatistics;
+ __le16 wMaxSegmentSize;
+ __le16 wNumberMCFilters;
+ __u8 bNumberPowerFilters;
+} __attribute__ ((packed));
+
+/* "MDLM Functional Descriptor" from CDC WMC spec 6.7.2.3 */
+struct usb_cdc_mdlm_desc {
+ __u8 bLength;
+ __u8 bDescriptorType;
+ __u8 bDescriptorSubType;
+
+ __le16 bcdVersion;
+ __u8 bGUID[16];
+} __attribute__ ((packed));
+
+/* "MDLM Detail Functional Descriptor" from CDC WMC spec 6.7.2.4 */
+struct usb_cdc_mdlm_detail_desc {
+ __u8 bLength;
+ __u8 bDescriptorType;
+ __u8 bDescriptorSubType;
+
+ /* type is associated with mdlm_desc.bGUID */
+ __u8 bGuidDescriptorType;
+ __u8 bDetailData[0];
+} __attribute__ ((packed));
+
+/*-------------------------------------------------------------------------*/
+
+/*
+ * Class-Specific Control Requests (6.2)
+ *
+ * section 3.6.2.1 table 4 has the ACM profile, for modems.
+ * section 3.8.2 table 10 has the ethernet profile.
+ *
+ * Microsoft's RNDIS stack for Ethernet is a vendor-specific CDC ACM variant,
+ * heavily dependent on the encapsulated (proprietary) command mechanism.
+ */
+
+#define USB_CDC_SEND_ENCAPSULATED_COMMAND 0x00
+#define USB_CDC_GET_ENCAPSULATED_RESPONSE 0x01
+#define USB_CDC_REQ_SET_LINE_CODING 0x20
+#define USB_CDC_REQ_GET_LINE_CODING 0x21
+#define USB_CDC_REQ_SET_CONTROL_LINE_STATE 0x22
+#define USB_CDC_REQ_SEND_BREAK 0x23
+#define USB_CDC_SET_ETHERNET_MULTICAST_FILTERS 0x40
+#define USB_CDC_SET_ETHERNET_PM_PATTERN_FILTER 0x41
+#define USB_CDC_GET_ETHERNET_PM_PATTERN_FILTER 0x42
+#define USB_CDC_SET_ETHERNET_PACKET_FILTER 0x43
+#define USB_CDC_GET_ETHERNET_STATISTIC 0x44
+
+/* Line Coding Structure from CDC spec 6.2.13 */
+struct usb_cdc_line_coding {
+ __le32 dwDTERate;
+ __u8 bCharFormat;
+#define USB_CDC_1_STOP_BITS 0
+#define USB_CDC_1_5_STOP_BITS 1
+#define USB_CDC_2_STOP_BITS 2
+
+ __u8 bParityType;
+#define USB_CDC_NO_PARITY 0
+#define USB_CDC_ODD_PARITY 1
+#define USB_CDC_EVEN_PARITY 2
+#define USB_CDC_MARK_PARITY 3
+#define USB_CDC_SPACE_PARITY 4
+
+ __u8 bDataBits;
+} __attribute__ ((packed));
+
+/* table 62; bits in multicast filter */
+#define USB_CDC_PACKET_TYPE_PROMISCUOUS (1 << 0)
+#define USB_CDC_PACKET_TYPE_ALL_MULTICAST (1 << 1) /* no filter */
+#define USB_CDC_PACKET_TYPE_DIRECTED (1 << 2)
+#define USB_CDC_PACKET_TYPE_BROADCAST (1 << 3)
+#define USB_CDC_PACKET_TYPE_MULTICAST (1 << 4) /* filtered */
+
+
+/*-------------------------------------------------------------------------*/
+
+/*
+ * Class-Specific Notifications (6.3) sent by interrupt transfers
+ *
+ * section 3.8.2 table 11 of the CDC spec lists Ethernet notifications
+ * section 3.6.2.1 table 5 specifies ACM notifications, accepted by RNDIS
+ * RNDIS also defines its own bit-incompatible notifications
+ */
+
+#define USB_CDC_NOTIFY_NETWORK_CONNECTION 0x00
+#define USB_CDC_NOTIFY_RESPONSE_AVAILABLE 0x01
+#define USB_CDC_NOTIFY_SERIAL_STATE 0x20
+#define USB_CDC_NOTIFY_SPEED_CHANGE 0x2a
+
+struct usb_cdc_notification {
+ __u8 bmRequestType;
+ __u8 bNotificationType;
+ __le16 wValue;
+ __le16 wIndex;
+ __le16 wLength;
+} __attribute__ ((packed));
+
Modified: linux-libc-headers/trunk/include/linux/usbdevice_fs.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/usbdevice_fs.h (original)
+++ linux-libc-headers/trunk/include/linux/usbdevice_fs.h Tue Jul 5 22:58:33 2005
@@ -31,6 +31,7 @@
#define _LINUX_USBDEVICE_FS_H
#include <linux/types.h>
+#include <linux/compat.h>
/* --------------------------------------------------------------------- */
@@ -122,6 +123,24 @@
char port [127]; /* e.g. port 3 connects to device 27 */
};
+#ifdef CONFIG_COMPAT
+struct usbdevfs_urb32 {
+ unsigned char type;
+ unsigned char endpoint;
+ compat_int_t status;
+ compat_uint_t flags;
+ compat_caddr_t buffer;
+ compat_int_t buffer_length;
+ compat_int_t actual_length;
+ compat_int_t start_frame;
+ compat_int_t number_of_packets;
+ compat_int_t error_count;
+ compat_uint_t signr;
+ compat_caddr_t usercontext; /* unused */
+ struct usbdevfs_iso_packet_desc iso_frame_desc[0];
+};
+#endif
+
#define USBDEVFS_CONTROL _IOWR('U', 0, struct usbdevfs_ctrltransfer)
#define USBDEVFS_BULK _IOWR('U', 2, struct usbdevfs_bulktransfer)
#define USBDEVFS_RESETEP _IOR('U', 3, unsigned int)
@@ -129,9 +148,12 @@
#define USBDEVFS_SETCONFIGURATION _IOR('U', 5, unsigned int)
#define USBDEVFS_GETDRIVER _IOW('U', 8, struct usbdevfs_getdriver)
#define USBDEVFS_SUBMITURB _IOR('U', 10, struct usbdevfs_urb)
+#define USBDEVFS_SUBMITURB32 _IOR('U', 10, struct usbdevfs_urb32)
#define USBDEVFS_DISCARDURB _IO('U', 11)
#define USBDEVFS_REAPURB _IOW('U', 12, void *)
+#define USBDEVFS_REAPURB32 _IOW('U', 12, __u32)
#define USBDEVFS_REAPURBNDELAY _IOW('U', 13, void *)
+#define USBDEVFS_REAPURBNDELAY32 _IOW('U', 13, __u32)
#define USBDEVFS_DISCSIGNAL _IOR('U', 14, struct usbdevfs_disconnectsignal)
#define USBDEVFS_CLAIMINTERFACE _IOR('U', 15, unsigned int)
#define USBDEVFS_RELEASEINTERFACE _IOR('U', 16, unsigned int)
@@ -142,5 +164,4 @@
#define USBDEVFS_CLEAR_HALT _IOR('U', 21, unsigned int)
#define USBDEVFS_DISCONNECT _IO('U', 22)
#define USBDEVFS_CONNECT _IO('U', 23)
-
#endif /* _LINUX_USBDEVICE_FS_H */
Modified: linux-libc-headers/trunk/include/linux/videodev2.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/videodev2.h (original)
+++ linux-libc-headers/trunk/include/linux/videodev2.h Tue Jul 5 22:58:33 2005
@@ -266,64 +266,92 @@
/* The above is based on SMPTE timecodes */
+#if 1
/*
- * C O M P R E S S I O N P A R A M E T E R S
+ * M P E G C O M P R E S S I O N P A R A M E T E R S
+ *
+ * ### WARNING: this is still work-in-progress right now, most likely
+ * ### there will be some incompatible changes.
+ *
*/
-#if 0
-/* ### generic compression settings don't work, there is too much
- * ### codec-specific stuff. Maybe reuse that for MPEG codec settings
- * ### later ... */
-struct v4l2_compression
-{
- __u32 quality;
- __u32 keyframerate;
- __u32 pframerate;
- __u32 reserved[5];
-
-/* what we'll need for MPEG, extracted from some postings on
- the v4l list (Gert Vervoort, PlasmaJohn).
-
-system stream:
- - type: elementary stream(ES), packatised elementary stream(s) (PES)
- program stream(PS), transport stream(TS)
- - system bitrate
- - PS packet size (DVD: 2048 bytes, VCD: 2324 bytes)
- - TS video PID
- - TS audio PID
- - TS PCR PID
- - TS system information tables (PAT, PMT, CAT, NIT and SIT)
- - (MPEG-1 systems stream vs. MPEG-2 program stream (TS not supported
- by MPEG-1 systems)
-
-audio:
- - type: MPEG (+Layer I,II,III), AC-3, LPCM
- - bitrate
- - sampling frequency (DVD: 48 Khz, VCD: 44.1 KHz, 32 kHz)
- - Trick Modes? (ff, rew)
- - Copyright
- - Inverse Telecine
-
-video:
- - picturesize (SIF, 1/2 D1, 2/3 D1, D1) and PAL/NTSC norm can be set
- through excisting V4L2 controls
- - noise reduction, parameters encoder specific?
- - MPEG video version: MPEG-1, MPEG-2
- - GOP (Group Of Pictures) definition:
- - N: number of frames per GOP
- - M: distance between reference (I,P) frames
- - open/closed GOP
- - quantiser matrix: inter Q matrix (64 bytes) and intra Q matrix (64 bytes)
- - quantiser scale: linear or logarithmic
- - scanning: alternate or zigzag
- - bitrate mode: CBR (constant bitrate) or VBR (variable bitrate).
- - target video bitrate for CBR
- - target video bitrate for VBR
- - maximum video bitrate for VBR - min. quantiser value for VBR
- - max. quantiser value for VBR
- - adaptive quantisation value
- - return the number of bytes per GOP or bitrate for bitrate monitoring
-*/
+
+enum v4l2_bitrate_mode {
+ V4L2_BITRATE_NONE = 0, /* not specified */
+ V4L2_BITRATE_CBR, /* constant bitrate */
+ V4L2_BITRATE_VBR, /* variable bitrate */
+};
+struct v4l2_bitrate {
+ /* rates are specified in kbit/sec */
+ enum v4l2_bitrate_mode mode;
+ __u32 min;
+ __u32 target; /* use this one for CBR */
+ __u32 max;
+};
+
+enum v4l2_mpeg_streamtype {
+ V4L2_MPEG_SS_1, /* MPEG-1 system stream */
+ V4L2_MPEG_PS_2, /* MPEG-2 program stream */
+ V4L2_MPEG_TS_2, /* MPEG-2 transport stream */
+ V4L2_MPEG_PS_DVD, /* MPEG-2 program stream with DVD header fixups */
+};
+enum v4l2_mpeg_audiotype {
+ V4L2_MPEG_AU_2_I, /* MPEG-2 layer 1 */
+ V4L2_MPEG_AU_2_II, /* MPEG-2 layer 2 */
+ V4L2_MPEG_AU_2_III, /* MPEG-2 layer 3 */
+ V4L2_MPEG_AC3, /* AC3 */
+ V4L2_MPEG_LPCM, /* LPCM */
+};
+enum v4l2_mpeg_videotype {
+ V4L2_MPEG_VI_1, /* MPEG-1 */
+ V4L2_MPEG_VI_2, /* MPEG-2 */
+};
+enum v4l2_mpeg_aspectratio {
+ V4L2_MPEG_ASPECT_SQUARE = 1, /* square pixel */
+ V4L2_MPEG_ASPECT_4_3 = 2, /* 4 : 3 */
+ V4L2_MPEG_ASPECT_16_9 = 3, /* 16 : 9 */
+ V4L2_MPEG_ASPECT_1_221 = 4, /* 1 : 2,21 */
+};
+
+struct v4l2_mpeg_compression {
+ /* general */
+ enum v4l2_mpeg_streamtype st_type;
+ struct v4l2_bitrate st_bitrate;
+
+ /* transport streams */
+ __u16 ts_pid_pmt;
+ __u16 ts_pid_audio;
+ __u16 ts_pid_video;
+ __u16 ts_pid_pcr;
+
+ /* program stream */
+ __u16 ps_size;
+ __u16 reserved_1; /* align */
+
+ /* audio */
+ enum v4l2_mpeg_audiotype au_type;
+ struct v4l2_bitrate au_bitrate;
+ __u32 au_sample_rate;
+ __u8 au_pesid;
+ __u8 reserved_2[3]; /* align */
+
+ /* video */
+ enum v4l2_mpeg_videotype vi_type;
+ enum v4l2_mpeg_aspectratio vi_aspect_ratio;
+ struct v4l2_bitrate vi_bitrate;
+ __u32 vi_frame_rate;
+ __u16 vi_frames_per_gop;
+ __u16 vi_bframes_count;
+ __u8 vi_pesid;
+ __u8 reserved_3[3]; /* align */
+
+ /* misc flags */
+ __u32 closed_gops:1;
+ __u32 pulldown:1;
+ __u32 reserved_4:30; /* align */
+
+ /* I don't expect the above being perfect yet ;) */
+ __u32 reserved_5[8];
};
#endif
@@ -839,9 +867,9 @@
#define VIDIOC_ENUM_FMT _IOWR ('V', 2, struct v4l2_fmtdesc)
#define VIDIOC_G_FMT _IOWR ('V', 4, struct v4l2_format)
#define VIDIOC_S_FMT _IOWR ('V', 5, struct v4l2_format)
-#if 0
-#define VIDIOC_G_COMP _IOR ('V', 6, struct v4l2_compression)
-#define VIDIOC_S_COMP _IOW ('V', 7, struct v4l2_compression)
+#if 1 /* experimental */
+#define VIDIOC_G_MPEGCOMP _IOR ('V', 6, struct v4l2_mpeg_compression)
+#define VIDIOC_S_MPEGCOMP _IOW ('V', 7, struct v4l2_mpeg_compression)
#endif
#define VIDIOC_REQBUFS _IOWR ('V', 8, struct v4l2_requestbuffers)
#define VIDIOC_QUERYBUF _IOWR ('V', 9, struct v4l2_buffer)
Modified: linux-libc-headers/trunk/include/linux/vt_kern.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/vt_kern.h (original)
+++ linux-libc-headers/trunk/include/linux/vt_kern.h Tue Jul 5 22:58:33 2005
@@ -23,15 +23,6 @@
#define BROKEN_GRAPHICS_PROGRAMS 1
#endif
-extern struct vt_struct {
- int vc_num; /* The console number */
- unsigned char vc_mode; /* KD_TEXT, ... */
- struct vt_mode vt_mode;
- int vt_pid;
- int vt_newvt;
- wait_queue_head_t paste_wait;
-} *vt_cons[MAX_NR_CONSOLES];
-
extern void kd_mksound(unsigned int hz, unsigned int ticks);
extern int kbd_rate(struct kbd_repeat *rep);
@@ -39,25 +30,20 @@
int vc_allocate(unsigned int console);
int vc_cons_allocated(unsigned int console);
-int vc_resize(int currcons, unsigned int cols, unsigned int lines);
+int vc_resize(struct vc_data *vc, unsigned int cols, unsigned int lines);
void vc_disallocate(unsigned int console);
-void reset_palette(int currcons);
-void set_palette(int currcons);
+void reset_palette(struct vc_data *vc);
void do_blank_screen(int entering_gfx);
void do_unblank_screen(int leaving_gfx);
void unblank_screen(void);
void poke_blanked_console(void);
-int con_font_op(int currcons, struct console_font_op *op);
-int con_font_set(int currcons, struct console_font_op *op);
-int con_font_get(int currcons, struct console_font_op *op);
-int con_font_default(int currcons, struct console_font_op *op);
-int con_font_copy(int currcons, struct console_font_op *op);
+int con_font_op(struct vc_data *vc, struct console_font_op *op);
int con_set_cmap(unsigned char *cmap);
int con_get_cmap(unsigned char *cmap);
-void scrollback(int);
-void scrollfront(int);
-void update_region(int currcons, unsigned long start, int count);
-void redraw_screen(int new_console, int is_switch);
+void scrollback(struct vc_data *vc, int lines);
+void scrollfront(struct vc_data *vc, int lines);
+void update_region(struct vc_data *vc, unsigned long start, int count);
+void redraw_screen(struct vc_data *vc, int is_switch);
#define update_screen(x) redraw_screen(x, 0)
#define switch_screen(x) redraw_screen(x, 1)
@@ -73,25 +59,25 @@
int con_get_trans_old(unsigned char * table);
int con_set_trans_new(unsigned short * table);
int con_get_trans_new(unsigned short * table);
-int con_clear_unimap(int currcons, struct unimapinit *ui);
-int con_set_unimap(int currcons, ushort ct, struct unipair *list);
-int con_get_unimap(int currcons, ushort ct, ushort *uct, struct unipair *list);
-int con_set_default_unimap(int currcons);
-void con_free_unimap(int currcons);
-void con_protect_unimap(int currcons, int rdonly);
-int con_copy_unimap(int dstcons, int srccons);
+int con_clear_unimap(struct vc_data *vc, struct unimapinit *ui);
+int con_set_unimap(struct vc_data *vc, ushort ct, struct unipair *list);
+int con_get_unimap(struct vc_data *vc, ushort ct, ushort *uct, struct unipair *list);
+int con_set_default_unimap(struct vc_data *vc);
+void con_free_unimap(struct vc_data *vc);
+void con_protect_unimap(struct vc_data *vc, int rdonly);
+int con_copy_unimap(struct vc_data *dst_vc, struct vc_data *src_vc);
/* vt.c */
-void complete_change_console(unsigned int new_console);
int vt_waitactive(int vt);
-void change_console(unsigned int);
-void reset_vc(unsigned int new_console);
+void change_console(struct vc_data *new_vc);
+void reset_vc(struct vc_data *vc);
/*
* vc_screen.c shares this temporary buffer with the console write code so that
* we can easily avoid touching user space while holding the console spinlock.
*/
-#define CON_BUF_SIZE PAGE_SIZE
+
+#define CON_BUF_SIZE (CONFIG_BASE_SMALL ? 256 : PAGE_SIZE)
extern char con_buf[CON_BUF_SIZE];
extern struct semaphore con_buf_sem;
Modified: linux-libc-headers/trunk/include/linux/workqueue.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/workqueue.h (original)
+++ linux-libc-headers/trunk/include/linux/workqueue.h Tue Jul 5 22:58:33 2005
@@ -70,6 +70,9 @@
extern int keventd_up(void);
extern void init_workqueues(void);
+void cancel_rearming_delayed_work(struct work_struct *work);
+void cancel_rearming_delayed_workqueue(struct workqueue_struct *,
+ struct work_struct *);
/*
* Kill off a pending schedule_delayed_work(). Note that the work callback
Modified: linux-libc-headers/trunk/include/linux/xfrm.h
==============================================================================
--- linux-libc-headers/trunk/include/linux/xfrm.h (original)
+++ linux-libc-headers/trunk/include/linux/xfrm.h Tue Jul 5 22:58:33 2005
@@ -140,8 +140,11 @@
XFRM_MSG_FLUSHPOLICY,
#define XFRM_MSG_FLUSHPOLICY XFRM_MSG_FLUSHPOLICY
- XFRM_MSG_MAX
+ __XFRM_MSG_MAX
};
+#define XFRM_MSG_MAX (__XFRM_MSG_MAX - 1)
+
+#define XFRM_NR_MSGTYPES (XFRM_MSG_MAX + 1 - XFRM_MSG_BASE)
struct xfrm_user_tmpl {
struct xfrm_id id;
Modified: linux-libc-headers/trunk/include/scsi/scsi.h
==============================================================================
--- linux-libc-headers/trunk/include/scsi/scsi.h (original)
+++ linux-libc-headers/trunk/include/scsi/scsi.h Tue Jul 5 22:58:33 2005
@@ -169,8 +169,10 @@
#define RESERVATION_CONFLICT 0x0c
#define COMMAND_TERMINATED 0x11
#define QUEUE_FULL 0x14
+#define ACA_ACTIVE 0x18
+#define TASK_ABORTED 0x20
-#define STATUS_MASK 0x3e
+#define STATUS_MASK 0xfe
/*
* SENSE KEYS
@@ -293,6 +295,8 @@
#define DID_PASSTHROUGH 0x0a /* Force command past mid-layer */
#define DID_SOFT_ERROR 0x0b /* The low level driver just wish a retry */
#define DID_IMM_RETRY 0x0c /* Retry without decrementing retry count */
+#define DID_REQUEUE 0x0d /* Requeue command (no immediate retry) also
+ * without decrementing the retry count */
#define DRIVER_OK 0x00 /* Driver status */
/*
@@ -348,7 +352,7 @@
* host_byte = set by low-level driver to indicate status.
* driver_byte = set by mid-level.
*/
-#define status_byte(result) (((result) >> 1) & 0x1f)
+#define status_byte(result) (((result) >> 1) & 0x7f)
#define msg_byte(result) (((result) >> 8) & 0xff)
#define host_byte(result) (((result) >> 16) & 0xff)
#define driver_byte(result) (((result) >> 24) & 0xff)
@@ -358,6 +362,15 @@
#define sense_error(sense) ((sense) & 0xf)
#define sense_valid(sense) ((sense) & 0x80);
+/*
+ * default timeouts
+*/
+#define FORMAT_UNIT_TIMEOUT (2 * 60 * 60 * HZ)
+#define START_STOP_TIMEOUT (60 * HZ)
+#define MOVE_MEDIUM_TIMEOUT (5 * 60 * HZ)
+#define READ_ELEMENT_STATUS_TIMEOUT (5 * 60 * HZ)
+#define READ_DEFECT_DATA_TIMEOUT (60 * HZ )
+
#define IDENTIFY_BASE 0x80
#define IDENTIFY(can_disconnect, lun) (IDENTIFY_BASE |\
Modified: linux-libc-headers/trunk/include/sound/ac97_codec.h
==============================================================================
--- linux-libc-headers/trunk/include/sound/ac97_codec.h (original)
+++ linux-libc-headers/trunk/include/sound/ac97_codec.h Tue Jul 5 22:58:33 2005
@@ -356,6 +356,7 @@
#define AC97_SCAP_INDEP_SDIN (1<<6) /* independent SDIN */
#define AC97_SCAP_INV_EAPD (1<<7) /* inverted EAPD */
#define AC97_SCAP_DETECT_BY_VENDOR (1<<8) /* use vendor registers for read tests */
+#define AC97_SCAP_NO_SPDIF (1<<9) /* don't build SPDIF controls */
/* ac97->flags */
#define AC97_HAS_PC_BEEP (1<<0) /* force PC Speaker usage */
@@ -366,6 +367,13 @@
#define AC97_DOUBLE_RATE (1<<5) /* supports double rate playback */
#define AC97_HAS_NO_MASTER_VOL (1<<6) /* no Master volume */
#define AC97_HAS_NO_PCM_VOL (1<<7) /* no PCM volume */
+#define AC97_DEFAULT_POWER_OFF (1<<8) /* no RESET write */
+#define AC97_MODEM_PATCH (1<<9) /* modem patch */
+#define AC97_HAS_NO_REC_GAIN (1<<10) /* no Record gain */
+#define AC97_HAS_NO_PHONE (1<<11) /* no PHONE volume */
+#define AC97_HAS_NO_PC_BEEP (1<<12) /* no PC Beep volume */
+#define AC97_HAS_NO_VIDEO (1<<13) /* no Video volume */
+#define AC97_HAS_NO_CD (1<<14) /* no CD volume */
/* rates indexes */
#define AC97_RATES_FRONT_DAC 0
@@ -580,4 +588,11 @@
int snd_ac97_pcm_close(struct ac97_pcm *pcm);
int snd_ac97_pcm_double_rate_rules(snd_pcm_runtime_t *runtime);
+struct ac97_enum {
+ unsigned char reg;
+ unsigned char shift_l;
+ unsigned char shift_r;
+ unsigned short mask;
+ const char **texts;
+};
#endif /* __SOUND_AC97_CODEC_H */
Added: linux-libc-headers/trunk/include/sound/ak4114.h
==============================================================================
--- (empty file)
+++ linux-libc-headers/trunk/include/sound/ak4114.h Tue Jul 5 22:58:33 2005
@@ -0,0 +1,205 @@
+#ifndef __SOUND_AK4114_H
+#define __SOUND_AK4114_H
+
+/*
+ * Routines for Asahi Kasei AK4114
+ * Copyright (c) by Jaroslav Kysela <perex at suse.cz>,
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+/* AK4114 registers */
+#define AK4114_REG_PWRDN 0x00 /* power down */
+#define AK4114_REG_FORMAT 0x01 /* format control */
+#define AK4114_REG_IO0 0x02 /* input/output control */
+#define AK4114_REG_IO1 0x03 /* input/output control */
+#define AK4114_REG_INT0_MASK 0x04 /* interrupt0 mask */
+#define AK4114_REG_INT1_MASK 0x05 /* interrupt1 mask */
+#define AK4114_REG_RCS0 0x06 /* receiver status 0 */
+#define AK4114_REG_RCS1 0x07 /* receiver status 1 */
+#define AK4114_REG_RXCSB0 0x08 /* RX channel status byte 0 */
+#define AK4114_REG_RXCSB1 0x09 /* RX channel status byte 1 */
+#define AK4114_REG_RXCSB2 0x0a /* RX channel status byte 2 */
+#define AK4114_REG_RXCSB3 0x0b /* RX channel status byte 3 */
+#define AK4114_REG_RXCSB4 0x0c /* RX channel status byte 4 */
+#define AK4114_REG_TXCSB0 0x0d /* TX channel status byte 0 */
+#define AK4114_REG_TXCSB1 0x0e /* TX channel status byte 1 */
+#define AK4114_REG_TXCSB2 0x0f /* TX channel status byte 2 */
+#define AK4114_REG_TXCSB3 0x10 /* TX channel status byte 3 */
+#define AK4114_REG_TXCSB4 0x11 /* TX channel status byte 4 */
+#define AK4114_REG_Pc0 0x12 /* burst preamble Pc byte 0 */
+#define AK4114_REG_Pc1 0x13 /* burst preamble Pc byte 1 */
+#define AK4114_REG_Pd0 0x14 /* burst preamble Pd byte 0 */
+#define AK4114_REG_Pd1 0x15 /* burst preamble Pd byte 1 */
+#define AK4114_REG_QSUB_ADDR 0x16 /* Q-subcode address + control */
+#define AK4114_REG_QSUB_TRACK 0x17 /* Q-subcode track */
+#define AK4114_REG_QSUB_INDEX 0x18 /* Q-subcode index */
+#define AK4114_REG_QSUB_MINUTE 0x19 /* Q-subcode minute */
+#define AK4114_REG_QSUB_SECOND 0x1a /* Q-subcode second */
+#define AK4114_REG_QSUB_FRAME 0x1b /* Q-subcode frame */
+#define AK4114_REG_QSUB_ZERO 0x1c /* Q-subcode zero */
+#define AK4114_REG_QSUB_ABSMIN 0x1d /* Q-subcode absolute minute */
+#define AK4114_REG_QSUB_ABSSEC 0x1e /* Q-subcode absolute second */
+#define AK4114_REG_QSUB_ABSFRM 0x1f /* Q-subcode absolute frame */
+
+/* sizes */
+#define AK4114_REG_RXCSB_SIZE ((AK4114_REG_RXCSB4-AK4114_REG_RXCSB0)+1)
+#define AK4114_REG_TXCSB_SIZE ((AK4114_REG_TXCSB4-AK4114_REG_TXCSB0)+1)
+#define AK4114_REG_QSUB_SIZE ((AK4114_REG_QSUB_ABSFRM-AK4114_REG_QSUB_ADDR)+1)
+
+/* AK4117_REG_PWRDN bits */
+#define AK4114_CS12 (1<<7) /* Channel Status Select */
+#define AK4114_BCU (1<<6) /* Block Start & C/U Output Mode */
+#define AK4114_CM1 (1<<5) /* Master Clock Operation Select */
+#define AK4114_CM0 (1<<4) /* Master Clock Operation Select */
+#define AK4114_OCKS1 (1<<3) /* Master Clock Frequency Select */
+#define AK4114_OCKS0 (1<<2) /* Master Clock Frequency Select */
+#define AK4114_PWN (1<<1) /* 0 = power down, 1 = normal operation */
+#define AK4114_RST (1<<0) /* 0 = reset & initialize (except this register), 1 = normal operation */
+
+/* AK4114_REQ_FORMAT bits */
+#define AK4114_MONO (1<<7) /* Double Sampling Frequency Mode: 0 = stereo, 1 = mono */
+#define AK4114_DIF2 (1<<5) /* Audio Data Control */
+#define AK4114_DIF1 (1<<5) /* Audio Data Control */
+#define AK4114_DIF0 (1<<4) /* Audio Data Control */
+#define AK4114_DIF_16R (0) /* STDO: 16-bit, right justified */
+#define AK4114_DIF_18R (AK4114_DIF0) /* STDO: 18-bit, right justified */
+#define AK4114_DIF_20R (AK4114_DIF1) /* STDO: 20-bit, right justified */
+#define AK4114_DIF_24R (AK4114_DIF1|AK4114_DIF0) /* STDO: 24-bit, right justified */
+#define AK4114_DIF_24L (AK4114_DIF2) /* STDO: 24-bit, left justified */
+#define AK4114_DIF_24I2S (AK4114_DIF2|AK4114_DIF0) /* STDO: I2S */
+#define AK4114_DIF_I24L (AK4114_DIF2|AK4114_DIF1) /* STDO: 24-bit, left justified; LRCLK, BICK = Input */
+#define AK4114_DIF_I24I2S (AK4114_DIF2|AK4114_DIF1|AK4114_DIF0) /* STDO: I2S; LRCLK, BICK = Input */
+#define AK4114_DEAU (1<<3) /* Deemphasis Autodetect Enable (1 = enable) */
+#define AK4114_DEM1 (1<<2) /* 32kHz-48kHz Deemphasis Control */
+#define AK4114_DEM0 (1<<1) /* 32kHz-48kHz Deemphasis Control */
+#define AK4114_DEM_44KHZ (0)
+#define AK4114_DEM_48KHZ (AK4114_DEM1)
+#define AK4114_DEM_32KHZ (AK4114_DEM0|AK4114_DEM1)
+#define AK4114_DEM_96KHZ (AK4114_DEM1) /* DFS must be set */
+#define AK4114_DFS (1<<0) /* 96kHz Deemphasis Control */
+
+/* AK4114_REG_IO0 */
+#define AK4114_TX1E (1<<7) /* TX1 Output Enable (1 = enable) */
+#define AK4114_OPS12 (1<<2) /* Output Though Data Selector for TX1 pin */
+#define AK4114_OPS11 (1<<1) /* Output Though Data Selector for TX1 pin */
+#define AK4114_OPS10 (1<<0) /* Output Though Data Selector for TX1 pin */
+#define AK4114_TX0E (1<<3) /* TX0 Output Enable (1 = enable) */
+#define AK4114_OPS02 (1<<2) /* Output Though Data Selector for TX0 pin */
+#define AK4114_OPS01 (1<<1) /* Output Though Data Selector for TX0 pin */
+#define AK4114_OPS00 (1<<0) /* Output Though Data Selector for TX0 pin */
+
+/* AK4114_REG_IO1 */
+#define AK4114_EFH1 (1<<7) /* Interrupt 0 pin Hold */
+#define AK4114_EFH0 (1<<6) /* Interrupt 0 pin Hold */
+#define AK4114_EFH_512 (0)
+#define AK4114_EFH_1024 (AK4114_EFH0)
+#define AK4114_EFH_2048 (AK4114_EFH1)
+#define AK4114_EFH_4096 (AK4114_EFH1|AK4114_EFH0)
+#define AK4114_UDIT (1<<5) /* U-bit Control for DIT (0 = fixed '0', 1 = recovered) */
+#define AK4114_TLR (1<<4) /* Double Sampling Frequency Select for DIT (0 = L channel, 1 = R channel) */
+#define AK4114_DIT (1<<3) /* TX1 out: 0 = Through Data (RX data), 1 = Transmit Data (DAUX data) */
+#define AK4114_IPS2 (1<<2) /* Input Recovery Data Select */
+#define AK4114_IPS1 (1<<1) /* Input Recovery Data Select */
+#define AK4114_IPS0 (1<<0) /* Input Recovery Data Select */
+#define AK4114_IPS(x) ((x)&7)
+
+/* AK4114_REG_INT0_MASK && AK4114_REG_INT1_MASK*/
+#define AK4117_MQI (1<<7) /* mask enable for QINT bit */
+#define AK4117_MAT (1<<6) /* mask enable for AUTO bit */
+#define AK4117_MCI (1<<5) /* mask enable for CINT bit */
+#define AK4117_MUL (1<<4) /* mask enable for UNLOCK bit */
+#define AK4117_MDTS (1<<3) /* mask enable for DTSCD bit */
+#define AK4117_MPE (1<<2) /* mask enable for PEM bit */
+#define AK4117_MAN (1<<1) /* mask enable for AUDN bit */
+#define AK4117_MPR (1<<0) /* mask enable for PAR bit */
+
+/* AK4114_REG_RCS0 */
+#define AK4114_QINT (1<<7) /* Q-subcode buffer interrupt, 0 = no change, 1 = changed */
+#define AK4114_AUTO (1<<6) /* Non-PCM or DTS stream auto detection, 0 = no detect, 1 = detect */
+#define AK4114_CINT (1<<5) /* channel status buffer interrupt, 0 = no change, 1 = change */
+#define AK4114_UNLCK (1<<4) /* PLL lock status, 0 = lock, 1 = unlock */
+#define AK4114_DTSCD (1<<3) /* DTS-CD Detect, 0 = No detect, 1 = Detect */
+#define AK4114_PEM (1<<2) /* Pre-emphasis Detect, 0 = OFF, 1 = ON */
+#define AK4114_AUDION (1<<1) /* audio bit output, 0 = audio, 1 = non-audio */
+#define AK4114_PAR (1<<0) /* parity error or biphase error status, 0 = no error, 1 = error */
+
+/* AK4114_REG_RCS1 */
+#define AK4114_FS3 (1<<7) /* sampling frequency detection */
+#define AK4114_FS2 (1<<6)
+#define AK4114_FS1 (1<<5)
+#define AK4114_FS0 (1<<4)
+#define AK4114_FS_44100HZ (0)
+#define AK4114_FS_48000HZ (AK4114_FS1)
+#define AK4114_FS_32000HZ (AK4114_FS1|AK4114_FS0)
+#define AK4114_FS_88200HZ (AK4114_FS3)
+#define AK4114_FS_96000HZ (AK4114_FS3|AK4114_FS1)
+#define AK4114_FS_176400HZ (AK4114_FS3|AK4114_FS2)
+#define AK4114_FS_192000HZ (AK4114_FS3|AK4114_FS2|AK4114_FS1)
+#define AK4114_V (1<<3) /* Validity of Channel Status, 0 = Valid, 1 = Invalid */
+#define AK4114_QCRC (1<<1) /* CRC for Q-subcode, 0 = no error, 1 = error */
+#define AK4114_CCRC (1<<0) /* CRC for channel status, 0 = no error, 1 = error */
+
+/* flags for snd_ak4114_check_rate_and_errors() */
+#define AK4114_CHECK_NO_STAT (1<<0) /* no statistics */
+#define AK4114_CHECK_NO_RATE (1<<1) /* no rate check */
+
+#define AK4114_CONTROLS 14
+
+typedef void (ak4114_write_t)(void *private_data, unsigned char addr, unsigned char data);
+typedef unsigned char (ak4114_read_t)(void *private_data, unsigned char addr);
+
+typedef struct ak4114 ak4114_t;
+
+struct ak4114 {
+ snd_card_t * card;
+ ak4114_write_t * write;
+ ak4114_read_t * read;
+ void * private_data;
+ unsigned int init: 1;
+ spinlock_t lock;
+ unsigned char regmap[7];
+ unsigned char txcsb[5];
+ snd_kcontrol_t *kctls[AK4114_CONTROLS];
+ snd_pcm_substream_t *playback_substream;
+ snd_pcm_substream_t *capture_substream;
+ unsigned long parity_errors;
+ unsigned long v_bit_errors;
+ unsigned long qcrc_errors;
+ unsigned long ccrc_errors;
+ unsigned char rcs0;
+ unsigned char rcs1;
+ struct workqueue_struct *workqueue;
+ struct work_struct work;
+ void *change_callback_private;
+ void (*change_callback)(ak4114_t *ak4114, unsigned char c0, unsigned char c1);
+};
+
+int snd_ak4114_create(snd_card_t *card,
+ ak4114_read_t *read, ak4114_write_t *write,
+ unsigned char pgm[7], unsigned char txcsb[5],
+ void *private_data, ak4114_t **r_ak4114);
+void snd_ak4114_reg_write(ak4114_t *ak4114, unsigned char reg, unsigned char mask, unsigned char val);
+void snd_ak4114_reinit(ak4114_t *ak4114);
+int snd_ak4114_build(ak4114_t *ak4114,
+ snd_pcm_substream_t *playback_substream,
+ snd_pcm_substream_t *capture_substream);
+int snd_ak4114_external_rate(ak4114_t *ak4114);
+int snd_ak4114_check_rate_and_errors(ak4114_t *ak4114, unsigned int flags);
+
+#endif /* __SOUND_AK4114_H */
+
Modified: linux-libc-headers/trunk/include/sound/ak4117.h
==============================================================================
--- linux-libc-headers/trunk/include/sound/ak4117.h (original)
+++ linux-libc-headers/trunk/include/sound/ak4117.h Tue Jul 5 22:58:33 2005
@@ -106,7 +106,7 @@
#define AK4117_DIF_24L (AK4117_DIF2) /* STDO: 24-bit, left justified */
#define AK4117_DIF_24I2S (AK4117_DIF2|AK4117_DIF0) /* STDO: I2S */
-/* AK4117_REG_INT0_MASK & AK4117_INT1_MASK */
+/* AK4117_REG_INT0_MASK & AK4117_REG_INT1_MASK */
#define AK4117_MULK (1<<7) /* mask enable for UNLOCK bit */
#define AK4117_MPAR (1<<6) /* mask enable for PAR bit */
#define AK4117_MAUTO (1<<5) /* mask enable for AUTO bit */
@@ -181,8 +181,8 @@
int snd_ak4117_create(snd_card_t *card, ak4117_read_t *read, ak4117_write_t *write,
unsigned char pgm[5], void *private_data, ak4117_t **r_ak4117);
-void snd_ak4117_reg_write(ak4117_t *chip, unsigned char reg, unsigned char mask, unsigned char val);
-void snd_ak4117_reinit(ak4117_t *chip);
+void snd_ak4117_reg_write(ak4117_t *ak4117, unsigned char reg, unsigned char mask, unsigned char val);
+void snd_ak4117_reinit(ak4117_t *ak4117);
int snd_ak4117_build(ak4117_t *ak4117, snd_pcm_substream_t *capture_substream);
int snd_ak4117_external_rate(ak4117_t *ak4117);
int snd_ak4117_check_rate_and_errors(ak4117_t *ak4117, unsigned int flags);
Modified: linux-libc-headers/trunk/include/sound/ak4xxx-adda.h
==============================================================================
--- linux-libc-headers/trunk/include/sound/ak4xxx-adda.h (original)
+++ linux-libc-headers/trunk/include/sound/ak4xxx-adda.h Tue Jul 5 22:58:33 2005
@@ -50,7 +50,8 @@
/* template should fill the following fields */
unsigned int idx_offset; /* control index offset */
enum {
- SND_AK4524, SND_AK4528, SND_AK4529, SND_AK4355, SND_AK4381
+ SND_AK4524, SND_AK4528, SND_AK4529,
+ SND_AK4355, SND_AK4358, SND_AK4381
} type;
struct snd_ak4xxx_ops ops;
};
Modified: linux-libc-headers/trunk/include/sound/asound.h
==============================================================================
--- linux-libc-headers/trunk/include/sound/asound.h (original)
+++ linux-libc-headers/trunk/include/sound/asound.h Tue Jul 5 22:58:33 2005
@@ -561,6 +561,7 @@
/* global timers (device member) */
#define SNDRV_TIMER_GLOBAL_SYSTEM 0
#define SNDRV_TIMER_GLOBAL_RTC 1
+#define SNDRV_TIMER_GLOBAL_HPET 2
/* info flags */
#define SNDRV_TIMER_FLG_SLAVE (1<<0) /* cannot be controlled */
Modified: linux-libc-headers/trunk/include/sound/asoundef.h
==============================================================================
--- linux-libc-headers/trunk/include/sound/asoundef.h (original)
+++ linux-libc-headers/trunk/include/sound/asoundef.h Tue Jul 5 22:58:33 2005
@@ -185,7 +185,7 @@
#define MIDI_CTL_LSB_GENERAL_PURPOSE4 0x33
#define MIDI_CTL_SUSTAIN 0x40
#define MIDI_CTL_PORTAMENTO 0x41
-#define MIDI_CTL_SUSTENUTO 0x42
+#define MIDI_CTL_SOSTENUTO 0x42
#define MIDI_CTL_SOFT_PEDAL 0x43
#define MIDI_CTL_LEGATO_FOOTSWITCH 0x44
#define MIDI_CTL_HOLD2 0x45
Modified: linux-libc-headers/trunk/include/sound/control.h
==============================================================================
--- linux-libc-headers/trunk/include/sound/control.h (original)
+++ linux-libc-headers/trunk/include/sound/control.h Tue Jul 5 22:58:33 2005
@@ -119,6 +119,13 @@
int snd_ctl_register_ioctl(snd_kctl_ioctl_func_t fcn);
int snd_ctl_unregister_ioctl(snd_kctl_ioctl_func_t fcn);
+#ifdef CONFIG_COMPAT
+int snd_ctl_register_ioctl_compat(snd_kctl_ioctl_func_t fcn);
+int snd_ctl_unregister_ioctl_compat(snd_kctl_ioctl_func_t fcn);
+#else
+#define snd_ctl_register_ioctl_compat(fcn)
+#define snd_ctl_unregister_ioctl_compat(fcn)
+#endif
int snd_ctl_elem_read(snd_card_t *card, snd_ctl_elem_value_t *control);
int snd_ctl_elem_write(snd_card_t *card, snd_ctl_file_t *file, snd_ctl_elem_value_t *control);
Modified: linux-libc-headers/trunk/include/sound/cs46xx.h
==============================================================================
--- linux-libc-headers/trunk/include/sound/cs46xx.h (original)
+++ linux-libc-headers/trunk/include/sound/cs46xx.h Tue Jul 5 22:58:33 2005
@@ -1720,7 +1720,7 @@
snd_kcontrol_t *eapd_switch; /* for amplifier hack */
int accept_valid; /* accept mmap valid (for OSS) */
- struct snd_cs46xx_gameport *gameport;
+ struct gameport *gameport;
#ifdef CONFIG_SND_CS46XX_DEBUG_GPIO
int current_gpio;
@@ -1751,6 +1751,6 @@
int snd_cs46xx_mixer(cs46xx_t *chip);
int snd_cs46xx_midi(cs46xx_t *chip, int device, snd_rawmidi_t **rmidi);
int snd_cs46xx_start_dsp(cs46xx_t *chip);
-void snd_cs46xx_gameport(cs46xx_t *chip);
+int snd_cs46xx_gameport(cs46xx_t *chip);
#endif /* __SOUND_CS46XX_H */
Modified: linux-libc-headers/trunk/include/sound/emu10k1.h
==============================================================================
--- linux-libc-headers/trunk/include/sound/emu10k1.h (original)
+++ linux-libc-headers/trunk/include/sound/emu10k1.h Tue Jul 5 22:58:33 2005
@@ -54,7 +54,10 @@
/* GPRs */
#define FXBUS(x) (0x00 + (x)) /* x = 0x00 - 0x0f */
#define EXTIN(x) (0x10 + (x)) /* x = 0x00 - 0x0f */
-#define EXTOUT(x) (0x20 + (x)) /* x = 0x00 - 0x0f */
+#define EXTOUT(x) (0x20 + (x)) /* x = 0x00 - 0x0f physical outs -> FXWC low 16 bits */
+#define FXBUS2(x) (0x30 + (x)) /* x = 0x00 - 0x0f copies of fx buses for capture -> FXWC high 16 bits */
+ /* NB: 0x31 and 0x32 are shared with Center/LFE on SB live 5.1 */
+
#define C_00000000 0x40
#define C_00000001 0x41
#define C_00000002 0x42
@@ -96,9 +99,13 @@
#define A_ITRAM_CTL(x) (A_TANKMEMCTLREGBASE + 0x00 + (x)) /* x = 0x00 - 0xbf */
#define A_ETRAM_CTL(x) (A_TANKMEMCTLREGBASE + 0xc0 + (x)) /* x = 0x00 - 0x3f */
-#define A_FXBUS(x) (0x00 + (x)) /* x = 0x00 - 0x3f? */
-#define A_EXTIN(x) (0x40 + (x)) /* x = 0x00 - 0x1f? */
-#define A_EXTOUT(x) (0x60 + (x)) /* x = 0x00 - 0x1f? */
+#define A_FXBUS(x) (0x00 + (x)) /* x = 0x00 - 0x3f FX buses */
+#define A_EXTIN(x) (0x40 + (x)) /* x = 0x00 - 0x0f physical ins */
+#define A_P16VIN(x) (0x50 + (x)) /* x = 0x00 - 0x0f p16v ins (A2 only) "EMU32 inputs" */
+#define A_EXTOUT(x) (0x60 + (x)) /* x = 0x00 - 0x1f physical outs -> A_FXWC1 0x79-7f unknown */
+#define A_FXBUS2(x) (0x80 + (x)) /* x = 0x00 - 0x1f extra outs used for EFX capture -> A_FXWC2 */
+#define A_EMU32OUTH(x) (0xa0 + (x)) /* x = 0x00 - 0x0f "EMU32_OUT_10 - _1F" - ??? */
+#define A_EMU32OUTL(x) (0xb0 + (x)) /* x = 0x00 - 0x0f "EMU32_OUT_1 - _F" - ??? */
#define A_GPR(x) (A_FXGPREGBASE + (x))
/* cc_reg constants */
Modified: linux-libc-headers/trunk/include/sound/gus.h
==============================================================================
--- linux-libc-headers/trunk/include/sound/gus.h (original)
+++ linux-libc-headers/trunk/include/sound/gus.h Tue Jul 5 22:58:33 2005
@@ -230,7 +230,7 @@
int mode; /* operation mode */
int client; /* sequencer client number */
int port; /* sequencer port number */
- int midi_has_voices: 1;
+ unsigned int midi_has_voices: 1;
} snd_gus_port_t;
typedef struct _snd_gus_voice snd_gus_voice_t;
@@ -264,7 +264,7 @@
struct _snd_gus_voice {
int number;
- int use: 1,
+ unsigned int use: 1,
pcm: 1,
synth:1,
midi: 1;
Modified: linux-libc-headers/trunk/include/sound/hwdep.h
==============================================================================
--- linux-libc-headers/trunk/include/sound/hwdep.h (original)
+++ linux-libc-headers/trunk/include/sound/hwdep.h Tue Jul 5 22:58:33 2005
@@ -38,6 +38,7 @@
int (*release) (snd_hwdep_t * hw, struct file * file);
unsigned int (*poll) (snd_hwdep_t * hw, struct file * file, poll_table * wait);
int (*ioctl) (snd_hwdep_t * hw, struct file * file, unsigned int cmd, unsigned long arg);
+ int (*ioctl_compat) (snd_hwdep_t * hw, struct file * file, unsigned int cmd, unsigned long arg);
int (*mmap) (snd_hwdep_t * hw, struct file * file, struct vm_area_struct * vma);
int (*dsp_status) (snd_hwdep_t * hw, snd_hwdep_dsp_status_t * status);
int (*dsp_load) (snd_hwdep_t * hw, snd_hwdep_dsp_image_t * image);
Modified: linux-libc-headers/trunk/include/sound/mixer_oss.h
==============================================================================
--- linux-libc-headers/trunk/include/sound/mixer_oss.h (original)
+++ linux-libc-headers/trunk/include/sound/mixer_oss.h Tue Jul 5 22:58:33 2005
@@ -38,7 +38,7 @@
struct _snd_oss_mixer_slot {
int number;
- int stereo: 1;
+ unsigned int stereo: 1;
snd_mixer_oss_get_volume_t get_volume;
snd_mixer_oss_put_volume_t put_volume;
snd_mixer_oss_get_recsrc_t get_recsrc;
Modified: linux-libc-headers/trunk/include/sound/mpu401.h
==============================================================================
--- linux-libc-headers/trunk/include/sound/mpu401.h (original)
+++ linux-libc-headers/trunk/include/sound/mpu401.h Tue Jul 5 22:58:33 2005
@@ -86,9 +86,6 @@
spinlock_t output_lock;
spinlock_t timer_lock;
- atomic_t rx_loop;
- atomic_t tx_loop;
-
struct timer_list timer;
void (*write) (mpu401_t * mpu, unsigned char data, unsigned long addr);
Modified: linux-libc-headers/trunk/include/sound/rawmidi.h
==============================================================================
--- linux-libc-headers/trunk/include/sound/rawmidi.h (original)
+++ linux-libc-headers/trunk/include/sound/rawmidi.h Tue Jul 5 22:58:33 2005
@@ -23,6 +23,7 @@
*/
#include <sound/asound.h>
+#include <linux/interrupt.h>
#include <linux/spinlock.h>
#include <linux/wait.h>
#include <asm/semaphore.h>
@@ -65,8 +66,7 @@
} snd_rawmidi_global_ops_t;
struct _snd_rawmidi_runtime {
- unsigned int trigger: 1, /* transfer is running */
- drain: 1, /* drain stage */
+ unsigned int drain: 1, /* drain stage */
oss: 1; /* OSS compatible mode */
/* midi stream buffer */
unsigned char *buffer; /* buffer for MIDI data */
@@ -79,8 +79,10 @@
/* misc */
spinlock_t lock;
wait_queue_head_t sleep;
- /* event handler (room [output] or new bytes [input]) */
+ /* event handler (new bytes, input only) */
void (*event)(snd_rawmidi_substream_t *substream);
+ /* defers calls to event [input] or ops->trigger [output] */
+ struct tasklet_struct tasklet;
/* private data */
void *private_data;
void (*private_free)(snd_rawmidi_substream_t *substream);
Modified: linux-libc-headers/trunk/include/sound/seq_midi_emul.h
==============================================================================
--- linux-libc-headers/trunk/include/sound/seq_midi_emul.h (original)
+++ linux-libc-headers/trunk/include/sound/seq_midi_emul.h Tue Jul 5 22:58:33 2005
@@ -136,7 +136,7 @@
#define gm_sustain control[MIDI_CTL_SUSTAIN]
#define gm_hold gm_sustain
#define gm_portamento control[MIDI_CTL_PORTAMENTO]
-#define gm_sustenuto control[MIDI_CTL_SUSTENUTO]
+#define gm_sostenuto control[MIDI_CTL_SOSTENUTO]
/*
* These macros give the complete value of the controls that consist
@@ -166,7 +166,7 @@
#define SNDRV_MIDI_NOTE_OFF 0x00
#define SNDRV_MIDI_NOTE_ON 0x01
#define SNDRV_MIDI_NOTE_RELEASED 0x02
-#define SNDRV_MIDI_NOTE_SUSTENUTO 0x04
+#define SNDRV_MIDI_NOTE_SOSTENUTO 0x04
#define SNDRV_MIDI_PARAM_TYPE_REGISTERED 0
#define SNDRV_MIDI_PARAM_TYPE_NONREGISTERED 1
Modified: linux-libc-headers/trunk/include/sound/seq_virmidi.h
==============================================================================
--- linux-libc-headers/trunk/include/sound/seq_virmidi.h (original)
+++ linux-libc-headers/trunk/include/sound/seq_virmidi.h Tue Jul 5 22:58:33 2005
@@ -38,7 +38,7 @@
int seq_mode;
int client;
int port;
- int trigger: 1;
+ unsigned int trigger: 1;
snd_midi_event_t *parser;
snd_seq_event_t event;
snd_virmidi_dev_t *rdev;
Modified: linux-libc-headers/trunk/include/sound/trident.h
==============================================================================
--- linux-libc-headers/trunk/include/sound/trident.h (original)
+++ linux-libc-headers/trunk/include/sound/trident.h Tue Jul 5 22:58:33 2005
@@ -290,7 +290,7 @@
int mode; /* operation mode */
int client; /* sequencer client number */
int port; /* sequencer port number */
- int midi_has_voices: 1;
+ unsigned int midi_has_voices: 1;
} snd_trident_port_t;
typedef struct snd_trident_memblk_arg {
@@ -308,7 +308,7 @@
struct _snd_trident_voice {
unsigned int number;
- int use: 1,
+ unsigned int use: 1,
pcm: 1,
synth:1,
midi: 1;
@@ -347,7 +347,7 @@
trident_t *trident;
snd_pcm_substream_t *substream;
snd_trident_voice_t *extra; /* extra PCM voice (acts as interrupt generator) */
- int running: 1,
+ unsigned int running: 1,
capture: 1,
spdif: 1,
foldback: 1,
@@ -448,7 +448,7 @@
spinlock_t reg_lock;
- struct snd_trident_gameport *gameport;
+ struct gameport *gameport;
};
int snd_trident_create(snd_card_t * card,
@@ -457,7 +457,7 @@
int pcm_spdif_device,
int max_wavetable_size,
trident_t ** rtrident);
-void snd_trident_gameport(trident_t *trident);
+int snd_trident_create_gameport(trident_t *trident);
int snd_trident_pcm(trident_t * trident, int device, snd_pcm_t **rpcm);
int snd_trident_foldback_pcm(trident_t * trident, int device, snd_pcm_t **rpcm);
Modified: linux-libc-headers/trunk/include/sound/version.h
==============================================================================
--- linux-libc-headers/trunk/include/sound/version.h (original)
+++ linux-libc-headers/trunk/include/sound/version.h Tue Jul 5 22:58:33 2005
@@ -1,3 +1,3 @@
/* include/version.h. Generated by configure. */
-#define CONFIG_SND_VERSION "1.0.8"
-#define CONFIG_SND_DATE " (Thu Jan 13 09:39:32 2005 UTC)"
+#define CONFIG_SND_VERSION "1.0.9rc2"
+#define CONFIG_SND_DATE " (Thu Mar 24 10:33:39 2005 UTC)"
Modified: linux-libc-headers/trunk/include/sound/ymfpci.h
==============================================================================
--- linux-libc-headers/trunk/include/sound/ymfpci.h (original)
+++ linux-libc-headers/trunk/include/sound/ymfpci.h Tue Jul 5 22:58:33 2005
@@ -198,6 +198,10 @@
#define YMFPCI_LEGACY2_IMOD (1 << 15) /* legacy IRQ mode */
/* SIEN:IMOD 0:0 = legacy irq, 0:1 = INTA, 1:0 = serialized IRQ */
+#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
+#define SUPPORT_JOYSTICK
+#endif
+
/*
*
*/
@@ -262,7 +266,7 @@
struct _snd_ymfpci_voice {
ymfpci_t *chip;
int number;
- int use: 1,
+ unsigned int use: 1,
pcm: 1,
synth: 1,
midi: 1;
@@ -288,9 +292,9 @@
snd_ymfpci_pcm_type_t type;
snd_pcm_substream_t *substream;
ymfpci_voice_t *voices[2]; /* playback only */
- int running: 1;
- int output_front: 1;
- int output_rear: 1;
+ unsigned int running: 1;
+ unsigned int output_front: 1;
+ unsigned int output_rear: 1;
__u32 period_size; /* cached from runtime->period_size */
__u32 buffer_size; /* cached from runtime->buffer_size */
__u32 period_pos;
@@ -311,9 +315,8 @@
struct resource *mpu_res;
unsigned short old_legacy_ctrl;
-#if defined(CONFIG_GAMEPORT) || defined(CONFIG_GAMEPORT_MODULE)
- struct resource *joystick_res;
- struct gameport gameport;
+#ifdef SUPPORT_JOYSTICK
+ struct gameport *gameport;
#endif
struct snd_dma_buffer work_ptr;
@@ -381,6 +384,7 @@
struct pci_dev *pci,
unsigned short old_legacy_ctrl,
ymfpci_t ** rcodec);
+void snd_ymfpci_free_gameport(ymfpci_t *chip);
int snd_ymfpci_pcm(ymfpci_t *chip, int device, snd_pcm_t **rpcm);
int snd_ymfpci_pcm2(ymfpci_t *chip, int device, snd_pcm_t **rpcm);
@@ -389,8 +393,4 @@
int snd_ymfpci_mixer(ymfpci_t *chip, int rear_switch);
int snd_ymfpci_timer(ymfpci_t *chip, int device);
-#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
-#define SUPPORT_JOYSTICK
-#endif
-
#endif /* __SOUND_YMFPCI_H */
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