SOURCES: mpt-status-headers.patch (NEW) - fusion/mpt headers taken...
qboosh
qboosh at pld-linux.org
Mon Aug 8 12:57:21 CEST 2005
Author: qboosh Date: Mon Aug 8 10:57:21 2005 GMT
Module: SOURCES Tag: HEAD
---- Log message:
- fusion/mpt headers taken from kernel 2.4.31 source
---- Files affected:
SOURCES:
mpt-status-headers.patch (NONE -> 1.1) (NEW)
---- Diffs:
================================================================
Index: SOURCES/mpt-status-headers.patch
diff -u /dev/null SOURCES/mpt-status-headers.patch:1.1
--- /dev/null Mon Aug 8 12:57:21 2005
+++ SOURCES/mpt-status-headers.patch Mon Aug 8 12:57:16 2005
@@ -0,0 +1,4185 @@
+diff -Nur mpt-status-1.0/include.orig/lsi/mpi_cnfg.h mpt-status-1.0/include/lsi/mpi_cnfg.h
+--- mpt-status-1.0/include.orig/lsi/mpi_cnfg.h 1970-01-01 01:00:00.000000000 +0100
++++ mpt-status-1.0/include/lsi/mpi_cnfg.h 2004-08-08 01:26:04.000000000 +0200
+@@ -0,0 +1,2105 @@
++/*
++ * Copyright (c) 2000-2003 LSI Logic Corporation.
++ *
++ *
++ * Name: mpi_cnfg.h
++ * Title: MPI Config message, structures, and Pages
++ * Creation Date: July 27, 2000
++ *
++ * mpi_cnfg.h Version: 01.05.xx
++ *
++ * Version History
++ * ---------------
++ *
++ * Date Version Description
++ * -------- -------- ------------------------------------------------------
++ * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
++ * 06-06-00 01.00.01 Update version number for 1.0 release.
++ * 06-08-00 01.00.02 Added _PAGEVERSION definitions for all pages.
++ * Added FcPhLowestVersion, FcPhHighestVersion, Reserved2
++ * fields to FC_DEVICE_0 page, updated the page version.
++ * Changed _FREE_RUNNING_CLOCK to _PACING_TRANSFERS in
++ * SCSI_PORT_0, SCSI_DEVICE_0 and SCSI_DEVICE_1 pages
++ * and updated the page versions.
++ * Added _RESPONSE_ID_MASK definition to SCSI_PORT_1
++ * page and updated the page version.
++ * Added Information field and _INFO_PARAMS_NEGOTIATED
++ * definitionto SCSI_DEVICE_0 page.
++ * 06-22-00 01.00.03 Removed batch controls from LAN_0 page and updated the
++ * page version.
++ * Added BucketsRemaining to LAN_1 page, redefined the
++ * state values, and updated the page version.
++ * Revised bus width definitions in SCSI_PORT_0,
++ * SCSI_DEVICE_0 and SCSI_DEVICE_1 pages.
++ * 06-30-00 01.00.04 Added MaxReplySize to LAN_1 page and updated the page
++ * version.
++ * Moved FC_DEVICE_0 PageAddress description to spec.
++ * 07-27-00 01.00.05 Corrected the SubsystemVendorID and SubsystemID field
++ * widths in IOC_0 page and updated the page version.
++ * 11-02-00 01.01.01 Original release for post 1.0 work
++ * Added Manufacturing pages, IO Unit Page 2, SCSI SPI
++ * Port Page 2, FC Port Page 4, FC Port Page 5
++ * 11-15-00 01.01.02 Interim changes to match proposals
++ * 12-04-00 01.01.03 Config page changes to match MPI rev 1.00.01.
++ * 12-05-00 01.01.04 Modified config page actions.
++ * 01-09-01 01.01.05 Added defines for page address formats.
++ * Data size for Manufacturing pages 2 and 3 no longer
++ * defined here.
++ * Io Unit Page 2 size is fixed at 4 adapters and some
++ * flags were changed.
++ * SCSI Port Page 2 Device Settings modified.
++ * New fields added to FC Port Page 0 and some flags
++ * cleaned up.
++ * Removed impedance flash from FC Port Page 1.
++ * Added FC Port pages 6 and 7.
++ * 01-25-01 01.01.06 Added MaxInitiators field to FcPortPage0.
++ * 01-29-01 01.01.07 Changed some defines to make them 32 character unique.
++ * Added some LinkType defines for FcPortPage0.
++ * 02-20-01 01.01.08 Started using MPI_POINTER.
++ * 02-27-01 01.01.09 Replaced MPI_CONFIG_PAGETYPE_SCSI_LUN with
++ * MPI_CONFIG_PAGETYPE_RAID_VOLUME.
++ * Added definitions and structures for IOC Page 2 and
++ * RAID Volume Page 2.
++ * 03-27-01 01.01.10 Added CONFIG_PAGE_FC_PORT_8 and CONFIG_PAGE_FC_PORT_9.
++ * CONFIG_PAGE_FC_PORT_3 now supports persistent by DID.
++ * Added VendorId and ProductRevLevel fields to
++ * RAIDVOL2_IM_PHYS_ID struct.
++ * Modified values for MPI_FCPORTPAGE0_FLAGS_ATTACH_
++ * defines to make them compatible to MPI version 1.0.
++ * Added structure offset comments.
++ * 04-09-01 01.01.11 Added some new defines for the PageAddress field and
++ * removed some obsolete ones.
++ * Added IO Unit Page 3.
++ * Modified defines for Scsi Port Page 2.
++ * Modified RAID Volume Pages.
++ * 08-08-01 01.02.01 Original release for v1.2 work.
++ * Added SepID and SepBus to RVP2 IMPhysicalDisk struct.
++ * Added defines for the SEP bits in RVP2 VolumeSettings.
++ * Modified the DeviceSettings field in RVP2 to use the
++ * proper structure.
++ * Added defines for SES, SAF-TE, and cross channel for
++ * IOCPage2 CapabilitiesFlags.
++ * Removed define for MPI_IOUNITPAGE2_FLAGS_RAID_DISABLE.
++ * Removed define for
++ * MPI_SCSIPORTPAGE2_PORT_FLAGS_PARITY_ENABLE.
++ * Added define for MPI_CONFIG_PAGEATTR_RO_PERSISTENT.
++ * 08-29-01 01.02.02 Fixed value for MPI_MANUFACTPAGE_DEVID_53C1035.
++ * Added defines for MPI_FCPORTPAGE1_FLAGS_HARD_ALPA_ONLY
++ * and MPI_FCPORTPAGE1_FLAGS_IMMEDIATE_ERROR_REPLY.
++ * Removed MPI_SCSIPORTPAGE0_CAP_PACING_TRANSFERS,
++ * MPI_SCSIDEVPAGE0_NP_PACING_TRANSFERS, and
++ * MPI_SCSIDEVPAGE1_RP_PACING_TRANSFERS, and
++ * MPI_SCSIDEVPAGE1_CONF_PPR_ALLOWED.
++ * Added defines for MPI_SCSIDEVPAGE1_CONF_WDTR_DISALLOWED
++ * and MPI_SCSIDEVPAGE1_CONF_SDTR_DISALLOWED.
++ * Added OnBusTimerValue to CONFIG_PAGE_SCSI_PORT_1.
++ * Added rejected bits to SCSI Device Page 0 Information.
++ * Increased size of ALPA array in FC Port Page 2 by one
++ * and removed a one byte reserved field.
++ * 09-28-01 01.02.03 Swapped NegWireSpeedLow and NegWireSpeedLow in
++ * CONFIG_PAGE_LAN_1 to match preferred 64-bit ordering.
++ * Added structures for Manufacturing Page 4, IO Unit
++ * Page 3, IOC Page 3, IOC Page 4, RAID Volume Page 0, and
++ * RAID PhysDisk Page 0.
++ * 10-04-01 01.02.04 Added define for MPI_CONFIG_PAGETYPE_RAID_PHYSDISK.
++ * Modified some of the new defines to make them 32
++ * character unique.
++ * Modified how variable length pages (arrays) are defined.
++ * Added generic defines for hot spare pools and RAID
++ * volume types.
++ * 11-01-01 01.02.05 Added define for MPI_IOUNITPAGE1_DISABLE_IR.
++ * 03-14-02 01.02.06 Added PCISlotNum field to CONFIG_PAGE_IOC_1 along with
++ * related define, and bumped the page version define.
++ * 05-31-02 01.02.07 Added a Flags field to CONFIG_PAGE_IOC_2_RAID_VOL in a
++ * reserved byte and added a define.
++ * Added define for
++ * MPI_RAIDVOL0_STATUS_FLAG_VOLUME_INACTIVE.
++ * Added new config page: CONFIG_PAGE_IOC_5.
++ * Added MaxAliases, MaxHardAliases, and NumCurrentAliases
++ * fields to CONFIG_PAGE_FC_PORT_0.
++ * Added AltConnector and NumRequestedAliases fields to
++ * CONFIG_PAGE_FC_PORT_1.
++ * Added new config page: CONFIG_PAGE_FC_PORT_10.
++ * 07-12-02 01.02.08 Added more MPI_MANUFACTPAGE_DEVID_ defines.
++ * Added additional MPI_SCSIDEVPAGE0_NP_ defines.
++ * Added more MPI_SCSIDEVPAGE1_RP_ defines.
++ * Added define for
++ * MPI_SCSIDEVPAGE1_CONF_EXTENDED_PARAMS_ENABLE.
++ * Added new config page: CONFIG_PAGE_SCSI_DEVICE_3.
++ * Modified MPI_FCPORTPAGE5_FLAGS_ defines.
++ * 09-16-02 01.02.09 Added MPI_SCSIDEVPAGE1_CONF_FORCE_PPR_MSG define.
++ * 11-15-02 01.02.10 Added ConnectedID defines for CONFIG_PAGE_SCSI_PORT_0.
++ * Added more Flags defines for CONFIG_PAGE_FC_PORT_1.
++ * Added more Flags defines for CONFIG_PAGE_FC_DEVICE_0.
++ * 04-01-03 01.02.11 Added RR_TOV field and additional Flags defines for
++ * CONFIG_PAGE_FC_PORT_1.
++ * Added define MPI_FCPORTPAGE5_FLAGS_DISABLE to disable
++ * an alias.
++ * Added more device id defines.
++ * 06-26-03 01.02.12 Added MPI_IOUNITPAGE1_IR_USE_STATIC_VOLUME_ID define.
++ * Added TargetConfig and IDConfig fields to
++ * CONFIG_PAGE_SCSI_PORT_1.
++ * Added more PortFlags defines for CONFIG_PAGE_SCSI_PORT_2
++ * to control DV.
++ * Added more Flags defines for CONFIG_PAGE_FC_PORT_1.
++ * In CONFIG_PAGE_FC_DEVICE_0, replaced Reserved1 field
++ * with ADISCHardALPA.
++ * Added MPI_FC_DEVICE_PAGE0_PROT_FCP_RETRY define.
++ * --------------------------------------------------------------------------
++ */
++
++#ifndef MPI_CNFG_H
++#define MPI_CNFG_H
++
++
++/*****************************************************************************
++*
++* C o n f i g M e s s a g e a n d S t r u c t u r e s
++*
++*****************************************************************************/
++
++typedef struct _CONFIG_PAGE_HEADER
++{
++ U8 PageVersion; /* 00h */
++ U8 PageLength; /* 01h */
++ U8 PageNumber; /* 02h */
++ U8 PageType; /* 03h */
++} fCONFIG_PAGE_HEADER, MPI_POINTER PTR_CONFIG_PAGE_HEADER,
++ ConfigPageHeader_t, MPI_POINTER pConfigPageHeader_t;
++
++typedef union _CONFIG_PAGE_HEADER_UNION
++{
++ ConfigPageHeader_t Struct;
++ U8 Bytes[4];
++ U16 Word16[2];
++ U32 Word32;
++} ConfigPageHeaderUnion, MPI_POINTER pConfigPageHeaderUnion,
++ fCONFIG_PAGE_HEADER_UNION, MPI_POINTER PTR_CONFIG_PAGE_HEADER_UNION;
++
++typedef struct _CONFIG_EXTENDED_PAGE_HEADER
++{
++ U8 PageVersion; /* 00h */
++ U8 Reserved1; /* 01h */
++ U8 PageNumber; /* 02h */
++ U8 PageType; /* 03h */
++ U16 ExtPageLength; /* 04h */
++ U8 ExtPageType; /* 06h */
++ U8 Reserved2; /* 07h */
++} fCONFIG_EXTENDED_PAGE_HEADER, MPI_POINTER PTR_CONFIG_EXTENDED_PAGE_HEADER,
++ ConfigExtendedPageHeader_t, MPI_POINTER pConfigExtendedPageHeader_t;
++
++
++
++/****************************************************************************
++* PageType field values
++****************************************************************************/
++#define MPI_CONFIG_PAGEATTR_READ_ONLY (0x00)
++#define MPI_CONFIG_PAGEATTR_CHANGEABLE (0x10)
++#define MPI_CONFIG_PAGEATTR_PERSISTENT (0x20)
++#define MPI_CONFIG_PAGEATTR_RO_PERSISTENT (0x30)
++#define MPI_CONFIG_PAGEATTR_MASK (0xF0)
++
++#define MPI_CONFIG_PAGETYPE_IO_UNIT (0x00)
++#define MPI_CONFIG_PAGETYPE_IOC (0x01)
++#define MPI_CONFIG_PAGETYPE_BIOS (0x02)
++#define MPI_CONFIG_PAGETYPE_SCSI_PORT (0x03)
++#define MPI_CONFIG_PAGETYPE_SCSI_DEVICE (0x04)
++#define MPI_CONFIG_PAGETYPE_FC_PORT (0x05)
++#define MPI_CONFIG_PAGETYPE_FC_DEVICE (0x06)
++#define MPI_CONFIG_PAGETYPE_LAN (0x07)
++#define MPI_CONFIG_PAGETYPE_RAID_VOLUME (0x08)
++#define MPI_CONFIG_PAGETYPE_MANUFACTURING (0x09)
++#define MPI_CONFIG_PAGETYPE_RAID_PHYSDISK (0x0A)
++#define MPI_CONFIG_PAGETYPE_INBAND (0x0B)
++#define MPI_CONFIG_PAGETYPE_EXTENDED (0x0F)
++#define MPI_CONFIG_PAGETYPE_MASK (0x0F)
++
++#define MPI_CONFIG_TYPENUM_MASK (0x0FFF)
++
++
++/****************************************************************************
++* ExtPageType field values
++****************************************************************************/
++#define MPI_CONFIG_EXTPAGETYPE_SAS_IO_UNIT (0x10)
++#define MPI_CONFIG_EXTPAGETYPE_SAS_EXPANDER (0x11)
++#define MPI_CONFIG_EXTPAGETYPE_SAS_DEVICE (0x12)
++#define MPI_CONFIG_EXTPAGETYPE_SAS_PHY (0x13)
++
++
++/****************************************************************************
++* PageAddress field values
++****************************************************************************/
++#define MPI_SCSI_PORT_PGAD_PORT_MASK (0x000000FF)
++
++#define MPI_SCSI_DEVICE_TARGET_ID_MASK (0x000000FF)
++#define MPI_SCSI_DEVICE_TARGET_ID_SHIFT (0)
++#define MPI_SCSI_DEVICE_BUS_MASK (0x0000FF00)
++#define MPI_SCSI_DEVICE_BUS_SHIFT (8)
++
++#define MPI_FC_PORT_PGAD_PORT_MASK (0xF0000000)
++#define MPI_FC_PORT_PGAD_PORT_SHIFT (28)
++#define MPI_FC_PORT_PGAD_FORM_MASK (0x0F000000)
++#define MPI_FC_PORT_PGAD_FORM_INDEX (0x01000000)
++#define MPI_FC_PORT_PGAD_INDEX_MASK (0x0000FFFF)
++#define MPI_FC_PORT_PGAD_INDEX_SHIFT (0)
++
++#define MPI_FC_DEVICE_PGAD_PORT_MASK (0xF0000000)
++#define MPI_FC_DEVICE_PGAD_PORT_SHIFT (28)
++#define MPI_FC_DEVICE_PGAD_FORM_MASK (0x0F000000)
++#define MPI_FC_DEVICE_PGAD_FORM_NEXT_DID (0x00000000)
++#define MPI_FC_DEVICE_PGAD_ND_PORT_MASK (0xF0000000)
++#define MPI_FC_DEVICE_PGAD_ND_PORT_SHIFT (28)
++#define MPI_FC_DEVICE_PGAD_ND_DID_MASK (0x00FFFFFF)
++#define MPI_FC_DEVICE_PGAD_ND_DID_SHIFT (0)
++#define MPI_FC_DEVICE_PGAD_FORM_BUS_TID (0x01000000)
++#define MPI_FC_DEVICE_PGAD_BT_BUS_MASK (0x0000FF00)
++#define MPI_FC_DEVICE_PGAD_BT_BUS_SHIFT (8)
++#define MPI_FC_DEVICE_PGAD_BT_TID_MASK (0x000000FF)
++#define MPI_FC_DEVICE_PGAD_BT_TID_SHIFT (0)
++
++#define MPI_PHYSDISK_PGAD_PHYSDISKNUM_MASK (0x000000FF)
++#define MPI_PHYSDISK_PGAD_PHYSDISKNUM_SHIFT (0)
++
++#define MPI_SAS_DEVICE_PGAD_FORM_MASK (0xF0000000)
++#define MPI_SAS_DEVICE_PGAD_FORM_SHIFT (28)
++#define MPI_SAS_DEVICE_PGAD_FORM_GET_NEXT_HANDLE (0x00000000)
++#define MPI_SAS_DEVICE_PGAD_FORM_BUS_TARGET_ID (0x00000001)
++#define MPI_SAS_DEVICE_PGAD_FORM_HANDLE (0x00000002)
++#define MPI_SAS_DEVICE_PGAD_GNH_HANDLE_MASK (0x0000FFFF)
++#define MPI_SAS_DEVICE_PGAD_GNH_HANDLE_SHIFT (0)
++#define MPI_SAS_DEVICE_PGAD_BT_BUS_MASK (0x0000FF00)
++#define MPI_SAS_DEVICE_PGAD_BT_BUS_SHIFT (8)
++#define MPI_SAS_DEVICE_PGAD_BT_TID_MASK (0x000000FF)
++#define MPI_SAS_DEVICE_PGAD_BT_TID_SHIFT (0)
++#define MPI_SAS_DEVICE_PGAD_H_HANDLE_MASK (0x0000FFFF)
++#define MPI_SAS_DEVICE_PGAD_H_HANDLE_SHIFT (0)
++
++#define MPI_SAS_PHY_PGAD_PHY_NUMBER_MASK (0x00FF0000)
++#define MPI_SAS_PHY_PGAD_PHY_NUMBER_SHIFT (16)
++#define MPI_SAS_PHY_PGAD_DEVHANDLE_MASK (0x0000FFFF)
++#define MPI_SAS_PHY_PGAD_DEVHANDLE_SHIFT (0)
++
++
++/****************************************************************************
++* Config Request Message
++****************************************************************************/
++typedef struct _MSG_CONFIG
++{
++ U8 Action; /* 00h */
++ U8 Reserved; /* 01h */
++ U8 ChainOffset; /* 02h */
++ U8 Function; /* 03h */
++ U16 ExtPageLength; /* 04h */
++ U8 ExtPageType; /* 06h */
++ U8 MsgFlags; /* 07h */
++ U32 MsgContext; /* 08h */
++ U8 Reserved2[8]; /* 0Ch */
++ fCONFIG_PAGE_HEADER Header; /* 14h */
++ U32 PageAddress; /* 18h */
++ SGE_IO_UNION PageBufferSGE; /* 1Ch */
++} MSG_CONFIG, MPI_POINTER PTR_MSG_CONFIG,
++ Config_t, MPI_POINTER pConfig_t;
++
++
++/****************************************************************************
++* Action field values
++****************************************************************************/
++#define MPI_CONFIG_ACTION_PAGE_HEADER (0x00)
++#define MPI_CONFIG_ACTION_PAGE_READ_CURRENT (0x01)
++#define MPI_CONFIG_ACTION_PAGE_WRITE_CURRENT (0x02)
++#define MPI_CONFIG_ACTION_PAGE_DEFAULT (0x03)
++#define MPI_CONFIG_ACTION_PAGE_WRITE_NVRAM (0x04)
++#define MPI_CONFIG_ACTION_PAGE_READ_DEFAULT (0x05)
++#define MPI_CONFIG_ACTION_PAGE_READ_NVRAM (0x06)
++
++
++/* Config Reply Message */
++typedef struct _MSG_CONFIG_REPLY
++{
++ U8 Action; /* 00h */
++ U8 Reserved; /* 01h */
++ U8 MsgLength; /* 02h */
++ U8 Function; /* 03h */
++ U16 ExtPageLength; /* 04h */
++ U8 ExtPageType; /* 06h */
++ U8 MsgFlags; /* 07h */
++ U32 MsgContext; /* 08h */
++ U8 Reserved2[2]; /* 0Ch */
++ U16 IOCStatus; /* 0Eh */
++ U32 IOCLogInfo; /* 10h */
++ fCONFIG_PAGE_HEADER Header; /* 14h */
++} MSG_CONFIG_REPLY, MPI_POINTER PTR_MSG_CONFIG_REPLY,
++ ConfigReply_t, MPI_POINTER pConfigReply_t;
++
++
++
++/*****************************************************************************
++*
++* C o n f i g u r a t i o n P a g e s
++*
++*****************************************************************************/
++
++/****************************************************************************
++* Manufacturing Config pages
++****************************************************************************/
++#define MPI_MANUFACTPAGE_VENDORID_LSILOGIC (0x1000)
++/* Fibre Channel */
++#define MPI_MANUFACTPAGE_DEVICEID_FC909 (0x0621)
++#define MPI_MANUFACTPAGE_DEVICEID_FC919 (0x0624)
++#define MPI_MANUFACTPAGE_DEVICEID_FC929 (0x0622)
++#define MPI_MANUFACTPAGE_DEVICEID_FC919X (0x0628)
++#define MPI_MANUFACTPAGE_DEVICEID_FC929X (0x0626)
++/* SCSI */
++#define MPI_MANUFACTPAGE_DEVID_53C1030 (0x0030)
++#define MPI_MANUFACTPAGE_DEVID_53C1030ZC (0x0031)
++#define MPI_MANUFACTPAGE_DEVID_1030_53C1035 (0x0032)
++#define MPI_MANUFACTPAGE_DEVID_1030ZC_53C1035 (0x0033)
++#define MPI_MANUFACTPAGE_DEVID_53C1035 (0x0040)
++#define MPI_MANUFACTPAGE_DEVID_53C1035ZC (0x0041)
++/* SAS */
++#define MPI_MANUFACTPAGE_DEVID_SAS1064 (0x0050)
++
++
++typedef struct _CONFIG_PAGE_MANUFACTURING_0
++{
++ fCONFIG_PAGE_HEADER Header; /* 00h */
++ U8 ChipName[16]; /* 04h */
++ U8 ChipRevision[8]; /* 14h */
++ U8 BoardName[16]; /* 1Ch */
++ U8 BoardAssembly[16]; /* 2Ch */
++ U8 BoardTracerNumber[16]; /* 3Ch */
++
++} fCONFIG_PAGE_MANUFACTURING_0, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_0,
++ ManufacturingPage0_t, MPI_POINTER pManufacturingPage0_t;
++
++#define MPI_MANUFACTURING0_PAGEVERSION (0x00)
++
++
++typedef struct _CONFIG_PAGE_MANUFACTURING_1
++{
++ fCONFIG_PAGE_HEADER Header; /* 00h */
++ U8 VPD[256]; /* 04h */
++} fCONFIG_PAGE_MANUFACTURING_1, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_1,
++ ManufacturingPage1_t, MPI_POINTER pManufacturingPage1_t;
++
++#define MPI_MANUFACTURING1_PAGEVERSION (0x00)
++
++
++typedef struct _MPI_CHIP_REVISION_ID
++{
++ U16 DeviceID; /* 00h */
++ U8 PCIRevisionID; /* 02h */
++ U8 Reserved; /* 03h */
++} MPI_CHIP_REVISION_ID, MPI_POINTER PTR_MPI_CHIP_REVISION_ID,
++ MpiChipRevisionId_t, MPI_POINTER pMpiChipRevisionId_t;
++
++
++/*
++ * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
++ * one and check Header.PageLength at runtime.
++ */
++#ifndef MPI_MAN_PAGE_2_HW_SETTINGS_WORDS
++#define MPI_MAN_PAGE_2_HW_SETTINGS_WORDS (1)
++#endif
++
++typedef struct _CONFIG_PAGE_MANUFACTURING_2
++{
++ fCONFIG_PAGE_HEADER Header; /* 00h */
++ MPI_CHIP_REVISION_ID ChipId; /* 04h */
++ U32 HwSettings[MPI_MAN_PAGE_2_HW_SETTINGS_WORDS];/* 08h */
++} fCONFIG_PAGE_MANUFACTURING_2, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_2,
++ ManufacturingPage2_t, MPI_POINTER pManufacturingPage2_t;
++
++#define MPI_MANUFACTURING2_PAGEVERSION (0x00)
++
++
++/*
++ * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
++ * one and check Header.PageLength at runtime.
++ */
++#ifndef MPI_MAN_PAGE_3_INFO_WORDS
++#define MPI_MAN_PAGE_3_INFO_WORDS (1)
++#endif
++
++typedef struct _CONFIG_PAGE_MANUFACTURING_3
++{
++ fCONFIG_PAGE_HEADER Header; /* 00h */
++ MPI_CHIP_REVISION_ID ChipId; /* 04h */
++ U32 Info[MPI_MAN_PAGE_3_INFO_WORDS];/* 08h */
++} fCONFIG_PAGE_MANUFACTURING_3, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_3,
++ ManufacturingPage3_t, MPI_POINTER pManufacturingPage3_t;
++
++#define MPI_MANUFACTURING3_PAGEVERSION (0x00)
++
++
++typedef struct _CONFIG_PAGE_MANUFACTURING_4
++{
++ fCONFIG_PAGE_HEADER Header; /* 00h */
++ U32 Reserved1; /* 04h */
++ U8 InfoOffset0; /* 08h */
++ U8 InfoSize0; /* 09h */
++ U8 InfoOffset1; /* 0Ah */
++ U8 InfoSize1; /* 0Bh */
++ U8 InquirySize; /* 0Ch */
++ U8 Flags; /* 0Dh */
++ U16 Reserved2; /* 0Eh */
++ U8 InquiryData[56]; /* 10h */
++ U32 ISVolumeSettings; /* 48h */
++ U32 IMEVolumeSettings; /* 4Ch */
++ U32 IMVolumeSettings; /* 50h */
++} fCONFIG_PAGE_MANUFACTURING_4, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_4,
++ ManufacturingPage4_t, MPI_POINTER pManufacturingPage4_t;
++
++#define MPI_MANUFACTURING4_PAGEVERSION (0x01)
++
++/* defines for the Flags field */
++#define MPI_MANPAGE4_IR_NO_MIX_SAS_SATA (0x01)
++
++
++typedef struct _CONFIG_PAGE_MANUFACTURING_5
++{
++ fCONFIG_PAGE_HEADER Header; /* 00h */
++ U64 BaseWWID; /* 04h */
++} fCONFIG_PAGE_MANUFACTURING_5, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_5,
++ ManufacturingPage5_t, MPI_POINTER pManufacturingPage5_t;
++
++#define MPI_MANUFACTURING5_PAGEVERSION (0x00)
++
++
++typedef struct _CONFIG_PAGE_MANUFACTURING_6
++{
++ fCONFIG_PAGE_HEADER Header; /* 00h */
++ U32 ProductSpecificInfo;/* 04h */
++} fCONFIG_PAGE_MANUFACTURING_6, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_6,
++ ManufacturingPage6_t, MPI_POINTER pManufacturingPage6_t;
++
++#define MPI_MANUFACTURING6_PAGEVERSION (0x00)
++
++
++/****************************************************************************
++* IO Unit Config Pages
++****************************************************************************/
++
++typedef struct _CONFIG_PAGE_IO_UNIT_0
++{
++ fCONFIG_PAGE_HEADER Header; /* 00h */
++ U64 UniqueValue; /* 04h */
++} fCONFIG_PAGE_IO_UNIT_0, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_0,
++ IOUnitPage0_t, MPI_POINTER pIOUnitPage0_t;
++
++#define MPI_IOUNITPAGE0_PAGEVERSION (0x00)
++
++
++typedef struct _CONFIG_PAGE_IO_UNIT_1
++{
++ fCONFIG_PAGE_HEADER Header; /* 00h */
++ U32 Flags; /* 04h */
++} fCONFIG_PAGE_IO_UNIT_1, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_1,
++ IOUnitPage1_t, MPI_POINTER pIOUnitPage1_t;
++
++#define MPI_IOUNITPAGE1_PAGEVERSION (0x01)
++
++/* IO Unit Page 1 Flags defines */
++#define MPI_IOUNITPAGE1_MULTI_FUNCTION (0x00000000)
++#define MPI_IOUNITPAGE1_SINGLE_FUNCTION (0x00000001)
++#define MPI_IOUNITPAGE1_MULTI_PATHING (0x00000002)
++#define MPI_IOUNITPAGE1_SINGLE_PATHING (0x00000000)
++#define MPI_IOUNITPAGE1_IR_USE_STATIC_VOLUME_ID (0x00000004)
++#define MPI_IOUNITPAGE1_DISABLE_QUEUE_FULL_HANDLING (0x00000020)
++#define MPI_IOUNITPAGE1_DISABLE_IR (0x00000040)
++#define MPI_IOUNITPAGE1_FORCE_32 (0x00000080)
++#define MPI_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE (0x00000100)
++
++
++typedef struct _MPI_ADAPTER_INFO
++{
++ U8 PciBusNumber; /* 00h */
++ U8 PciDeviceAndFunctionNumber; /* 01h */
++ U16 AdapterFlags; /* 02h */
++} MPI_ADAPTER_INFO, MPI_POINTER PTR_MPI_ADAPTER_INFO,
++ MpiAdapterInfo_t, MPI_POINTER pMpiAdapterInfo_t;
++
++#define MPI_ADAPTER_INFO_FLAGS_EMBEDDED (0x0001)
++#define MPI_ADAPTER_INFO_FLAGS_INIT_STATUS (0x0002)
++
++typedef struct _CONFIG_PAGE_IO_UNIT_2
++{
++ fCONFIG_PAGE_HEADER Header; /* 00h */
++ U32 Flags; /* 04h */
++ U32 BiosVersion; /* 08h */
++ MPI_ADAPTER_INFO AdapterOrder[4]; /* 0Ch */
++} fCONFIG_PAGE_IO_UNIT_2, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_2,
++ IOUnitPage2_t, MPI_POINTER pIOUnitPage2_t;
++
++#define MPI_IOUNITPAGE2_PAGEVERSION (0x00)
++
++#define MPI_IOUNITPAGE2_FLAGS_PAUSE_ON_ERROR (0x00000002)
++#define MPI_IOUNITPAGE2_FLAGS_VERBOSE_ENABLE (0x00000004)
++#define MPI_IOUNITPAGE2_FLAGS_COLOR_VIDEO_DISABLE (0x00000008)
++#define MPI_IOUNITPAGE2_FLAGS_DONT_HOOK_INT_40 (0x00000010)
++
++#define MPI_IOUNITPAGE2_FLAGS_DEV_LIST_DISPLAY_MASK (0x000000E0)
++#define MPI_IOUNITPAGE2_FLAGS_INSTALLED_DEV_DISPLAY (0x00000000)
++#define MPI_IOUNITPAGE2_FLAGS_ADAPTER_DISPLAY (0x00000020)
++#define MPI_IOUNITPAGE2_FLAGS_ADAPTER_DEV_DISPLAY (0x00000040)
++
++
++/*
++ * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
++ * one and check Header.PageLength at runtime.
++ */
++#ifndef MPI_IO_UNIT_PAGE_3_GPIO_VAL_MAX
++#define MPI_IO_UNIT_PAGE_3_GPIO_VAL_MAX (1)
++#endif
++
++typedef struct _CONFIG_PAGE_IO_UNIT_3
++{
++ fCONFIG_PAGE_HEADER Header; /* 00h */
++ U8 GPIOCount; /* 04h */
++ U8 Reserved1; /* 05h */
++ U16 Reserved2; /* 06h */
++ U16 GPIOVal[MPI_IO_UNIT_PAGE_3_GPIO_VAL_MAX]; /* 08h */
++} fCONFIG_PAGE_IO_UNIT_3, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_3,
++ IOUnitPage3_t, MPI_POINTER pIOUnitPage3_t;
++
++#define MPI_IOUNITPAGE3_PAGEVERSION (0x01)
++
++#define MPI_IOUNITPAGE3_GPIO_FUNCTION_MASK (0xFC)
++#define MPI_IOUNITPAGE3_GPIO_FUNCTION_SHIFT (2)
++#define MPI_IOUNITPAGE3_GPIO_SETTING_OFF (0x00)
++#define MPI_IOUNITPAGE3_GPIO_SETTING_ON (0x01)
++
++
++/****************************************************************************
++* IOC Config Pages
++****************************************************************************/
++
++typedef struct _CONFIG_PAGE_IOC_0
++{
++ fCONFIG_PAGE_HEADER Header; /* 00h */
++ U32 TotalNVStore; /* 04h */
++ U32 FreeNVStore; /* 08h */
++ U16 VendorID; /* 0Ch */
++ U16 DeviceID; /* 0Eh */
++ U8 RevisionID; /* 10h */
++ U8 Reserved[3]; /* 11h */
++ U32 ClassCode; /* 14h */
++ U16 SubsystemVendorID; /* 18h */
<<Diff was trimmed, longer than 597 lines>>
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