SOURCES (LINUX_2_6): linux-2.6-x8664-kernel-clock-is-running-2-tim...
pluto
pluto at pld-linux.org
Mon Nov 21 10:35:05 CET 2005
Author: pluto Date: Mon Nov 21 09:35:05 2005 GMT
Module: SOURCES Tag: LINUX_2_6
---- Log message:
- timer fixes.
---- Files affected:
SOURCES:
linux-2.6-x8664-kernel-clock-is-running-2-times-too-fast.patch (NONE -> 1.1.2.1) (NEW), linux-2.6-ix86-ati-xpress200-fall-back-from-ioapicIRQ-to-i8259AIRQ.patch (NONE -> 1.1.2.1) (NEW)
---- Diffs:
================================================================
Index: SOURCES/linux-2.6-x8664-kernel-clock-is-running-2-times-too-fast.patch
diff -u /dev/null SOURCES/linux-2.6-x8664-kernel-clock-is-running-2-times-too-fast.patch:1.1.2.1
--- /dev/null Mon Nov 21 10:35:05 2005
+++ SOURCES/linux-2.6-x8664-kernel-clock-is-running-2-times-too-fast.patch Mon Nov 21 10:35:00 2005
@@ -0,0 +1,65 @@
+--- linux-2.6.14.2/arch/x86_64/kernel/io_apic.c.orig 2005-11-11 06:33:12.000000000 +0100
++++ linux-2.6.14.2/arch/x86_64/kernel/io_apic.c 2005-11-21 10:16:28.362717500 +0100
+@@ -43,6 +43,7 @@
+ int sis_apic_bug; /* not actually supported, dummy for compile */
+
+ static int no_timer_check;
++static int disable_timer_pin_1;
+
+ int disable_timer_pin_1 __initdata;
+
+@@ -265,18 +266,24 @@ void __init check_ioapic(void)
+ for (func = 0; func < 8; func++) {
+ u32 class;
+ u32 vendor;
++ u16 product;
+ u8 type;
+ class = read_pci_config(num,slot,func,
+ PCI_CLASS_REVISION);
++
+ if (class == 0xffffffff)
+ break;
+
+- if ((class >> 16) != PCI_CLASS_BRIDGE_PCI)
++ if ((class >> 16) != PCI_CLASS_BRIDGE_PCI &&
++ (class >> 16) != PCI_CLASS_BRIDGE_HOST)
+ continue;
+
+ vendor = read_pci_config(num, slot, func,
+ PCI_VENDOR_ID);
+ vendor &= 0xffff;
++
++ product = read_pci_config_16(num, slot, func,
++ PCI_DEVICE_ID);
+ switch (vendor) {
+ case PCI_VENDOR_ID_VIA:
+ #ifdef CONFIG_GART_IOMMU
+@@ -299,8 +306,18 @@ void __init check_ioapic(void)
+ #endif
+ /* RED-PEN skip them on mptables too? */
+ return;
+- }
+
++ case PCI_VENDOR_ID_ATI:
++ if (product==0x5950 || product==0x5951) {
++ printk(KERN_INFO "ATI board detected - disabling APIC pin 1\n");
++#ifdef CONFIG_ACPI
++ /* This seems to be wrong, too */
++ acpi_skip_timer_override = 1;
++#endif
++ disable_timer_pin_1 = 1;
++ }
++ return;
++ }
+ /* No multi-function device? */
+ type = read_pci_config_byte(num,slot,func,
+ PCI_HEADER_TYPE);
+@@ -1681,6 +1698,8 @@ static inline void check_timer(void)
+ if (nmi_watchdog == NMI_IO_APIC) {
+ setup_nmi();
+ }
++ if (disable_timer_pin_1)
++ clear_IO_APIC_pin(0, pin1);
+ return;
+ }
+ /*
================================================================
Index: SOURCES/linux-2.6-ix86-ati-xpress200-fall-back-from-ioapicIRQ-to-i8259AIRQ.patch
diff -u /dev/null SOURCES/linux-2.6-ix86-ati-xpress200-fall-back-from-ioapicIRQ-to-i8259AIRQ.patch:1.1.2.1
--- /dev/null Mon Nov 21 10:35:05 2005
+++ SOURCES/linux-2.6-ix86-ati-xpress200-fall-back-from-ioapicIRQ-to-i8259AIRQ.patch Mon Nov 21 10:35:00 2005
@@ -0,0 +1,46 @@
+This one line patch adds upper bound testing when evaluating irq timer
+on boot up.
+
+It fix the machine having problem with clock running too fast.
+
+What this patch do is,
+if timer interrupts running too fast through IO-APIC IRQ then false back to
+i8259A IRQ.
+
+I really appreciate for the feedback from ATI Xpress 200 chipset user,
+It should eliminate the needs of adding no_timer_check on kernel options.
+
+I have NEC laptop using ATI Xpress 200 chipset with Pentium M 1.8GHz and
+its clock keep going forward when kernel compiled with local APIC support.
+Many machines based on RS200 chipset seem to have the same problem,
+including Acer Ferrari 400X AMD notebook or Compaq R4000.
+
+Also I would like to have comments on upper bound limit, 16 ticks, which
+I chose in this patch. My laptop always reports around 20, which is double from normal.
+
+
+--- linux-2.6.14/arch/i386/kernel/io_apic.c 2005-10-28 09:02:08.000000000 +0900
++++ linux-2.6.14-io_apic-atifix/arch/i386/kernel/io_apic.c 2005-11-09 00:31:56.000000000 +0900
+@@ -1798,21 +1798,21 @@
+ /* Let ten ticks pass... */
+ mdelay((10 * 1000) / HZ);
+
+ /*
+ * Expect a few ticks at least, to be sure some possible
+ * glue logic does not lock up after one or two first
+ * ticks in a non-ExtINT mode. Also the local APIC
+ * might have cached one ExtINT interrupt. Finally, at
+ * least one tick may be lost due to delays.
+ */
+- if (jiffies - t1 > 4)
++ if (jiffies - t1 > 4 && jiffies - t1 < 16)
+ return 1;
+
+ return 0;
+ }
+
+ /*
+ * In the SMP+IOAPIC case it might happen that there are an unspecified
+ * number of pending IRQ events unhandled. These cases are very rare,
+ * so we 'resend' these IRQs via IPIs, to the same CPU. It's much
+ * better to do it this way as thus we do not have to be aware of
================================================================
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