SOURCES: mpt-status-headers.patch - updated from 2.6.16.29
qboosh
qboosh at pld-linux.org
Mon Nov 13 14:26:31 CET 2006
Author: qboosh Date: Mon Nov 13 13:26:31 2006 GMT
Module: SOURCES Tag: HEAD
---- Log message:
- updated from 2.6.16.29
---- Files affected:
SOURCES:
mpt-status-headers.patch (1.1 -> 1.2)
---- Diffs:
================================================================
Index: SOURCES/mpt-status-headers.patch
diff -u SOURCES/mpt-status-headers.patch:1.1 SOURCES/mpt-status-headers.patch:1.2
--- SOURCES/mpt-status-headers.patch:1.1 Mon Aug 8 12:57:16 2005
+++ SOURCES/mpt-status-headers.patch Mon Nov 13 14:26:25 2006
@@ -1,16 +1,16 @@
-diff -Nur mpt-status-1.0/include.orig/lsi/mpi_cnfg.h mpt-status-1.0/include/lsi/mpi_cnfg.h
---- mpt-status-1.0/include.orig/lsi/mpi_cnfg.h 1970-01-01 01:00:00.000000000 +0100
-+++ mpt-status-1.0/include/lsi/mpi_cnfg.h 2004-08-08 01:26:04.000000000 +0200
-@@ -0,0 +1,2105 @@
+diff -Nur mpt-status-1.2.0/include.orig/lsi/mpi_cnfg.h mpt-status-1.2.0/include/lsi/mpi_cnfg.h
+--- mpt-status-1.2.0/include.orig/lsi/mpi_cnfg.h 1970-01-01 01:00:00.000000000 +0100
++++ mpt-status-1.2.0/include/lsi/mpi_cnfg.h 2006-11-13 14:00:03.939505000 +0100
+@@ -0,0 +1,2837 @@
+/*
-+ * Copyright (c) 2000-2003 LSI Logic Corporation.
++ * Copyright (c) 2000-2005 LSI Logic Corporation.
+ *
+ *
+ * Name: mpi_cnfg.h
+ * Title: MPI Config message, structures, and Pages
+ * Creation Date: July 27, 2000
+ *
-+ * mpi_cnfg.h Version: 01.05.xx
++ * mpi_cnfg.h Version: 01.05.11
+ *
+ * Version History
+ * ---------------
@@ -149,6 +149,127 @@
+ * In CONFIG_PAGE_FC_DEVICE_0, replaced Reserved1 field
+ * with ADISCHardALPA.
+ * Added MPI_FC_DEVICE_PAGE0_PROT_FCP_RETRY define.
++ * 01-16-04 01.02.13 Added InitiatorDeviceTimeout and InitiatorIoPendTimeout
++ * fields and related defines to CONFIG_PAGE_FC_PORT_1.
++ * Added define for
++ * MPI_FCPORTPAGE1_FLAGS_SOFT_ALPA_FALLBACK.
++ * Added new fields to the substructures of
++ * CONFIG_PAGE_FC_PORT_10.
++ * 04-29-04 01.02.14 Added define for IDP bit for CONFIG_PAGE_SCSI_PORT_0,
++ * CONFIG_PAGE_SCSI_DEVICE_0, and
++ * CONFIG_PAGE_SCSI_DEVICE_1. Also bumped Page Version for
++ * these pages.
++ * 05-11-04 01.03.01 Added structure for CONFIG_PAGE_INBAND_0.
++ * 08-19-04 01.05.01 Modified MSG_CONFIG request to support extended config
++ * pages.
++ * Added a new structure for extended config page header.
++ * Added new extended config pages types and structures for
++ * SAS IO Unit, SAS Expander, SAS Device, and SAS PHY.
++ * Replaced a reserved byte in CONFIG_PAGE_MANUFACTURING_4
++ * to add a Flags field.
++ * Two new Manufacturing config pages (5 and 6).
++ * Two new bits defined for IO Unit Page 1 Flags field.
++ * Modified CONFIG_PAGE_IO_UNIT_2 to add three new fields
++ * to specify the BIOS boot device.
++ * Four new Flags bits defined for IO Unit Page 2.
++ * Added IO Unit Page 4.
++ * Added EEDP Flags settings to IOC Page 1.
++ * Added new BIOS Page 1 config page.
++ * 10-05-04 01.05.02 Added define for
++ * MPI_IOCPAGE1_INITIATOR_CONTEXT_REPLY_DISABLE.
++ * Added new Flags field to CONFIG_PAGE_MANUFACTURING_5 and
++ * associated defines.
++ * Added more defines for SAS IO Unit Page 0
++ * DiscoveryStatus field.
++ * Added define for MPI_SAS_IOUNIT0_DS_SUBTRACTIVE_LINK
++ * and MPI_SAS_IOUNIT0_DS_TABLE_LINK.
++ * Added defines for Physical Mapping Modes to SAS IO Unit
++ * Page 2.
++ * Added define for
++ * MPI_SAS_DEVICE0_FLAGS_PORT_SELECTOR_ATTACH.
++ * 10-27-04 01.05.03 Added defines for new SAS PHY page addressing mode.
++ * Added defines for MaxTargetSpinUp to BIOS Page 1.
++ * Added 5 new ControlFlags defines for SAS IO Unit
++ * Page 1.
++ * Added MaxNumPhysicalMappedIDs field to SAS IO Unit
++ * Page 2.
++ * Added AccessStatus field to SAS Device Page 0 and added
++ * new Flags bits for supported SATA features.
++ * 12-07-04 01.05.04 Added config page structures for BIOS Page 2, RAID
++ * Volume Page 1, and RAID Physical Disk Page 1.
++ * Replaced IO Unit Page 1 BootTargetID,BootBus, and
++ * BootAdapterNum with reserved field.
++ * Added DataScrubRate and ResyncRate to RAID Volume
++ * Page 0.
++ * Added MPI_SAS_IOUNIT2_FLAGS_RESERVE_ID_0_FOR_BOOT
++ * define.
++ * 12-09-04 01.05.05 Added Target Mode Large CDB Enable to FC Port Page 1
++ * Flags field.
++ * Added Auto Port Config flag define for SAS IOUNIT
++ * Page 1 ControlFlags.
++ * Added Disabled bad Phy define to Expander Page 1
++ * Discovery Info field.
++ * Added SAS/SATA device support to SAS IOUnit Page 1
++ * ControlFlags.
++ * Added Unsupported device to SAS Dev Page 0 Flags field
++ * Added disable use SATA Hash Address for SAS IOUNIT
++ * page 1 in ControlFields.
++ * 01-15-05 01.05.06 Added defaults for data scrub rate and resync rate to
++ * Manufacturing Page 4.
++ * Added new defines for BIOS Page 1 IOCSettings field.
++ * Added ExtDiskIdentifier field to RAID Physical Disk
++ * Page 0.
++ * Added new defines for SAS IO Unit Page 1 ControlFlags
++ * and to SAS Device Page 0 Flags to control SATA devices.
++ * Added defines and structures for the new Log Page 0, a
++ * new type of configuration page.
++ * 02-09-05 01.05.07 Added InactiveStatus field to RAID Volume Page 0.
++ * Added WWID field to RAID Volume Page 1.
++ * Added PhysicalPort field to SAS Expander pages 0 and 1.
++ * 03-11-05 01.05.08 Removed the EEDP flags from IOC Page 1.
++ * Added Enclosure/Slot boot device format to BIOS Page 2.
++ * New status value for RAID Volume Page 0 VolumeStatus
++ * (VolumeState subfield).
++ * New value for RAID Physical Page 0 InactiveStatus.
++ * Added Inactive Volume Member flag RAID Physical Disk
++ * Page 0 PhysDiskStatus field.
++ * New physical mapping mode in SAS IO Unit Page 2.
++ * Added CONFIG_PAGE_SAS_ENCLOSURE_0.
++ * Added Slot and Enclosure fields to SAS Device Page 0.
++ * 06-24-05 01.05.09 Added EEDP defines to IOC Page 1.
++ * Added more RAID type defines to IOC Page 2.
++ * Added Port Enable Delay settings to BIOS Page 1.
++ * Added Bad Block Table Full define to RAID Volume Page 0.
++ * Added Previous State defines to RAID Physical Disk
++ * Page 0.
++ * Added Max Sata Targets define for DiscoveryStatus field
++ * of SAS IO Unit Page 0.
++ * Added Device Self Test to Control Flags of SAS IO Unit
++ * Page 1.
++ * Added Direct Attach Starting Slot Number define for SAS
++ * IO Unit Page 2.
++ * Added new fields in SAS Device Page 2 for enclosure
++ * mapping.
++ * Added OwnerDevHandle and Flags field to SAS PHY Page 0.
++ * Added IOC GPIO Flags define to SAS Enclosure Page 0.
++ * Fixed the value for MPI_SAS_IOUNIT1_CONTROL_DEV_SATA_SUPPORT.
++ * 08-03-05 01.05.10 Removed ISDataScrubRate and ISResyncRate from
++ * Manufacturing Page 4.
++ * Added MPI_IOUNITPAGE1_SATA_WRITE_CACHE_DISABLE bit.
++ * Added NumDevsPerEnclosure field to SAS IO Unit page 2.
++ * Added MPI_SAS_IOUNIT2_FLAGS_HOST_ASSIGNED_PHYS_MAP
++ * define.
++ * Added EnclosureHandle field to SAS Expander page 0.
++ * Removed redundant NumTableEntriesProg field from SAS
++ * Expander Page 1.
++ * 08-30-05 01.05.11 Added DeviceID for FC949E and changed the DeviceID for
++ * SAS1078.
++ * Added more defines for Manufacturing Page 4 Flags field.
++ * Added more defines for IOCSettings and added
++ * ExpanderSpinup field to Bios Page 1.
++ * Added postpone SATA Init bit to SAS IO Unit Page 1
++ * ControlFlags.
++ * Changed LogEntry format for Log Page 0.
+ * --------------------------------------------------------------------------
+ */
+
@@ -168,7 +289,7 @@
+ U8 PageLength; /* 01h */
+ U8 PageNumber; /* 02h */
+ U8 PageType; /* 03h */
-+} fCONFIG_PAGE_HEADER, MPI_POINTER PTR_CONFIG_PAGE_HEADER,
++} CONFIG_PAGE_HEADER, MPI_POINTER PTR_CONFIG_PAGE_HEADER,
+ ConfigPageHeader_t, MPI_POINTER pConfigPageHeader_t;
+
+typedef union _CONFIG_PAGE_HEADER_UNION
@@ -178,7 +299,7 @@
+ U16 Word16[2];
+ U32 Word32;
+} ConfigPageHeaderUnion, MPI_POINTER pConfigPageHeaderUnion,
-+ fCONFIG_PAGE_HEADER_UNION, MPI_POINTER PTR_CONFIG_PAGE_HEADER_UNION;
++ CONFIG_PAGE_HEADER_UNION, MPI_POINTER PTR_CONFIG_PAGE_HEADER_UNION;
+
+typedef struct _CONFIG_EXTENDED_PAGE_HEADER
+{
@@ -189,7 +310,7 @@
+ U16 ExtPageLength; /* 04h */
+ U8 ExtPageType; /* 06h */
+ U8 Reserved2; /* 07h */
-+} fCONFIG_EXTENDED_PAGE_HEADER, MPI_POINTER PTR_CONFIG_EXTENDED_PAGE_HEADER,
++} CONFIG_EXTENDED_PAGE_HEADER, MPI_POINTER PTR_CONFIG_EXTENDED_PAGE_HEADER,
+ ConfigExtendedPageHeader_t, MPI_POINTER pConfigExtendedPageHeader_t;
+
+
@@ -228,6 +349,8 @@
+#define MPI_CONFIG_EXTPAGETYPE_SAS_EXPANDER (0x11)
+#define MPI_CONFIG_EXTPAGETYPE_SAS_DEVICE (0x12)
+#define MPI_CONFIG_EXTPAGETYPE_SAS_PHY (0x13)
++#define MPI_CONFIG_EXTPAGETYPE_LOG (0x14)
++#define MPI_CONFIG_EXTPAGETYPE_ENCLOSURE (0x15)
+
+
+/****************************************************************************
@@ -235,10 +358,19 @@
+****************************************************************************/
+#define MPI_SCSI_PORT_PGAD_PORT_MASK (0x000000FF)
+
++#define MPI_SCSI_DEVICE_FORM_MASK (0xF0000000)
++#define MPI_SCSI_DEVICE_FORM_BUS_TID (0x00000000)
+#define MPI_SCSI_DEVICE_TARGET_ID_MASK (0x000000FF)
+#define MPI_SCSI_DEVICE_TARGET_ID_SHIFT (0)
+#define MPI_SCSI_DEVICE_BUS_MASK (0x0000FF00)
+#define MPI_SCSI_DEVICE_BUS_SHIFT (8)
++#define MPI_SCSI_DEVICE_FORM_TARGET_MODE (0x10000000)
++#define MPI_SCSI_DEVICE_TM_RESPOND_ID_MASK (0x000000FF)
++#define MPI_SCSI_DEVICE_TM_RESPOND_ID_SHIFT (0)
++#define MPI_SCSI_DEVICE_TM_BUS_MASK (0x0000FF00)
++#define MPI_SCSI_DEVICE_TM_BUS_SHIFT (8)
++#define MPI_SCSI_DEVICE_TM_INIT_ID_MASK (0x00FF0000)
++#define MPI_SCSI_DEVICE_TM_INIT_ID_SHIFT (16)
+
+#define MPI_FC_PORT_PGAD_PORT_MASK (0xF0000000)
+#define MPI_FC_PORT_PGAD_PORT_SHIFT (28)
@@ -264,6 +396,20 @@
+#define MPI_PHYSDISK_PGAD_PHYSDISKNUM_MASK (0x000000FF)
+#define MPI_PHYSDISK_PGAD_PHYSDISKNUM_SHIFT (0)
+
++#define MPI_SAS_EXPAND_PGAD_FORM_MASK (0xF0000000)
++#define MPI_SAS_EXPAND_PGAD_FORM_SHIFT (28)
++#define MPI_SAS_EXPAND_PGAD_FORM_GET_NEXT_HANDLE (0x00000000)
++#define MPI_SAS_EXPAND_PGAD_FORM_HANDLE_PHY_NUM (0x00000001)
++#define MPI_SAS_EXPAND_PGAD_FORM_HANDLE (0x00000002)
++#define MPI_SAS_EXPAND_PGAD_GNH_MASK_HANDLE (0x0000FFFF)
++#define MPI_SAS_EXPAND_PGAD_GNH_SHIFT_HANDLE (0)
++#define MPI_SAS_EXPAND_PGAD_HPN_MASK_PHY (0x00FF0000)
++#define MPI_SAS_EXPAND_PGAD_HPN_SHIFT_PHY (16)
++#define MPI_SAS_EXPAND_PGAD_HPN_MASK_HANDLE (0x0000FFFF)
++#define MPI_SAS_EXPAND_PGAD_HPN_SHIFT_HANDLE (0)
++#define MPI_SAS_EXPAND_PGAD_H_MASK_HANDLE (0x0000FFFF)
++#define MPI_SAS_EXPAND_PGAD_H_SHIFT_HANDLE (0)
++
+#define MPI_SAS_DEVICE_PGAD_FORM_MASK (0xF0000000)
+#define MPI_SAS_DEVICE_PGAD_FORM_SHIFT (28)
+#define MPI_SAS_DEVICE_PGAD_FORM_GET_NEXT_HANDLE (0x00000000)
@@ -278,10 +424,24 @@
+#define MPI_SAS_DEVICE_PGAD_H_HANDLE_MASK (0x0000FFFF)
+#define MPI_SAS_DEVICE_PGAD_H_HANDLE_SHIFT (0)
+
-+#define MPI_SAS_PHY_PGAD_PHY_NUMBER_MASK (0x00FF0000)
-+#define MPI_SAS_PHY_PGAD_PHY_NUMBER_SHIFT (16)
-+#define MPI_SAS_PHY_PGAD_DEVHANDLE_MASK (0x0000FFFF)
-+#define MPI_SAS_PHY_PGAD_DEVHANDLE_SHIFT (0)
++#define MPI_SAS_PHY_PGAD_FORM_MASK (0xF0000000)
++#define MPI_SAS_PHY_PGAD_FORM_SHIFT (28)
++#define MPI_SAS_PHY_PGAD_FORM_PHY_NUMBER (0x0)
++#define MPI_SAS_PHY_PGAD_FORM_PHY_TBL_INDEX (0x1)
++#define MPI_SAS_PHY_PGAD_PHY_NUMBER_MASK (0x000000FF)
++#define MPI_SAS_PHY_PGAD_PHY_NUMBER_SHIFT (0)
++#define MPI_SAS_PHY_PGAD_PHY_TBL_INDEX_MASK (0x0000FFFF)
++#define MPI_SAS_PHY_PGAD_PHY_TBL_INDEX_SHIFT (0)
++
++#define MPI_SAS_ENCLOS_PGAD_FORM_MASK (0xF0000000)
++#define MPI_SAS_ENCLOS_PGAD_FORM_SHIFT (28)
++#define MPI_SAS_ENCLOS_PGAD_FORM_GET_NEXT_HANDLE (0x00000000)
++#define MPI_SAS_ENCLOS_PGAD_FORM_HANDLE (0x00000001)
++#define MPI_SAS_ENCLOS_PGAD_GNH_HANDLE_MASK (0x0000FFFF)
++#define MPI_SAS_ENCLOS_PGAD_GNH_HANDLE_SHIFT (0)
++#define MPI_SAS_ENCLOS_PGAD_H_HANDLE_MASK (0x0000FFFF)
++#define MPI_SAS_ENCLOS_PGAD_H_HANDLE_SHIFT (0)
++
+
+
+/****************************************************************************
@@ -298,7 +458,7 @@
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U8 Reserved2[8]; /* 0Ch */
-+ fCONFIG_PAGE_HEADER Header; /* 14h */
++ CONFIG_PAGE_HEADER Header; /* 14h */
+ U32 PageAddress; /* 18h */
+ SGE_IO_UNION PageBufferSGE; /* 1Ch */
+} MSG_CONFIG, MPI_POINTER PTR_MSG_CONFIG,
@@ -331,7 +491,7 @@
+ U8 Reserved2[2]; /* 0Ch */
+ U16 IOCStatus; /* 0Eh */
+ U32 IOCLogInfo; /* 10h */
-+ fCONFIG_PAGE_HEADER Header; /* 14h */
++ CONFIG_PAGE_HEADER Header; /* 14h */
+} MSG_CONFIG_REPLY, MPI_POINTER PTR_MSG_CONFIG_REPLY,
+ ConfigReply_t, MPI_POINTER pConfigReply_t;
+
@@ -353,6 +513,9 @@
+#define MPI_MANUFACTPAGE_DEVICEID_FC929 (0x0622)
+#define MPI_MANUFACTPAGE_DEVICEID_FC919X (0x0628)
+#define MPI_MANUFACTPAGE_DEVICEID_FC929X (0x0626)
++#define MPI_MANUFACTPAGE_DEVICEID_FC939X (0x0642)
++#define MPI_MANUFACTPAGE_DEVICEID_FC949X (0x0640)
++#define MPI_MANUFACTPAGE_DEVICEID_FC949E (0x0646)
+/* SCSI */
+#define MPI_MANUFACTPAGE_DEVID_53C1030 (0x0030)
+#define MPI_MANUFACTPAGE_DEVID_53C1030ZC (0x0031)
@@ -362,18 +525,25 @@
+#define MPI_MANUFACTPAGE_DEVID_53C1035ZC (0x0041)
+/* SAS */
+#define MPI_MANUFACTPAGE_DEVID_SAS1064 (0x0050)
++#define MPI_MANUFACTPAGE_DEVID_SAS1064A (0x005C)
++#define MPI_MANUFACTPAGE_DEVID_SAS1064E (0x0056)
++#define MPI_MANUFACTPAGE_DEVID_SAS1066 (0x005E)
++#define MPI_MANUFACTPAGE_DEVID_SAS1066E (0x005A)
++#define MPI_MANUFACTPAGE_DEVID_SAS1068 (0x0054)
++#define MPI_MANUFACTPAGE_DEVID_SAS1068E (0x0058)
++#define MPI_MANUFACTPAGE_DEVID_SAS1078 (0x0062)
+
+
+typedef struct _CONFIG_PAGE_MANUFACTURING_0
+{
-+ fCONFIG_PAGE_HEADER Header; /* 00h */
++ CONFIG_PAGE_HEADER Header; /* 00h */
+ U8 ChipName[16]; /* 04h */
+ U8 ChipRevision[8]; /* 14h */
+ U8 BoardName[16]; /* 1Ch */
+ U8 BoardAssembly[16]; /* 2Ch */
+ U8 BoardTracerNumber[16]; /* 3Ch */
+
-+} fCONFIG_PAGE_MANUFACTURING_0, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_0,
++} CONFIG_PAGE_MANUFACTURING_0, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_0,
+ ManufacturingPage0_t, MPI_POINTER pManufacturingPage0_t;
+
+#define MPI_MANUFACTURING0_PAGEVERSION (0x00)
@@ -381,9 +551,9 @@
+
+typedef struct _CONFIG_PAGE_MANUFACTURING_1
+{
-+ fCONFIG_PAGE_HEADER Header; /* 00h */
++ CONFIG_PAGE_HEADER Header; /* 00h */
+ U8 VPD[256]; /* 04h */
-+} fCONFIG_PAGE_MANUFACTURING_1, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_1,
++} CONFIG_PAGE_MANUFACTURING_1, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_1,
+ ManufacturingPage1_t, MPI_POINTER pManufacturingPage1_t;
+
+#define MPI_MANUFACTURING1_PAGEVERSION (0x00)
@@ -408,10 +578,10 @@
+
+typedef struct _CONFIG_PAGE_MANUFACTURING_2
+{
-+ fCONFIG_PAGE_HEADER Header; /* 00h */
++ CONFIG_PAGE_HEADER Header; /* 00h */
+ MPI_CHIP_REVISION_ID ChipId; /* 04h */
+ U32 HwSettings[MPI_MAN_PAGE_2_HW_SETTINGS_WORDS];/* 08h */
-+} fCONFIG_PAGE_MANUFACTURING_2, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_2,
++} CONFIG_PAGE_MANUFACTURING_2, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_2,
+ ManufacturingPage2_t, MPI_POINTER pManufacturingPage2_t;
+
+#define MPI_MANUFACTURING2_PAGEVERSION (0x00)
@@ -427,10 +597,10 @@
+
+typedef struct _CONFIG_PAGE_MANUFACTURING_3
+{
-+ fCONFIG_PAGE_HEADER Header; /* 00h */
++ CONFIG_PAGE_HEADER Header; /* 00h */
+ MPI_CHIP_REVISION_ID ChipId; /* 04h */
+ U32 Info[MPI_MAN_PAGE_3_INFO_WORDS];/* 08h */
-+} fCONFIG_PAGE_MANUFACTURING_3, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_3,
++} CONFIG_PAGE_MANUFACTURING_3, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_3,
+ ManufacturingPage3_t, MPI_POINTER pManufacturingPage3_t;
+
+#define MPI_MANUFACTURING3_PAGEVERSION (0x00)
@@ -438,7 +608,7 @@
+
+typedef struct _CONFIG_PAGE_MANUFACTURING_4
+{
-+ fCONFIG_PAGE_HEADER Header; /* 00h */
++ CONFIG_PAGE_HEADER Header; /* 00h */
+ U32 Reserved1; /* 04h */
+ U8 InfoOffset0; /* 08h */
+ U8 InfoSize0; /* 09h */
@@ -451,30 +621,52 @@
+ U32 ISVolumeSettings; /* 48h */
+ U32 IMEVolumeSettings; /* 4Ch */
+ U32 IMVolumeSettings; /* 50h */
-+} fCONFIG_PAGE_MANUFACTURING_4, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_4,
++ U32 Reserved3; /* 54h */
++ U32 Reserved4; /* 58h */
++ U32 Reserved5; /* 5Ch */
++ U8 IMEDataScrubRate; /* 60h */
++ U8 IMEResyncRate; /* 61h */
++ U16 Reserved6; /* 62h */
++ U8 IMDataScrubRate; /* 64h */
++ U8 IMResyncRate; /* 65h */
++ U16 Reserved7; /* 66h */
++ U32 Reserved8; /* 68h */
++ U32 Reserved9; /* 6Ch */
++} CONFIG_PAGE_MANUFACTURING_4, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_4,
+ ManufacturingPage4_t, MPI_POINTER pManufacturingPage4_t;
+
-+#define MPI_MANUFACTURING4_PAGEVERSION (0x01)
++#define MPI_MANUFACTURING4_PAGEVERSION (0x03)
+
+/* defines for the Flags field */
++#define MPI_MANPAGE4_IME_DISABLE (0x20)
++#define MPI_MANPAGE4_IM_DISABLE (0x10)
++#define MPI_MANPAGE4_IS_DISABLE (0x08)
++#define MPI_MANPAGE4_IR_MODEPAGE8_DISABLE (0x04)
++#define MPI_MANPAGE4_IM_RESYNC_CACHE_ENABLE (0x02)
+#define MPI_MANPAGE4_IR_NO_MIX_SAS_SATA (0x01)
+
+
+typedef struct _CONFIG_PAGE_MANUFACTURING_5
+{
-+ fCONFIG_PAGE_HEADER Header; /* 00h */
++ CONFIG_PAGE_HEADER Header; /* 00h */
+ U64 BaseWWID; /* 04h */
-+} fCONFIG_PAGE_MANUFACTURING_5, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_5,
++ U8 Flags; /* 0Ch */
++ U8 Reserved1; /* 0Dh */
++ U16 Reserved2; /* 0Eh */
++} CONFIG_PAGE_MANUFACTURING_5, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_5,
+ ManufacturingPage5_t, MPI_POINTER pManufacturingPage5_t;
+
-+#define MPI_MANUFACTURING5_PAGEVERSION (0x00)
++#define MPI_MANUFACTURING5_PAGEVERSION (0x01)
++
++/* defines for the Flags field */
++#define MPI_MANPAGE5_TWO_WWID_PER_PHY (0x01)
+
+
+typedef struct _CONFIG_PAGE_MANUFACTURING_6
+{
-+ fCONFIG_PAGE_HEADER Header; /* 00h */
++ CONFIG_PAGE_HEADER Header; /* 00h */
+ U32 ProductSpecificInfo;/* 04h */
-+} fCONFIG_PAGE_MANUFACTURING_6, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_6,
++} CONFIG_PAGE_MANUFACTURING_6, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_6,
+ ManufacturingPage6_t, MPI_POINTER pManufacturingPage6_t;
+
+#define MPI_MANUFACTURING6_PAGEVERSION (0x00)
@@ -486,9 +678,9 @@
+
+typedef struct _CONFIG_PAGE_IO_UNIT_0
+{
-+ fCONFIG_PAGE_HEADER Header; /* 00h */
++ CONFIG_PAGE_HEADER Header; /* 00h */
+ U64 UniqueValue; /* 04h */
-+} fCONFIG_PAGE_IO_UNIT_0, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_0,
++} CONFIG_PAGE_IO_UNIT_0, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_0,
+ IOUnitPage0_t, MPI_POINTER pIOUnitPage0_t;
+
+#define MPI_IOUNITPAGE0_PAGEVERSION (0x00)
@@ -496,12 +688,12 @@
+
+typedef struct _CONFIG_PAGE_IO_UNIT_1
+{
-+ fCONFIG_PAGE_HEADER Header; /* 00h */
++ CONFIG_PAGE_HEADER Header; /* 00h */
+ U32 Flags; /* 04h */
-+} fCONFIG_PAGE_IO_UNIT_1, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_1,
++} CONFIG_PAGE_IO_UNIT_1, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_1,
+ IOUnitPage1_t, MPI_POINTER pIOUnitPage1_t;
+
-+#define MPI_IOUNITPAGE1_PAGEVERSION (0x01)
++#define MPI_IOUNITPAGE1_PAGEVERSION (0x02)
+
+/* IO Unit Page 1 Flags defines */
+#define MPI_IOUNITPAGE1_MULTI_FUNCTION (0x00000000)
@@ -513,7 +705,7 @@
+#define MPI_IOUNITPAGE1_DISABLE_IR (0x00000040)
+#define MPI_IOUNITPAGE1_FORCE_32 (0x00000080)
+#define MPI_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE (0x00000100)
-+
++#define MPI_IOUNITPAGE1_SATA_WRITE_CACHE_DISABLE (0x00000200)
+
+typedef struct _MPI_ADAPTER_INFO
+{
@@ -528,14 +720,15 @@
+
+typedef struct _CONFIG_PAGE_IO_UNIT_2
+{
-+ fCONFIG_PAGE_HEADER Header; /* 00h */
++ CONFIG_PAGE_HEADER Header; /* 00h */
+ U32 Flags; /* 04h */
+ U32 BiosVersion; /* 08h */
+ MPI_ADAPTER_INFO AdapterOrder[4]; /* 0Ch */
-+} fCONFIG_PAGE_IO_UNIT_2, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_2,
++ U32 Reserved1; /* 1Ch */
++} CONFIG_PAGE_IO_UNIT_2, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_2,
+ IOUnitPage2_t, MPI_POINTER pIOUnitPage2_t;
+
-+#define MPI_IOUNITPAGE2_PAGEVERSION (0x00)
++#define MPI_IOUNITPAGE2_PAGEVERSION (0x02)
+
+#define MPI_IOUNITPAGE2_FLAGS_PAUSE_ON_ERROR (0x00000002)
+#define MPI_IOUNITPAGE2_FLAGS_VERBOSE_ENABLE (0x00000004)
@@ -558,12 +751,12 @@
+
+typedef struct _CONFIG_PAGE_IO_UNIT_3
+{
-+ fCONFIG_PAGE_HEADER Header; /* 00h */
++ CONFIG_PAGE_HEADER Header; /* 00h */
+ U8 GPIOCount; /* 04h */
+ U8 Reserved1; /* 05h */
+ U16 Reserved2; /* 06h */
+ U16 GPIOVal[MPI_IO_UNIT_PAGE_3_GPIO_VAL_MAX]; /* 08h */
-+} fCONFIG_PAGE_IO_UNIT_3, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_3,
++} CONFIG_PAGE_IO_UNIT_3, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_3,
+ IOUnitPage3_t, MPI_POINTER pIOUnitPage3_t;
+
+#define MPI_IOUNITPAGE3_PAGEVERSION (0x01)
@@ -574,13 +767,24 @@
+#define MPI_IOUNITPAGE3_GPIO_SETTING_ON (0x01)
+
+
++typedef struct _CONFIG_PAGE_IO_UNIT_4
++{
++ CONFIG_PAGE_HEADER Header; /* 00h */
++ U32 Reserved1; /* 04h */
++ SGE_SIMPLE_UNION FWImageSGE; /* 08h */
++} CONFIG_PAGE_IO_UNIT_4, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_4,
++ IOUnitPage4_t, MPI_POINTER pIOUnitPage4_t;
++
++#define MPI_IOUNITPAGE4_PAGEVERSION (0x00)
++
++
+/****************************************************************************
+* IOC Config Pages
+****************************************************************************/
+
+typedef struct _CONFIG_PAGE_IOC_0
+{
-+ fCONFIG_PAGE_HEADER Header; /* 00h */
++ CONFIG_PAGE_HEADER Header; /* 00h */
+ U32 TotalNVStore; /* 04h */
+ U32 FreeNVStore; /* 08h */
+ U16 VendorID; /* 0Ch */
@@ -590,7 +794,7 @@
+ U32 ClassCode; /* 14h */
+ U16 SubsystemVendorID; /* 18h */
+ U16 SubsystemID; /* 1Ah */
-+} fCONFIG_PAGE_IOC_0, MPI_POINTER PTR_CONFIG_PAGE_IOC_0,
++} CONFIG_PAGE_IOC_0, MPI_POINTER PTR_CONFIG_PAGE_IOC_0,
+ IOCPage0_t, MPI_POINTER pIOCPage0_t;
+
+#define MPI_IOCPAGE0_PAGEVERSION (0x01)
@@ -598,23 +802,23 @@
+
+typedef struct _CONFIG_PAGE_IOC_1
+{
-+ fCONFIG_PAGE_HEADER Header; /* 00h */
++ CONFIG_PAGE_HEADER Header; /* 00h */
+ U32 Flags; /* 04h */
+ U32 CoalescingTimeout; /* 08h */
+ U8 CoalescingDepth; /* 0Ch */
+ U8 PCISlotNum; /* 0Dh */
+ U8 Reserved[2]; /* 0Eh */
-+} fCONFIG_PAGE_IOC_1, MPI_POINTER PTR_CONFIG_PAGE_IOC_1,
++} CONFIG_PAGE_IOC_1, MPI_POINTER PTR_CONFIG_PAGE_IOC_1,
+ IOCPage1_t, MPI_POINTER pIOCPage1_t;
+
-+#define MPI_IOCPAGE1_PAGEVERSION (0x01)
++#define MPI_IOCPAGE1_PAGEVERSION (0x03)
+
+/* defines for the Flags field */
-+#define MPI_IOCPAGE1_EEDP_HOST_SUPPORTS_DIF (0x08000000)
+#define MPI_IOCPAGE1_EEDP_MODE_MASK (0x07000000)
+#define MPI_IOCPAGE1_EEDP_MODE_OFF (0x00000000)
+#define MPI_IOCPAGE1_EEDP_MODE_T10 (0x01000000)
+#define MPI_IOCPAGE1_EEDP_MODE_LSI_1 (0x02000000)
++#define MPI_IOCPAGE1_INITIATOR_CONTEXT_REPLY_DISABLE (0x00000010)
+#define MPI_IOCPAGE1_REPLY_COALESCING (0x00000001)
+
+#define MPI_IOCPAGE1_PCISLOTNUM_UNKNOWN (0xFF)
@@ -629,7 +833,7 @@
+ U8 VolumeType; /* 04h */
+ U8 Flags; /* 05h */
+ U16 Reserved3; /* 06h */
-+} fCONFIG_PAGE_IOC_2_RAID_VOL, MPI_POINTER PTR_CONFIG_PAGE_IOC_2_RAID_VOL,
++} CONFIG_PAGE_IOC_2_RAID_VOL, MPI_POINTER PTR_CONFIG_PAGE_IOC_2_RAID_VOL,
+ ConfigPageIoc2RaidVol_t, MPI_POINTER pConfigPageIoc2RaidVol_t;
+
+/* IOC Page 2 Volume RAID Type values, also used in RAID Volume pages */
@@ -637,6 +841,11 @@
+#define MPI_RAID_VOL_TYPE_IS (0x00)
+#define MPI_RAID_VOL_TYPE_IME (0x01)
+#define MPI_RAID_VOL_TYPE_IM (0x02)
++#define MPI_RAID_VOL_TYPE_RAID_5 (0x03)
++#define MPI_RAID_VOL_TYPE_RAID_6 (0x04)
++#define MPI_RAID_VOL_TYPE_RAID_10 (0x05)
++#define MPI_RAID_VOL_TYPE_RAID_50 (0x06)
++#define MPI_RAID_VOL_TYPE_UNKNOWN (0xFF)
+
+/* IOC Page 2 Volume Flags values */
+
@@ -652,23 +861,27 @@
+
+typedef struct _CONFIG_PAGE_IOC_2
+{
-+ fCONFIG_PAGE_HEADER Header; /* 00h */
++ CONFIG_PAGE_HEADER Header; /* 00h */
+ U32 CapabilitiesFlags; /* 04h */
+ U8 NumActiveVolumes; /* 08h */
+ U8 MaxVolumes; /* 09h */
+ U8 NumActivePhysDisks; /* 0Ah */
+ U8 MaxPhysDisks; /* 0Bh */
-+ fCONFIG_PAGE_IOC_2_RAID_VOL RaidVolume[MPI_IOC_PAGE_2_RAID_VOLUME_MAX];/* 0Ch */
-+} fCONFIG_PAGE_IOC_2, MPI_POINTER PTR_CONFIG_PAGE_IOC_2,
++ CONFIG_PAGE_IOC_2_RAID_VOL RaidVolume[MPI_IOC_PAGE_2_RAID_VOLUME_MAX];/* 0Ch */
++} CONFIG_PAGE_IOC_2, MPI_POINTER PTR_CONFIG_PAGE_IOC_2,
+ IOCPage2_t, MPI_POINTER pIOCPage2_t;
+
<<Diff was trimmed, longer than 597 lines>>
---- CVS-web:
http://cvs.pld-linux.org/SOURCES/mpt-status-headers.patch?r1=1.1&r2=1.2&f=u
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