SOURCES: x86emu-update.patch (NEW) - updated from X.org

qboosh qboosh at pld-linux.org
Sat Jan 26 21:11:32 CET 2008


Author: qboosh                       Date: Sat Jan 26 20:11:32 2008 GMT
Module: SOURCES                       Tag: HEAD
---- Log message:
- updated from X.org

---- Files affected:
SOURCES:
   x86emu-update.patch (NONE -> 1.1)  (NEW)

---- Diffs:

================================================================
Index: SOURCES/x86emu-update.patch
diff -u /dev/null SOURCES/x86emu-update.patch:1.1
--- /dev/null	Sat Jan 26 21:11:32 2008
+++ SOURCES/x86emu-update.patch	Sat Jan 26 21:11:26 2008
@@ -0,0 +1,3653 @@
+--- x86emu-0.8/scitech/include/x86emu/fpu_regs.h.orig	2001-08-14 19:35:05.000000000 +0200
++++ x86emu-0.8/scitech/include/x86emu/fpu_regs.h	2008-01-26 19:53:19.113610916 +0100
+@@ -41,7 +41,9 @@
+ 
+ #ifdef X86_FPU_SUPPORT
+ 
+-#pragma pack(1)
++#ifdef PACK
++# pragma PACK
++#endif
+ 
+ /* Basic 8087 register can hold any of the following values: */
+ 
+@@ -87,7 +89,9 @@ struct x86_fpu_registers {
+     short               x86_fpu_tos, x86_fpu_bos;
+     };
+ 
+-#pragma pack()
++#ifdef END_PACK
++# pragma END_PACK
++#endif
+ 
+ /*
+  * There are two versions of the following macro.
+--- x86emu-0.8/scitech/include/x86emu/regs.h.orig	2001-08-14 19:35:05.000000000 +0200
++++ x86emu-0.8/scitech/include/x86emu/regs.h	2008-01-26 19:55:27.564930940 +0100
+@@ -41,7 +41,9 @@
+ 
+ /*---------------------- Macros and type definitions ----------------------*/
+ 
+-#pragma pack(1)
++#ifdef PACK
++# pragma PACK
++#endif
+ 
+ /*
+  * General EAX, EBX, ECX, EDX type registers.  Note that for
+@@ -271,8 +273,7 @@ typedef struct {
+      *  Extern interrupt        1 bits
+      *  Halted                  1 bits
+      */
+-    long                        mode;
+-    u8                          intno;
++    u32                         mode;
+     volatile int                intr;   /* mask of pending interrupts */
+     int                         debug;
+ #ifdef DEBUG
+@@ -284,6 +285,8 @@ typedef struct {
+     char                        decode_buf[32]; /* encoded byte stream  */
+     char                        decoded_buf[256]; /* disassembled strings */
+ #endif
++    u8                          intno;
++    u8                          __pad[3];
+     } X86EMU_regs;
+ 
+ /****************************************************************************
+@@ -296,10 +299,10 @@ mem_base        - Base real mode memory 
+ mem_size        - Size of the real mode memory block for the emulator
+ ****************************************************************************/
+ typedef struct {
+-    X86EMU_regs     x86;
+     unsigned long   mem_base;
+     unsigned long   mem_size;
+     void*           private;
++    X86EMU_regs     x86;
+     } X86EMU_sysEnv;
+ 
+ #pragma pack()
+--- x86emu-0.8/scitech/include/x86emu/types.h.orig	2001-08-14 19:35:05.000000000 +0200
++++ x86emu-0.8/scitech/include/x86emu/types.h	2008-01-26 20:02:54.054374923 +0100
+@@ -39,32 +39,67 @@
+ #ifndef __X86EMU_TYPES_H
+ #define __X86EMU_TYPES_H
+ 
++#ifndef NO_SYS_HEADERS
+ #include <sys/types.h>
++#endif
++
++/*
++ * The following kludge is an attempt to work around typedef conflicts with
++ * <sys/types.h>.
++ */
++#define u8   x86emuu8
++#define u16  x86emuu16
++#define u32  x86emuu32
++#define u64  x86emuu64
++#define s8   x86emus8
++#define s16  x86emus16
++#define s32  x86emus32
++#define s64  x86emus64
++#define uint x86emuuint
++#define sint x86emusint
+ 
+ /*---------------------- Macros and type definitions ----------------------*/
+ 
+ /* Currently only for Linux/32bit */
++#undef  __HAS_LONG_LONG__
+ #if defined(__GNUC__) && !defined(NO_LONG_LONG)
+ #define __HAS_LONG_LONG__
+ #endif
+ 
++/* Taken from Xmd.h */
++#undef NUM32
++#if defined (_LP64) || \
++    defined(__alpha) || defined(__alpha__) || \
++    defined(__ia64__) || defined(ia64) || \
++    defined(__sparc64__) || \
++    defined(__s390x__) || \
++    (defined(__hppa__) && defined(__LP64)) || \
++    defined(__amd64__) || defined(amd64) || \
++    (defined(__sgi) && (_MIPS_SZLONG == 64))
++#define NUM32 int
++#else
++#define NUM32 long
++#endif
++
+ typedef unsigned char       u8;
+ typedef unsigned short      u16;
+-typedef unsigned int        u32;
++typedef unsigned NUM32      u32;
+ #ifdef __HAS_LONG_LONG__
+ typedef unsigned long long  u64;
+ #endif
+ 
+ typedef char                s8;
+ typedef short               s16;
+-typedef long                s32;
++typedef NUM32               s32;
+ #ifdef __HAS_LONG_LONG__
+ typedef long long           s64;
+ #endif
+ 
+-/*typedef unsigned int      uint;*/
++typedef unsigned int        uint;
+ typedef int                 sint;
+ 
+ typedef u16 X86EMU_pioAddr;
+ 
++#undef NUM32
++
+ #endif  /* __X86EMU_TYPES_H */
+--- x86emu-0.8/scitech/include/x86emu.h.orig	2001-08-14 19:35:05.000000000 +0200
++++ x86emu-0.8/scitech/include/x86emu.h	2008-01-26 19:51:50.528562742 +0100
+@@ -55,7 +55,9 @@ typedef int X86EMU_pioAddr;
+ 
+ /*---------------------- Macros and type definitions ----------------------*/
+ 
+-#pragma pack(1)
++#ifdef PACK
++# pragma	PACK   /* Don't pack structs with function pointers! */
++#endif
+ 
+ /****************************************************************************
+ REMARKS:
+@@ -129,7 +131,9 @@ extern void X86API wrb(u32 addr, u8 val)
+ extern void X86API wrw(u32 addr, u16 val);
+ extern void X86API wrl(u32 addr, u32 val);
+ 
+-#pragma pack()
++#ifdef END_PACK
++# pragma	END_PACK
++#endif
+ 
+ /*--------------------- type definitions -----------------------------------*/
+ 
+--- x86emu-0.8/scitech/src/x86emu/x86emu/prim_ops.h.orig	2001-08-14 19:35:06.000000000 +0200
++++ x86emu-0.8/scitech/src/x86emu/x86emu/prim_ops.h	2008-01-26 20:07:16.297319297 +0100
+@@ -39,8 +39,6 @@
+ #ifndef __X86EMU_PRIM_OPS_H
+ #define __X86EMU_PRIM_OPS_H
+ 
+-#include "x86emu/prim_asm.h"
+-
+ #ifdef  __cplusplus
+ extern "C" {            			/* Use "C" linkage when in C++ mode */
+ #endif
+@@ -136,7 +134,7 @@ void    push_long (u32 w);
+ u16     pop_word (void);
+ u32		pop_long (void);
+ 
+-#if  defined(__HAVE_INLINE_ASSEMBLER__) && !defined(PRIM_OPS_NO_REDEFINE_ASM)
++#if  0
+ 
+ #define	aaa_word(d)		aaa_word_asm(&M.x86.R_EFLG,d)
+ #define aas_word(d)		aas_word_asm(&M.x86.R_EFLG,d)
+--- x86emu-0.8/scitech/src/x86emu/x86emu/x86emui.h.orig	2001-08-14 19:35:06.000000000 +0200
++++ x86emu-0.8/scitech/src/x86emu/x86emu/x86emui.h	2008-01-26 20:08:31.841624321 +0100
+@@ -68,8 +68,12 @@
+ #include "x86emu/prim_ops.h"
+ #include "x86emu/fpu.h"
+ #include "x86emu/fpu_regs.h"
++
++#ifndef NO_SYS_HEADERS
+ #include <stdio.h>
++#include <stdlib.h>
+ #include <string.h>
++#endif                                                                                           
+ 
+ /*--------------------------- Inline Functions ----------------------------*/
+ 
+--- x86emu-0.8/scitech/src/x86emu/debug.c.orig	2001-08-14 19:35:06.000000000 +0200
++++ x86emu-0.8/scitech/src/x86emu/debug.c	2008-01-26 20:09:37.853386118 +0100
+@@ -38,8 +38,12 @@
+ ****************************************************************************/
+ 
+ #include "x86emu/x86emui.h"
++#include <stdio.h>
++#include <string.h>
++#ifndef NO_SYS_HEADERS
+ #include <stdarg.h>
+ #include <stdlib.h>
++#endif
+ 
+ /*----------------------------- Implementation ----------------------------*/
+ 
+--- x86emu-0.8/scitech/src/x86emu/decode.c.orig	2001-08-14 19:35:06.000000000 +0200
++++ x86emu-0.8/scitech/src/x86emu/decode.c	2008-01-26 20:17:11.595243392 +0100
+@@ -37,6 +37,7 @@
+ *
+ ****************************************************************************/
+ 
++#include <stdlib.h>
+ #include "x86emu/x86emui.h"
+ 
+ /*----------------------------- Implementation ----------------------------*/
+@@ -102,8 +103,14 @@ DB(		if (CHECK_IP_FETCH())
+ 		INC_DECODED_INST_LEN(1);
+ 		if (M.x86.intr) {
+ 		      if (M.x86.intr & INTR_HALTED) {
+-DB(				printk("halted\n");
+-				X86EMU_trace_regs();)
++DB(             if (M.x86.R_SP != 0) {
++                    printk("halted\n");
++                    X86EMU_trace_regs();
++                    }
++                else {
++                    if (M.x86.debug)
++                        printk("Service completed successfully\n");
++                    })
+ 				return;
+             }
+ 			if (((M.x86.intr & INTR_SYNCH) && (M.x86.intno == 0 || M.x86.intno == 2)) ||
+@@ -701,7 +708,11 @@ u16* decode_rm_seg_register(
+ 		DECODE_PRINTF("DS");
+ 		return &M.x86.R_DS;
+ 	  case 4:
++		DECODE_PRINTF("FS");
++		return &M.x86.R_FS;
+ 	  case 5:
++		DECODE_PRINTF("GS");
++		return &M.x86.R_GS;
+ 	  case 6:
+ 	  case 7:
+ 		DECODE_PRINTF("ILLEGAL SEGREG");
+@@ -711,6 +722,99 @@ u16* decode_rm_seg_register(
+ 	return NULL;                /* NOT REACHED OR REACHED ON ERROR */
+ }
+ 
++/*
++ *
++ * return offset from the SIB Byte
++ */
++u32 decode_sib_address(int sib, int mod)
++{
++    u32 base = 0, i = 0, scale = 1;
++
++    switch(sib & 0x07) {
++    case 0:
++	DECODE_PRINTF("[EAX]");
++	base = M.x86.R_EAX;
++	break;
++    case 1:
++	DECODE_PRINTF("[ECX]");
++	base = M.x86.R_ECX;
++	break;
++    case 2:
++	DECODE_PRINTF("[EDX]");
++	base = M.x86.R_EDX;
++	break;
++    case 3:
++	DECODE_PRINTF("[EBX]");
++	base = M.x86.R_EBX;
++	break;
++    case 4:
++	DECODE_PRINTF("[ESP]");
++	base = M.x86.R_ESP;
++	M.x86.mode |= SYSMODE_SEG_DS_SS;
++	break;
++    case 5:
++	if (mod == 0) {
++	    base = fetch_long_imm();
++	    DECODE_PRINTF2("%08x", base);
++	} else {
++	    DECODE_PRINTF("[EBP]");
++	    base = M.x86.R_ESP;
++	    M.x86.mode |= SYSMODE_SEG_DS_SS;
++	}
++	break;
++    case 6:
++	DECODE_PRINTF("[ESI]");
++	base = M.x86.R_ESI;
++	break;
++    case 7:
++	DECODE_PRINTF("[EDI]");
++	base = M.x86.R_EDI;
++	break;
++    }
++    switch ((sib >> 3) & 0x07) {
++    case 0:
++	DECODE_PRINTF("[EAX");
++	i = M.x86.R_EAX;
++	break;
++    case 1:
++	DECODE_PRINTF("[ECX");
++	i = M.x86.R_ECX;
++	break;
++    case 2:
++	DECODE_PRINTF("[EDX");
++	i = M.x86.R_EDX;
++	break;
++    case 3:
++	DECODE_PRINTF("[EBX");
++	i = M.x86.R_EBX;
++	break;
++    case 4:
++	i = 0;
++	break;
++    case 5:
++	DECODE_PRINTF("[EBP");
++	i = M.x86.R_EBP;
++	break;
++    case 6:
++	DECODE_PRINTF("[ESI");
++	i = M.x86.R_ESI;
++	break;
++    case 7:
++	DECODE_PRINTF("[EDI");
++	i = M.x86.R_EDI;
++	break;
++    }
++    scale = 1 << ((sib >> 6) & 0x03);
++    if (((sib >> 3) & 0x07) != 4) {
++	if (scale == 1) {
++	    DECODE_PRINTF("]");
++	} else {
++	    DECODE_PRINTF2("*%d]", scale);
++	}
++    }
++    return base + (i * scale);
++}
++
+ /****************************************************************************
+ PARAMETERS:
+ rm	- RM value to decode
+@@ -731,26 +835,59 @@ NOTE: 	The code which specifies the corr
+ 		if a SS access is needed, set this bit.  Otherwise, DS access
+ 		occurs (unless any of the segment override bits are set).
+ ****************************************************************************/
+-unsigned decode_rm00_address(
++u32 decode_rm00_address(
+ 	int rm)
+ {
+-	unsigned offset;
++	u32 offset;
++    int sib;
+ 
++    if (M.x86.mode & SYSMODE_PREFIX_ADDR) {
++        /* 32-bit addressing */
++	switch (rm) {
++	  case 0:
++		DECODE_PRINTF("[EAX]");
++		return M.x86.R_EAX;
++	  case 1:
++		DECODE_PRINTF("[ECX]");
++		return M.x86.R_ECX;
++	  case 2:
++		DECODE_PRINTF("[EDX]");
++		return M.x86.R_EDX;
++	  case 3:
++		DECODE_PRINTF("[EBX]");
++		return M.x86.R_EBX;
++	  case 4:
++		sib = fetch_byte_imm();
++		return decode_sib_address(sib, 0);
++	  case 5:
++		offset = fetch_long_imm();
++		DECODE_PRINTF2("[%08x]", offset);
++		return offset;
++	  case 6:
++		DECODE_PRINTF("[ESI]");
++		return M.x86.R_ESI;
++	  case 7:
++		DECODE_PRINTF("[EDI]");
++		return M.x86.R_EDI;
++	}
++	HALT_SYS();
++    } else {
++        /* 16-bit addressing */
+ 	switch (rm) {
+       case 0:
+ 		DECODE_PRINTF("[BX+SI]");
+-		return M.x86.R_BX + M.x86.R_SI;
++		return (M.x86.R_BX + M.x86.R_SI) & 0xffff;
+ 	  case 1:
+ 		DECODE_PRINTF("[BX+DI]");
+-		return M.x86.R_BX + M.x86.R_DI;
++		return (M.x86.R_BX + M.x86.R_DI) & 0xffff;
+ 	  case 2:
+ 		DECODE_PRINTF("[BP+SI]");
+ 		M.x86.mode |= SYSMODE_SEG_DS_SS;
+-		return M.x86.R_BP + M.x86.R_SI;
++		return (M.x86.R_BP + M.x86.R_SI) & 0xffff;
+ 	  case 3:
+ 		DECODE_PRINTF("[BP+DI]");
+ 		M.x86.mode |= SYSMODE_SEG_DS_SS;
+-		return M.x86.R_BP + M.x86.R_DI;
++		return (M.x86.R_BP + M.x86.R_DI) & 0xffff;
+ 	  case 4:
+ 		DECODE_PRINTF("[SI]");
+ 		return M.x86.R_SI;
+@@ -766,6 +903,7 @@ unsigned decode_rm00_address(
+ 		return M.x86.R_BX;
+ 	}
+ 	HALT_SYS();
++	}
+     return 0;
+ }
+ 
+@@ -780,40 +918,80 @@ REMARKS:
+ Return the offset given by mod=01 addressing.  Also enables the
+ decoding of instructions.
+ ****************************************************************************/
+-unsigned decode_rm01_address(
++u32 decode_rm01_address(
+ 	int rm)
+ {
+-	int displacement = (s8)fetch_byte_imm();
++    int displacement = 0;
++    int sib;
++
++    /* Fetch disp8 if no SIB byte */
++    if (!((M.x86.mode & SYSMODE_PREFIX_ADDR) && (rm == 4)))
++	displacement = (s8)fetch_byte_imm();
++
++    if (M.x86.mode & SYSMODE_PREFIX_ADDR) {
++        /* 32-bit addressing */
++	switch (rm) {
++	  case 0:
++		DECODE_PRINTF2("%d[EAX]", displacement);
++		return M.x86.R_EAX + displacement;
++	  case 1:
++		DECODE_PRINTF2("%d[ECX]", displacement);
++		return M.x86.R_ECX + displacement;
++	  case 2:
++		DECODE_PRINTF2("%d[EDX]", displacement);
++		return M.x86.R_EDX + displacement;
++	  case 3:
++		DECODE_PRINTF2("%d[EBX]", displacement);
++		return M.x86.R_EBX + displacement;
++	  case 4:
++		sib = fetch_byte_imm();
++		displacement = (s8)fetch_byte_imm();
++		DECODE_PRINTF2("%d", displacement);
++		return decode_sib_address(sib, 1) + displacement;
++	  case 5:
++		DECODE_PRINTF2("%d[EBP]", displacement);
++		return M.x86.R_EBP + displacement;
++	  case 6:
++		DECODE_PRINTF2("%d[ESI]", displacement);
++		return M.x86.R_ESI + displacement;
++	  case 7:
++		DECODE_PRINTF2("%d[EDI]", displacement);
++		return M.x86.R_EDI + displacement;
++	}
++	HALT_SYS();
++    } else {
++        /* 16-bit addressing */
+ 	switch (rm) {
+       case 0:
+ 		DECODE_PRINTF2("%d[BX+SI]", displacement);
+-		return M.x86.R_BX + M.x86.R_SI + displacement;
++		return (M.x86.R_BX + M.x86.R_SI + displacement) & 0xffff;
+ 	  case 1:
+ 		DECODE_PRINTF2("%d[BX+DI]", displacement);
+-		return M.x86.R_BX + M.x86.R_DI + displacement;
++		return (M.x86.R_BX + M.x86.R_DI + displacement) & 0xffff;
+ 	  case 2:
+ 		DECODE_PRINTF2("%d[BP+SI]", displacement);
+ 		M.x86.mode |= SYSMODE_SEG_DS_SS;
+-		return M.x86.R_BP + M.x86.R_SI + displacement;
++		return (M.x86.R_BP + M.x86.R_SI + displacement) & 0xffff;
+ 	  case 3:
+ 		DECODE_PRINTF2("%d[BP+DI]", displacement);
+ 		M.x86.mode |= SYSMODE_SEG_DS_SS;
+-		return M.x86.R_BP + M.x86.R_DI + displacement;
++		return (M.x86.R_BP + M.x86.R_DI + displacement) & 0xffff;
+ 	  case 4:
+ 		DECODE_PRINTF2("%d[SI]", displacement);
+-		return M.x86.R_SI + displacement;
++		return (M.x86.R_SI + displacement) & 0xffff;
+ 	  case 5:
+ 		DECODE_PRINTF2("%d[DI]", displacement);
+-		return M.x86.R_DI + displacement;
++		return (M.x86.R_DI + displacement) & 0xffff;
+ 	  case 6:
+ 		DECODE_PRINTF2("%d[BP]", displacement);
+ 		M.x86.mode |= SYSMODE_SEG_DS_SS;
+-		return M.x86.R_BP + displacement;
++		return (M.x86.R_BP + displacement) & 0xffff;
+ 	  case 7:
+ 		DECODE_PRINTF2("%d[BX]", displacement);
+-		return M.x86.R_BX + displacement;
++		return (M.x86.R_BX + displacement) & 0xffff;
+ 	}
+ 	HALT_SYS();
++	}
+     return 0;                   /* SHOULD NOT HAPPEN */
+ }
+ 
+@@ -828,10 +1006,56 @@ REMARKS:
+ Return the offset given by mod=10 addressing.  Also enables the
+ decoding of instructions.
+ ****************************************************************************/
+-unsigned decode_rm10_address(
++u32 decode_rm10_address(
+ 	int rm)
+ {
+-    int displacement = (s16)fetch_word_imm(); 
++    u32 displacement = 0;
++    int sib;
++
++    /* Fetch disp16 if 16-bit addr mode */
++    if (!(M.x86.mode & SYSMODE_PREFIX_ADDR))
++	displacement = (u16)fetch_word_imm();
++    else {
++	/* Fetch disp32 if no SIB byte */
++	if (rm != 4)
++	    displacement = (u32)fetch_long_imm();
++    }
++
++    if (M.x86.mode & SYSMODE_PREFIX_ADDR) {
++        /* 32-bit addressing */
++      switch (rm) {
++	  case 0:
++		DECODE_PRINTF2("%08x[EAX]", displacement);
++		return M.x86.R_EAX + displacement;
++	  case 1:
++		DECODE_PRINTF2("%08x[ECX]", displacement);
++		return M.x86.R_ECX + displacement;
++	  case 2:
++		DECODE_PRINTF2("%08x[EDX]", displacement);
++		M.x86.mode |= SYSMODE_SEG_DS_SS;
++		return M.x86.R_EDX + displacement;
++	  case 3:
++		DECODE_PRINTF2("%08x[EBX]", displacement);
++		return M.x86.R_EBX + displacement;
++	  case 4:
++		sib = fetch_byte_imm();
++		displacement = (u32)fetch_long_imm();
++		DECODE_PRINTF2("%08x", displacement);
++		return decode_sib_address(sib, 2) + displacement;
++		break;
++	  case 5:
++		DECODE_PRINTF2("%08x[EBP]", displacement);
++		return M.x86.R_EBP + displacement;
++	  case 6:
++		DECODE_PRINTF2("%08x[ESI]", displacement);
++		return M.x86.R_ESI + displacement;
++	  case 7:
++		DECODE_PRINTF2("%08x[EDI]", displacement);
++		return M.x86.R_EDI + displacement;
++	}
++	HALT_SYS();
++    } else {
++        /* 16-bit addressing */
+ 	switch (rm) {
+       case 0:
+ 		DECODE_PRINTF2("%d[BX+SI]", displacement);
+@@ -862,6 +1086,7 @@ unsigned decode_rm10_address(
+ 		return (M.x86.R_BX + displacement) & 0xffff;
+ 	}
+ 	HALT_SYS();
++	}
+     return 0;
+     /*NOTREACHED */
+ }
+--- x86emu-0.8/scitech/src/x86emu/fpu.c.orig	2001-08-14 19:35:06.000000000 +0200
++++ x86emu-0.8/scitech/src/x86emu/fpu.c	2008-01-26 20:19:21.386639783 +0100
+@@ -95,8 +95,8 @@ static char *x86emu_fpu_op_d9_tab1[] = {
+ void x86emuOp_esc_coprocess_d9(u8 X86EMU_UNUSED(op1))
+ {
<<Diff was trimmed, longer than 597 lines>>


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