SOURCES: crossavr-gcc-atmega32c1.patch (NEW), crossavr-gcc-atmega32m1.patch...

kosmo kosmo at pld-linux.org
Sun Apr 5 14:01:34 CEST 2009


Author: kosmo                        Date: Sun Apr  5 12:01:34 2009 GMT
Module: SOURCES                       Tag: HEAD
---- Log message:
- synchronized patches with WinAVR project (http://winavr.sourceforge.net).

---- Files affected:
SOURCES:
   crossavr-gcc-atmega32c1.patch (NONE -> 1.1)  (NEW), crossavr-gcc-atmega32m1.patch (NONE -> 1.1)  (NEW), crossavr-gcc-atmega32u4.patch (NONE -> 1.1)  (NEW), crossavr-gcc-atmega32u6.patch (NONE -> 1.1)  (NEW), crossavr-gcc-attiny13a.patch (NONE -> 1.1)  (NEW), crossavr-gcc-attiny167.patch (NONE -> 1.1)  (NEW), crossavr-gcc-bug-11259-v3.patch (NONE -> 1.1)  (NEW), crossavr-gcc-bug-33009.patch (NONE -> 1.1)  (NEW), crossavr-gcc-bug-35013.patch (NONE -> 1.1)  (NEW), crossavr-gcc-bug-spill-v4.patch (NONE -> 1.1)  (NEW), crossavr-gcc-builtins-v6.patch (NONE -> 1.1)  (NEW), crossavr-gcc-libgcc16.patch (NONE -> 1.1)  (NEW), crossavr-gcc-mega256-additional.patch (NONE -> 1.1)  (NEW), crossavr-gcc-mega256.patch (NONE -> 1.1)  (NEW), crossavr-gcc-osmain.patch (NONE -> 1.1)  (NEW), crossavr-gcc-xmega2.patch (NONE -> 1.1)  (NEW), crossavr-gcc-xmega-v9.patch (NONE -> 1.1)  (NEW), crossavr-gcc-0b-constants.patch (1.1 -> NONE)  (REMOVED), crossavr-gcc-bug25672.patch (1.1 -> NONE)  (REMOVED
 ), crossavr-gcc-zz-atmega256x.patch (1.3 -> NONE)  (REMOVED)

---- Diffs:

================================================================
Index: SOURCES/crossavr-gcc-atmega32c1.patch
diff -u /dev/null SOURCES/crossavr-gcc-atmega32c1.patch:1.1
--- /dev/null	Sun Apr  5 14:01:34 2009
+++ SOURCES/crossavr-gcc-atmega32c1.patch	Sun Apr  5 14:01:21 2009
@@ -0,0 +1,46 @@
+--- gcc/config/avr/avr.c.old	2008-03-14 08:14:59.742194500 -0600
++++ gcc/config/avr/avr.c	2008-03-14 08:26:24.509618500 -0600
+@@ -279,6 +279,7 @@ static const struct mcu_type_s avr_mcu_t
+   { "at90pwm216",   ARCH_AVR5, "__AVR_AT90PWM216__" },
+   { "at90pwm316",   ARCH_AVR5, "__AVR_AT90PWM316__" },
+   { "atmega32m1",   ARCH_AVR5, "__AVR_ATmega32M1__" },
++  { "atmega32c1",   ARCH_AVR5, "__AVR_ATmega32C1__" },
+   { "at90usb646",   ARCH_AVR5, "__AVR_AT90USB646__" },
+   { "at90usb647",   ARCH_AVR5, "__AVR_AT90USB647__" },
+   { "at94k",        ARCH_AVR5, "__AVR_AT94K__" },
+--- gcc/config/avr/avr.h.old	2008-03-14 08:14:59.757858500 -0600
++++ gcc/config/avr/avr.h	2008-03-14 08:27:51.946066500 -0600
+@@ -869,6 +869,7 @@ mmcu=*:-mmcu=%*}"
+   mmcu=at90can*|\
+   mmcu=at90pwm216|\
+   mmcu=at90pwm316|\
++  mmcu=atmega32c1|\
+   mmcu=atmega32m1|\
+   mmcu=at90usb64*|\
+   mmcu=at90usb128*|\
+@@ -901,6 +902,7 @@ mmcu=*:-mmcu=%*}"
+   mmcu=attiny88|\
+   mmcu=at90can*|\
+   mmcu=at90pwm*|\
++  mmcu=atmega32c1|\
+   mmcu=atmega32m1|\
+   mmcu=at90usb*: -Tdata 0x800100}\
+ %{mmcu=atmega640|\
+@@ -1011,6 +1013,7 @@ mmcu=*:-mmcu=%*}"
+ %{mmcu=at90can64:crtcan64.o%s} \
+ %{mmcu=at90pwm216:crt90pwm216.o%s} \
+ %{mmcu=at90pwm316:crt90pwm316.o%s} \
++%{mmcu=atmega32c1:crtm32c1.o%s} \
+ %{mmcu=atmega32m1:crtm32m1.o%s} \
+ %{mmcu=at90usb646:crtusb646.o%s} \
+ %{mmcu=at90usb647:crtusb647.o%s} \
+--- gcc/config/avr/t-avr.old	2008-03-14 08:14:59.757858500 -0600
++++ gcc/config/avr/t-avr	2008-03-14 08:28:44.169842500 -0600
+@@ -114,6 +114,7 @@ MULTILIB_MATCHES = \
+ 	mmcu?avr5=mmcu?at90can64 \
+ 	mmcu?avr5=mmcu?at90pwm216 \
+ 	mmcu?avr5=mmcu?at90pwm316 \
++	mmcu?avr5=mmcu?atmega32c1 \
+ 	mmcu?avr5=mmcu?atmega32m1 \
+ 	mmcu?avr5=mmcu?at90usb646 \
+ 	mmcu?avr5=mmcu?at90usb647 \

================================================================
Index: SOURCES/crossavr-gcc-atmega32m1.patch
diff -u /dev/null SOURCES/crossavr-gcc-atmega32m1.patch:1.1
--- /dev/null	Sun Apr  5 14:01:35 2009
+++ SOURCES/crossavr-gcc-atmega32m1.patch	Sun Apr  5 14:01:22 2009
@@ -0,0 +1,46 @@
+--- gcc/config/avr/avr.c.old	2008-03-02 13:20:16.906250000 -0700
++++ gcc/config/avr/avr.c	2008-03-02 13:22:31.953125000 -0700
+@@ -278,6 +278,7 @@ static const struct mcu_type_s avr_mcu_t
+   { "at90can64",    ARCH_AVR5, "__AVR_AT90CAN64__" },
+   { "at90pwm216",   ARCH_AVR5, "__AVR_AT90PWM216__" },
+   { "at90pwm316",   ARCH_AVR5, "__AVR_AT90PWM316__" },
++  { "atmega32m1",   ARCH_AVR5, "__AVR_ATmega32M1__" },
+   { "at90usb646",   ARCH_AVR5, "__AVR_AT90USB646__" },
+   { "at90usb647",   ARCH_AVR5, "__AVR_AT90USB647__" },
+   { "at94k",        ARCH_AVR5, "__AVR_AT94K__" },
+--- gcc/config/avr/avr.h.old	2008-03-02 13:20:16.906250000 -0700
++++ gcc/config/avr/avr.h	2008-03-02 13:23:36.593750000 -0700
+@@ -869,6 +869,7 @@ mmcu=*:-mmcu=%*}"
+   mmcu=at90can*|\
+   mmcu=at90pwm216|\
+   mmcu=at90pwm316|\
++  mmcu=atmega32m1|\
+   mmcu=at90usb64*|\
+   mmcu=at90usb128*|\
+   mmcu=at94k: -m avr5}\
+@@ -900,6 +901,7 @@ mmcu=*:-mmcu=%*}"
+   mmcu=attiny88|\
+   mmcu=at90can*|\
+   mmcu=at90pwm*|\
++  mmcu=atmega32m1|\
+   mmcu=at90usb*: -Tdata 0x800100}\
+ %{mmcu=atmega640|\
+   mmcu=atmega1280|\
+@@ -1009,6 +1011,7 @@ mmcu=*:-mmcu=%*}"
+ %{mmcu=at90can64:crtcan64.o%s} \
+ %{mmcu=at90pwm216:crt90pwm216.o%s} \
+ %{mmcu=at90pwm316:crt90pwm316.o%s} \
++%{mmcu=atmega32m1:crtm32m1.o%s} \
+ %{mmcu=at90usb646:crtusb646.o%s} \
+ %{mmcu=at90usb647:crtusb647.o%s} \
+ %{mmcu=at94k:crtat94k.o%s} \
+--- gcc/config/avr/t-avr.old	2008-03-02 13:20:16.906250000 -0700
++++ gcc/config/avr/t-avr	2008-03-02 13:21:48.640625000 -0700
+@@ -114,6 +114,7 @@ MULTILIB_MATCHES = \
+ 	mmcu?avr5=mmcu?at90can64 \
+ 	mmcu?avr5=mmcu?at90pwm216 \
+ 	mmcu?avr5=mmcu?at90pwm316 \
++	mmcu?avr5=mmcu?atmega32m1 \
+ 	mmcu?avr5=mmcu?at90usb646 \
+ 	mmcu?avr5=mmcu?at90usb647 \
+ 	mmcu?avr5=mmcu?at94k \

================================================================
Index: SOURCES/crossavr-gcc-atmega32u4.patch
diff -u /dev/null SOURCES/crossavr-gcc-atmega32u4.patch:1.1
--- /dev/null	Sun Apr  5 14:01:35 2009
+++ SOURCES/crossavr-gcc-atmega32u4.patch	Sun Apr  5 14:01:22 2009
@@ -0,0 +1,46 @@
+--- gcc/config/avr/avr.c.old	2008-03-19 14:34:52.963111900 -0600
++++ gcc/config/avr/avr.c	2008-03-22 07:53:54.900218600 -0600
+@@ -281,6 +281,7 @@ static const struct mcu_type_s avr_mcu_t
+   { "at90pwm316",   ARCH_AVR5, "__AVR_AT90PWM316__" },
+   { "atmega32m1",   ARCH_AVR5, "__AVR_ATmega32M1__" },
+   { "atmega32c1",   ARCH_AVR5, "__AVR_ATmega32C1__" },
++  { "atmega32u4",   ARCH_AVR5, "__AVR_ATmega32U4__" },
+   { "at90usb646",   ARCH_AVR5, "__AVR_AT90USB646__" },
+   { "at90usb647",   ARCH_AVR5, "__AVR_AT90USB647__" },
+   { "at94k",        ARCH_AVR5, "__AVR_AT94K__" },
+--- gcc/config/avr/avr.h.old	2008-03-19 14:34:52.963111900 -0600
++++ gcc/config/avr/avr.h	2008-03-22 07:56:04.463675600 -0600
+@@ -871,6 +871,7 @@ mmcu=*:-mmcu=%*}"
+   mmcu=at90pwm316|\
+   mmcu=atmega32c1|\
+   mmcu=atmega32m1|\
++  mmcu=atmega32u4|\
+   mmcu=at90usb64*|\
+   mmcu=at90usb128*|\
+   mmcu=at94k: -m avr5}\
+@@ -904,6 +905,7 @@ mmcu=*:-mmcu=%*}"
+   mmcu=at90pwm*|\
+   mmcu=atmega32c1|\
+   mmcu=atmega32m1|\
++  mmcu=atmega32u4|\
+   mmcu=at90usb*: -Tdata 0x800100}\
+ %{mmcu=atmega640|\
+   mmcu=atmega1280|\
+@@ -1015,6 +1017,7 @@ mmcu=*:-mmcu=%*}"
+ %{mmcu=at90pwm316:crt90pwm316.o%s} \
+ %{mmcu=atmega32c1:crtm32c1.o%s} \
+ %{mmcu=atmega32m1:crtm32m1.o%s} \
++%{mmcu=atmega32u4:crtm32u4.o%s} \
+ %{mmcu=at90usb646:crtusb646.o%s} \
+ %{mmcu=at90usb647:crtusb647.o%s} \
+ %{mmcu=at94k:crtat94k.o%s} \
+--- gcc/config/avr/t-avr.old	2008-03-19 14:34:52.963111900 -0600
++++ gcc/config/avr/t-avr	2008-03-22 08:02:03.137164200 -0600
+@@ -116,6 +116,7 @@ MULTILIB_MATCHES = \
+ 	mmcu?avr5=mmcu?at90pwm316 \
+ 	mmcu?avr5=mmcu?atmega32c1 \
+ 	mmcu?avr5=mmcu?atmega32m1 \
++	mmcu?avr5=mmcu?atmega32u4 \
+ 	mmcu?avr5=mmcu?at90usb646 \
+ 	mmcu?avr5=mmcu?at90usb647 \
+ 	mmcu?avr5=mmcu?at94k \

================================================================
Index: SOURCES/crossavr-gcc-atmega32u6.patch
diff -u /dev/null SOURCES/crossavr-gcc-atmega32u6.patch:1.1
--- /dev/null	Sun Apr  5 14:01:36 2009
+++ SOURCES/crossavr-gcc-atmega32u6.patch	Sun Apr  5 14:01:22 2009
@@ -0,0 +1,40 @@
+--- gcc/config/avr/avr.c.old	2008-11-04 14:14:27.405669400 -0700
++++ gcc/config/avr/avr.c	2008-11-04 14:14:55.772086800 -0700
+@@ -283,6 +283,7 @@ static const struct mcu_type_s avr_mcu_t
+   { "atmega32m1",   ARCH_AVR5, "__AVR_ATmega32M1__" },
+   { "atmega32c1",   ARCH_AVR5, "__AVR_ATmega32C1__" },
+   { "atmega32u4",   ARCH_AVR5, "__AVR_ATmega32U4__" },
++  { "atmega32u6",   ARCH_AVR5, "__AVR_ATmega32U6__" },
+   { "at90usb646",   ARCH_AVR5, "__AVR_AT90USB646__" },
+   { "at90usb647",   ARCH_AVR5, "__AVR_AT90USB647__" },
+   { "at94k",        ARCH_AVR5, "__AVR_AT94K__" },
+--- gcc/config/avr/avr.h.old	2008-11-04 14:15:07.629280600 -0700
++++ gcc/config/avr/avr.h	2008-11-04 14:16:11.692586600 -0700
+@@ -871,7 +871,7 @@ mmcu=*:-mmcu=%*}"
+   mmcu=at90pwm316|\
+   mmcu=atmega32c1|\
+   mmcu=atmega32m1|\
+-  mmcu=atmega32u4|\
++  mmcu=atmega32u*|\
+   mmcu=at90usb64*|\
+   mmcu=at90usb128*|\
+   mmcu=at94k: -m avr5}\
+@@ -908,7 +908,7 @@ mmcu=*:-mmcu=%*}"
+   mmcu=at90pwm*|\
+   mmcu=atmega32c1|\
+   mmcu=atmega32m1|\
+-  mmcu=atmega32u4|\
++  mmcu=atmega32u*|\
+   mmcu=at90usb*: -Tdata 0x800100}\
+ %{mmcu=atmega640|\
+   mmcu=atmega1280|\
+--- gcc/config/avr/t-avr.old	2008-11-04 14:17:13.610006800 -0700
++++ gcc/config/avr/t-avr	2008-11-04 14:17:24.793674400 -0700
+@@ -118,6 +118,7 @@ MULTILIB_MATCHES = \
+ 	mmcu?avr5=mmcu?atmega32c1 \
+ 	mmcu?avr5=mmcu?atmega32m1 \
+ 	mmcu?avr5=mmcu?atmega32u4 \
++	mmcu?avr5=mmcu?atmega32u6 \
+ 	mmcu?avr5=mmcu?at90usb646 \
+ 	mmcu?avr5=mmcu?at90usb647 \
+ 	mmcu?avr5=mmcu?at94k \

================================================================
Index: SOURCES/crossavr-gcc-attiny13a.patch
diff -u /dev/null SOURCES/crossavr-gcc-attiny13a.patch:1.1
--- /dev/null	Sun Apr  5 14:01:37 2009
+++ SOURCES/crossavr-gcc-attiny13a.patch	Sun Apr  5 14:01:23 2009
@@ -0,0 +1,43 @@
+Index: gcc/config/avr/avr.c
+===================================================================
+--- gcc/config/avr/avr.c        (revision 136946)
++++ gcc/config/avr/avr.c        (working copy)
+@@ -173,6 +174,7 @@
+     /* Classic + MOVW, <= 8K.  */
+   { "avr25",        ARCH_AVR25, NULL },
+   { "attiny13",     ARCH_AVR25, "__AVR_ATtiny13__" },
++  { "attiny13a",    ARCH_AVR25, "__AVR_ATtiny13A__" },
+   { "attiny2313",   ARCH_AVR25, "__AVR_ATtiny2313__" },
+   { "attiny24",     ARCH_AVR25, "__AVR_ATtiny24__" },
+   { "attiny44",     ARCH_AVR25, "__AVR_ATtiny44__" },
+--- gcc/config/avr/t-avr.orig	Wed Jun 25 18:36:00 2008
++++ gcc/config/avr/t-avr	Wed Jun 25 18:39:28 2008
+@@ -43,6 +43,7 @@ MULTILIB_DIRNAMES = avr2 avr25 avr3 avr3
+ # The many avr2 matches are not listed here - this is the default.
+ MULTILIB_MATCHES = \
+ 	mmcu?avr25=mmcu?attiny13 \
++	mmcu?avr25=mmcu?attiny13a \
+ 	mmcu?avr25=mmcu?attiny2313 \
+ 	mmcu?avr25=mmcu?attiny24 \
+ 	mmcu?avr25=mmcu?attiny44 \
+Index: gcc/config/avr/avr.h
+===================================================================
+--- gcc/config/avr/avr.h        (revision 136946)
++++ gcc/config/avr/avr.h        (working copy)
+@@ -817,7 +817,7 @@
+   mmcu=at90s8*|\
+   mmcu=at90c8*|\
+   mmcu=at86rf401|\
+-  mmcu=attiny13|\
++  mmcu=attiny13*|\
+   mmcu=attiny2313|\
+   mmcu=attiny24|\
+   mmcu=attiny25|\
+@@ -916,6 +916,7 @@
+ %{mmcu=at90s8535:crts8535.o%s} \
+ %{mmcu=at86rf401:crt86401.o%s} \
+ %{mmcu=attiny13:crttn13.o%s} \
++%{mmcu=attiny13a:crttn13a.o%s} \
+ %{mmcu=attiny2313|mmcu=avr25:crttn2313.o%s} \
+ %{mmcu=attiny24:crttn24.o%s} \
+ %{mmcu=attiny44:crttn44.o%s} \

================================================================
Index: SOURCES/crossavr-gcc-attiny167.patch
diff -u /dev/null SOURCES/crossavr-gcc-attiny167.patch:1.1
--- /dev/null	Sun Apr  5 14:01:37 2009
+++ SOURCES/crossavr-gcc-attiny167.patch	Sun Apr  5 14:01:23 2009
@@ -0,0 +1,48 @@
+--- gcc/config/avr/avr.c.old	2008-03-24 08:03:54.091795900 -0600
++++ gcc/config/avr/avr.c	2008-03-25 11:35:44.787369000 -0600
+@@ -224,6 +224,7 @@ static const struct mcu_type_s avr_mcu_t
+   { "avr35",        ARCH_AVR35, NULL },
+   { "at90usb82",    ARCH_AVR35, "__AVR_AT90USB82__" },
+   { "at90usb162",   ARCH_AVR35, "__AVR_AT90USB162__" },
++  { "attiny167",    ARCH_AVR35, "__AVR_ATtiny167__" },
+     /* Enhanced, <= 8K.  */
+   { "avr4",         ARCH_AVR4, NULL },
+   { "atmega8",      ARCH_AVR4, "__AVR_ATmega8__" },
+--- gcc/config/avr/avr.h.old	2008-03-24 08:03:54.091795900 -0600
++++ gcc/config/avr/avr.h	2008-03-25 12:23:56.468150200 -0600
+@@ -853,7 +853,8 @@ mmcu=*:-mmcu=%*}"
+   mmcu=at43*|\
+   mmcu=at76*|\
+   mmcu=at90usb82|\
+-  mmcu=at90usb162: -m avr3}\
++  mmcu=at90usb162|\
++  mmcu=attiny167: -m avr3}\
+ %{mmcu=atmega8*|\
+   mmcu=atmega48*|\
+   mmcu=at90pwm1|\
+@@ -901,6 +902,7 @@ mmcu=*:-mmcu=%*}"
+   mmcu=atmega32hvb|\
+   mmcu=attiny48|\
+   mmcu=attiny88|\
++  mmcu=attiny167|\
+   mmcu=at90can*|\
+   mmcu=at90pwm*|\
+   mmcu=atmega32c1|\
+@@ -958,6 +960,7 @@ mmcu=*:-mmcu=%*}"
+ %{mmcu=attiny43u:crttn43u.o%s} \
+ %{mmcu=attiny48:crttn48.o%s} \
+ %{mmcu=attiny88:crttn88.o%s} \
++%{mmcu=attiny167:crttn167.o%s} \
+ %{mmcu=at43usb320|mmcu=avr3:crt43320.o%s} \
+ %{mmcu=at43usb355:crt43355.o%s} \
+ %{mmcu=at76c711:crt76711.o%s} \
+--- gcc/config/avr/t-avr.old	2008-03-24 08:03:54.091795900 -0600
++++ gcc/config/avr/t-avr	2008-03-25 12:24:35.371718000 -0600
+@@ -63,6 +63,7 @@ MULTILIB_MATCHES = \
+ 	mmcu?avr31=mmcu?atmega103 \
+ 	mmcu?avr35=mmcu?at90usb82 \
+ 	mmcu?avr35=mmcu?at90usb162 \
++	mmcu?avr35=mmcu?attiny167 \
+ 	mmcu?avr4=mmcu?atmega48 \
+ 	mmcu?avr4=mmcu?atmega48p \
+ 	mmcu?avr4=mmcu?atmega8 \

================================================================
Index: SOURCES/crossavr-gcc-bug-11259-v3.patch
diff -u /dev/null SOURCES/crossavr-gcc-bug-11259-v3.patch:1.1
--- /dev/null	Sun Apr  5 14:01:38 2009
+++ SOURCES/crossavr-gcc-bug-11259-v3.patch	Sun Apr  5 14:01:24 2009
@@ -0,0 +1,323 @@
+Index: gcc/config/avr/avr.md
+===================================================================
+--- gcc/config/avr/avr.md	(revision 129892)
++++ gcc/config/avr/avr.md	(working copy)
+@@ -45,21 +45,22 @@
+    (REG_SP	32)
+    (TMP_REGNO	0)	; temporary register r0
+    (ZERO_REGNO	1)	; zero register r1
+    
+    (SREG_ADDR   0x5F)
+    (RAMPZ_ADDR  0x5B)
+    
+    (UNSPEC_STRLEN	0)
+    (UNSPEC_INDEX_JMP	1)
+    (UNSPEC_SEI		2)
+    (UNSPEC_CLI		3)
++   (UNSPEC_SWAP		4)
+ 
+    (UNSPECV_PROLOGUE_SAVES	0)
+    (UNSPECV_EPILOGUE_RESTORES	1)])
+ 
+ (include "predicates.md")
+ (include "constraints.md")
+   
+ ;; Condition code settings.
+ (define_attr "cc" "none,set_czn,set_zn,set_n,compare,clobber"
+   (const_string "none"))
+@@ -1185,20 +1186,33 @@
+       return (AS2 (andi, %A0,lo8(%2))  CR_TAB
+               AS2 (andi, %B0,hi8(%2)) CR_TAB
+ 	      AS2 (andi, %C0,hlo8(%2)) CR_TAB
+ 	      AS2 (andi, %D0,hhi8(%2)));
+     }
+   return \"bug\";
+ }"
+   [(set_attr "length" "4,4")
+    (set_attr "cc" "set_n,set_n")])
+ 
++(define_peephole2 ; andi
++  [(set (match_operand:QI 0 "d_register_operand" "")
++        (and:QI (match_dup 0)
++	        (match_operand:QI 1 "const_int_operand" "")))
++   (set (match_dup 0)
++        (and:QI (match_dup 0)
++	        (match_operand:QI 2 "const_int_operand" "")))]
++  ""
++  [(set (match_dup 0) (and:QI (match_dup 0) (match_dup 1)))]
++  {
++    operands[1] = GEN_INT (INTVAL (operands[1]) & INTVAL (operands[2]));
++  })
++
+ ;;|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
+ ;; ior
+ 
+ (define_insn "iorqi3"
+   [(set (match_operand:QI 0 "register_operand" "=r,d")
+         (ior:QI (match_operand:QI 1 "register_operand" "%0,0")
+                 (match_operand:QI 2 "nonmemory_operand" "r,i")))]
+   ""
+   "@
+ 	or %0,%2
+@@ -1313,24 +1327,71 @@
+         (xor:SI (match_operand:SI 1 "register_operand" "%0")
+                 (match_operand:SI 2 "register_operand" "r")))]
+   ""
+   "eor %0,%2
+ 	eor %B0,%B2
+ 	eor %C0,%C2
+ 	eor %D0,%D2"
+   [(set_attr "length" "4")
+    (set_attr "cc" "set_n")])
+ 
++;; swap
++
++(define_insn "*swap"
++  [(set (match_operand:QI 0 "register_operand" "=r")
++	(unspec:QI [(match_operand:QI 1 "register_operand" "0")]
++		   UNSPEC_SWAP))]
++  ""
++  "swap %0"
++  [(set_attr "length" "1")
++   (set_attr "cc" "none")])
++
+ ;;<< << << << << << << << << << << << << << << << << << << << << << << << << <<
+ ;; arithmetic shift left
+ 
+-(define_insn "ashlqi3"
++(define_expand "ashlqi3"
++  [(set (match_operand:QI 0 "register_operand"            "")
++	(ashift:QI (match_operand:QI 1 "register_operand" "")
++		   (match_operand:QI 2 "general_operand"  "")))]
++  ""
++  "")
++
++(define_split ; ashlqi3_const4
++  [(set (match_operand:QI 0 "d_register_operand"            "")
++	(ashift:QI (match_operand:QI 1 "d_register_operand" "")
++		   (const_int 4)))]
++  ""
++  [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
++   (set (match_dup 0) (and:QI (match_dup 0) (const_int -16)))]
++  "")
++
++(define_split ; ashlqi3_const5
++  [(set (match_operand:QI 0 "d_register_operand"            "")
++	(ashift:QI (match_operand:QI 1 "d_register_operand" "")
++		   (const_int 5)))]
++  ""
++  [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
++   (set (match_dup 0) (ashift:QI (match_dup 0) (const_int 1)))
++   (set (match_dup 0) (and:QI (match_dup 0) (const_int -32)))]
++  "")
++
++(define_split ; ashlqi3_const6
++  [(set (match_operand:QI 0 "d_register_operand"            "")
++	(ashift:QI (match_operand:QI 1 "d_register_operand" "")
++		   (const_int 6)))]
++  ""
++  [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
++   (set (match_dup 0) (ashift:QI (match_dup 0) (const_int 2)))
++   (set (match_dup 0) (and:QI (match_dup 0) (const_int -64)))]
++  "")
++
++(define_insn "*ashlqi3"
+   [(set (match_operand:QI 0 "register_operand"           "=r,r,r,r,!d,r,r")
+ 	(ashift:QI (match_operand:QI 1 "register_operand" "0,0,0,0,0,0,0")
+ 		   (match_operand:QI 2 "general_operand"  "r,L,P,K,n,n,Qm")))]
+   ""
+   "* return ashlqi3_out (insn, operands, NULL);"
+   [(set_attr "length" "5,0,1,2,4,6,9")
+    (set_attr "cc" "clobber,none,set_czn,set_czn,set_czn,set_czn,clobber")])
+ 
+ (define_insn "ashlhi3"
+   [(set (match_operand:HI 0 "register_operand"           "=r,r,r,r,r,r,r")
+@@ -1346,20 +1407,61 @@
+ 	(ashift:SI (match_operand:SI 1 "register_operand" "0,0,0,r,0,0,0")
+ 		   (match_operand:QI 2 "general_operand"  "r,L,P,O,K,n,Qm")))]
+   ""
+   "* return ashlsi3_out (insn, operands, NULL);"
+   [(set_attr "length" "8,0,4,4,8,10,12")
+    (set_attr "cc" "clobber,none,set_n,clobber,set_n,clobber,clobber")])
+ 
+ ;; Optimize if a scratch register from LD_REGS happens to be available.
+ 
+ (define_peephole2
++  [(match_scratch:QI 2 "d")
++   (set (match_operand:QI 0 "l_register_operand" "")
++	(ashift:QI (match_operand:QI 1 "l_register_operand" "")
++		     (const_int 4)))]
++  ""
++  [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
++   (set (match_dup 2) (const_int -16))
++   (set (match_dup 0) (and:QI (match_dup 0) (match_dup 2)))
++   (clobber (match_dup 2))]
++  "if (!avr_peep2_scratch_safe (operands[2]))
++     FAIL;")
++
++(define_peephole2
++  [(match_scratch:QI 2 "d")
++   (set (match_operand:QI 0 "l_register_operand" "")
++	(ashift:QI (match_operand:QI 1 "l_register_operand" "")
++		     (const_int 5)))]
++  ""
++  [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
++   (set (match_dup 0) (ashift:QI (match_dup 0) (const_int 1)))
++   (set (match_dup 2) (const_int -32))
++   (set (match_dup 0) (and:QI (match_dup 0) (match_dup 2)))
++   (clobber (match_dup 2))]
++  "if (!avr_peep2_scratch_safe (operands[2]))
++     FAIL;")
++
++(define_peephole2
++  [(match_scratch:QI 2 "d")
++   (set (match_operand:QI 0 "l_register_operand" "")
++	(ashift:QI (match_operand:QI 1 "l_register_operand" "")
++		     (const_int 6)))]
++  ""
++  [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
++   (set (match_dup 0) (ashift:QI (match_dup 0) (const_int 2)))
++   (set (match_dup 2) (const_int -64))
++   (set (match_dup 0) (and:QI (match_dup 0) (match_dup 2)))
++   (clobber (match_dup 2))]
++  "if (!avr_peep2_scratch_safe (operands[2]))
++     FAIL;")
++
++(define_peephole2
+   [(match_scratch:QI 3 "d")
+    (set (match_operand:HI 0 "register_operand" "")
+ 	(ashift:HI (match_operand:HI 1 "register_operand" "")
+ 		   (match_operand:QI 2 "const_int_operand" "")))]
+   ""
+   [(parallel [(set (match_dup 0) (ashift:HI (match_dup 1) (match_dup 2)))
+ 	      (clobber (match_dup 3))])]
+   "if (!avr_peep2_scratch_safe (operands[3]))
+      FAIL;")
+ 
+@@ -1464,21 +1566,63 @@
+ 		     (match_operand:QI 2 "const_int_operand" "L,P,O,n")))
+    (clobber (match_scratch:QI 3 "=X,X,X,&d"))]
+   "reload_completed"
+   "* return ashrsi3_out (insn, operands, NULL);"
+   [(set_attr "length" "0,4,4,10")
+    (set_attr "cc" "none,clobber,set_n,clobber")])
+ 
+ ;; >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >>
+ ;; logical shift right
+ 
+-(define_insn "lshrqi3"
++(define_expand "lshrqi3"
++  [(set (match_operand:QI 0 "register_operand"              "")
++	(lshiftrt:QI (match_operand:QI 1 "register_operand" "")
++		     (match_operand:QI 2 "general_operand"  "")))]
++  ""
++  "")
++
++(define_insn_and_split "*lshrqi3_const4"
++  [(set (match_operand:QI 0 "d_register_operand"             "=d")
++	(lshiftrt:QI (match_operand:QI 1 "d_register_operand" "0")
++		     (const_int 4)))]
++  ""
++  "#"
++  ""
++  [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
++   (set (match_dup 0) (and:QI (match_dup 0) (const_int 15)))]
++  "")
++
++(define_insn_and_split "*lshrqi3_const5"
++  [(set (match_operand:QI 0 "d_register_operand"             "=d")
++	(lshiftrt:QI (match_operand:QI 1 "d_register_operand" "0")
++		     (const_int 5)))]
++  ""
++  "#"
++  ""
++  [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
++   (set (match_dup 0) (lshiftrt:QI (match_dup 0) (const_int 1)))
++   (set (match_dup 0) (and:QI (match_dup 0) (const_int 7)))]
++  "")
++
++(define_insn_and_split "*lshrqi3_const6"
++  [(set (match_operand:QI 0 "d_register_operand"             "=d")
++	(lshiftrt:QI (match_operand:QI 1 "d_register_operand" "0")
++		     (const_int 6)))]
++  ""
++  "#"
++  ""
++  [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
++   (set (match_dup 0) (lshiftrt:QI (match_dup 0) (const_int 2)))
++   (set (match_dup 0) (and:QI (match_dup 0) (const_int 3)))]
++  "")
++
++(define_insn "*lshrqi3"
+   [(set (match_operand:QI 0 "register_operand"             "=r,r,r,r,!d,r,r")
+ 	(lshiftrt:QI (match_operand:QI 1 "register_operand" "0,0,0,0,0,0,0")
+ 		     (match_operand:QI 2 "general_operand"  "r,L,P,K,n,n,Qm")))]
+   ""
+   "* return lshrqi3_out (insn, operands, NULL);"
+   [(set_attr "length" "5,0,1,2,4,6,9")
+    (set_attr "cc" "clobber,none,set_czn,set_czn,set_czn,set_czn,clobber")])
+ 
+ (define_insn "lshrhi3"
+   [(set (match_operand:HI 0 "register_operand"             "=r,r,r,r,r,r,r")
+@@ -1494,20 +1638,61 @@
+ 	(lshiftrt:SI (match_operand:SI 1 "register_operand" "0,0,0,r,0,0,0")
+ 		     (match_operand:QI 2 "general_operand"  "r,L,P,O,K,n,Qm")))]
+   ""
+   "* return lshrsi3_out (insn, operands, NULL);"
+   [(set_attr "length" "8,0,4,4,8,10,12")
+    (set_attr "cc" "clobber,none,clobber,clobber,clobber,clobber,clobber")])
+ 
+ ;; Optimize if a scratch register from LD_REGS happens to be available.
+ 
+ (define_peephole2
++  [(match_scratch:QI 2 "d")
++   (set (match_operand:QI 0 "l_register_operand" "")
++	(lshiftrt:QI (match_operand:QI 1 "l_register_operand" "")
++		     (const_int 4)))]
++  ""
++  [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
++   (set (match_dup 2) (const_int 15))
++   (set (match_dup 0) (and:QI (match_dup 0) (match_dup 2)))
++   (clobber (match_dup 2))]
++  "if (!avr_peep2_scratch_safe (operands[2]))
++     FAIL;")
++
++(define_peephole2
++  [(match_scratch:QI 2 "d")
<<Diff was trimmed, longer than 597 lines>>


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