packages: gcc/gcc-branch.diff, gcc/gcc.spec - rel 4; branch diff updated
arekm
arekm at pld-linux.org
Sat Feb 12 19:48:04 CET 2011
Author: arekm Date: Sat Feb 12 18:48:04 2011 GMT
Module: packages Tag: HEAD
---- Log message:
- rel 4; branch diff updated
---- Files affected:
packages/gcc:
gcc-branch.diff (1.42 -> 1.43) , gcc.spec (1.648 -> 1.649)
---- Diffs:
================================================================
Index: packages/gcc/gcc-branch.diff
diff -u packages/gcc/gcc-branch.diff:1.42 packages/gcc/gcc-branch.diff:1.43
--- packages/gcc/gcc-branch.diff:1.42 Mon Jan 24 20:04:59 2011
+++ packages/gcc/gcc-branch.diff Sat Feb 12 19:47:57 2011
@@ -1,7 +1,40 @@
+Index: configure
+===================================================================
+--- configure (.../tags/gcc_4_5_2_release) (wersja 170084)
++++ configure (.../branches/gcc-4_5-branch) (wersja 170084)
+@@ -5780,8 +5780,6 @@
+
+
+ # Check for PPL
+-ppl_major_version=0
+-ppl_minor_version=10
+ ppllibs=" -lppl_c -lppl -lgmpxx"
+ pplinc=
+
+@@ -5838,8 +5836,8 @@
+ if test "x$with_ppl" != "xno" -a "${ENABLE_PPL_CHECK}" = "yes"; then
+ saved_CFLAGS="$CFLAGS"
+ CFLAGS="$CFLAGS $pplinc $gmpinc"
+- { $as_echo "$as_me:${as_lineno-$LINENO}: checking for version $ppl_major_version.$ppl_minor_version of PPL" >&5
+-$as_echo_n "checking for version $ppl_major_version.$ppl_minor_version of PPL... " >&6; }
++ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for version 0.10 (or later revision) of PPL" >&5
++$as_echo_n "checking for version 0.10 (or later revision) of PPL... " >&6; }
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+ /* end confdefs.h. */
+ #include "ppl_c.h"
+@@ -5847,7 +5845,7 @@
+ main ()
+ {
+
+- #if PPL_VERSION_MAJOR != $ppl_major_version || PPL_VERSION_MINOR != $ppl_minor_version
++ #if PPL_VERSION_MAJOR != 0 || PPL_VERSION_MINOR < 10
+ choke me
+ #endif
+
Index: libgomp/configure.tgt
===================================================================
---- libgomp/configure.tgt (.../tags/gcc_4_5_2_release) (wersja 169176)
-+++ libgomp/configure.tgt (.../branches/gcc-4_5-branch) (wersja 169176)
+--- libgomp/configure.tgt (.../tags/gcc_4_5_2_release) (wersja 170084)
++++ libgomp/configure.tgt (.../branches/gcc-4_5-branch) (wersja 170084)
@@ -125,6 +125,10 @@
config_path="bsd posix"
;;
@@ -15,8 +48,8 @@
Index: libgomp/ChangeLog
===================================================================
---- libgomp/ChangeLog (.../tags/gcc_4_5_2_release) (wersja 169176)
-+++ libgomp/ChangeLog (.../branches/gcc-4_5-branch) (wersja 169176)
+--- libgomp/ChangeLog (.../tags/gcc_4_5_2_release) (wersja 170084)
++++ libgomp/ChangeLog (.../branches/gcc-4_5-branch) (wersja 170084)
@@ -1,3 +1,18 @@
+2011-01-16 Jakub Jelinek <jakub at redhat.com>
+
@@ -39,7 +72,7 @@
Index: libgomp/testsuite/libgomp.fortran/allocatable6.f90
===================================================================
--- libgomp/testsuite/libgomp.fortran/allocatable6.f90 (.../tags/gcc_4_5_2_release) (wersja 0)
-+++ libgomp/testsuite/libgomp.fortran/allocatable6.f90 (.../branches/gcc-4_5-branch) (wersja 169176)
++++ libgomp/testsuite/libgomp.fortran/allocatable6.f90 (.../branches/gcc-4_5-branch) (wersja 170084)
@@ -0,0 +1,45 @@
+! PR fortran/46874
+! { dg-do run }
@@ -86,10 +119,210 @@
+ d(a(i)) = min(d(a(i)), a(i))
+ end do
+end
+Index: gcc/tree-vrp.c
+===================================================================
+--- gcc/tree-vrp.c (.../tags/gcc_4_5_2_release) (wersja 170084)
++++ gcc/tree-vrp.c (.../branches/gcc-4_5-branch) (wersja 170084)
+@@ -7290,6 +7290,7 @@
+ size_t i;
+ prop_value_t *single_val_range;
+ bool do_value_subst_p;
++ unsigned num = num_ssa_names;
+
+ if (dump_file)
+ {
+@@ -7301,10 +7302,10 @@
+ /* We may have ended with ranges that have exactly one value. Those
+ values can be substituted as any other const propagated
+ value using substitute_and_fold. */
+- single_val_range = XCNEWVEC (prop_value_t, num_ssa_names);
++ single_val_range = XCNEWVEC (prop_value_t, num);
+
+ do_value_subst_p = false;
+- for (i = 0; i < num_ssa_names; i++)
++ for (i = 0; i < num; i++)
+ if (vr_value[i]
+ && vr_value[i]->type == VR_RANGE
+ && vr_value[i]->min == vr_value[i]->max
+@@ -7332,7 +7333,7 @@
+ identify_jump_threads ();
+
+ /* Free allocated memory. */
+- for (i = 0; i < num_ssa_names; i++)
++ for (i = 0; i < num; i++)
+ if (vr_value[i])
+ {
+ BITMAP_FREE (vr_value[i]->equiv);
+Index: gcc/doc/extend.texi
+===================================================================
+--- gcc/doc/extend.texi (.../tags/gcc_4_5_2_release) (wersja 170084)
++++ gcc/doc/extend.texi (.../branches/gcc-4_5-branch) (wersja 170084)
+@@ -11873,6 +11873,12 @@
+ vector float vec_div (vector float, vector float);
+ vector double vec_div (vector double, vector double);
+ vector double vec_floor (vector double);
++vector double vec_ld (int, const vector double *);
++vector double vec_ld (int, const double *);
++vector double vec_ldl (int, const vector double *);
++vector double vec_ldl (int, const double *);
++vector unsigned char vec_lvsl (int, const volatile double *);
++vector unsigned char vec_lvsr (int, const volatile double *);
+ vector double vec_madd (vector double, vector double, vector double);
+ vector double vec_max (vector double, vector double);
+ vector double vec_min (vector double, vector double);
+@@ -11899,6 +11905,8 @@
+ vector double vec_sub (vector double, vector double);
+ vector float vec_sqrt (vector float);
+ vector double vec_sqrt (vector double);
++void vec_st (vector double, int, vector double *);
++void vec_st (vector double, int, double *);
+ vector double vec_trunc (vector double);
+ vector double vec_xor (vector double, vector double);
+ vector double vec_xor (vector double, vector bool long);
+@@ -11927,8 +11935,66 @@
+ int vec_any_nle (vector double, vector double);
+ int vec_any_nlt (vector double, vector double);
+ int vec_any_numeric (vector double);
++
++vector double vec_vsx_ld (int, const vector double *);
++vector double vec_vsx_ld (int, const double *);
++vector float vec_vsx_ld (int, const vector float *);
++vector float vec_vsx_ld (int, const float *);
++vector bool int vec_vsx_ld (int, const vector bool int *);
++vector signed int vec_vsx_ld (int, const vector signed int *);
++vector signed int vec_vsx_ld (int, const int *);
++vector signed int vec_vsx_ld (int, const long *);
++vector unsigned int vec_vsx_ld (int, const vector unsigned int *);
++vector unsigned int vec_vsx_ld (int, const unsigned int *);
++vector unsigned int vec_vsx_ld (int, const unsigned long *);
++vector bool short vec_vsx_ld (int, const vector bool short *);
++vector pixel vec_vsx_ld (int, const vector pixel *);
++vector signed short vec_vsx_ld (int, const vector signed short *);
++vector signed short vec_vsx_ld (int, const short *);
++vector unsigned short vec_vsx_ld (int, const vector unsigned short *);
++vector unsigned short vec_vsx_ld (int, const unsigned short *);
++vector bool char vec_vsx_ld (int, const vector bool char *);
++vector signed char vec_vsx_ld (int, const vector signed char *);
++vector signed char vec_vsx_ld (int, const signed char *);
++vector unsigned char vec_vsx_ld (int, const vector unsigned char *);
++vector unsigned char vec_vsx_ld (int, const unsigned char *);
++
++void vec_vsx_st (vector double, int, vector double *);
++void vec_vsx_st (vector double, int, double *);
++void vec_vsx_st (vector float, int, vector float *);
++void vec_vsx_st (vector float, int, float *);
++void vec_vsx_st (vector signed int, int, vector signed int *);
++void vec_vsx_st (vector signed int, int, int *);
++void vec_vsx_st (vector unsigned int, int, vector unsigned int *);
++void vec_vsx_st (vector unsigned int, int, unsigned int *);
++void vec_vsx_st (vector bool int, int, vector bool int *);
++void vec_vsx_st (vector bool int, int, unsigned int *);
++void vec_vsx_st (vector bool int, int, int *);
++void vec_vsx_st (vector signed short, int, vector signed short *);
++void vec_vsx_st (vector signed short, int, short *);
++void vec_vsx_st (vector unsigned short, int, vector unsigned short *);
++void vec_vsx_st (vector unsigned short, int, unsigned short *);
++void vec_vsx_st (vector bool short, int, vector bool short *);
++void vec_vsx_st (vector bool short, int, unsigned short *);
++void vec_vsx_st (vector pixel, int, vector pixel *);
++void vec_vsx_st (vector pixel, int, unsigned short *);
++void vec_vsx_st (vector pixel, int, short *);
++void vec_vsx_st (vector bool short, int, short *);
++void vec_vsx_st (vector signed char, int, vector signed char *);
++void vec_vsx_st (vector signed char, int, signed char *);
++void vec_vsx_st (vector unsigned char, int, vector unsigned char *);
++void vec_vsx_st (vector unsigned char, int, unsigned char *);
++void vec_vsx_st (vector bool char, int, vector bool char *);
++void vec_vsx_st (vector bool char, int, unsigned char *);
++void vec_vsx_st (vector bool char, int, signed char *);
+ @end smallexample
+
++Note that the @samp{vec_ld} and @samp{vec_st} builtins will always
++generate the Altivec @samp{LVX} and @samp{STVX} instructions even
++if the VSX instruction set is available. The @samp{vec_vsx_ld} and
++ at samp{vec_vsx_st} builtins will always generate the VSX @samp{LXVD2X},
++ at samp{LXVW4X}, @samp{STXVD2X}, and @samp{STXVW4X} instructions.
++
+ GCC provides a few other builtins on Powerpc to access certain instructions:
+ @smallexample
+ float __builtin_recipdivf (float, float);
+@@ -12799,7 +12865,7 @@
+ be a @var{constant-expression}, as defined in 5.19.2 of the ANSI/ISO C++
+ standard.
+
+-See @uref{http://people.redhat.com/drepper/tls.pdf,
++See @uref{http://www.akkadia.org/drepper/tls.pdf,
+ ELF Handling For Thread-Local Storage} for a detailed explanation of
+ the four thread-local storage addressing models, and how the run-time
+ is expected to function.
+Index: gcc/doc/install.texi
+===================================================================
+--- gcc/doc/install.texi (.../tags/gcc_4_5_2_release) (wersja 170084)
++++ gcc/doc/install.texi (.../branches/gcc-4_5-branch) (wersja 170084)
+@@ -44,9 +44,9 @@
+ @settitle Installing GCC: GNU Free Documentation License
+ @end ifset
+
+- at c Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+- at c 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
+- at c 2010 Free Software Foundation, Inc.
++ at c Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
++ at c 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
++ at c 2009, 2010, 2011 Free Software Foundation, Inc.
+ @c *** Converted to texinfo by Dean Wakerley, dean at wakerley.com
+
+ @c IMPORTANT: whenever you modify this file, run `install.texi2html' to
+@@ -72,8 +72,8 @@
+ @c Part 2 Summary Description and Copyright
+ @copying
+ Copyright @copyright{} 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
+-1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
+-2008 Free Software Foundation, Inc.
++1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
++2009, 2010, 2011 Free Software Foundation, Inc.
+ @sp 1
+ Permission is granted to copy, distribute and/or modify this document
+ under the terms of the GNU Free Documentation License, Version 1.2 or
+@@ -2784,10 +2784,6 @@
+ @end itemize
+
+ @item
+-Motorola 68HC11/68HC12--- at uref{http://www.gnu-m68hc11.org,,GNU
+-Development Tools for the Motorola 68HC11/68HC12}.
+-
+- at item
+ @uref{http://www.sco.com/skunkware/devtools/index.html#gcc,,SCO
+ OpenServer/Unixware}.
+
+@@ -3311,23 +3307,8 @@
+ @heading @anchor{hppa-hp-hpux10}hppa*-hp-hpux10
+
+ For hpux10.20, we @emph{highly} recommend you pick up the latest sed patch
+- at code{PHCO_19798} from HP at . HP has two sites which provide patches free of
+-charge:
++ at code{PHCO_19798} from HP at .
+
+- at itemize @bullet
+- at item
+- at html
+-<a href="http://us.itrc.hp.com/service/home/home.do">US, Canada, Asia-Pacific, and
+-Latin-America</a>
+- at end html
+- at ifnothtml
+- at uref{http://us.itrc.hp.com/service/home/home.do,,} US, Canada, Asia-Pacific,
+-and Latin-America.
+- at end ifnothtml
+- at item
+- at uref{http://europe.itrc.hp.com/service/home/home.do,,} Europe.
+- at end itemize
+-
+ The C++ ABI has changed incompatibly in GCC 4.0. COMDAT subspaces are
+ used for one-only code and data. This resolves many of the previous
+ problems in using C++ on this target. However, the ABI is not compatible
Index: gcc/tree-ssa-loop-im.c
===================================================================
---- gcc/tree-ssa-loop-im.c (.../tags/gcc_4_5_2_release) (wersja 169176)
-+++ gcc/tree-ssa-loop-im.c (.../branches/gcc-4_5-branch) (wersja 169176)
+--- gcc/tree-ssa-loop-im.c (.../tags/gcc_4_5_2_release) (wersja 170084)
++++ gcc/tree-ssa-loop-im.c (.../branches/gcc-4_5-branch) (wersja 170084)
@@ -2139,7 +2139,7 @@
edge ex;
@@ -101,8 +334,8 @@
return true;
Index: gcc/tree-loop-distribution.c
===================================================================
---- gcc/tree-loop-distribution.c (.../tags/gcc_4_5_2_release) (wersja 169176)
-+++ gcc/tree-loop-distribution.c (.../branches/gcc-4_5-branch) (wersja 169176)
+--- gcc/tree-loop-distribution.c (.../tags/gcc_4_5_2_release) (wersja 170084)
++++ gcc/tree-loop-distribution.c (.../branches/gcc-4_5-branch) (wersja 170084)
@@ -251,7 +251,7 @@
/* Generate a call to memset. Return true when the operation succeeded. */
@@ -433,21 +666,21 @@
/* Dump to FILE the PARTITIONS. */
Index: gcc/DATESTAMP
===================================================================
---- gcc/DATESTAMP (.../tags/gcc_4_5_2_release) (wersja 169176)
-+++ gcc/DATESTAMP (.../branches/gcc-4_5-branch) (wersja 169176)
+--- gcc/DATESTAMP (.../tags/gcc_4_5_2_release) (wersja 170084)
++++ gcc/DATESTAMP (.../branches/gcc-4_5-branch) (wersja 170084)
@@ -1 +1 @@
-20101216
-+20110124
++20110212
Index: gcc/DEV-PHASE
===================================================================
---- gcc/DEV-PHASE (.../tags/gcc_4_5_2_release) (wersja 169176)
-+++ gcc/DEV-PHASE (.../branches/gcc-4_5-branch) (wersja 169176)
+--- gcc/DEV-PHASE (.../tags/gcc_4_5_2_release) (wersja 170084)
++++ gcc/DEV-PHASE (.../branches/gcc-4_5-branch) (wersja 170084)
@@ -0,0 +1 @@
+prerelease
Index: gcc/tree-ssa-sccvn.c
===================================================================
---- gcc/tree-ssa-sccvn.c (.../tags/gcc_4_5_2_release) (wersja 169176)
-+++ gcc/tree-ssa-sccvn.c (.../branches/gcc-4_5-branch) (wersja 169176)
+--- gcc/tree-ssa-sccvn.c (.../tags/gcc_4_5_2_release) (wersja 170084)
++++ gcc/tree-ssa-sccvn.c (.../branches/gcc-4_5-branch) (wersja 170084)
@@ -988,6 +988,7 @@
}
@@ -568,8 +801,8 @@
{
Index: gcc/tree-ssa-sccvn.h
===================================================================
---- gcc/tree-ssa-sccvn.h (.../tags/gcc_4_5_2_release) (wersja 169176)
-+++ gcc/tree-ssa-sccvn.h (.../branches/gcc-4_5-branch) (wersja 169176)
+--- gcc/tree-ssa-sccvn.h (.../tags/gcc_4_5_2_release) (wersja 170084)
++++ gcc/tree-ssa-sccvn.h (.../branches/gcc-4_5-branch) (wersja 170084)
@@ -185,10 +185,11 @@
void copy_reference_ops_from_call (gimple, VEC(vn_reference_op_s, heap) **);
bool ao_ref_init_from_vn_reference (ao_ref *, alias_set_type, tree,
@@ -586,9 +819,358 @@
VEC (vn_reference_op_s, heap) *,
Index: gcc/ChangeLog
===================================================================
---- gcc/ChangeLog (.../tags/gcc_4_5_2_release) (wersja 169176)
-+++ gcc/ChangeLog (.../branches/gcc-4_5-branch) (wersja 169176)
-@@ -1,3 +1,306 @@
+--- gcc/ChangeLog (.../tags/gcc_4_5_2_release) (wersja 170084)
++++ gcc/ChangeLog (.../branches/gcc-4_5-branch) (wersja 170084)
+@@ -1,3 +1,655 @@
++2011-02-11 Bernd Schmidt <bernds at codesourcery.com>
++
++ PR rtl-optimization/47166
++ * reload1.c (emit_reload_insns): Disable the spill_reg_store
++ mechanism for PRE_MODIFY and POST_MODIFY.
++ (inc_for_reload): For PRE_MODIFY, return the insn that sets the
++ reloadreg.
++
++2011-02-10 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
++
++ Backport from mainline:
++ 2011-02-07 John David Anglin <dave.anglin at nrc-cnrc.gc.ca>
++
++ * config.gcc (hppa[12]*-*-hpux11*): Don't set extra_parts.
++ * config/pa/stublib.c (pthread_default_stacksize_np, pthread_mutex_lock,
++ pthread_mutex_unlock): Remove.
++ * config/pa/t-pa-hpux11: Remove rules to build pthread stubs.
++ * config/pa/t-pa64: Likewise.
++ * config/pa/pa64-hpux.h (LIB_SPEC): In static links, link against
++ shared libc if not linking against libpthread.
++ * config/pa/pa-hpux11.h (LIB_SPEC): Likewise.
++
++2011-02-03 Michael Meissner <meissner at linux.vnet.ibm.com>
++
++ Backport from mainline:
++ 2011-02-02 Michael Meissner <meissner at linux.vnet.ibm.com>
++
++ PR target/47272
++ * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
++ Document using vector double with the load/store builtins, and
++ that the load/store builtins always use Altivec instructions.
++
++ * config/rs6000/vector.md (vector_altivec_load_<mode>): New insns
++ to use altivec memory instructions, even on VSX.
++ (vector_altivec_store_<mode>): Ditto.
++
++ * config/rs6000/rs6000-protos.h (rs6000_address_for_altivec): New
++ function.
++
++ * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add
++ V2DF, V2DI support to load/store overloaded builtins.
++
++ * config/rs6000/rs6000-builtin.def (ALTIVEC_BUILTIN_*): Add
++ altivec load/store builtins for V2DF/V2DI types.
++
++ * config/rs6000/rs6000.c (rs6000_option_override_internal): Don't
++ set avoid indexed addresses on power6 if -maltivec.
++ (altivec_expand_ld_builtin): Add V2DF, V2DI support, use
++ vector_altivec_load/vector_altivec_store builtins.
++ (altivec_expand_st_builtin): Ditto.
++ (altivec_expand_builtin): Add VSX memory builtins.
++ (rs6000_init_builtins): Add V2DI types to internal types.
++ (altivec_init_builtins): Add support for V2DF/V2DI altivec
++ load/store builtins.
++ (rs6000_address_for_altivec): Insure memory address is appropriate
++ for Altivec.
++
++ * config/rs6000/vsx.md (vsx_load_<mode>): New expanders for
++ vec_vsx_ld and vec_vsx_st.
++ (vsx_store_<mode>): Ditto.
++
++ * config/rs6000/rs6000.h (RS6000_BTI_long_long): New type
++ variables to hold long long types for VSX vector memory builtins.
++ (RS6000_BTI_unsigned_long_long): Ditto.
++ (long_long_integer_type_internal_node): Ditti.
++ (long_long_unsigned_type_internal_node): Ditti.
++
++ * config/rs6000/altivec.md (UNSPEC_LVX): New UNSPEC.
++ (altivec_lvx_<mode>): Make altivec_lvx use a mode iterator.
++ (altivec_stvx_<mode>): Make altivec_stvx use a mode iterator.
++
++ * config/rs6000/altivec.h (vec_vsx_ld): Define VSX memory builtin
++ short cuts.
++ (vec_vsx_st): Ditto.
++
++ Backport from mainline:
++ 2011-02-01 Michael Meissner <meissner at linux.vnet.ibm.com>
++
++ PR target/47580
++ * config/rs6000/vsx.md (vsx_float<VSi><mode>2): Use
++ gpc_reg_operand instead of vsx_register_operand to match rs6000.md
++ generator functions.
++ (vsx_floatuns<VSi><mode>2): Ditto.
++ (vsx_fix_trunc<mode><VSi>2): Ditto.
++ (vsx_fixuns_trunc<mode><VSi>2): Ditto.
++
++2011-02-02 Nick Clifton <nickc at redhat.com>
++
++ Import these patches from the mainline:
++ 2011-01-31 Nick Clifton <nickc at redhat.com>
++
++ * config/rx/rx.c (rx_get_stack_layout): Only save call clobbered
++ registers inside interrupt handlers if the handler is not a leaf
++ function.
++
++ 2011-01-25 Nick Clifton <nickc at redhat.com>
++
++ * config/rx/rx.h (LIBCALL_VALUE): Do not promote complex types.
++ * config/rx/rx.c (rx_function_value): Likewise.
++ (rx_promote_function_mode): Likewise.
++ (gen_safe_add): Place an outsized immediate value inside an UNSPEC
++ in order to make it legitimate.
++ * config/rx/rx.md (adddi3_internal): If the second operand is a
++ MEM make sure that the first operand is the same as the result
++ register.
++ (addsi3_unspec): Delete.
++ (subdi3): Do not accept immediate operands.
++ (subdi3_internal): Likewise.
++
++ 2011-01-24 Richard Henderson <rth at redhat.com>
++
++ * config/rx/predicates.md (rx_fp_comparison_operator): Don't accept
++ compound unordered comparisons.
++ * config/rx/rx.c (rx_split_fp_compare): Remove.
++ * config/rx/rx-protos.h: Update.
++ * config/rx/rx.md (gcc_conds, rx_conds): Remove.
++ (cbranchsf4): Don't call rx_split_fp_compare.
++ (*cbranchsf4): Use rx_split_cbranch.
++ (*cmpsf): Don't accept "i" constraint.
++ (*conditional_branch): Only valid after reload.
++ (cstoresf4): Merge expander with insn. Don't call
++ rx_split_fp_compare.
++
++ 2011-01-22 Nick Clifton <nickc at redhat.com>
++
++ * config/rx/rx.md (cstoresf4): Pass comparison operator to
++ rx_split_fp_compare.
++
++ 2011-01-22 Nick Clifton <nickc at redhat.com>
++
++ * config/rx/rx.md (UNSPEC_CONST): New.
++ (deallocate_and_return): Wrap the amount popped off the stack in
++ an UNSPEC_CONST in order to stop it being rejected by
++ -mmax-constant-size.
++ (pop_and_return): Add a "(return)" rtx.
++ (call): Drop the immediate operand.
++ (call_internal): Likewise.
++ (call_value): Likewise.
++ (call_value_internal): Likewise.
++ (sibcall_internal): Likewise.
++ (sibcall_value_internal): Likewise.
++ (sibcall): Likewise. Generate an explicit call using
++ sibcall_internal.
++ (sibcall_value): Likewise.
++ (mov<>): FAIL if a constant operand is not legitimate.
++ (addsi3_unpsec): New pattern.
++
++ * config/rx/rx.c (rx_print_operand_address): Handle UNPSEC
++ CONSTs.
++ (ok_for_max_constant): New function.
++ (gen_safe_add): New function.
++ (rx_expand_prologue): Use gen_safe_add.
++ (rx_expand_epilogue): Likewise.
++ (rx_is_legitimate_constant): Use ok_for_max_constant. Handle
++ UNSPEC CONSTs.
++
++ 2011-01-17 Richard Henderson <rth at redhat.com>
++
++ * config/rx/predicates.md (rx_constshift_operand): Use match_test.
++ (rx_restricted_mem_operand): New.
++ (rx_shift_operand): Use register_operand.
++ (rx_source_operand, rx_compare_operand): Likewise.
++ * config/rx/rx.md (addsi3_flags): New expander.
++ (adddi3): Rewrite as expander.
++ (adc_internal, *adc_flags, adddi3_internal): New patterns.
++ (subsi3_flags): New expander.
++ (subdi3): Rewrite as expander.
++ (sbb_internal, *sbb_flags, subdi3_internal): New patterns.
++
++ * config/rx/rx.c (RX_BUILTIN_SAT): Remove.
++ (rx_init_builtins): Remove sat builtin.
++ (rx_expand_builtin): Likewise.
++ * config/rx/rx.md (ssaddsi3): New.
++ (*sat): Rename from sat. Represent the CC_REG input.
++
++ * config/rx/predicates.md (rshift_operator): New.
++ * config/rx/rx.c (rx_expand_insv): Remove.
++ * config/rx/rx-protos.h: Update.
++ * config/rx/rx.md (*bitset): Rename from bitset. Swap the ashift
++ operand to the canonical position.
++ (*bitset_in_memory, *bitinvert, *bitinvert_in_memory): Similarly.
++ (*bitclr, *bitclr_in_memory): Similarly.
++ (*insv_imm, rx_insv_reg, *insv_cond, *bmcc, *insv_cond_lt): New.
++ (insv): Retain the zero_extract in the expansion.
++
++ * config/rx/rx.md (bswapsi2): Use = not + for output reload.
++ (bswaphi2, bitinvert, revw): Likewise.
++
++ * config/rx/rx.c (gen_rx_store_vector): Use VOIDmode for gen_rtx_SET.
++ (gen_rx_rtsd_vector, gen_rx_popm_vector): Likewise.
++ * config/rx/rx.md (pop_and_return): Use VOIDmode for SET.
++ (stack_push, stack_pushm, stack_pop, stack_popm): Likewise.
++ (bitset, bitset_in_memory): Likewise.
++ (bitinvert, bitinvert_in_memory): Likewise.
++ (bitclr, bitclr_in_memory): Likewise.
++ (insv, sync_lock_test_and_setsi, movstr, rx_movstr): Likewise.
++ (rx_strend, rx_cmpstrn): Likewise.
++ (rx_setmem): Likewise. Make the source BLKmode to match the dest.
++ (bitop peep2 patterns): Remove.
++
++ * config/rx/rx.c (rx_match_ccmode): New.
++ * config/rx/rx-protos.h: Update.
++ * config/rx/rx.md (abssi2): Clobber, don't set flags.
++ (addsi3, adddi3, andsi3, negsi2, one_cmplsi2, iorsi3): Likewise.
++ (rotlsi3, rotrsi3, ashrsi3, lshrsi3, ashlsi3): Likewise.
++ (subsi3, subdi3, xorsi3, addsf3, divsf3, mulsf3, subsf3): Likewise.
++ (fix_truncsfsi2, floatsisf2): Likewise.
++ (*abssi2_flags, *addsi3_flags, *andsi3_flags, *negsi2_flags): New.
++ (*one_cmplsi2_flags, *iorsi3_flags, *rotlsi3_flags): New.
++ (*rotrsi3_flags, *ashrsi3_flags, *lshrsi3_flags, *ashlsi3_flags): New.
++ (*subsi3_flags, *xorsi3_flags): New.
++
++ * config/rx/rx.md (cstoresf4, *cstoresf4): New patterns.
++
++ * config/rx/rx.c (rx_print_operand): Remove workaround for
++ unsplit comparison operations.
++
++ * config/rx/rx.md (movsicc): Split after reload.
++ (*movsicc): Merge *movsieq and *movsine via match_operator.
++ (*stcc): New pattern.
++
++ * config/rx/rx.c (rx_float_compare_mode): Remove.
++ * config/rx/rx.h (rx_float_compare_mode): Remove.
++ * config/rx/rx.md (cstoresi4): Split after reload.
++ (*sccc): New pattern.
++
++ * config/rx/predicates.md (label_ref_operand): New.
++ (rx_z_comparison_operator): New.
++ (rx_zs_comparison_operator): New.
++ (rx_fp_comparison_operator): New.
++ * config/rx/rx.c (rx_print_operand) [B]: Examine comparison modes.
++ Validate that the flags are set properly for the comparison.
++ (rx_gen_cond_branch_template): Remove.
++ (rx_cc_modes_compatible): Remove.
++ (mode_from_flags): New.
++ (flags_from_code): Rename from flags_needed_for_conditional.
++ (rx_cc_modes_compatible): Re-write in terms of flags_from_mode.
++ (rx_select_cc_mode): Likewise.
++ (rx_split_fp_compare): New.
++ (rx_split_cbranch): New.
++ * config/rx/rx.md (most_cond, zs_cond): Remove iterators.
++ (*cbranchsi4): Use match_operator and rx_split_cbranch.
++ (*cbranchsf4): Similarly.
++ (*cbranchsi4_tst): Rename from *tstbranchsi4_<code>. Use
++ match_operator and rx_split_cbranch.
++ (*cbranchsi4_tst_ext): Combine *tstbranchsi4m_eq and
++ tstbranchsi4m_ne. Use match_operator and rx_split_cbranch.
++ (*cmpsi): Rename from cmpsi.
++ (*tstsi): Rename from tstsi.
++ (*cmpsf): Rename from cmpsf; use CC_Fmode.
++ (*conditional_branch): Rename from conditional_branch.
++ (*reveresed_conditional_branch): Remove.
++ (b<code>): Remove expander.
++ * config/rx/rx-protos.h: Update.
++
<<Diff was trimmed, longer than 597 lines>>
---- CVS-web:
http://cvs.pld-linux.org/cgi-bin/cvsweb.cgi/packages/gcc/gcc-branch.diff?r1=1.42&r2=1.43&f=u
http://cvs.pld-linux.org/cgi-bin/cvsweb.cgi/packages/gcc/gcc.spec?r1=1.648&r2=1.649&f=u
More information about the pld-cvs-commit
mailing list