packages: crossavr-gcc/crossavr-gcc.spec, crossavr-gcc/200-gcc-4.5.1-libibe...
kosmo
kosmo at pld-linux.org
Sun Feb 19 21:54:49 CET 2012
Author: kosmo Date: Sun Feb 19 20:54:48 2012 GMT
Module: packages Tag: HEAD
---- Log message:
- synchronized patches with Atmel official AVR8-GNU toolchain.
- updated to 4.5.3
---- Files affected:
packages/crossavr-gcc:
crossavr-gcc.spec (1.38 -> 1.39) , 200-gcc-4.5.1-libiberty-Makefile.in.patch (NONE -> 1.1) (NEW), 300-gcc-4.5.1-fixedpoint-3-4-2010.patch (NONE -> 1.1) (NEW), 301-gcc-4.5.1-xmega-v14.patch (NONE -> 1.1) (NEW), 302-gcc-4.5.1-avrtiny10.patch (NONE -> 1.1) (NEW), 303-gcc-4.5.1-osmain.patch (NONE -> 1.1) (NEW), 304-gcc-4.5.1-builtins-v6.patch (NONE -> 1.1) (NEW), 305-gcc-4.5.1-avrtiny10-non-fixedpoint.patch (NONE -> 1.1) (NEW), 306-gcc-4.5.1-option-list-devices.patch (NONE -> 1.1) (NEW), 400-gcc-4.5.1-new-devices.patch (NONE -> 1.1) (NEW), 401-gcc-4.5.1-atmega32_5_50_90_pa.patch (NONE -> 1.1) (NEW), 402-gcc-4.5.1-attiny1634.patch (NONE -> 1.1) (NEW), 403-gcc-4.5.1-atmega48pa.patch (NONE -> 1.1) (NEW), 404-gcc-4.5.1-atxmega_16_32_a4u.patch (NONE -> 1.1) (NEW), 405-gcc-4.5.1-atxmega64_128_192_256a3u.patch (NONE -> 1.1) (NEW), 406-gcc-4.5.1-atmegarfr2_a2.patch (NONE -> 1.1) (NEW), 407-gcc-4.5.1-atmega165pa.patch (NONE -> 1.1) (NEW), 408-gcc-4.5.1-atxmega384c3.patch (NONE -> 1.1) (NEW), 409-gcc-4.5.1-attiny80.patch (NONE -> 1.1) (NEW), 410-gcc-4.5.1-atxmega128a4u.patch (NONE -> 1.1) (NEW), 411-gcc-4.5.1-atxmega64d4.patch (NONE -> 1.1) (NEW), 412-gcc-4.5.1-atmega164pa_168pa_32a_64a.patch (NONE -> 1.1) (NEW), 413-gcc-4.5.1-atxmega32x1.patch (NONE -> 1.1) (NEW), 414-gcc-4.5.1-atxmega64_128_b3.patch (NONE -> 1.1) (NEW), 415-gcc-4.5.1-atxmega64b1.patch (NONE -> 1.1) (NEW), 416-gcc-4.5.1-atmega_8a_128a_1284.patch (NONE -> 1.1) (NEW), 417-gcc-4.5.1-atxmega64a4u.patch (NONE -> 1.1) (NEW), 418-gcc-4.5.1-atxmega128d4.patch (NONE -> 1.1) (NEW), 419-gcc-4.5.1-atmxt336s.patch (NONE -> 1.1) (NEW), 420-gcc-4.5.1-atxmega16c4_32c4_128c3_256c3.patch (NONE -> 1.1) (NEW), 421-gcc-4.5.1-atxmega384d3.patch (NONE -> 1.1) (NEW), 422-gcc-4.5.1-atmega48hvf.patch (NONE -> 1.1) (NEW), 423-gcc-4.5.1-atmega26hvg.patch (NONE -> 1.1) (NEW), 424-gcc-4.5.1-atmxt224_224e.patch (NONE -> 1.1) (NEW), 424-gcc-4.5.1-atxmega192c3.patch (NONE -> 1.1) (NEW), 500-gcc-4.5.1-bug13473.patch (NONE -> 1.1) (NEW), 501-gcc-4.5.1-bug13579.patch (NONE -> 1.1) (NEW), 502-gcc-4.5.1-bug-18145-v4.patch (NONE -> 1.1) (NEW), 503-gcc-4.5.1-avrtiny10-bug-12510.patch (NONE -> 1.1) (NEW), 504-gcc-4.5.1-bug12915.patch (NONE -> 1.1) (NEW), 505-gcc-4.5.1-bug13932.patch (NONE -> 1.1) (NEW), 506-gcc-4.5.1-bug13789.patch (NONE -> 1.1) (NEW), 507-gcc-4.5.1-bug14415.patch (NONE -> 1.1) (NEW), crossavr-gcc-atmega32c1.patch (1.1 -> NONE) (REMOVED), crossavr-gcc-atmega32m1.patch (1.1 -> NONE) (REMOVED), crossavr-gcc-atmega32u4.patch (1.1 -> NONE) (REMOVED), crossavr-gcc-atmega32u6.patch (1.1 -> NONE) (REMOVED), crossavr-gcc-attiny13a.patch (1.1 -> NONE) (REMOVED), crossavr-gcc-attiny167.patch (1.1 -> NONE) (REMOVED), crossavr-gcc-bug-11259-v3.patch (1.2 -> NONE) (REMOVED), crossavr-gcc-bug-18145.patch (1.1 -> NONE) (REMOVED), crossavr-gcc-bug-19636-24894-31644-31786.patch (1.1 -> NONE) (REMOVED), crossavr-gcc-bug-33009.patch (1.1 -> NONE) (REMOVED), crossavr-gcc-bug-34210-35508.patch (1.1 -> NONE) (REMOVED), crossavr-gcc-bug-35013.patch (1.2 -> NONE) (REMOVED), crossavr-gcc-builtins-v6.patch (1.2 -> NONE) (REMOVED), crossavr-gcc-libgcc16.patch (1.1 -> NONE) (REMOVED), crossavr-gcc-libgcc.patch (1.1 -> NONE) (REMOVED), crossavr-gcc-libiberty-Makefile.in.patch (1.2 -> NONE) (REMOVED), crossavr-gcc-mega256-additional.patch (1.1 -> NONE) (REMOVED), crossavr-gcc-mega256.patch (1.1 -> NONE) (REMOVED), crossavr-gcc-new-devices.patch (1.1 -> NONE) (REMOVED), crossavr-gcc-osmain.patch (1.2 -> NONE) (REMOVED), crossavr-gcc-param-inline-call-cost.patch (1.1 -> NONE) (REMOVED), crossavr-gcc-xmega.patch (1.1 -> NONE) (REMOVED)
---- Diffs:
================================================================
Index: packages/crossavr-gcc/crossavr-gcc.spec
diff -u packages/crossavr-gcc/crossavr-gcc.spec:1.38 packages/crossavr-gcc/crossavr-gcc.spec:1.39
--- packages/crossavr-gcc/crossavr-gcc.spec:1.38 Wed Apr 6 09:06:41 2011
+++ packages/crossavr-gcc/crossavr-gcc.spec Sun Feb 19 21:54:41 2012
@@ -10,32 +10,64 @@
Summary(pt_BR.UTF-8): Utilitários para desenvolvimento de binários da GNU - AVR gcc
Summary(tr.UTF-8): GNU geliştirme araçları - AVR gcc
Name: crossavr-gcc
-Version: 4.3.5
-Release: 2
-Patch0: crossavr-gcc-bug-11259-v3.patch
-Patch1: crossavr-gcc-bug-18145.patch
-Patch2: crossavr-gcc-bug-19636-24894-31644-31786.patch
-Patch3: crossavr-gcc-bug-33009.patch
-Patch4: crossavr-gcc-bug-34210-35508.patch
-Patch5: crossavr-gcc-bug-35013.patch
-Patch6: crossavr-gcc-builtins-v6.patch
-Patch7: crossavr-gcc-libgcc.patch
-Patch8: crossavr-gcc-libiberty-Makefile.in.patch
-Patch9: crossavr-gcc-new-devices.patch
-Patch10: crossavr-gcc-param-inline-call-cost.patch
-Patch11: crossavr-gcc-xmega.patch
-Patch12: crossavr-gcc-osmain.patch
+Version: 4.5.3
+Release: 1
Epoch: 1
+# Patches 1xx are taken form Atmel official AVR8-GNU toolchain version 3.3.1.481.
+Patch100: 200-gcc-4.5.1-libiberty-Makefile.in.patch
+Patch101: 300-gcc-4.5.1-fixedpoint-3-4-2010.patch
+Patch102: 301-gcc-4.5.1-xmega-v14.patch
+Patch103: 302-gcc-4.5.1-avrtiny10.patch
+Patch104: 303-gcc-4.5.1-osmain.patch
+Patch105: 304-gcc-4.5.1-builtins-v6.patch
+Patch106: 305-gcc-4.5.1-avrtiny10-non-fixedpoint.patch
+Patch107: 306-gcc-4.5.1-option-list-devices.patch
+Patch108: 400-gcc-4.5.1-new-devices.patch
+Patch109: 401-gcc-4.5.1-atmega32_5_50_90_pa.patch
+Patch110: 402-gcc-4.5.1-attiny1634.patch
+Patch111: 403-gcc-4.5.1-atmega48pa.patch
+Patch112: 404-gcc-4.5.1-atxmega_16_32_a4u.patch
+Patch113: 405-gcc-4.5.1-atxmega64_128_192_256a3u.patch
+Patch114: 406-gcc-4.5.1-atmegarfr2_a2.patch
+Patch115: 407-gcc-4.5.1-atmega165pa.patch
+Patch116: 408-gcc-4.5.1-atxmega384c3.patch
+Patch117: 409-gcc-4.5.1-attiny80.patch
+Patch118: 410-gcc-4.5.1-atxmega128a4u.patch
+Patch119: 411-gcc-4.5.1-atxmega64d4.patch
+Patch120: 412-gcc-4.5.1-atmega164pa_168pa_32a_64a.patch
+Patch121: 413-gcc-4.5.1-atxmega32x1.patch
+Patch122: 414-gcc-4.5.1-atxmega64_128_b3.patch
+Patch123: 415-gcc-4.5.1-atxmega64b1.patch
+Patch124: 416-gcc-4.5.1-atmega_8a_128a_1284.patch
+Patch125: 417-gcc-4.5.1-atxmega64a4u.patch
+Patch126: 418-gcc-4.5.1-atxmega128d4.patch
+Patch127: 419-gcc-4.5.1-atmxt336s.patch
+Patch128: 420-gcc-4.5.1-atxmega16c4_32c4_128c3_256c3.patch
+Patch129: 421-gcc-4.5.1-atxmega384d3.patch
+Patch130: 422-gcc-4.5.1-atmega48hvf.patch
+Patch131: 423-gcc-4.5.1-atmega26hvg.patch
+Patch132: 424-gcc-4.5.1-atmxt224_224e.patch
+Patch133: 424-gcc-4.5.1-atxmega192c3.patch
+Patch134: 500-gcc-4.5.1-bug13473.patch
+Patch135: 501-gcc-4.5.1-bug13579.patch
+Patch136: 502-gcc-4.5.1-bug-18145-v4.patch
+Patch137: 503-gcc-4.5.1-avrtiny10-bug-12510.patch
+Patch138: 504-gcc-4.5.1-bug12915.patch
+Patch139: 505-gcc-4.5.1-bug13932.patch
+Patch140: 506-gcc-4.5.1-bug13789.patch
+Patch141: 507-gcc-4.5.1-bug14415.patch
License: GPL
Group: Development/Languages
Source0: ftp://gcc.gnu.org/pub/gcc/releases/gcc-%{version}/gcc-%{version}.tar.bz2
-# Source0-md5: e588cfde3bf323f82918589b94f14a15
+# Source0-md5: 8e0b5c12212e185f3e4383106bfa9cc6
BuildRequires: /bin/bash
BuildRequires: autoconf
BuildRequires: bison
BuildRequires: crossavr-binutils
+BuildRequires: elfutils-devel >= 0.145-1
BuildRequires: flex
BuildRequires: gmp-devel >= 4.1
+BuildRequires: libmpc-devel
BuildRequires: mpfr-devel >= 2.3.0
BuildRequires: perl-tools-pod
Requires: crossavr-binutils >= 2.15.91.0.2
@@ -75,19 +107,48 @@
%prep
%setup -q -n gcc-%{version}
-%patch0 -p0
-%patch1 -p0
-%patch2 -p0
-%patch3 -p0
-%patch4 -p0
-%patch5 -p0
-%patch6 -p0
-%patch7 -p0
-%patch8 -p0
-%patch9 -p0
-%patch10 -p0
-%patch11 -p0
-%patch12 -p0
+%patch100 -p0
+%patch101 -p0
+%patch102 -p0
+%patch103 -p0
+%patch104 -p0
+%patch105 -p0
+%patch106 -p0
+%patch107 -p0
+%patch108 -p0
+%patch109 -p0
+%patch110 -p0
+%patch111 -p0
+%patch112 -p0
+%patch113 -p0
+%patch114 -p0
+%patch115 -p0
+%patch116 -p0
+%patch117 -p0
+%patch118 -p0
+%patch119 -p0
+%patch120 -p0
+%patch121 -p0
+%patch122 -p0
+%patch123 -p0
+%patch124 -p0
+%patch125 -p0
+%patch126 -p0
+%patch127 -p0
+%patch128 -p0
+%patch129 -p0
+%patch130 -p0
+%patch131 -p0
+%patch132 -p0
+%patch133 -p0
+%patch134 -p0
+%patch135 -p0
+%patch136 -p0
+%patch137 -p0
+%patch138 -p0
+%patch139 -p0
+%patch140 -p0
+%patch141 -p0
%build
rm -rf obj-%{target}
@@ -104,9 +165,12 @@
--bindir=%{_bindir} \
--libdir=%{_libdir} \
--libexecdir=%{_libdir} \
+ --enable-c99 \
+ --enable-languages="c,c++" \
+ --enable-long-long \
+ --enable-lto \
--disable-shared \
--disable-libssp \
- --enable-languages="c,c++" \
--with-dwarf2 \
--with-gnu-as \
--with-gnu-ld \
@@ -155,8 +219,11 @@
%dir %{gcclib}
%attr(755,root,root) %{gcclib}/cc1
%attr(755,root,root) %{gcclib}/collect2
+%attr(755,root,root) %{gcclib}/lto-wrapper
+%attr(755,root,root) %{gcclib}/lto1
%{gcclib}/libg*.a
%{gcclib}/%{target}*
+%{gcclib}/plugin
%dir %{gcclib}/include
%{gcclib}/include/*.h
%{_mandir}/man1/%{target}-cpp.1*
@@ -176,6 +243,10 @@
All persons listed below can be reached at <cvs_login>@pld-linux.org
$Log$
+Revision 1.39 2012/02/19 20:54:41 kosmo
+- synchronized patches with Atmel official AVR8-GNU toolchain.
+- updated to 4.5.3
+
Revision 1.38 2011/04/06 07:06:41 uzsolt
- rel 2
================================================================
Index: packages/crossavr-gcc/200-gcc-4.5.1-libiberty-Makefile.in.patch
diff -u /dev/null packages/crossavr-gcc/200-gcc-4.5.1-libiberty-Makefile.in.patch:1.1
--- /dev/null Sun Feb 19 21:54:49 2012
+++ packages/crossavr-gcc/200-gcc-4.5.1-libiberty-Makefile.in.patch Sun Feb 19 21:54:41 2012
@@ -0,0 +1,13 @@
+diff -Naurp libiberty/Makefile.in libiberty/Makefile.in
+--- libiberty/Makefile.in 2010-03-02 00:09:56.000000000 -0600
++++ libiberty/Makefile.in 2011-01-18 17:27:57.000000000 -0600
+@@ -321,7 +321,8 @@ libiberty.html : $(srcdir)/libiberty.tex
+ @MAINT@ echo stamp > stamp-functions
+
+ INSTALL_DEST = @INSTALL_DEST@
+-install: install_to_$(INSTALL_DEST) install-subdir
++#install: install_to_$(INSTALL_DEST) install-subdir
++install:
+
+ # This is tricky. Even though CC in the Makefile contains
+ # multilib-specific flags, it's overridden by FLAGS_TO_PASS from the
================================================================
Index: packages/crossavr-gcc/300-gcc-4.5.1-fixedpoint-3-4-2010.patch
diff -u /dev/null packages/crossavr-gcc/300-gcc-4.5.1-fixedpoint-3-4-2010.patch:1.1
--- /dev/null Sun Feb 19 21:54:49 2012
+++ packages/crossavr-gcc/300-gcc-4.5.1-fixedpoint-3-4-2010.patch Sun Feb 19 21:54:41 2012
@@ -0,0 +1,2755 @@
+diff -rupN gcc/config/avr/avr.c gcc/config/avr/avr.c
+--- gcc/config/avr/avr.c 2010-04-02 14:54:46.000000000 -0500
++++ gcc/config/avr/avr.c 2010-09-21 14:31:30.000000000 -0500
+@@ -192,6 +192,19 @@ static const struct attribute_spec avr_a
+ #undef TARGET_CAN_ELIMINATE
+ #define TARGET_CAN_ELIMINATE avr_can_eliminate
+
++#undef TARGET_SCALAR_MODE_SUPPORTED_P
++#define TARGET_SCALAR_MODE_SUPPORTED_P avr_scalar_mode_supported_p
++
++ /* Implement TARGET_SCALAR_MODE_SUPPORTED_P. */
++ static bool
++ avr_scalar_mode_supported_p (enum machine_mode mode)
++ {
++ if (ALL_FIXED_POINT_MODE_P (mode))
++ return true;
++
++ return default_scalar_mode_supported_p (mode);
++ }
++
+ struct gcc_target targetm = TARGET_INITIALIZER;
+
+ void
+@@ -1609,9 +1622,9 @@ output_movqi (rtx insn, rtx operands[],
+
+ *l = 1;
+
+- if (register_operand (dest, QImode))
++ if (register_operand (dest, VOIDmode))
+ {
+- if (register_operand (src, QImode)) /* mov r,r */
++ if (register_operand (src, VOIDmode)) /* mov r,r */
+ {
+ if (test_hard_reg_class (STACK_REG, dest))
+ return AS2 (out,%0,%1);
+@@ -1699,9 +1712,9 @@ output_movhi (rtx insn, rtx operands[],
+ if (!l)
+ l = &dummy;
+
+- if (register_operand (dest, HImode))
++ if (register_operand (dest, VOIDmode))
+ {
+- if (register_operand (src, HImode)) /* mov r,r */
++ if (register_operand (src, VOIDmode)) /* mov r,r */
+ {
+ if (test_hard_reg_class (STACK_REG, dest))
+ {
+@@ -2424,6 +2437,14 @@ output_movsisf(rtx insn, rtx operands[],
+ {
+ if (test_hard_reg_class (LD_REGS, dest)) /* ldi d,i */
+ {
++ if (AVR_HAVE_MOVW
++ && (UINTVAL (src) >> 16) == (UINTVAL (src) & 0xffff))
++ {
++ *l = 3;
++ return (AS2 (ldi,%A0,lo8(%1)) CR_TAB
++ AS2 (ldi,%B0,hi8(%1)) CR_TAB
++ AS2 (movw,%C0,%A0));
++ }
+ *l = 4;
+ return (AS2 (ldi,%A0,lo8(%1)) CR_TAB
+ AS2 (ldi,%B0,hi8(%1)) CR_TAB
+@@ -4354,6 +4375,196 @@ avr_rotate_bytes (rtx operands[])
+ return true;
+ }
+
++/* Outputs instructions needed for fixed point conversion. */
++
++const char *
++fract_out (rtx insn ATTRIBUTE_UNUSED, rtx operands[], int intsigned, int *len)
++{
++ int i, k = 0;
++ int sbit[2], ilen[2], flen[2], tlen[2];
++ int rdest, rsource, offset;
++ int start, end, dir;
++ int hadbst = 0, hadlsl = 0;
++ int clrword = -1, lastclr = 0, clr = 0;
++ char buf[20];
++
++ if (!len)
++ len = &k;
++
++ for (i = 0; i < 2; i++)
++ {
++ enum machine_mode mode = GET_MODE (operands[i]);
++ tlen[i] = GET_MODE_SIZE (mode);
++ if (SCALAR_INT_MODE_P (mode))
++ {
++ sbit[i] = intsigned;
++ ilen[i] = GET_MODE_BITSIZE(mode) / 8;
++ flen[i] = 0;
++ }
++ else if (ALL_SCALAR_FIXED_POINT_MODE_P (mode))
++ {
++ sbit[i] = SIGNED_SCALAR_FIXED_POINT_MODE_P (mode);
++ ilen[i] = (GET_MODE_IBIT (mode) + 1) / 8;
++ flen[i] = (GET_MODE_FBIT (mode) + 1) / 8;
++ }
++ else
++ fatal_insn ("unsupported fixed-point conversion", insn);
++ }
++
++ rdest = true_regnum (operands[0]);
++ rsource = true_regnum (operands[1]);
++ offset = flen[1] - flen[0];
++
++ /* Store the sign bit if the destination is a signed
++ fract and the source has a sign in the integer part. */
++ if (sbit[0] && !ilen[0] && sbit[1] && ilen[1])
++ {
++ /* To avoid using bst and bld if the source and
++ destination registers overlap we can use a single lsl
++ since we don't care about preserving the source register. */
++ if (rdest < rsource + tlen[1] && rdest + tlen[0] > rsource)
++ {
++ sprintf (buf, "lsl r%d", rsource + tlen[1] - 1);
++ hadlsl = 1;
++ }
++ else
++ {
++ sprintf (buf, "bst r%d, 7", rsource + tlen[1] - 1);
++ hadbst = 1;
++ }
++ output_asm_insn (buf, operands);
++ ++*len;
++ }
++
++ /* Pick the correct direction. */
++ if (rdest < rsource + offset)
++ {
++ dir = 1;
++ start = 0;
++ end = tlen[0];
++ }
++ else
++ {
++ dir = -1;
++ start = tlen[0] - 1;
++ end = -1;
++ }
++
++ /* Move registers into place, clearing registers that do not overlap. */
++ for (i = start; i != end; i += dir)
++ {
++ int destloc = rdest + i, sourceloc = rsource + i + offset;
++ if (sourceloc < rsource || sourceloc >= rsource + tlen[1])
++ {
++ if (AVR_HAVE_MOVW && i+dir != end
++ && (sourceloc+dir < rsource || sourceloc+dir >= rsource + tlen[1])
++ && ((dir == 1 && !(destloc%2) && !(sourceloc%2))
++ || (dir == -1 && (destloc%2) && (sourceloc%2)))
++ && clrword != -1)
++ {
++ sprintf (buf, "movw r%d, r%d", destloc&0xfe, clrword&0xfe);
++ i += dir;
++ }
++ else
++ {
++ /* Do not clear the register if it is going to get
++ sign extended with a mov later. */
++ if (sbit[0] && sbit[1] && i != tlen[0] - 1 && i >= flen[0])
++ continue;
++
++ sprintf (buf, "clr r%d", destloc);
++ if (lastclr)
++ clrword = destloc;
++ clr=1;
++ }
++ }
++ else if (destloc == sourceloc)
++ continue;
++ else
++ if (AVR_HAVE_MOVW && i+dir != end
++ && sourceloc+dir >= rsource && sourceloc+dir < rsource + tlen[1]
++ && ((dir == 1 && !(destloc%2) && !(sourceloc%2))
++ || (dir == -1 && (destloc%2) && (sourceloc%2))))
++ {
++ sprintf (buf, "movw r%d, r%d", destloc&0xfe, sourceloc&0xfe);
++ i += dir;
++ }
++ else
++ sprintf (buf, "mov r%d, r%d", destloc, sourceloc);
++
++ output_asm_insn (buf, operands);
++ ++*len;
++
++ lastclr = clr;
++ clr = 0;
++ }
++
++ /* Perform sign extension if needed. */
++ if (sbit[0] && sbit[1] && ilen[0] > ilen[1])
++ {
++ sprintf (buf, "sbrc r%d, 7", rdest+tlen[1]-1-offset);
++ output_asm_insn (buf, operands);
++ sprintf (buf, "com r%d", rdest+tlen[0]-1);
++ output_asm_insn (buf, operands);
++ *len += 2;
++ /* Sign extend additional bytes. */
++ start = rdest + tlen[0] - 2;
++ end = rdest + flen[0] + ilen[1] - 1;
++ for (i = start; i != end; i--)
++ {
++ if (AVR_HAVE_MOVW && i != start && i-1 != end)
++ sprintf (buf, "movw r%d, r%d", --i, rdest+tlen[0]-2);
++ else
++ sprintf (buf, "mov r%d, r%d", i, rdest+tlen[0]-1);
++ output_asm_insn (buf, operands);
++ ++*len;
++ }
++ }
++
++ /* Perform shifts, only needed if one operand
++ is a signed fract, and the other is not. */
++ if (sbit[0] && !ilen[0] && (!sbit[1] || ilen[1]))
++ {
++ start = rdest+flen[0]-1;
++ end = rdest + flen[0] - flen[1];
++ if (end < rdest)
++ end = rdest;
++ for (i = start; i >= end; i--)
++ {
++ if (i == start && !hadlsl)
++ sprintf (buf, "lsr r%d", i);
++ else
++ sprintf (buf, "ror r%d", i);
++ output_asm_insn (buf, operands);
++ ++*len;
++ }
++
++ if (hadbst)
++ {
++ sprintf (buf, "bld r%d, 7", rdest + tlen[0] - 1);
++ output_asm_insn (buf, operands);
++ ++*len;
++ }
++ }
++ else if (sbit[1] && !ilen[1] && (!sbit[0] || ilen[0]))
++ {
++ start = rdest + flen[0] - flen[1];
++ if (start < rdest)
++ start = rdest;
++ for (i = start; i<rdest+flen[0]; i++)
++ {
++ if (i == start)
++ sprintf (buf, "lsl r%d", i);
++ else
++ sprintf (buf, "rol r%d", i);
++ output_asm_insn (buf, operands);
++ ++*len;
++ }
++ }
++
++ return "";
++}
++
+ /* Modifies the length assigned to instruction INSN
+ LEN is the initially computed length of the insn. */
+
+diff -rupN gcc/config/avr/avr-fixed.md gcc/config/avr/avr-fixed.md
+--- gcc/config/avr/avr-fixed.md 1969-12-31 18:00:00.000000000 -0600
++++ gcc/config/avr/avr-fixed.md 2010-09-21 14:31:30.000000000 -0500
+@@ -0,0 +1,338 @@
++;; -*- Mode: Scheme -*-
++;; This file contains instructions that support fixed-point operations
++;; for ATMEL AVR micro controllers.
++;; Copyright (C) 2009
++;; Free Software Foundation, Inc.
++;; Contributed by Sean D'Epagnier (sean at depagnier.com)
++
++;; This file is part of GCC.
++
++;; GCC is free software; you can redistribute it and/or modify
++;; it under the terms of the GNU General Public License as published by
++;; the Free Software Foundation; either version 3, or (at your option)
++;; any later version.
++
++;; GCC is distributed in the hope that it will be useful,
++;; but WITHOUT ANY WARRANTY; without even the implied warranty of
++;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++;; GNU General Public License for more details.
++
++;; You should have received a copy of the GNU General Public License
++;; along with GCC; see the file COPYING3. If not see
++;; <http://www.gnu.org/licenses/>.
++
++(define_mode_iterator ALLQQ [(QQ "") (UQQ "")])
++(define_mode_iterator ALLHQ [(HQ "") (UHQ "")])
++(define_mode_iterator ALLHA [(HA "") (UHA "")])
++(define_mode_iterator ALLHQHA [(HQ "") (UHQ "") (HA "") (UHA "")])
++(define_mode_iterator ALLSA [(SA "") (USA "")])
++
++;;; Conversions
++
++(define_mode_iterator FIXED1 [(QQ "") (UQQ "") (HQ "") (UHQ "")
++ (SQ "") (USQ "") (DQ "") (UDQ "")
++ (HA "") (UHA "") (SA "") (USA "")
++ (DA "") (UDA "") (TA "") (UTA "")
++ (QI "") (HI "") (SI "") (DI "")])
++(define_mode_iterator FIXED2 [(QQ "") (UQQ "") (HQ "") (UHQ "")
++ (SQ "") (USQ "") (DQ "") (UDQ "")
++ (HA "") (UHA "") (SA "") (USA "")
++ (DA "") (UDA "") (TA "") (UTA "")
++ (QI "") (HI "") (SI "") (DI "")])
++
++(define_insn "fract<FIXED2:mode><FIXED1:mode>2"
++ [(set (match_operand:FIXED1 0 "register_operand" "=r")
++ (fract_convert:FIXED1 (match_operand:FIXED2 1 "register_operand" "r")))]
++ ""
++ "* return fract_out (insn, operands, 1, NULL);"
++ [(set_attr "cc" "clobber")])
++
++(define_insn "fractuns<FIXED2:mode><FIXED1:mode>2"
++ [(set (match_operand:FIXED1 0 "register_operand" "=r")
++ (unsigned_fract_convert:FIXED1 (match_operand:FIXED2 1 "register_operand" "r")))]
++ ""
++ "* return fract_out (insn, operands, 0, NULL);"
++ [(set_attr "cc" "clobber")])
++
++;;; Addition/Subtraction, mostly identical to integer versions
++
++(define_insn "add<ALLQQ:mode>3"
++ [(set (match_operand:ALLQQ 0 "register_operand" "=r,d")
++ (plus:ALLQQ (match_operand:ALLQQ 1 "register_operand" "%0,0")
++ (match_operand:ALLQQ 2 "nonmemory_operand" "r,i")))]
++ ""
++ "@
++ add %0,%2
++ subi %0,lo8(-(%2))"
++ [(set_attr "length" "1,1")
++ (set_attr "cc" "set_czn,set_czn")])
++
++(define_insn "sub<ALLQQ:mode>3"
++ [(set (match_operand:ALLQQ 0 "register_operand" "=r,d")
++ (minus:ALLQQ (match_operand:ALLQQ 1 "register_operand" "0,0")
++ (match_operand:ALLQQ 2 "nonmemory_operand" "r,i")))]
++ ""
++ "@
++ sub %0,%2
++ subi %0,lo8(%2)"
++ [(set_attr "length" "1,1")
++ (set_attr "cc" "set_czn,set_czn")])
++
++
++(define_insn "add<ALLHQHA:mode>3"
++ [(set (match_operand:ALLHQHA 0 "register_operand" "=r,d")
++ (plus:ALLHQHA (match_operand:ALLHQHA 1 "register_operand" "%0,0")
++ (match_operand:ALLHQHA 2 "nonmemory_operand" "r,i")))]
++ ""
++ "@
++ add %A0,%A2\;adc %B0,%B2
++ subi %A0,lo8(-(%2))\;sbci %B0,hi8(-(%2))"
++ [(set_attr "length" "2,2")
++ (set_attr "cc" "set_n,set_czn")])
++
++(define_insn "sub<ALLHQHA:mode>3"
++ [(set (match_operand:ALLHQHA 0 "register_operand" "=r,d")
++ (minus:ALLHQHA (match_operand:ALLHQHA 1 "register_operand" "0,0")
++ (match_operand:ALLHQHA 2 "nonmemory_operand" "r,i")))]
++ ""
++ "@
++ sub %A0,%A2\;sbc %B0,%B2
++ subi %A0,lo8(%2)\;sbci %B0,hi8(%2)"
++ [(set_attr "length" "2,2")
++ (set_attr "cc" "set_czn,set_czn")])
++
++(define_insn "add<ALLSA:mode>3"
++ [(set (match_operand:ALLSA 0 "register_operand" "=r,d")
++ (plus:ALLSA (match_operand:ALLSA 1 "register_operand" "%0,0")
++ (match_operand:ALLSA 2 "nonmemory_operand" "r,i")))]
++ ""
++ "@
++ add %A0,%A2\;adc %B0,%B2\;adc %C0,%C2\;adc %D0,%D2
++ subi %0,lo8(-(%2))\;sbci %B0,hi8(-(%2))\;sbci %C0,hlo8(-(%2))\;sbci %D0,hhi8(-(%2))"
++ [(set_attr "length" "4,4")
++ (set_attr "cc" "set_n,set_czn")])
++
++(define_insn "sub<ALLSA:mode>3"
++ [(set (match_operand:ALLSA 0 "register_operand" "=r,d")
++ (minus:ALLSA (match_operand:ALLSA 1 "register_operand" "0,0")
++ (match_operand:ALLSA 2 "nonmemory_operand" "r,i")))]
++ ""
++ "@
++ sub %0,%2\;sbc %B0,%B2\;sbc %C0,%C2\;sbc %D0,%D2
++ subi %A0,lo8(%2)\;sbci %B0,hi8(%2)\;sbci %C0,hlo8(%2)\;sbci %D0,hhi8(%2)"
++ [(set_attr "length" "4,4")
++ (set_attr "cc" "set_czn,set_czn")])
<<Diff was trimmed, longer than 597 lines>>
---- CVS-web:
http://cvs.pld-linux.org/cgi-bin/cvsweb.cgi/packages/crossavr-gcc/crossavr-gcc.spec?r1=1.38&r2=1.39&f=u
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