[packages/kernel/LINUX_4_19] - switch back to vanila upstream and update to 4.19.298

baggins baggins at pld-linux.org
Sun Nov 19 13:52:51 CET 2023


commit 35231cf0d7f193427b34419403949f37b2c0df4e
Author: Jan Rękorajski <baggins at pld-linux.org>
Date:   Sun Nov 19 12:55:44 2023 +0100

    - switch back to vanila upstream and update to 4.19.298
    
    CIP kernel is a modified version that may have some patches ommitted,
    we do not know what actually is inside and how it diverged from
    upstream. It is also is lagging behind with updates.

 gcc13.patch | 452 ------------------------------------------------------------
 kernel.spec |  22 ++-
 2 files changed, 9 insertions(+), 465 deletions(-)
---
diff --git a/kernel.spec b/kernel.spec
index bc4f22b0..cd92e696 100644
--- a/kernel.spec
+++ b/kernel.spec
@@ -68,10 +68,9 @@
 %define		have_pcmcia	0
 %endif
 
-%define		rel		2
+%define		rel		1
 %define		basever		4.19
-%define		postver		.295
-%define         cipver          cip103
+%define		postver		.298
 
 # define this to '-%{basever}' for longterm branch
 %define		versuffix	-%{basever}
@@ -123,11 +122,11 @@ License:	GPL v2
 Group:		Base/Kernel
 # Source0:	https://www.kernel.org/pub/linux/kernel/v4.x/linux-%{basever}.tar.xz
 # https://wiki.linuxfoundation.org/civilinfrastructureplatform/start
-Source0:        https://www.kernel.org/pub/linux/kernel/projects/cip/4.19/linux-cip-%{basever}%{postver}-%{cipver}.tar.xz
-# Source0-md5:	5d23dc75ee29c1f8081efdc2cbeccf6f
-%if 0 && "%{postver}" != ".0"
+Source0:        https://www.kernel.org/pub/linux/kernel/4.19/linux-%{basever}.tar.xz
+# Source0-md5:	740a90cf810c2105df8ee12e5d0bb900
+%if "%{postver}" != ".0"
 Patch0:		https://www.kernel.org/pub/linux/kernel/v4.x/patch-%{version}.xz
-# Patch0-md5:	97959b550c97ae656f7e321cc0e4767e
+# Patch0-md5:	9f1b2c6f71936e1a1c1f159b899cc5fe
 %endif
 Source1:	kernel.sysconfig
 
@@ -155,7 +154,6 @@ Source55:	kernel-imq.config
 
 Source58:	kernel-inittmpfs.config
 
-Patch1:		gcc13.patch
 # http://dev.gentoo.org/~spock/projects/fbcondecor/archive/fbcondecor-0.9.4-2.6.25-rc6.patch
 Patch3:		kernel-fbcondecor.patch
 Patch6:		linux-wistron-nx.patch
@@ -346,7 +344,7 @@ BuildRoot:	%{tmpdir}/%{name}-%{version}-root-%(id -u -n)
 %endif
 
 %define		topdir		%{_builddir}/%{name}-%{version}
-%define		srcdir		%{topdir}/linux-cip-%{basever}%{postver}-%{cipver}
+%define		srcdir		%{topdir}/linux-%{basever}
 %define		objdir		%{topdir}/%{targetobj}
 %define		targetobj	%{_target_base_arch}-gcc-%(%{__cc} -dumpversion)
 
@@ -619,16 +617,14 @@ Pakiet zawiera dokumentację do jądra Linuksa pochodzącą z katalogu
 %setup -qc
 ln -s %{SOURCE7} kernel-module-build.pl
 ln -s %{SOURCE10} Makefile
-cd linux-cip-%{basever}%{postver}-%{cipver}
+cd linux-%{basever}
 
-%if 0 && "%{postver}" != ".0"
+%if "%{postver}" != ".0"
 %patch0 -p1
 %endif
 
 %if %{without vanilla}
 
-%patch1 -p1
-
 %if %{with fbcondecor}
 %patch3 -p1
 %endif
diff --git a/gcc13.patch b/gcc13.patch
deleted file mode 100644
index 7ce506d8..00000000
--- a/gcc13.patch
+++ /dev/null
@@ -1,452 +0,0 @@
-From e6a71160cc145e18ab45195abf89884112e02dfb Mon Sep 17 00:00:00 2001
-From: Kees Cook <keescook at chromium.org>
-Date: Wed, 18 Jan 2023 12:21:35 -0800
-Subject: gcc-plugins: Reorganize gimple includes for GCC 13
-
-The gimple-iterator.h header must be included before gimple-fold.h
-starting with GCC 13. Reorganize gimple headers to work for all GCC
-versions.
-
-Reported-by: Palmer Dabbelt <palmer at rivosinc.com>
-Acked-by: Palmer Dabbelt <palmer at rivosinc.com>
-Link: https://lore.kernel.org/all/20230113173033.4380-1-palmer@rivosinc.com/
-Cc: linux-hardening at vger.kernel.org
-Signed-off-by: Kees Cook <keescook at chromium.org>
----
- scripts/gcc-plugins/gcc-common.h | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/scripts/gcc-plugins/gcc-common.h b/scripts/gcc-plugins/gcc-common.h
-index 9a1895747b153..84c730da36dd3 100644
---- a/scripts/gcc-plugins/gcc-common.h
-+++ b/scripts/gcc-plugins/gcc-common.h
-@@ -71,7 +71,9 @@
- #include "varasm.h"
- #include "stor-layout.h"
- #include "internal-fn.h"
-+#include "gimple.h"
- #include "gimple-expr.h"
-+#include "gimple-iterator.h"
- #include "gimple-fold.h"
- #include "context.h"
- #include "tree-ssa-alias.h"
-@@ -124,13 +126,10 @@
- #include "gimplify.h"
- #endif
- 
--#include "gimple.h"
--
- #if BUILDING_GCC_VERSION >= 4009
- #include "tree-ssa-operands.h"
- #include "tree-phinodes.h"
- #include "tree-cfg.h"
--#include "gimple-iterator.h"
- #include "gimple-ssa.h"
- #include "ssa-iterators.h"
- #endif
--- 
-cgit 
-
-From f07788079f515ca4a681c5f595bdad19cfbd7b1d Mon Sep 17 00:00:00 2001
-From: Arnd Bergmann <arnd at arndb.de>
-Date: Sat, 3 Dec 2022 11:54:25 +0100
-Subject: ata: ahci: fix enum constants for gcc-13
-
-gcc-13 slightly changes the type of constant expressions that are defined
-in an enum, which triggers a compile time sanity check in libata:
-
-linux/drivers/ata/libahci.c: In function 'ahci_led_store':
-linux/include/linux/compiler_types.h:357:45: error: call to '__compiletime_assert_302' declared with attribute error: BUILD_BUG_ON failed: sizeof(_s) > sizeof(long)
-357 | _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
-
-The new behavior is that sizeof() returns the same value for the
-constant as it does for the enum type, which is generally more sensible
-and consistent.
-
-The problem in libata is that it contains a single enum definition for
-lots of unrelated constants, some of which are large positive (unsigned)
-integers like 0xffffffff, while others like (1<<31) are interpreted as
-negative integers, and this forces the enum type to become 64 bit wide
-even though most constants would still fit into a signed 32-bit 'int'.
-
-Fix this by changing the entire enum definition to use BIT(x) in place
-of (1<<x), which results in all values being seen as 'unsigned' and
-fitting into an unsigned 32-bit type.
-
-Link: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107917
-Link: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107405
-Reported-by: Luis Machado <luis.machado at arm.com>
-Cc: linux-ide at vger.kernel.org
-Cc: Damien Le Moal <damien.lemoal at opensource.wdc.com>
-Cc: stable at vger.kernel.org
-Cc: Randy Dunlap <rdunlap at infradead.org>
-Signed-off-by: Arnd Bergmann <arnd at arndb.de>
-Tested-by: Luis Machado <luis.machado at arm.com>
-Signed-off-by: Damien Le Moal <damien.lemoal at opensource.wdc.com>
----
- drivers/ata/ahci.h | 245 +++++++++++++++++++++++++++--------------------------
- 1 file changed, 123 insertions(+), 122 deletions(-)
-
-(limited to 'drivers/ata')
-
-diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h
-index da7ee8bec165a..4cec725cf30a2 100644
---- a/drivers/ata/ahci.h
-+++ b/drivers/ata/ahci.h
-@@ -24,6 +24,7 @@
- #include <linux/libata.h>
- #include <linux/phy/phy.h>
- #include <linux/regulator/consumer.h>
-+#include <linux/bits.h>
- 
- /* Enclosure Management Control */
- #define EM_CTRL_MSG_TYPE              0x000f0000
-@@ -53,12 +54,12 @@ enum {
- 	AHCI_PORT_PRIV_FBS_DMA_SZ	= AHCI_CMD_SLOT_SZ +
- 					  AHCI_CMD_TBL_AR_SZ +
- 					  (AHCI_RX_FIS_SZ * 16),
--	AHCI_IRQ_ON_SG		= (1 << 31),
--	AHCI_CMD_ATAPI		= (1 << 5),
--	AHCI_CMD_WRITE		= (1 << 6),
--	AHCI_CMD_PREFETCH	= (1 << 7),
--	AHCI_CMD_RESET		= (1 << 8),
--	AHCI_CMD_CLR_BUSY	= (1 << 10),
-+	AHCI_IRQ_ON_SG		= BIT(31),
-+	AHCI_CMD_ATAPI		= BIT(5),
-+	AHCI_CMD_WRITE		= BIT(6),
-+	AHCI_CMD_PREFETCH	= BIT(7),
-+	AHCI_CMD_RESET		= BIT(8),
-+	AHCI_CMD_CLR_BUSY	= BIT(10),
- 
- 	RX_FIS_PIO_SETUP	= 0x20,	/* offset of PIO Setup FIS data */
- 	RX_FIS_D2H_REG		= 0x40,	/* offset of D2H Register FIS data */
-@@ -76,37 +77,37 @@ enum {
- 	HOST_CAP2		= 0x24, /* host capabilities, extended */
- 
- 	/* HOST_CTL bits */
--	HOST_RESET		= (1 << 0),  /* reset controller; self-clear */
--	HOST_IRQ_EN		= (1 << 1),  /* global IRQ enable */
--	HOST_MRSM		= (1 << 2),  /* MSI Revert to Single Message */
--	HOST_AHCI_EN		= (1 << 31), /* AHCI enabled */
-+	HOST_RESET		= BIT(0),  /* reset controller; self-clear */
-+	HOST_IRQ_EN		= BIT(1),  /* global IRQ enable */
-+	HOST_MRSM		= BIT(2),  /* MSI Revert to Single Message */
-+	HOST_AHCI_EN		= BIT(31), /* AHCI enabled */
- 
- 	/* HOST_CAP bits */
--	HOST_CAP_SXS		= (1 << 5),  /* Supports External SATA */
--	HOST_CAP_EMS		= (1 << 6),  /* Enclosure Management support */
--	HOST_CAP_CCC		= (1 << 7),  /* Command Completion Coalescing */
--	HOST_CAP_PART		= (1 << 13), /* Partial state capable */
--	HOST_CAP_SSC		= (1 << 14), /* Slumber state capable */
--	HOST_CAP_PIO_MULTI	= (1 << 15), /* PIO multiple DRQ support */
--	HOST_CAP_FBS		= (1 << 16), /* FIS-based switching support */
--	HOST_CAP_PMP		= (1 << 17), /* Port Multiplier support */
--	HOST_CAP_ONLY		= (1 << 18), /* Supports AHCI mode only */
--	HOST_CAP_CLO		= (1 << 24), /* Command List Override support */
--	HOST_CAP_LED		= (1 << 25), /* Supports activity LED */
--	HOST_CAP_ALPM		= (1 << 26), /* Aggressive Link PM support */
--	HOST_CAP_SSS		= (1 << 27), /* Staggered Spin-up */
--	HOST_CAP_MPS		= (1 << 28), /* Mechanical presence switch */
--	HOST_CAP_SNTF		= (1 << 29), /* SNotification register */
--	HOST_CAP_NCQ		= (1 << 30), /* Native Command Queueing */
--	HOST_CAP_64		= (1 << 31), /* PCI DAC (64-bit DMA) support */
-+	HOST_CAP_SXS		= BIT(5),  /* Supports External SATA */
-+	HOST_CAP_EMS		= BIT(6),  /* Enclosure Management support */
-+	HOST_CAP_CCC		= BIT(7),  /* Command Completion Coalescing */
-+	HOST_CAP_PART		= BIT(13), /* Partial state capable */
-+	HOST_CAP_SSC		= BIT(14), /* Slumber state capable */
-+	HOST_CAP_PIO_MULTI	= BIT(15), /* PIO multiple DRQ support */
-+	HOST_CAP_FBS		= BIT(16), /* FIS-based switching support */
-+	HOST_CAP_PMP		= BIT(17), /* Port Multiplier support */
-+	HOST_CAP_ONLY		= BIT(18), /* Supports AHCI mode only */
-+	HOST_CAP_CLO		= BIT(24), /* Command List Override support */
-+	HOST_CAP_LED		= BIT(25), /* Supports activity LED */
-+	HOST_CAP_ALPM		= BIT(26), /* Aggressive Link PM support */
-+	HOST_CAP_SSS		= BIT(27), /* Staggered Spin-up */
-+	HOST_CAP_MPS		= BIT(28), /* Mechanical presence switch */
-+	HOST_CAP_SNTF		= BIT(29), /* SNotification register */
-+	HOST_CAP_NCQ		= BIT(30), /* Native Command Queueing */
-+	HOST_CAP_64		= BIT(31), /* PCI DAC (64-bit DMA) support */
- 
- 	/* HOST_CAP2 bits */
--	HOST_CAP2_BOH		= (1 << 0),  /* BIOS/OS handoff supported */
--	HOST_CAP2_NVMHCI	= (1 << 1),  /* NVMHCI supported */
--	HOST_CAP2_APST		= (1 << 2),  /* Automatic partial to slumber */
--	HOST_CAP2_SDS		= (1 << 3),  /* Support device sleep */
--	HOST_CAP2_SADM		= (1 << 4),  /* Support aggressive DevSlp */
--	HOST_CAP2_DESO		= (1 << 5),  /* DevSlp from slumber only */
-+	HOST_CAP2_BOH		= BIT(0),  /* BIOS/OS handoff supported */
-+	HOST_CAP2_NVMHCI	= BIT(1),  /* NVMHCI supported */
-+	HOST_CAP2_APST		= BIT(2),  /* Automatic partial to slumber */
-+	HOST_CAP2_SDS		= BIT(3),  /* Support device sleep */
-+	HOST_CAP2_SADM		= BIT(4),  /* Support aggressive DevSlp */
-+	HOST_CAP2_DESO		= BIT(5),  /* DevSlp from slumber only */
- 
- 	/* registers for each SATA port */
- 	PORT_LST_ADDR		= 0x00, /* command list DMA addr */
-@@ -128,24 +129,24 @@ enum {
- 	PORT_DEVSLP		= 0x44, /* device sleep */
- 
- 	/* PORT_IRQ_{STAT,MASK} bits */
--	PORT_IRQ_COLD_PRES	= (1 << 31), /* cold presence detect */
--	PORT_IRQ_TF_ERR		= (1 << 30), /* task file error */
--	PORT_IRQ_HBUS_ERR	= (1 << 29), /* host bus fatal error */
--	PORT_IRQ_HBUS_DATA_ERR	= (1 << 28), /* host bus data error */
--	PORT_IRQ_IF_ERR		= (1 << 27), /* interface fatal error */
--	PORT_IRQ_IF_NONFATAL	= (1 << 26), /* interface non-fatal error */
--	PORT_IRQ_OVERFLOW	= (1 << 24), /* xfer exhausted available S/G */
--	PORT_IRQ_BAD_PMP	= (1 << 23), /* incorrect port multiplier */
--
--	PORT_IRQ_PHYRDY		= (1 << 22), /* PhyRdy changed */
--	PORT_IRQ_DEV_ILCK	= (1 << 7), /* device interlock */
--	PORT_IRQ_CONNECT	= (1 << 6), /* port connect change status */
--	PORT_IRQ_SG_DONE	= (1 << 5), /* descriptor processed */
--	PORT_IRQ_UNK_FIS	= (1 << 4), /* unknown FIS rx'd */
--	PORT_IRQ_SDB_FIS	= (1 << 3), /* Set Device Bits FIS rx'd */
--	PORT_IRQ_DMAS_FIS	= (1 << 2), /* DMA Setup FIS rx'd */
--	PORT_IRQ_PIOS_FIS	= (1 << 1), /* PIO Setup FIS rx'd */
--	PORT_IRQ_D2H_REG_FIS	= (1 << 0), /* D2H Register FIS rx'd */
-+	PORT_IRQ_COLD_PRES	= BIT(31), /* cold presence detect */
-+	PORT_IRQ_TF_ERR		= BIT(30), /* task file error */
-+	PORT_IRQ_HBUS_ERR	= BIT(29), /* host bus fatal error */
-+	PORT_IRQ_HBUS_DATA_ERR	= BIT(28), /* host bus data error */
-+	PORT_IRQ_IF_ERR		= BIT(27), /* interface fatal error */
-+	PORT_IRQ_IF_NONFATAL	= BIT(26), /* interface non-fatal error */
-+	PORT_IRQ_OVERFLOW	= BIT(24), /* xfer exhausted available S/G */
-+	PORT_IRQ_BAD_PMP	= BIT(23), /* incorrect port multiplier */
-+
-+	PORT_IRQ_PHYRDY		= BIT(22), /* PhyRdy changed */
-+	PORT_IRQ_DEV_ILCK	= BIT(7),  /* device interlock */
-+	PORT_IRQ_CONNECT	= BIT(6),  /* port connect change status */
-+	PORT_IRQ_SG_DONE	= BIT(5),  /* descriptor processed */
-+	PORT_IRQ_UNK_FIS	= BIT(4),  /* unknown FIS rx'd */
-+	PORT_IRQ_SDB_FIS	= BIT(3),  /* Set Device Bits FIS rx'd */
-+	PORT_IRQ_DMAS_FIS	= BIT(2),  /* DMA Setup FIS rx'd */
-+	PORT_IRQ_PIOS_FIS	= BIT(1),  /* PIO Setup FIS rx'd */
-+	PORT_IRQ_D2H_REG_FIS	= BIT(0),  /* D2H Register FIS rx'd */
- 
- 	PORT_IRQ_FREEZE		= PORT_IRQ_HBUS_ERR |
- 				  PORT_IRQ_IF_ERR |
-@@ -161,25 +162,25 @@ enum {
- 				  PORT_IRQ_PIOS_FIS | PORT_IRQ_D2H_REG_FIS,
- 
- 	/* PORT_CMD bits */
--	PORT_CMD_ASP		= (1 << 27), /* Aggressive Slumber/Partial */
--	PORT_CMD_ALPE		= (1 << 26), /* Aggressive Link PM enable */
--	PORT_CMD_ATAPI		= (1 << 24), /* Device is ATAPI */
--	PORT_CMD_FBSCP		= (1 << 22), /* FBS Capable Port */
--	PORT_CMD_ESP		= (1 << 21), /* External Sata Port */
--	PORT_CMD_HPCP		= (1 << 18), /* HotPlug Capable Port */
--	PORT_CMD_PMP		= (1 << 17), /* PMP attached */
--	PORT_CMD_LIST_ON	= (1 << 15), /* cmd list DMA engine running */
--	PORT_CMD_FIS_ON		= (1 << 14), /* FIS DMA engine running */
--	PORT_CMD_FIS_RX		= (1 << 4), /* Enable FIS receive DMA engine */
--	PORT_CMD_CLO		= (1 << 3), /* Command list override */
--	PORT_CMD_POWER_ON	= (1 << 2), /* Power up device */
--	PORT_CMD_SPIN_UP	= (1 << 1), /* Spin up device */
--	PORT_CMD_START		= (1 << 0), /* Enable port DMA engine */
--
--	PORT_CMD_ICC_MASK	= (0xf << 28), /* i/f ICC state mask */
--	PORT_CMD_ICC_ACTIVE	= (0x1 << 28), /* Put i/f in active state */
--	PORT_CMD_ICC_PARTIAL	= (0x2 << 28), /* Put i/f in partial state */
--	PORT_CMD_ICC_SLUMBER	= (0x6 << 28), /* Put i/f in slumber state */
-+	PORT_CMD_ASP		= BIT(27), /* Aggressive Slumber/Partial */
-+	PORT_CMD_ALPE		= BIT(26), /* Aggressive Link PM enable */
-+	PORT_CMD_ATAPI		= BIT(24), /* Device is ATAPI */
-+	PORT_CMD_FBSCP		= BIT(22), /* FBS Capable Port */
-+	PORT_CMD_ESP		= BIT(21), /* External Sata Port */
-+	PORT_CMD_HPCP		= BIT(18), /* HotPlug Capable Port */
-+	PORT_CMD_PMP		= BIT(17), /* PMP attached */
-+	PORT_CMD_LIST_ON	= BIT(15), /* cmd list DMA engine running */
-+	PORT_CMD_FIS_ON		= BIT(14), /* FIS DMA engine running */
-+	PORT_CMD_FIS_RX		= BIT(4),  /* Enable FIS receive DMA engine */
-+	PORT_CMD_CLO		= BIT(3),  /* Command list override */
-+	PORT_CMD_POWER_ON	= BIT(2),  /* Power up device */
-+	PORT_CMD_SPIN_UP	= BIT(1),  /* Spin up device */
-+	PORT_CMD_START		= BIT(0),  /* Enable port DMA engine */
-+
-+	PORT_CMD_ICC_MASK	= (0xfu << 28), /* i/f ICC state mask */
-+	PORT_CMD_ICC_ACTIVE	= (0x1u << 28), /* Put i/f in active state */
-+	PORT_CMD_ICC_PARTIAL	= (0x2u << 28), /* Put i/f in partial state */
-+	PORT_CMD_ICC_SLUMBER	= (0x6u << 28), /* Put i/f in slumber state */
- 
- 	/* PORT_FBS bits */
- 	PORT_FBS_DWE_OFFSET	= 16, /* FBS device with error offset */
-@@ -192,9 +193,9 @@ enum {
- 	PORT_FBS_ADO_OFFSET	= 12, /* FBS active dev optimization offset */
- 	PORT_FBS_DEV_OFFSET	= 8,  /* FBS device to issue offset */
- 	PORT_FBS_DEV_MASK	= (0xf << PORT_FBS_DEV_OFFSET),  /* FBS.DEV */
--	PORT_FBS_SDE		= (1 << 2), /* FBS single device error */
--	PORT_FBS_DEC		= (1 << 1), /* FBS device error clear */
--	PORT_FBS_EN		= (1 << 0), /* Enable FBS */
-+	PORT_FBS_SDE		= BIT(2), /* FBS single device error */
-+	PORT_FBS_DEC		= BIT(1), /* FBS device error clear */
-+	PORT_FBS_EN		= BIT(0), /* Enable FBS */
- 
- 	/* PORT_DEVSLP bits */
- 	PORT_DEVSLP_DM_OFFSET	= 25,             /* DITO multiplier offset */
-@@ -202,47 +203,47 @@ enum {
- 	PORT_DEVSLP_DITO_OFFSET	= 15,             /* DITO offset */
- 	PORT_DEVSLP_MDAT_OFFSET	= 10,             /* Minimum assertion time */
- 	PORT_DEVSLP_DETO_OFFSET	= 2,              /* DevSlp exit timeout */
--	PORT_DEVSLP_DSP		= (1 << 1),       /* DevSlp present */
--	PORT_DEVSLP_ADSE	= (1 << 0),       /* Aggressive DevSlp enable */
-+	PORT_DEVSLP_DSP		= BIT(1),         /* DevSlp present */
-+	PORT_DEVSLP_ADSE	= BIT(0),         /* Aggressive DevSlp enable */
- 
- 	/* hpriv->flags bits */
- 
- #define AHCI_HFLAGS(flags)		.private_data	= (void *)(flags)
- 
--	AHCI_HFLAG_NO_NCQ		= (1 << 0),
--	AHCI_HFLAG_IGN_IRQ_IF_ERR	= (1 << 1), /* ignore IRQ_IF_ERR */
--	AHCI_HFLAG_IGN_SERR_INTERNAL	= (1 << 2), /* ignore SERR_INTERNAL */
--	AHCI_HFLAG_32BIT_ONLY		= (1 << 3), /* force 32bit */
--	AHCI_HFLAG_MV_PATA		= (1 << 4), /* PATA port */
--	AHCI_HFLAG_NO_MSI		= (1 << 5), /* no PCI MSI */
--	AHCI_HFLAG_NO_PMP		= (1 << 6), /* no PMP */
--	AHCI_HFLAG_SECT255		= (1 << 8), /* max 255 sectors */
--	AHCI_HFLAG_YES_NCQ		= (1 << 9), /* force NCQ cap on */
--	AHCI_HFLAG_NO_SUSPEND		= (1 << 10), /* don't suspend */
--	AHCI_HFLAG_SRST_TOUT_IS_OFFLINE	= (1 << 11), /* treat SRST timeout as
--							link offline */
--	AHCI_HFLAG_NO_SNTF		= (1 << 12), /* no sntf */
--	AHCI_HFLAG_NO_FPDMA_AA		= (1 << 13), /* no FPDMA AA */
--	AHCI_HFLAG_YES_FBS		= (1 << 14), /* force FBS cap on */
--	AHCI_HFLAG_DELAY_ENGINE		= (1 << 15), /* do not start engine on
--						        port start (wait until
--						        error-handling stage) */
--	AHCI_HFLAG_NO_DEVSLP		= (1 << 17), /* no device sleep */
--	AHCI_HFLAG_NO_FBS		= (1 << 18), /* no FBS */
-+	AHCI_HFLAG_NO_NCQ		= BIT(0),
-+	AHCI_HFLAG_IGN_IRQ_IF_ERR	= BIT(1), /* ignore IRQ_IF_ERR */
-+	AHCI_HFLAG_IGN_SERR_INTERNAL	= BIT(2), /* ignore SERR_INTERNAL */
-+	AHCI_HFLAG_32BIT_ONLY		= BIT(3), /* force 32bit */
-+	AHCI_HFLAG_MV_PATA		= BIT(4), /* PATA port */
-+	AHCI_HFLAG_NO_MSI		= BIT(5), /* no PCI MSI */
-+	AHCI_HFLAG_NO_PMP		= BIT(6), /* no PMP */
-+	AHCI_HFLAG_SECT255		= BIT(8), /* max 255 sectors */
-+	AHCI_HFLAG_YES_NCQ		= BIT(9), /* force NCQ cap on */
-+	AHCI_HFLAG_NO_SUSPEND		= BIT(10), /* don't suspend */
-+	AHCI_HFLAG_SRST_TOUT_IS_OFFLINE	= BIT(11), /* treat SRST timeout as
-+						      link offline */
-+	AHCI_HFLAG_NO_SNTF		= BIT(12), /* no sntf */
-+	AHCI_HFLAG_NO_FPDMA_AA		= BIT(13), /* no FPDMA AA */
-+	AHCI_HFLAG_YES_FBS		= BIT(14), /* force FBS cap on */
-+	AHCI_HFLAG_DELAY_ENGINE		= BIT(15), /* do not start engine on
-+						      port start (wait until
-+						      error-handling stage) */
-+	AHCI_HFLAG_NO_DEVSLP		= BIT(17), /* no device sleep */
-+	AHCI_HFLAG_NO_FBS		= BIT(18), /* no FBS */
- 
- #ifdef CONFIG_PCI_MSI
--	AHCI_HFLAG_MULTI_MSI		= (1 << 20), /* per-port MSI(-X) */
-+	AHCI_HFLAG_MULTI_MSI		= BIT(20), /* per-port MSI(-X) */
- #else
- 	/* compile out MSI infrastructure */
- 	AHCI_HFLAG_MULTI_MSI		= 0,
- #endif
--	AHCI_HFLAG_WAKE_BEFORE_STOP	= (1 << 22), /* wake before DMA stop */
--	AHCI_HFLAG_YES_ALPM		= (1 << 23), /* force ALPM cap on */
--	AHCI_HFLAG_NO_WRITE_TO_RO	= (1 << 24), /* don't write to read
--							only registers */
--	AHCI_HFLAG_IS_MOBILE		= (1 << 25), /* mobile chipset, use
--							SATA_MOBILE_LPM_POLICY
--							as default lpm_policy */
-+	AHCI_HFLAG_WAKE_BEFORE_STOP	= BIT(22), /* wake before DMA stop */
-+	AHCI_HFLAG_YES_ALPM		= BIT(23), /* force ALPM cap on */
-+	AHCI_HFLAG_NO_WRITE_TO_RO	= BIT(24), /* don't write to read
-+						      only registers */
-+	AHCI_HFLAG_IS_MOBILE		= BIT(25), /* mobile chipset, use
-+						      SATA_MOBILE_LPM_POLICY
-+						      as default lpm_policy */
- 
- 	/* ap->flags bits */
- 
-@@ -261,22 +262,22 @@ enum {
- 	EM_MAX_RETRY			= 5,
- 
- 	/* em_ctl bits */
--	EM_CTL_RST		= (1 << 9), /* Reset */
--	EM_CTL_TM		= (1 << 8), /* Transmit Message */
--	EM_CTL_MR		= (1 << 0), /* Message Received */
--	EM_CTL_ALHD		= (1 << 26), /* Activity LED */
--	EM_CTL_XMT		= (1 << 25), /* Transmit Only */
--	EM_CTL_SMB		= (1 << 24), /* Single Message Buffer */
--	EM_CTL_SGPIO		= (1 << 19), /* SGPIO messages supported */
--	EM_CTL_SES		= (1 << 18), /* SES-2 messages supported */
--	EM_CTL_SAFTE		= (1 << 17), /* SAF-TE messages supported */
--	EM_CTL_LED		= (1 << 16), /* LED messages supported */
-+	EM_CTL_RST		= BIT(9), /* Reset */
-+	EM_CTL_TM		= BIT(8), /* Transmit Message */
-+	EM_CTL_MR		= BIT(0), /* Message Received */
-+	EM_CTL_ALHD		= BIT(26), /* Activity LED */
-+	EM_CTL_XMT		= BIT(25), /* Transmit Only */
-+	EM_CTL_SMB		= BIT(24), /* Single Message Buffer */
-+	EM_CTL_SGPIO		= BIT(19), /* SGPIO messages supported */
-+	EM_CTL_SES		= BIT(18), /* SES-2 messages supported */
-+	EM_CTL_SAFTE		= BIT(17), /* SAF-TE messages supported */
-+	EM_CTL_LED		= BIT(16), /* LED messages supported */
- 
- 	/* em message type */
--	EM_MSG_TYPE_LED		= (1 << 0), /* LED */
--	EM_MSG_TYPE_SAFTE	= (1 << 1), /* SAF-TE */
--	EM_MSG_TYPE_SES2	= (1 << 2), /* SES-2 */
--	EM_MSG_TYPE_SGPIO	= (1 << 3), /* SGPIO */
-+	EM_MSG_TYPE_LED		= BIT(0), /* LED */
-+	EM_MSG_TYPE_SAFTE	= BIT(1), /* SAF-TE */
-+	EM_MSG_TYPE_SES2	= BIT(2), /* SES-2 */
-+	EM_MSG_TYPE_SGPIO	= BIT(3), /* SGPIO */
- };
- 
- struct ahci_cmd_hdr {
--- 
-cgit 
-
-From 5a6b64adc18d9adfb497a529ff004d59b6df151f Mon Sep 17 00:00:00 2001
-From: Sam James <sam at gentoo.org>
-Date: Wed, 1 Feb 2023 23:00:09 +0000
-Subject: gcc-plugins: drop -std=gnu++11 to fix GCC 13 build
-
-The latest GCC 13 snapshot (13.0.1 20230129) gives the following:
-```
-cc1: error: cannot load plugin ./scripts/gcc-plugins/randomize_layout_plugin.so
- :./scripts/gcc-plugins/randomize_layout_plugin.so: undefined symbol: tree_code_type
-```
-
-This ends up being because of https://gcc.gnu.org/git/gitweb.cgi?p=gcc.git;h=b0241ce6e37031
-upstream in GCC which changes the visibility of some types used by the kernel's
-plugin infrastructure like tree_code_type.
-
-After discussion with the GCC folks, we found that the kernel needs to be building
-plugins with the same flags used to build GCC - and GCC defaults to gnu++17
-right now. The minimum GCC version needed to build the kernel is GCC 5.1
-and GCC 5.1 already defaults to gnu++14 anyway, so just drop the flag, as
-all GCCs that could be used to build GCC already default to an acceptable
-version which was >= the version we forced via flags until now.
-
-Bug: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108634
-Signed-off-by: Sam James <sam at gentoo.org>
-Signed-off-by: Kees Cook <keescook at chromium.org>
-Link: https://lore.kernel.org/r/20230201230009.2252783-1-sam@gentoo.org
----
- scripts/gcc-plugins/Makefile | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/scripts/gcc-plugins/Makefile b/scripts/gcc-plugins/Makefile
-index b34d11e226366..320afd3cf8e82 100644
---- a/scripts/gcc-plugins/Makefile
-+++ b/scripts/gcc-plugins/Makefile
-@@ -7,7 +7,7 @@
-   export HOST_EXTRACFLAGS
- else
-   HOSTLIBS := hostcxxlibs
--  HOST_EXTRACXXFLAGS += -I$(GCC_PLUGINS_DIR)/include -I$(src) -std=gnu++98 -fno-rtti
-+  HOST_EXTRACXXFLAGS += -I$(GCC_PLUGINS_DIR)/include -I$(src) -fno-rtti
-   HOST_EXTRACXXFLAGS += -fno-exceptions -fasynchronous-unwind-tables -ggdb
-   HOST_EXTRACXXFLAGS += -Wno-narrowing -Wno-unused-variable
-   HOST_EXTRACXXFLAGS += -Wno-format-diag
--- 
-cgit 
-
================================================================

---- gitweb:

http://git.pld-linux.org/gitweb.cgi/packages/kernel.git/commitdiff/35231cf0d7f193427b34419403949f37b2c0df4e



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